Johannes Stratmann / mbed-dev

added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

api/SPI.h@147:ba84b7dc41a7, 2016-09-10 (annotated)

Committer:
JojoS
Date:
Sat Sep 10 15:32:04 2016 +0000
Revision:
147:ba84b7dc41a7
Parent:
144:ef7eb2e8f9f7 
added prescaler for 16 bit timers (solution as in LPC11xx), default prescaler 31 for max 28 ms period time

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /* mbed Microcontroller Library
<> 144:ef7eb2e8f9f7 2 * Copyright (c) 2006-2015 ARM Limited
<> 144:ef7eb2e8f9f7 3 *
<> 144:ef7eb2e8f9f7 4 * Licensed under the Apache License, Version 2.0 (the "License");
<> 144:ef7eb2e8f9f7 5 * you may not use this file except in compliance with the License.
<> 144:ef7eb2e8f9f7 6 * You may obtain a copy of the License at
<> 144:ef7eb2e8f9f7 7 *
<> 144:ef7eb2e8f9f7 8 * http://www.apache.org/licenses/LICENSE-2.0
<> 144:ef7eb2e8f9f7 9 *
<> 144:ef7eb2e8f9f7 10 * Unless required by applicable law or agreed to in writing, software
<> 144:ef7eb2e8f9f7 11 * distributed under the License is distributed on an "AS IS" BASIS,
<> 144:ef7eb2e8f9f7 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
<> 144:ef7eb2e8f9f7 13 * See the License for the specific language governing permissions and
<> 144:ef7eb2e8f9f7 14 * limitations under the License.
<> 144:ef7eb2e8f9f7 15 */
<> 144:ef7eb2e8f9f7 16 #ifndef MBED_SPI_H
<> 144:ef7eb2e8f9f7 17 #define MBED_SPI_H
<> 144:ef7eb2e8f9f7 18
<> 144:ef7eb2e8f9f7 19 #include "platform.h"
<> 144:ef7eb2e8f9f7 20
<> 144:ef7eb2e8f9f7 21 #if DEVICE_SPI
<> 144:ef7eb2e8f9f7 22
<> 144:ef7eb2e8f9f7 23 #include "PlatformMutex.h"
<> 144:ef7eb2e8f9f7 24 #include "spi_api.h"
<> 144:ef7eb2e8f9f7 25 #include "SingletonPtr.h"
<> 144:ef7eb2e8f9f7 26
<> 144:ef7eb2e8f9f7 27 #if DEVICE_SPI_ASYNCH
<> 144:ef7eb2e8f9f7 28 #include "CThunk.h"
<> 144:ef7eb2e8f9f7 29 #include "dma_api.h"
<> 144:ef7eb2e8f9f7 30 #include "CircularBuffer.h"
<> 144:ef7eb2e8f9f7 31 #include "FunctionPointer.h"
<> 144:ef7eb2e8f9f7 32 #include "Transaction.h"
<> 144:ef7eb2e8f9f7 33 #endif
<> 144:ef7eb2e8f9f7 34
<> 144:ef7eb2e8f9f7 35 namespace mbed {
<> 144:ef7eb2e8f9f7 36
<> 144:ef7eb2e8f9f7 37 /** A SPI Master, used for communicating with SPI slave devices
<> 144:ef7eb2e8f9f7 38 *
<> 144:ef7eb2e8f9f7 39 * The default format is set to 8-bits, mode 0, and a clock frequency of 1MHz
<> 144:ef7eb2e8f9f7 40 *
<> 144:ef7eb2e8f9f7 41 * Most SPI devices will also require Chip Select and Reset signals. These
<> 144:ef7eb2e8f9f7 42 * can be controlled using <DigitalOut> pins
<> 144:ef7eb2e8f9f7 43 *
<> 144:ef7eb2e8f9f7 44 * @Note Synchronization level: Thread safe
<> 144:ef7eb2e8f9f7 45 *
<> 144:ef7eb2e8f9f7 46 * Example:
<> 144:ef7eb2e8f9f7 47 * @code
<> 144:ef7eb2e8f9f7 48 * // Send a byte to a SPI slave, and record the response
<> 144:ef7eb2e8f9f7 49 *
<> 144:ef7eb2e8f9f7 50 * #include "mbed.h"
<> 144:ef7eb2e8f9f7 51 *
<> 144:ef7eb2e8f9f7 52 * // hardware ssel (where applicable)
<> 144:ef7eb2e8f9f7 53 * //SPI device(p5, p6, p7, p8); // mosi, miso, sclk, ssel
<> 144:ef7eb2e8f9f7 54 *
<> 144:ef7eb2e8f9f7 55 * // software ssel
<> 144:ef7eb2e8f9f7 56 * SPI device(p5, p6, p7); // mosi, miso, sclk
<> 144:ef7eb2e8f9f7 57 * DigitalOut cs(p8); // ssel
<> 144:ef7eb2e8f9f7 58 *
<> 144:ef7eb2e8f9f7 59 * int main() {
<> 144:ef7eb2e8f9f7 60 * // hardware ssel (where applicable)
<> 144:ef7eb2e8f9f7 61 * //int response = device.write(0xFF);
<> 144:ef7eb2e8f9f7 62 *
<> 144:ef7eb2e8f9f7 63 * device.lock();
<> 144:ef7eb2e8f9f7 64 * // software ssel
<> 144:ef7eb2e8f9f7 65 * cs = 0;
<> 144:ef7eb2e8f9f7 66 * int response = device.write(0xFF);
<> 144:ef7eb2e8f9f7 67 * cs = 1;
<> 144:ef7eb2e8f9f7 68 * device.unlock();
<> 144:ef7eb2e8f9f7 69 *
<> 144:ef7eb2e8f9f7 70 * }
<> 144:ef7eb2e8f9f7 71 * @endcode
<> 144:ef7eb2e8f9f7 72 */
<> 144:ef7eb2e8f9f7 73 class SPI {
<> 144:ef7eb2e8f9f7 74
<> 144:ef7eb2e8f9f7 75 public:
<> 144:ef7eb2e8f9f7 76
<> 144:ef7eb2e8f9f7 77 /** Create a SPI master connected to the specified pins
<> 144:ef7eb2e8f9f7 78 *
<> 144:ef7eb2e8f9f7 79 * mosi or miso can be specfied as NC if not used
<> 144:ef7eb2e8f9f7 80 *
<> 144:ef7eb2e8f9f7 81 * @param mosi SPI Master Out, Slave In pin
<> 144:ef7eb2e8f9f7 82 * @param miso SPI Master In, Slave Out pin
<> 144:ef7eb2e8f9f7 83 * @param sclk SPI Clock pin
<> 144:ef7eb2e8f9f7 84 * @param ssel SPI chip select pin
<> 144:ef7eb2e8f9f7 85 */
<> 144:ef7eb2e8f9f7 86 SPI(PinName mosi, PinName miso, PinName sclk, PinName ssel=NC);
<> 144:ef7eb2e8f9f7 87
<> 144:ef7eb2e8f9f7 88 /** Configure the data transmission format
<> 144:ef7eb2e8f9f7 89 *
<> 144:ef7eb2e8f9f7 90 * @param bits Number of bits per SPI frame (4 - 16)
<> 144:ef7eb2e8f9f7 91 * @param mode Clock polarity and phase mode (0 - 3)
<> 144:ef7eb2e8f9f7 92 *
<> 144:ef7eb2e8f9f7 93 * @code
<> 144:ef7eb2e8f9f7 94 * mode | POL PHA
<> 144:ef7eb2e8f9f7 95 * -----+--------
<> 144:ef7eb2e8f9f7 96 * 0 | 0 0
<> 144:ef7eb2e8f9f7 97 * 1 | 0 1
<> 144:ef7eb2e8f9f7 98 * 2 | 1 0
<> 144:ef7eb2e8f9f7 99 * 3 | 1 1
<> 144:ef7eb2e8f9f7 100 * @endcode
<> 144:ef7eb2e8f9f7 101 */
<> 144:ef7eb2e8f9f7 102 void format(int bits, int mode = 0);
<> 144:ef7eb2e8f9f7 103
<> 144:ef7eb2e8f9f7 104 /** Set the spi bus clock frequency
<> 144:ef7eb2e8f9f7 105 *
<> 144:ef7eb2e8f9f7 106 * @param hz SCLK frequency in hz (default = 1MHz)
<> 144:ef7eb2e8f9f7 107 */
<> 144:ef7eb2e8f9f7 108 void frequency(int hz = 1000000);
<> 144:ef7eb2e8f9f7 109
<> 144:ef7eb2e8f9f7 110 /** Write to the SPI Slave and return the response
<> 144:ef7eb2e8f9f7 111 *
<> 144:ef7eb2e8f9f7 112 * @param value Data to be sent to the SPI slave
<> 144:ef7eb2e8f9f7 113 *
<> 144:ef7eb2e8f9f7 114 * @returns
<> 144:ef7eb2e8f9f7 115 * Response from the SPI slave
<> 144:ef7eb2e8f9f7 116 */
<> 144:ef7eb2e8f9f7 117 virtual int write(int value);
<> 144:ef7eb2e8f9f7 118
<> 144:ef7eb2e8f9f7 119 /** Acquire exclusive access to this SPI bus
<> 144:ef7eb2e8f9f7 120 */
<> 144:ef7eb2e8f9f7 121 virtual void lock(void);
<> 144:ef7eb2e8f9f7 122
<> 144:ef7eb2e8f9f7 123 /** Release exclusive access to this SPI bus
<> 144:ef7eb2e8f9f7 124 */
<> 144:ef7eb2e8f9f7 125 virtual void unlock(void);
<> 144:ef7eb2e8f9f7 126
<> 144:ef7eb2e8f9f7 127 #if DEVICE_SPI_ASYNCH
<> 144:ef7eb2e8f9f7 128
<> 144:ef7eb2e8f9f7 129 /** Start non-blocking SPI transfer using 8bit buffers.
<> 144:ef7eb2e8f9f7 130 *
<> 144:ef7eb2e8f9f7 131 * @param tx_buffer The TX buffer with data to be transfered. If NULL is passed,
<> 144:ef7eb2e8f9f7 132 * the default SPI value is sent
<> 144:ef7eb2e8f9f7 133 * @param tx_length The length of TX buffer in bytes
<> 144:ef7eb2e8f9f7 134 * @param rx_buffer The RX buffer which is used for received data. If NULL is passed,
<> 144:ef7eb2e8f9f7 135 * received data are ignored
<> 144:ef7eb2e8f9f7 136 * @param rx_length The length of RX buffer in bytes
<> 144:ef7eb2e8f9f7 137 * @param callback The event callback function
<> 144:ef7eb2e8f9f7 138 * @param event The logical OR of events to modify. Look at spi hal header file for SPI events.
<> 144:ef7eb2e8f9f7 139 * @return Zero if the transfer has started, or -1 if SPI peripheral is busy
<> 144:ef7eb2e8f9f7 140 */
<> 144:ef7eb2e8f9f7 141 template<typename Type>
<> 144:ef7eb2e8f9f7 142 int transfer(const Type *tx_buffer, int tx_length, Type *rx_buffer, int rx_length, const event_callback_t& callback, int event = SPI_EVENT_COMPLETE) {
<> 144:ef7eb2e8f9f7 143 if (spi_active(&_spi)) {
<> 144:ef7eb2e8f9f7 144 return queue_transfer(tx_buffer, tx_length, rx_buffer, rx_length, sizeof(Type)*8, callback, event);
<> 144:ef7eb2e8f9f7 145 }
<> 144:ef7eb2e8f9f7 146 start_transfer(tx_buffer, tx_length, rx_buffer, rx_length, sizeof(Type)*8, callback, event);
<> 144:ef7eb2e8f9f7 147 return 0;
<> 144:ef7eb2e8f9f7 148 }
<> 144:ef7eb2e8f9f7 149
<> 144:ef7eb2e8f9f7 150 /** Abort the on-going SPI transfer, and continue with transfer's in the queue if any.
<> 144:ef7eb2e8f9f7 151 */
<> 144:ef7eb2e8f9f7 152 void abort_transfer();
<> 144:ef7eb2e8f9f7 153
<> 144:ef7eb2e8f9f7 154 /** Clear the transaction buffer
<> 144:ef7eb2e8f9f7 155 */
<> 144:ef7eb2e8f9f7 156 void clear_transfer_buffer();
<> 144:ef7eb2e8f9f7 157
<> 144:ef7eb2e8f9f7 158 /** Clear the transaction buffer and abort on-going transfer.
<> 144:ef7eb2e8f9f7 159 */
<> 144:ef7eb2e8f9f7 160 void abort_all_transfers();
<> 144:ef7eb2e8f9f7 161
<> 144:ef7eb2e8f9f7 162 /** Configure DMA usage suggestion for non-blocking transfers
<> 144:ef7eb2e8f9f7 163 *
<> 144:ef7eb2e8f9f7 164 * @param usage The usage DMA hint for peripheral
<> 144:ef7eb2e8f9f7 165 * @return Zero if the usage was set, -1 if a transaction is on-going
<> 144:ef7eb2e8f9f7 166 */
<> 144:ef7eb2e8f9f7 167 int set_dma_usage(DMAUsage usage);
<> 144:ef7eb2e8f9f7 168
<> 144:ef7eb2e8f9f7 169 protected:
<> 144:ef7eb2e8f9f7 170 /** SPI IRQ handler
<> 144:ef7eb2e8f9f7 171 *
<> 144:ef7eb2e8f9f7 172 */
<> 144:ef7eb2e8f9f7 173 void irq_handler_asynch(void);
<> 144:ef7eb2e8f9f7 174
<> 144:ef7eb2e8f9f7 175 /** Common transfer method
<> 144:ef7eb2e8f9f7 176 *
<> 144:ef7eb2e8f9f7 177 * @param tx_buffer The TX buffer with data to be transfered. If NULL is passed,
<> 144:ef7eb2e8f9f7 178 * the default SPI value is sent
<> 144:ef7eb2e8f9f7 179 * @param tx_length The length of TX buffer in bytes
<> 144:ef7eb2e8f9f7 180 * @param rx_buffer The RX buffer which is used for received data. If NULL is passed,
<> 144:ef7eb2e8f9f7 181 * received data are ignored
<> 144:ef7eb2e8f9f7 182 * @param rx_length The length of RX buffer in bytes
<> 144:ef7eb2e8f9f7 183 * @param bit_width The buffers element width
<> 144:ef7eb2e8f9f7 184 * @param callback The event callback function
<> 144:ef7eb2e8f9f7 185 * @param event The logical OR of events to modify
<> 144:ef7eb2e8f9f7 186 * @return Zero if the transfer has started or was added to the queue, or -1 if SPI peripheral is busy/buffer is full
<> 144:ef7eb2e8f9f7 187 */
<> 144:ef7eb2e8f9f7 188 int transfer(const void *tx_buffer, int tx_length, void *rx_buffer, int rx_length, unsigned char bit_width, const event_callback_t& callback, int event);
<> 144:ef7eb2e8f9f7 189
<> 144:ef7eb2e8f9f7 190 /**
<> 144:ef7eb2e8f9f7 191 *
<> 144:ef7eb2e8f9f7 192 * @param tx_buffer The TX buffer with data to be transfered. If NULL is passed,
<> 144:ef7eb2e8f9f7 193 * the default SPI value is sent
<> 144:ef7eb2e8f9f7 194 * @param tx_length The length of TX buffer in bytes
<> 144:ef7eb2e8f9f7 195 * @param rx_buffer The RX buffer which is used for received data. If NULL is passed,
<> 144:ef7eb2e8f9f7 196 * received data are ignored
<> 144:ef7eb2e8f9f7 197 * @param rx_length The length of RX buffer in bytes
<> 144:ef7eb2e8f9f7 198 * @param bit_width The buffers element width
<> 144:ef7eb2e8f9f7 199 * @param callback The event callback function
<> 144:ef7eb2e8f9f7 200 * @param event The logical OR of events to modify
<> 144:ef7eb2e8f9f7 201 * @return Zero if a transfer was added to the queue, or -1 if the queue is full
<> 144:ef7eb2e8f9f7 202 */
<> 144:ef7eb2e8f9f7 203 int queue_transfer(const void *tx_buffer, int tx_length, void *rx_buffer, int rx_length, unsigned char bit_width, const event_callback_t& callback, int event);
<> 144:ef7eb2e8f9f7 204
<> 144:ef7eb2e8f9f7 205 /** Configures a callback, spi peripheral and initiate a new transfer
<> 144:ef7eb2e8f9f7 206 *
<> 144:ef7eb2e8f9f7 207 * @param tx_buffer The TX buffer with data to be transfered. If NULL is passed,
<> 144:ef7eb2e8f9f7 208 * the default SPI value is sent
<> 144:ef7eb2e8f9f7 209 * @param tx_length The length of TX buffer in bytes
<> 144:ef7eb2e8f9f7 210 * @param rx_buffer The RX buffer which is used for received data. If NULL is passed,
<> 144:ef7eb2e8f9f7 211 * received data are ignored
<> 144:ef7eb2e8f9f7 212 * @param rx_length The length of RX buffer in bytes
<> 144:ef7eb2e8f9f7 213 * @param bit_width The buffers element width
<> 144:ef7eb2e8f9f7 214 * @param callback The event callback function
<> 144:ef7eb2e8f9f7 215 * @param event The logical OR of events to modify
<> 144:ef7eb2e8f9f7 216 */
<> 144:ef7eb2e8f9f7 217 void start_transfer(const void *tx_buffer, int tx_length, void *rx_buffer, int rx_length, unsigned char bit_width, const event_callback_t& callback, int event);
<> 144:ef7eb2e8f9f7 218
<> 144:ef7eb2e8f9f7 219 #if TRANSACTION_QUEUE_SIZE_SPI
<> 144:ef7eb2e8f9f7 220
<> 144:ef7eb2e8f9f7 221 /** Start a new transaction
<> 144:ef7eb2e8f9f7 222 *
<> 144:ef7eb2e8f9f7 223 * @param data Transaction data
<> 144:ef7eb2e8f9f7 224 */
<> 144:ef7eb2e8f9f7 225 void start_transaction(transaction_t *data);
<> 144:ef7eb2e8f9f7 226
<> 144:ef7eb2e8f9f7 227 /** Dequeue a transaction
<> 144:ef7eb2e8f9f7 228 *
<> 144:ef7eb2e8f9f7 229 */
<> 144:ef7eb2e8f9f7 230 void dequeue_transaction();
<> 144:ef7eb2e8f9f7 231 static CircularBuffer<Transaction<SPI>, TRANSACTION_QUEUE_SIZE_SPI> _transaction_buffer;
<> 144:ef7eb2e8f9f7 232 #endif
<> 144:ef7eb2e8f9f7 233
<> 144:ef7eb2e8f9f7 234 #endif
<> 144:ef7eb2e8f9f7 235
<> 144:ef7eb2e8f9f7 236 public:
<> 144:ef7eb2e8f9f7 237 virtual ~SPI() {
<> 144:ef7eb2e8f9f7 238 }
<> 144:ef7eb2e8f9f7 239
<> 144:ef7eb2e8f9f7 240 protected:
<> 144:ef7eb2e8f9f7 241 spi_t _spi;
<> 144:ef7eb2e8f9f7 242
<> 144:ef7eb2e8f9f7 243 #if DEVICE_SPI_ASYNCH
<> 144:ef7eb2e8f9f7 244 CThunk<SPI> _irq;
<> 144:ef7eb2e8f9f7 245 event_callback_t _callback;
<> 144:ef7eb2e8f9f7 246 DMAUsage _usage;
<> 144:ef7eb2e8f9f7 247 #endif
<> 144:ef7eb2e8f9f7 248
<> 144:ef7eb2e8f9f7 249 void aquire(void);
<> 144:ef7eb2e8f9f7 250 static SPI *_owner;
<> 144:ef7eb2e8f9f7 251 static SingletonPtr<PlatformMutex> _mutex;
<> 144:ef7eb2e8f9f7 252 int _bits;
<> 144:ef7eb2e8f9f7 253 int _mode;
<> 144:ef7eb2e8f9f7 254 int _hz;
<> 144:ef7eb2e8f9f7 255 };
<> 144:ef7eb2e8f9f7 256
<> 144:ef7eb2e8f9f7 257 } // namespace mbed
<> 144:ef7eb2e8f9f7 258
<> 144:ef7eb2e8f9f7 259 #endif
<> 144:ef7eb2e8f9f7 260
<> 144:ef7eb2e8f9f7 261 #endif