This is a part of the Kinetiszer project.

Dependents:   SoundEngine

Committer:
Clemo
Date:
Tue Oct 28 12:19:22 2014 +0000
Revision:
0:5a419ba2726d
Error & warning free (I believe as I don't know how to clean).

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Clemo 0:5a419ba2726d 1 /*
Clemo 0:5a419ba2726d 2 * @brief PWM timer driver
Clemo 0:5a419ba2726d 3 *
Clemo 0:5a419ba2726d 4 * @note
Clemo 0:5a419ba2726d 5 * Copyright (C) Elektor, 2014
Clemo 0:5a419ba2726d 6 * All rights reserved.
Clemo 0:5a419ba2726d 7 *
Clemo 0:5a419ba2726d 8 * @par
Clemo 0:5a419ba2726d 9 * This software is supplied "AS IS" without any warranties of any kind,
Clemo 0:5a419ba2726d 10 * and Elektor and its licensor disclaim any and all warranties, express
Clemo 0:5a419ba2726d 11 * or implied, including all implied warranties of merchantability,
Clemo 0:5a419ba2726d 12 * fitness for a particular purpose and non-infringement of intellectual
Clemo 0:5a419ba2726d 13 * property rights. Elektor assumes no responsibility or liability for
Clemo 0:5a419ba2726d 14 * the use of the software, conveys no license or rights under any patent,
Clemo 0:5a419ba2726d 15 * copyright, mask work right, or any other intellectual property rights in
Clemo 0:5a419ba2726d 16 * or to any products. Elektor reserves the right to make changes in the
Clemo 0:5a419ba2726d 17 * software without notification. Elektor also makes no representation or
Clemo 0:5a419ba2726d 18 * warranty that such application will be suitable for the specified use
Clemo 0:5a419ba2726d 19 * without further testing or modification.
Clemo 0:5a419ba2726d 20 *
Clemo 0:5a419ba2726d 21 * @par
Clemo 0:5a419ba2726d 22 * Permission to use, copy, modify, and distribute this software and its
Clemo 0:5a419ba2726d 23 * documentation is hereby granted, under Elektor's and its licensor's
Clemo 0:5a419ba2726d 24 * relevant copyrights in the software, without fee. This copyright,
Clemo 0:5a419ba2726d 25 * permission, and disclaimer notice must appear in all copies of this code.
Clemo 0:5a419ba2726d 26 */
Clemo 0:5a419ba2726d 27
Clemo 0:5a419ba2726d 28 #ifndef __PWM_TIMER_H__
Clemo 0:5a419ba2726d 29 #define __PWM_TIMER_H__
Clemo 0:5a419ba2726d 30
Clemo 0:5a419ba2726d 31
Clemo 0:5a419ba2726d 32 #include "timers.h"
Clemo 0:5a419ba2726d 33
Clemo 0:5a419ba2726d 34 /*
Clemo 0:5a419ba2726d 35 // Choose the MR register that will determine the frequency.
Clemo 0:5a419ba2726d 36 #define PWM_FREQUENCY_REGISTER (3)
Clemo 0:5a419ba2726d 37 // Choose the MR register that will determine the duty-cycle.
Clemo 0:5a419ba2726d 38 #define PWM_DUTY_CYCLE_REGISTER (0)
Clemo 0:5a419ba2726d 39
Clemo 0:5a419ba2726d 40 #if PWM_FREQUENCY_REGISTER == PWM_DUTY_CYCLE_REGISTER
Clemo 0:5a419ba2726d 41 #pragma GCC error "Frequency register and duty-cycle register may not be the same."
Clemo 0:5a419ba2726d 42 #endif
Clemo 0:5a419ba2726d 43
Clemo 0:5a419ba2726d 44 #define PWM_MAT_OUTPUT PWM_DUTY_CYCLE_REGISTER
Clemo 0:5a419ba2726d 45
Clemo 0:5a419ba2726d 46 #if PWM_TIMER_NR == TIMER16_0
Clemo 0:5a419ba2726d 47 #define PWM_TIMER LPC_TIMER16_0
Clemo 0:5a419ba2726d 48 #define PWM_TIMER_IRQ (TIMER_16_0_IRQn)
Clemo 0:5a419ba2726d 49 #if PWM_MAT_OUTPUT == 0
Clemo 0:5a419ba2726d 50 #define PWM_MAT_PORT (0)
Clemo 0:5a419ba2726d 51 #define PWM_MAT_PIN (8)
Clemo 0:5a419ba2726d 52 #define PWM_IOCON IOCON_PIO0_8
Clemo 0:5a419ba2726d 53 #define PWM_IOCON_FUNC IOCON_FUNC2
Clemo 0:5a419ba2726d 54 #elif PWM_MAT_OUTPUT == 1
Clemo 0:5a419ba2726d 55 #define PWM_MAT_PORT (0)
Clemo 0:5a419ba2726d 56 #define PWM_MAT_PIN (9)
Clemo 0:5a419ba2726d 57 #define PWM_IOCON IOCON_PIO0_9
Clemo 0:5a419ba2726d 58 #define PWM_IOCON_FUNC IOCON_FUNC2
Clemo 0:5a419ba2726d 59 #elif PWM_MAT_OUTPUT == 2
Clemo 0:5a419ba2726d 60 #define PWM_MAT_PORT (0)
Clemo 0:5a419ba2726d 61 #define PWM_MAT_PIN (10)
Clemo 0:5a419ba2726d 62 #define PWM_IOCON IOCON_PIO0_10
Clemo 0:5a419ba2726d 63 #define PWM_IOCON_FUNC IOCON_FUNC3
Clemo 0:5a419ba2726d 64 #else
Clemo 0:5a419ba2726d 65 // Does not exist.
Clemo 0:5a419ba2726d 66 #pragma GCC error "Match output pin MATx does not exist."
Clemo 0:5a419ba2726d 67 #endif
Clemo 0:5a419ba2726d 68 #elif PWM_TIMER_NR == TIMER16_1
Clemo 0:5a419ba2726d 69 #define PWM_TIMER LPC_TIMER16_1
Clemo 0:5a419ba2726d 70 #define PWM_TIMER_IRQ (TIMER_16_1_IRQn)
Clemo 0:5a419ba2726d 71 #if PWM_MAT_OUTPUT == 0
Clemo 0:5a419ba2726d 72 #define PWM_MAT_PORT (1)
Clemo 0:5a419ba2726d 73 #define PWM_MAT_PIN (9)
Clemo 0:5a419ba2726d 74 #define PWM_IOCON IOCON_PIO1_9
Clemo 0:5a419ba2726d 75 #define PWM_IOCON_FUNC IOCON_FUNC1
Clemo 0:5a419ba2726d 76 #elif PWM_MAT_OUTPUT == 1
Clemo 0:5a419ba2726d 77 #define PWM_MAT_PORT (1)
Clemo 0:5a419ba2726d 78 #define PWM_MAT_PIN (10)
Clemo 0:5a419ba2726d 79 #define PWM_IOCON IOCON_PIO1_10
Clemo 0:5a419ba2726d 80 #define PWM_IOCON_FUNC IOCON_FUNC2
Clemo 0:5a419ba2726d 81 #else
Clemo 0:5a419ba2726d 82 // Does not exist.
Clemo 0:5a419ba2726d 83 #pragma GCC error "Match output pin MATx does not exist."
Clemo 0:5a419ba2726d 84 #endif
Clemo 0:5a419ba2726d 85 #elif PWM_TIMER_NR == TIMER32_0
Clemo 0:5a419ba2726d 86 #define PWM_TIMER LPC_TIMER32_0
Clemo 0:5a419ba2726d 87 #define PWM_TIMER_IRQ (TIMER_32_0_IRQn)
Clemo 0:5a419ba2726d 88 #if PWM_MAT_OUTPUT == 0
Clemo 0:5a419ba2726d 89 #define PWM_MAT_PORT (1)
Clemo 0:5a419ba2726d 90 #define PWM_MAT_PIN (6)
Clemo 0:5a419ba2726d 91 #define PWM_IOCON IOCON_PIO1_6
Clemo 0:5a419ba2726d 92 #define PWM_IOCON_FUNC IOCON_FUNC2
Clemo 0:5a419ba2726d 93 #elif PWM_MAT_OUTPUT == 1
Clemo 0:5a419ba2726d 94 #define PWM_MAT_PORT (1)
Clemo 0:5a419ba2726d 95 #define PWM_MAT_PIN (7)
Clemo 0:5a419ba2726d 96 #define PWM_IOCON IOCON_PIO1_7
Clemo 0:5a419ba2726d 97 #define PWM_IOCON_FUNC IOCON_FUNC2
Clemo 0:5a419ba2726d 98 #elif PWM_MAT_OUTPUT == 2
Clemo 0:5a419ba2726d 99 #define PWM_MAT_PORT (0)
Clemo 0:5a419ba2726d 100 #define PWM_MAT_PIN (1)
Clemo 0:5a419ba2726d 101 #define PWM_IOCON IOCON_PIO0_1
Clemo 0:5a419ba2726d 102 #define PWM_IOCON_FUNC IOCON_FUNC2
Clemo 0:5a419ba2726d 103 #elif PWM_MAT_OUTPUT == 3
Clemo 0:5a419ba2726d 104 #define PWM_MAT_PORT (0)
Clemo 0:5a419ba2726d 105 #define PWM_MAT_PIN (11)
Clemo 0:5a419ba2726d 106 #define PWM_IOCON IOCON_PIO0_11
Clemo 0:5a419ba2726d 107 #define PWM_IOCON_FUNC IOCON_FUNC3
Clemo 0:5a419ba2726d 108 #else
Clemo 0:5a419ba2726d 109 // Does not exist.
Clemo 0:5a419ba2726d 110 #pragma GCC error "Match output pin MATx does not exist."
Clemo 0:5a419ba2726d 111 #endif
Clemo 0:5a419ba2726d 112 #elif PWM_TIMER_NR == TIMER32_1
Clemo 0:5a419ba2726d 113 #define PWM_TIMER LPC_TIMER32_1
Clemo 0:5a419ba2726d 114 #define PWM_TIMER_IRQ (TIMER_32_1_IRQn)
Clemo 0:5a419ba2726d 115 #if PWM_MAT_OUTPUT == 0
Clemo 0:5a419ba2726d 116 #define PWM_MAT_PORT (1)
Clemo 0:5a419ba2726d 117 #define PWM_MAT_PIN (1)
Clemo 0:5a419ba2726d 118 #define PWM_IOCON IOCON_PIO1_1
Clemo 0:5a419ba2726d 119 #define PWM_IOCON_FUNC IOCON_FUNC3
Clemo 0:5a419ba2726d 120 #elif PWM_MAT_OUTPUT == 1
Clemo 0:5a419ba2726d 121 #define PWM_MAT_PORT (1)
Clemo 0:5a419ba2726d 122 #define PWM_MAT_PIN (2)
Clemo 0:5a419ba2726d 123 #define PWM_IOCON IOCON_PIO1_2
Clemo 0:5a419ba2726d 124 #define PWM_IOCON_FUNC IOCON_FUNC3
Clemo 0:5a419ba2726d 125 #elif PWM_MAT_OUTPUT == 2
Clemo 0:5a419ba2726d 126 #define PWM_MAT_PORT (1)
Clemo 0:5a419ba2726d 127 #define PWM_MAT_PIN (3)
Clemo 0:5a419ba2726d 128 #define PWM_IOCON IOCON_PIO1_3
Clemo 0:5a419ba2726d 129 #define PWM_IOCON_FUNC IOCON_FUNC3
Clemo 0:5a419ba2726d 130 #elif PWM_MAT_OUTPUT == 3
Clemo 0:5a419ba2726d 131 #define PWM_MAT_PORT (1)
Clemo 0:5a419ba2726d 132 #define PWM_MAT_PIN (4)
Clemo 0:5a419ba2726d 133 #define PWM_IOCON IOCON_PIO1_4
Clemo 0:5a419ba2726d 134 #define PWM_IOCON_FUNC IOCON_FUNC2
Clemo 0:5a419ba2726d 135 #else
Clemo 0:5a419ba2726d 136 // Does not exist.
Clemo 0:5a419ba2726d 137 #pragma GCC error "Match output pin MATx does not exist."
Clemo 0:5a419ba2726d 138 #endif
Clemo 0:5a419ba2726d 139 #else
Clemo 0:5a419ba2726d 140 // Does not exist.
Clemo 0:5a419ba2726d 141 #pragma GCC error "Selected PWM timer does not exist."
Clemo 0:5a419ba2726d 142 #endif
Clemo 0:5a419ba2726d 143 */
Clemo 0:5a419ba2726d 144
Clemo 0:5a419ba2726d 145 typedef struct
Clemo 0:5a419ba2726d 146 {
Clemo 0:5a419ba2726d 147 uint8_t port;
Clemo 0:5a419ba2726d 148 uint8_t pin;
Clemo 0:5a419ba2726d 149 uint32_t function;
Clemo 0:5a419ba2726d 150 uint32_t duty_cycle;
Clemo 0:5a419ba2726d 151 }
Clemo 0:5a419ba2726d 152 pwm_timer_channel_t;
Clemo 0:5a419ba2726d 153
Clemo 0:5a419ba2726d 154 typedef uint32_t LPC_TIMER_T;
Clemo 0:5a419ba2726d 155 typedef uint32_t LPC1347_IRQn_Type;
Clemo 0:5a419ba2726d 156
Clemo 0:5a419ba2726d 157 typedef struct
Clemo 0:5a419ba2726d 158 {
Clemo 0:5a419ba2726d 159 LPC_TIMER_T *timer;
Clemo 0:5a419ba2726d 160 LPC1347_IRQn_Type irq;
Clemo 0:5a419ba2726d 161 uint8_t frequency_register;
Clemo 0:5a419ba2726d 162 pwm_timer_channel_t channel[4];
Clemo 0:5a419ba2726d 163 }
Clemo 0:5a419ba2726d 164 pwm_timer_t;
Clemo 0:5a419ba2726d 165
Clemo 0:5a419ba2726d 166 // The datasheet recommends to use MR3 as the PWM frequency register.
Clemo 0:5a419ba2726d 167 #define PWM_TIMER_FREQUENCY_REGISTER (3)
Clemo 0:5a419ba2726d 168 #define PWM_TIMER_DEFAULT_DUTY_CYCLE (50)
Clemo 0:5a419ba2726d 169
Clemo 0:5a419ba2726d 170 #define PWM_TIMERS (4)
Clemo 0:5a419ba2726d 171 extern const pwm_timer_t pwm_timers[PWM_TIMERS];
Clemo 0:5a419ba2726d 172
Clemo 0:5a419ba2726d 173
Clemo 0:5a419ba2726d 174 void PwmTimer_Init(const pwm_timer_t *p_timer, uint32_t frequency);
Clemo 0:5a419ba2726d 175 void PwmTimer_InitChannel(const pwm_timer_t *p_timer, uint8_t channel, uint32_t duty_cycle);
Clemo 0:5a419ba2726d 176 void PwmTimer_SetFrequency(const pwm_timer_t *p_timer, uint32_t frequency);
Clemo 0:5a419ba2726d 177 void PwmTimer_SetDutyCycle(const pwm_timer_t *p_timer, uint8_t channel, uint32_t duty_cycle);
Clemo 0:5a419ba2726d 178 void PwmTimer_Start(const pwm_timer_t *p_timer);
Clemo 0:5a419ba2726d 179 void PwmTimer_Stop(const pwm_timer_t *p_timer);
Clemo 0:5a419ba2726d 180 void PwmTimer_EnableInterrupt(const pwm_timer_t *p_timer, uint8_t channel);
Clemo 0:5a419ba2726d 181
Clemo 0:5a419ba2726d 182
Clemo 0:5a419ba2726d 183 #endif // __PWM_TIMER_H__