Bernhard Filzmaier / mbed-src

mbed library sources

Fork of mbed-src by mbed official

targets/hal/TARGET_NXP/TARGET_LPC11U6X/serial_api.c@227:7bd0639b8911, 2014-06-11 (annotated)

Committer:
mbed_official
Date:
Wed Jun 11 16:00:09 2014 +0100
Revision:
227:7bd0639b8911
Parent:
220:aa774fb95d17
Child:
339:40bd4701f3e2
Synchronized with git revision d58d532ebc0e0a96f4fffb8edefc082b71b964af



Full URL: https://github.com/mbedmicro/mbed/commit/d58d532ebc0e0a96f4fffb8edefc082b71b964af/

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 174:8bb9f3a33240 1 /* mbed Microcontroller Library
mbed_official 174:8bb9f3a33240 2 * Copyright (c) 2006-2013 ARM Limited
mbed_official 174:8bb9f3a33240 3 *
mbed_official 174:8bb9f3a33240 4 * Licensed under the Apache License, Version 2.0 (the "License");
mbed_official 174:8bb9f3a33240 5 * you may not use this file except in compliance with the License.
mbed_official 174:8bb9f3a33240 6 * You may obtain a copy of the License at
mbed_official 174:8bb9f3a33240 7 *
mbed_official 174:8bb9f3a33240 8 * http://www.apache.org/licenses/LICENSE-2.0
mbed_official 174:8bb9f3a33240 9 *
mbed_official 174:8bb9f3a33240 10 * Unless required by applicable law or agreed to in writing, software
mbed_official 174:8bb9f3a33240 11 * distributed under the License is distributed on an "AS IS" BASIS,
mbed_official 174:8bb9f3a33240 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
mbed_official 174:8bb9f3a33240 13 * See the License for the specific language governing permissions and
mbed_official 174:8bb9f3a33240 14 * limitations under the License.
mbed_official 174:8bb9f3a33240 15 */
mbed_official 220:aa774fb95d17 16
mbed_official 174:8bb9f3a33240 17 // math.h required for floating point operations for baud rate calculation
mbed_official 227:7bd0639b8911 18 #include "mbed_assert.h"
mbed_official 174:8bb9f3a33240 19 #include <math.h>
mbed_official 174:8bb9f3a33240 20 #include <string.h>
mbed_official 174:8bb9f3a33240 21 #include <stdlib.h>
mbed_official 174:8bb9f3a33240 22
mbed_official 174:8bb9f3a33240 23 #include "serial_api.h"
mbed_official 174:8bb9f3a33240 24 #include "cmsis.h"
mbed_official 174:8bb9f3a33240 25 #include "pinmap.h"
mbed_official 174:8bb9f3a33240 26
mbed_official 174:8bb9f3a33240 27 #if DEVICE_SERIAL
mbed_official 220:aa774fb95d17 28
mbed_official 174:8bb9f3a33240 29 /******************************************************************************
mbed_official 174:8bb9f3a33240 30 * INITIALIZATION
mbed_official 174:8bb9f3a33240 31 ******************************************************************************/
mbed_official 174:8bb9f3a33240 32
mbed_official 220:aa774fb95d17 33 #define UART_NUM 5
mbed_official 220:aa774fb95d17 34
mbed_official 220:aa774fb95d17 35 // CFG
mbed_official 220:aa774fb95d17 36 #define UART_EN (0x01<<0)
mbed_official 220:aa774fb95d17 37
mbed_official 220:aa774fb95d17 38 // CTL
mbed_official 220:aa774fb95d17 39 #define TXBRKEN (0x01<<1)
mbed_official 220:aa774fb95d17 40
mbed_official 220:aa774fb95d17 41 // STAT
mbed_official 220:aa774fb95d17 42 #define RXRDY (0x01<<0)
mbed_official 220:aa774fb95d17 43 #define TXRDY (0x01<<2)
mbed_official 220:aa774fb95d17 44 #define DELTACTS (0x01<<5)
mbed_official 220:aa774fb95d17 45 #define RXBRK (0x01<<10)
mbed_official 220:aa774fb95d17 46 #define DELTARXBRK (0x01<<11)
mbed_official 174:8bb9f3a33240 47
mbed_official 174:8bb9f3a33240 48 static const PinMap PinMap_UART_TX[] = {
mbed_official 174:8bb9f3a33240 49 {P0_19, UART_0, 1},
mbed_official 174:8bb9f3a33240 50 {P1_18, UART_0, 2},
mbed_official 174:8bb9f3a33240 51 {P1_27, UART_0, 2},
mbed_official 220:aa774fb95d17 52 {P1_8 , UART_1, 2},
mbed_official 220:aa774fb95d17 53 {P1_0 , UART_2, 3},
mbed_official 220:aa774fb95d17 54 {P1_23, UART_2, 3},
mbed_official 220:aa774fb95d17 55 {P2_4 , UART_3, 1},
mbed_official 220:aa774fb95d17 56 {P2_12, UART_4, 1},
mbed_official 174:8bb9f3a33240 57 { NC , NC , 0}
mbed_official 174:8bb9f3a33240 58 };
mbed_official 174:8bb9f3a33240 59
mbed_official 174:8bb9f3a33240 60 static const PinMap PinMap_UART_RX[] = {
mbed_official 174:8bb9f3a33240 61 {P0_18, UART_0, 1},
mbed_official 174:8bb9f3a33240 62 {P1_17, UART_0, 2},
mbed_official 174:8bb9f3a33240 63 {P1_26, UART_0, 2},
mbed_official 220:aa774fb95d17 64 {P1_2 , UART_1, 3},
mbed_official 220:aa774fb95d17 65 {P0_20, UART_2, 2},
mbed_official 220:aa774fb95d17 66 {P1_6 , UART_2, 2},
mbed_official 220:aa774fb95d17 67 {P2_3 , UART_3, 1},
mbed_official 220:aa774fb95d17 68 {P2_11, UART_4, 1},
mbed_official 174:8bb9f3a33240 69 {NC , NC , 0}
mbed_official 174:8bb9f3a33240 70 };
mbed_official 174:8bb9f3a33240 71
mbed_official 174:8bb9f3a33240 72 static uint32_t serial_irq_ids[UART_NUM] = {0};
mbed_official 174:8bb9f3a33240 73 static uart_irq_handler irq_handler;
mbed_official 174:8bb9f3a33240 74
mbed_official 174:8bb9f3a33240 75 int stdio_uart_inited = 0;
mbed_official 174:8bb9f3a33240 76 serial_t stdio_uart;
mbed_official 174:8bb9f3a33240 77
mbed_official 174:8bb9f3a33240 78 void serial_init(serial_t *obj, PinName tx, PinName rx) {
mbed_official 174:8bb9f3a33240 79 int is_stdio_uart = 0;
mbed_official 174:8bb9f3a33240 80
mbed_official 174:8bb9f3a33240 81 // determine the UART to use
mbed_official 174:8bb9f3a33240 82 UARTName uart_tx = (UARTName)pinmap_peripheral(tx, PinMap_UART_TX);
mbed_official 174:8bb9f3a33240 83 UARTName uart_rx = (UARTName)pinmap_peripheral(rx, PinMap_UART_RX);
mbed_official 174:8bb9f3a33240 84 UARTName uart = (UARTName)pinmap_merge(uart_tx, uart_rx);
mbed_official 227:7bd0639b8911 85 MBED_ASSERT((int)uart != NC);
mbed_official 174:8bb9f3a33240 86
mbed_official 220:aa774fb95d17 87 switch (uart) {
mbed_official 220:aa774fb95d17 88 case UART_0:
mbed_official 220:aa774fb95d17 89 obj->index = 0;
mbed_official 220:aa774fb95d17 90 LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 12);
mbed_official 220:aa774fb95d17 91 break;
mbed_official 220:aa774fb95d17 92 case UART_1:
mbed_official 220:aa774fb95d17 93 obj->index = 1;
mbed_official 220:aa774fb95d17 94 LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 20);
mbed_official 220:aa774fb95d17 95 LPC_SYSCON->PRESETCTRL |= (1 << 5);
mbed_official 220:aa774fb95d17 96 break;
mbed_official 220:aa774fb95d17 97 case UART_2:
mbed_official 220:aa774fb95d17 98 obj->index = 2;
mbed_official 220:aa774fb95d17 99 LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 21);
mbed_official 220:aa774fb95d17 100 LPC_SYSCON->PRESETCTRL |= (1 << 6);
mbed_official 220:aa774fb95d17 101 break;
mbed_official 220:aa774fb95d17 102 case UART_3:
mbed_official 220:aa774fb95d17 103 obj->index = 3;
mbed_official 220:aa774fb95d17 104 LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 22);
mbed_official 220:aa774fb95d17 105 LPC_SYSCON->PRESETCTRL |= (1 << 7);
mbed_official 220:aa774fb95d17 106 break;
mbed_official 220:aa774fb95d17 107 case UART_4:
mbed_official 220:aa774fb95d17 108 obj->index = 4;
mbed_official 220:aa774fb95d17 109 LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 22);
mbed_official 220:aa774fb95d17 110 LPC_SYSCON->PRESETCTRL |= (1 << 8);
mbed_official 220:aa774fb95d17 111 break;
mbed_official 220:aa774fb95d17 112 }
mbed_official 174:8bb9f3a33240 113
mbed_official 220:aa774fb95d17 114 if (obj->index == 0)
mbed_official 220:aa774fb95d17 115 obj->uart = (LPC_USART0_Type *)uart;
mbed_official 220:aa774fb95d17 116 else
mbed_official 220:aa774fb95d17 117 obj->mini_uart = (LPC_USART4_Type *)uart;
mbed_official 174:8bb9f3a33240 118
mbed_official 220:aa774fb95d17 119 if (obj->index == 0) {
mbed_official 220:aa774fb95d17 120 // enable fifos and default rx trigger level
mbed_official 220:aa774fb95d17 121 obj->uart->FCR = 1 << 0 // FIFO Enable - 0 = Disables, 1 = Enabled
mbed_official 220:aa774fb95d17 122 | 0 << 1 // Rx Fifo Clear
mbed_official 220:aa774fb95d17 123 | 0 << 2 // Tx Fifo Clear
mbed_official 220:aa774fb95d17 124 | 0 << 6; // Rx irq trigger level - 0 = 1 char, 1 = 4 chars, 2 = 8 chars, 3 = 14 chars
mbed_official 220:aa774fb95d17 125 // disable irqs
mbed_official 220:aa774fb95d17 126 obj->uart->IER = 0 << 0 // Rx Data available irq enable
mbed_official 220:aa774fb95d17 127 | 0 << 1 // Tx Fifo empty irq enable
mbed_official 220:aa774fb95d17 128 | 0 << 2; // Rx Line Status irq enable
mbed_official 220:aa774fb95d17 129 }
mbed_official 220:aa774fb95d17 130 else {
mbed_official 220:aa774fb95d17 131 // Clear all status bits
mbed_official 220:aa774fb95d17 132 obj->mini_uart->STAT = (DELTACTS | DELTARXBRK);
mbed_official 220:aa774fb95d17 133 // Enable UART
mbed_official 220:aa774fb95d17 134 obj->mini_uart->CFG |= UART_EN;
mbed_official 220:aa774fb95d17 135 }
mbed_official 174:8bb9f3a33240 136 // set default baud rate and format
mbed_official 174:8bb9f3a33240 137 serial_baud (obj, 9600);
mbed_official 174:8bb9f3a33240 138 serial_format(obj, 8, ParityNone, 1);
mbed_official 174:8bb9f3a33240 139
mbed_official 174:8bb9f3a33240 140 // pinout the chosen uart
mbed_official 174:8bb9f3a33240 141 pinmap_pinout(tx, PinMap_UART_TX);
mbed_official 174:8bb9f3a33240 142 pinmap_pinout(rx, PinMap_UART_RX);
mbed_official 174:8bb9f3a33240 143
mbed_official 174:8bb9f3a33240 144 // set rx/tx pins in PullUp mode
mbed_official 174:8bb9f3a33240 145 pin_mode(tx, PullUp);
mbed_official 174:8bb9f3a33240 146 pin_mode(rx, PullUp);
mbed_official 174:8bb9f3a33240 147
mbed_official 174:8bb9f3a33240 148 is_stdio_uart = (uart == STDIO_UART) ? (1) : (0);
mbed_official 174:8bb9f3a33240 149
mbed_official 220:aa774fb95d17 150 if (is_stdio_uart && (obj->index == 0)) {
mbed_official 174:8bb9f3a33240 151 stdio_uart_inited = 1;
mbed_official 174:8bb9f3a33240 152 memcpy(&stdio_uart, obj, sizeof(serial_t));
mbed_official 174:8bb9f3a33240 153 }
mbed_official 174:8bb9f3a33240 154 }
mbed_official 174:8bb9f3a33240 155
mbed_official 174:8bb9f3a33240 156 void serial_free(serial_t *obj) {
mbed_official 174:8bb9f3a33240 157 serial_irq_ids[obj->index] = 0;
mbed_official 174:8bb9f3a33240 158 }
mbed_official 174:8bb9f3a33240 159
mbed_official 174:8bb9f3a33240 160 // serial_baud
mbed_official 174:8bb9f3a33240 161 // set the baud rate, taking in to account the current SystemFrequency
mbed_official 174:8bb9f3a33240 162 void serial_baud(serial_t *obj, int baudrate) {
mbed_official 220:aa774fb95d17 163 LPC_SYSCON->USART0CLKDIV = 1;
mbed_official 220:aa774fb95d17 164 LPC_SYSCON->FRGCLKDIV = 1;
mbed_official 220:aa774fb95d17 165
mbed_official 220:aa774fb95d17 166 if (obj->index == 0) {
mbed_official 220:aa774fb95d17 167 uint32_t PCLK = SystemCoreClock;
mbed_official 220:aa774fb95d17 168 // First we check to see if the basic divide with no DivAddVal/MulVal
mbed_official 220:aa774fb95d17 169 // ratio gives us an integer result. If it does, we set DivAddVal = 0,
mbed_official 220:aa774fb95d17 170 // MulVal = 1. Otherwise, we search the valid ratio value range to find
mbed_official 220:aa774fb95d17 171 // the closest match. This could be more elegant, using search methods
mbed_official 220:aa774fb95d17 172 // and/or lookup tables, but the brute force method is not that much
mbed_official 220:aa774fb95d17 173 // slower, and is more maintainable.
mbed_official 220:aa774fb95d17 174 uint16_t DL = PCLK / (16 * baudrate);
mbed_official 220:aa774fb95d17 175
mbed_official 220:aa774fb95d17 176 uint8_t DivAddVal = 0;
mbed_official 220:aa774fb95d17 177 uint8_t MulVal = 1;
mbed_official 220:aa774fb95d17 178 int hit = 0;
mbed_official 220:aa774fb95d17 179 uint16_t dlv;
mbed_official 220:aa774fb95d17 180 uint8_t mv, dav;
mbed_official 220:aa774fb95d17 181 if ((PCLK % (16 * baudrate)) != 0) { // Checking for zero remainder
mbed_official 220:aa774fb95d17 182 int err_best = baudrate, b;
mbed_official 220:aa774fb95d17 183 for (mv = 1; mv < 16 && !hit; mv++)
mbed_official 174:8bb9f3a33240 184 {
mbed_official 220:aa774fb95d17 185 for (dav = 0; dav < mv; dav++)
mbed_official 220:aa774fb95d17 186 {
mbed_official 220:aa774fb95d17 187 // baudrate = PCLK / (16 * dlv * (1 + (DivAdd / Mul))
mbed_official 220:aa774fb95d17 188 // solving for dlv, we get dlv = mul * PCLK / (16 * baudrate * (divadd + mul))
mbed_official 220:aa774fb95d17 189 // mul has 4 bits, PCLK has 27 so we have 1 bit headroom which can be used for rounding
mbed_official 220:aa774fb95d17 190 // for many values of mul and PCLK we have 2 or more bits of headroom which can be used to improve precision
mbed_official 220:aa774fb95d17 191 // note: X / 32 doesn't round correctly. Instead, we use ((X / 16) + 1) / 2 for correct rounding
mbed_official 174:8bb9f3a33240 192
mbed_official 220:aa774fb95d17 193 if ((mv * PCLK * 2) & 0x80000000) // 1 bit headroom
mbed_official 220:aa774fb95d17 194 dlv = ((((2 * mv * PCLK) / (baudrate * (dav + mv))) / 16) + 1) / 2;
mbed_official 220:aa774fb95d17 195 else // 2 bits headroom, use more precision
mbed_official 220:aa774fb95d17 196 dlv = ((((4 * mv * PCLK) / (baudrate * (dav + mv))) / 32) + 1) / 2;
mbed_official 174:8bb9f3a33240 197
mbed_official 220:aa774fb95d17 198 // datasheet says if DLL==DLM==0, then 1 is used instead since divide by zero is ungood
mbed_official 220:aa774fb95d17 199 if (dlv == 0)
mbed_official 220:aa774fb95d17 200 dlv = 1;
mbed_official 174:8bb9f3a33240 201
mbed_official 220:aa774fb95d17 202 // datasheet says if dav > 0 then DL must be >= 2
mbed_official 220:aa774fb95d17 203 if ((dav > 0) && (dlv < 2))
mbed_official 220:aa774fb95d17 204 dlv = 2;
mbed_official 220:aa774fb95d17 205
mbed_official 220:aa774fb95d17 206 // integer rearrangement of the baudrate equation (with rounding)
mbed_official 220:aa774fb95d17 207 b = ((PCLK * mv / (dlv * (dav + mv) * 8)) + 1) / 2;
mbed_official 174:8bb9f3a33240 208
mbed_official 220:aa774fb95d17 209 // check to see how we went
mbed_official 220:aa774fb95d17 210 b = abs(b - baudrate);
mbed_official 220:aa774fb95d17 211 if (b < err_best)
mbed_official 220:aa774fb95d17 212 {
mbed_official 220:aa774fb95d17 213 err_best = b;
mbed_official 174:8bb9f3a33240 214
mbed_official 220:aa774fb95d17 215 DL = dlv;
mbed_official 220:aa774fb95d17 216 MulVal = mv;
mbed_official 220:aa774fb95d17 217 DivAddVal = dav;
mbed_official 174:8bb9f3a33240 218
mbed_official 220:aa774fb95d17 219 if (b == baudrate)
mbed_official 220:aa774fb95d17 220 {
mbed_official 220:aa774fb95d17 221 hit = 1;
mbed_official 220:aa774fb95d17 222 break;
mbed_official 220:aa774fb95d17 223 }
mbed_official 174:8bb9f3a33240 224 }
mbed_official 174:8bb9f3a33240 225 }
mbed_official 174:8bb9f3a33240 226 }
mbed_official 174:8bb9f3a33240 227 }
mbed_official 220:aa774fb95d17 228
mbed_official 220:aa774fb95d17 229 // set LCR[DLAB] to enable writing to divider registers
mbed_official 220:aa774fb95d17 230 obj->uart->LCR |= (1 << 7);
mbed_official 220:aa774fb95d17 231
mbed_official 220:aa774fb95d17 232 // set divider values
mbed_official 220:aa774fb95d17 233 obj->uart->DLM = (DL >> 8) & 0xFF;
mbed_official 220:aa774fb95d17 234 obj->uart->DLL = (DL >> 0) & 0xFF;
mbed_official 220:aa774fb95d17 235 obj->uart->FDR = (uint32_t) DivAddVal << 0
mbed_official 220:aa774fb95d17 236 | (uint32_t) MulVal << 4;
mbed_official 220:aa774fb95d17 237
mbed_official 220:aa774fb95d17 238 // clear LCR[DLAB]
mbed_official 220:aa774fb95d17 239 obj->uart->LCR &= ~(1 << 7);
mbed_official 174:8bb9f3a33240 240 }
mbed_official 220:aa774fb95d17 241 else {
mbed_official 220:aa774fb95d17 242 uint32_t UARTSysClk = SystemCoreClock / LPC_SYSCON->FRGCLKDIV;
mbed_official 220:aa774fb95d17 243 obj->mini_uart->BRG = UARTSysClk / 16 / baudrate - 1;
mbed_official 220:aa774fb95d17 244
mbed_official 220:aa774fb95d17 245 LPC_SYSCON->UARTFRGDIV = 0xFF;
mbed_official 220:aa774fb95d17 246 LPC_SYSCON->UARTFRGMULT = ( ((UARTSysClk / 16) * (LPC_SYSCON->UARTFRGDIV + 1)) /
mbed_official 220:aa774fb95d17 247 (baudrate * (obj->mini_uart->BRG + 1))
mbed_official 220:aa774fb95d17 248 ) - (LPC_SYSCON->UARTFRGDIV + 1);
mbed_official 220:aa774fb95d17 249 }
mbed_official 174:8bb9f3a33240 250 }
mbed_official 174:8bb9f3a33240 251
mbed_official 174:8bb9f3a33240 252 void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) {
mbed_official 227:7bd0639b8911 253 MBED_ASSERT((stop_bits == 1) || (stop_bits == 2)); // 0: 1 stop bits, 1: 2 stop bits
mbed_official 227:7bd0639b8911 254
mbed_official 174:8bb9f3a33240 255 stop_bits -= 1;
mbed_official 227:7bd0639b8911 256
mbed_official 220:aa774fb95d17 257 if (obj->index == 0) {
mbed_official 227:7bd0639b8911 258 MBED_ASSERT((data_bits > 4) && (data_bits < 9)); // 0: 5 data bits ... 3: 8 data bits
mbed_official 227:7bd0639b8911 259 MBED_ASSERT((parity == ParityNone) || (parity == ParityOdd) || (parity == ParityEven) ||
mbed_official 227:7bd0639b8911 260 (parity == ParityForced1) || (parity == ParityForced0));
mbed_official 220:aa774fb95d17 261 data_bits -= 5;
mbed_official 220:aa774fb95d17 262
mbed_official 220:aa774fb95d17 263 int parity_enable, parity_select;
mbed_official 220:aa774fb95d17 264 switch (parity) {
mbed_official 220:aa774fb95d17 265 case ParityNone: parity_enable = 0; parity_select = 0; break;
mbed_official 220:aa774fb95d17 266 case ParityOdd : parity_enable = 1; parity_select = 0; break;
mbed_official 220:aa774fb95d17 267 case ParityEven: parity_enable = 1; parity_select = 1; break;
mbed_official 220:aa774fb95d17 268 case ParityForced1: parity_enable = 1; parity_select = 2; break;
mbed_official 220:aa774fb95d17 269 case ParityForced0: parity_enable = 1; parity_select = 3; break;
mbed_official 220:aa774fb95d17 270 default:
mbed_official 220:aa774fb95d17 271 return;
mbed_official 220:aa774fb95d17 272 }
mbed_official 220:aa774fb95d17 273
mbed_official 220:aa774fb95d17 274 obj->uart->LCR = data_bits << 0
mbed_official 220:aa774fb95d17 275 | stop_bits << 2
mbed_official 220:aa774fb95d17 276 | parity_enable << 3
mbed_official 220:aa774fb95d17 277 | parity_select << 4;
mbed_official 174:8bb9f3a33240 278 }
mbed_official 220:aa774fb95d17 279 else {
mbed_official 220:aa774fb95d17 280 // 0: 7 data bits ... 2: 9 data bits
mbed_official 227:7bd0639b8911 281 MBED_ASSERT((data_bits > 6) && (data_bits < 10));
mbed_official 227:7bd0639b8911 282 MBED_ASSERT((parity == ParityNone) || (parity == ParityOdd) || (parity == ParityEven));
mbed_official 220:aa774fb95d17 283 data_bits -= 7;
mbed_official 227:7bd0639b8911 284
mbed_official 220:aa774fb95d17 285 int paritysel;
mbed_official 220:aa774fb95d17 286 switch (parity) {
mbed_official 220:aa774fb95d17 287 case ParityNone: paritysel = 0; break;
mbed_official 220:aa774fb95d17 288 case ParityEven: paritysel = 2; break;
mbed_official 220:aa774fb95d17 289 case ParityOdd : paritysel = 3; break;
mbed_official 220:aa774fb95d17 290 default:
mbed_official 220:aa774fb95d17 291 return;
mbed_official 220:aa774fb95d17 292 }
mbed_official 220:aa774fb95d17 293 obj->mini_uart->CFG = (data_bits << 2)
mbed_official 220:aa774fb95d17 294 | (paritysel << 4)
mbed_official 220:aa774fb95d17 295 | (stop_bits << 6)
mbed_official 220:aa774fb95d17 296 | UART_EN;
mbed_official 174:8bb9f3a33240 297 }
mbed_official 174:8bb9f3a33240 298 }
mbed_official 174:8bb9f3a33240 299
mbed_official 174:8bb9f3a33240 300 /******************************************************************************
mbed_official 174:8bb9f3a33240 301 * INTERRUPTS HANDLING
mbed_official 174:8bb9f3a33240 302 ******************************************************************************/
mbed_official 174:8bb9f3a33240 303 static inline void uart_irq(uint32_t iir, uint32_t index) {
mbed_official 174:8bb9f3a33240 304 SerialIrq irq_type;
mbed_official 174:8bb9f3a33240 305 switch (iir) {
mbed_official 174:8bb9f3a33240 306 case 1: irq_type = TxIrq; break;
mbed_official 174:8bb9f3a33240 307 case 2: irq_type = RxIrq; break;
mbed_official 174:8bb9f3a33240 308 default: return;
mbed_official 174:8bb9f3a33240 309 }
mbed_official 174:8bb9f3a33240 310
mbed_official 174:8bb9f3a33240 311 if (serial_irq_ids[index] != 0)
mbed_official 174:8bb9f3a33240 312 irq_handler(serial_irq_ids[index], irq_type);
mbed_official 174:8bb9f3a33240 313 }
mbed_official 174:8bb9f3a33240 314
mbed_official 174:8bb9f3a33240 315 void uart0_irq()
mbed_official 174:8bb9f3a33240 316 {
mbed_official 174:8bb9f3a33240 317 uart_irq((LPC_USART0->IIR >> 1) & 0x7, 0);
mbed_official 174:8bb9f3a33240 318 }
mbed_official 174:8bb9f3a33240 319
mbed_official 174:8bb9f3a33240 320 void uart1_irq()
mbed_official 174:8bb9f3a33240 321 {
mbed_official 220:aa774fb95d17 322 uart_irq((LPC_USART1->STAT & (1 << 2)) ? 2 : 1, 1);
mbed_official 174:8bb9f3a33240 323 }
mbed_official 174:8bb9f3a33240 324
mbed_official 174:8bb9f3a33240 325 void uart2_irq()
mbed_official 174:8bb9f3a33240 326 {
mbed_official 220:aa774fb95d17 327 uart_irq((LPC_USART1->STAT & (1 << 2)) ? 2 : 1, 2);
mbed_official 174:8bb9f3a33240 328 }
mbed_official 174:8bb9f3a33240 329
mbed_official 174:8bb9f3a33240 330 void uart3_irq()
mbed_official 174:8bb9f3a33240 331 {
mbed_official 220:aa774fb95d17 332 uart_irq((LPC_USART1->STAT & (1 << 2)) ? 2 : 1, 3);
mbed_official 174:8bb9f3a33240 333 }
mbed_official 174:8bb9f3a33240 334
mbed_official 174:8bb9f3a33240 335 void uart4_irq()
mbed_official 174:8bb9f3a33240 336 {
mbed_official 220:aa774fb95d17 337 uart_irq((LPC_USART1->STAT & (1 << 2)) ? 2 : 1, 4);
mbed_official 174:8bb9f3a33240 338 }
mbed_official 174:8bb9f3a33240 339
mbed_official 174:8bb9f3a33240 340 void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) {
mbed_official 174:8bb9f3a33240 341 irq_handler = handler;
mbed_official 174:8bb9f3a33240 342 serial_irq_ids[obj->index] = id;
mbed_official 174:8bb9f3a33240 343 }
mbed_official 174:8bb9f3a33240 344
mbed_official 174:8bb9f3a33240 345 void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
mbed_official 174:8bb9f3a33240 346 IRQn_Type irq_n = (IRQn_Type)0;
mbed_official 174:8bb9f3a33240 347 uint32_t vector = 0;
mbed_official 174:8bb9f3a33240 348 switch ((int)obj->uart) {
mbed_official 174:8bb9f3a33240 349 case UART_0: irq_n = USART0_IRQn; vector = (uint32_t)&uart0_irq; break;
mbed_official 174:8bb9f3a33240 350 case UART_1: irq_n = USART1_4_IRQn; vector = (uint32_t)&uart1_irq; break;
mbed_official 174:8bb9f3a33240 351 case UART_2: irq_n = USART2_3_IRQn; vector = (uint32_t)&uart2_irq; break;
mbed_official 174:8bb9f3a33240 352 case UART_3: irq_n = USART2_3_IRQn; vector = (uint32_t)&uart3_irq; break;
mbed_official 174:8bb9f3a33240 353 case UART_4: irq_n = USART1_4_IRQn; vector = (uint32_t)&uart4_irq; break;
mbed_official 174:8bb9f3a33240 354 }
mbed_official 174:8bb9f3a33240 355
mbed_official 174:8bb9f3a33240 356 if (enable) {
mbed_official 220:aa774fb95d17 357 if (obj->index == 0) {
mbed_official 220:aa774fb95d17 358 obj->uart->IER |= (1 << irq);
mbed_official 220:aa774fb95d17 359 }
mbed_official 220:aa774fb95d17 360 else {
mbed_official 220:aa774fb95d17 361 obj->mini_uart->INTENSET = (1 << ((irq == RxIrq) ? 0 : 2));
mbed_official 220:aa774fb95d17 362 }
mbed_official 174:8bb9f3a33240 363 NVIC_SetVector(irq_n, vector);
mbed_official 174:8bb9f3a33240 364 NVIC_EnableIRQ(irq_n);
mbed_official 174:8bb9f3a33240 365 } else { // disable
mbed_official 174:8bb9f3a33240 366 int all_disabled = 0;
mbed_official 174:8bb9f3a33240 367 SerialIrq other_irq = (irq == RxIrq) ? (TxIrq) : (RxIrq);
mbed_official 174:8bb9f3a33240 368
mbed_official 220:aa774fb95d17 369 if (obj->index == 0) {
mbed_official 220:aa774fb95d17 370 obj->uart->IER &= ~(1 << irq);
mbed_official 220:aa774fb95d17 371 all_disabled = (obj->uart->IER & (1 << other_irq)) == 0;
mbed_official 220:aa774fb95d17 372 }
mbed_official 220:aa774fb95d17 373 else {
mbed_official 220:aa774fb95d17 374 obj->mini_uart->INTENSET &= ~(1 << ((irq == RxIrq) ? 0 : 2));
mbed_official 220:aa774fb95d17 375 all_disabled = (obj->mini_uart->INTENSET & (1 << ((other_irq == RxIrq) ? 0 : 2))) == 0;
mbed_official 220:aa774fb95d17 376 }
mbed_official 220:aa774fb95d17 377
mbed_official 174:8bb9f3a33240 378 if (all_disabled)
mbed_official 174:8bb9f3a33240 379 NVIC_DisableIRQ(irq_n);
mbed_official 174:8bb9f3a33240 380 }
mbed_official 174:8bb9f3a33240 381 }
mbed_official 174:8bb9f3a33240 382
mbed_official 174:8bb9f3a33240 383 /******************************************************************************
mbed_official 174:8bb9f3a33240 384 * READ/WRITE
mbed_official 174:8bb9f3a33240 385 ******************************************************************************/
mbed_official 174:8bb9f3a33240 386 int serial_getc(serial_t *obj) {
mbed_official 174:8bb9f3a33240 387 while (!serial_readable(obj));
mbed_official 220:aa774fb95d17 388 if (obj->index == 0) {
mbed_official 220:aa774fb95d17 389 return obj->uart->RBR;
mbed_official 220:aa774fb95d17 390 }
mbed_official 220:aa774fb95d17 391 else {
mbed_official 220:aa774fb95d17 392 return obj->mini_uart->RXDAT;
mbed_official 220:aa774fb95d17 393 }
mbed_official 174:8bb9f3a33240 394 }
mbed_official 174:8bb9f3a33240 395
mbed_official 174:8bb9f3a33240 396 void serial_putc(serial_t *obj, int c) {
mbed_official 174:8bb9f3a33240 397 while (!serial_writable(obj));
mbed_official 220:aa774fb95d17 398 if (obj->index == 0) {
mbed_official 220:aa774fb95d17 399 obj->uart->THR = c;
mbed_official 220:aa774fb95d17 400 }
mbed_official 220:aa774fb95d17 401 else {
mbed_official 220:aa774fb95d17 402 obj->mini_uart->TXDAT = c;
mbed_official 220:aa774fb95d17 403 }
mbed_official 174:8bb9f3a33240 404 }
mbed_official 174:8bb9f3a33240 405
mbed_official 174:8bb9f3a33240 406 int serial_readable(serial_t *obj) {
mbed_official 220:aa774fb95d17 407 if (obj->index == 0) {
mbed_official 220:aa774fb95d17 408 return obj->uart->LSR & 0x01;
mbed_official 220:aa774fb95d17 409 }
mbed_official 220:aa774fb95d17 410 else {
mbed_official 220:aa774fb95d17 411 return obj->mini_uart->STAT & RXRDY;
mbed_official 220:aa774fb95d17 412 }
mbed_official 174:8bb9f3a33240 413 }
mbed_official 174:8bb9f3a33240 414
mbed_official 174:8bb9f3a33240 415 int serial_writable(serial_t *obj) {
mbed_official 220:aa774fb95d17 416 if (obj->index == 0) {
mbed_official 220:aa774fb95d17 417 return obj->uart->LSR & 0x20;
mbed_official 220:aa774fb95d17 418 }
mbed_official 220:aa774fb95d17 419 else {
mbed_official 220:aa774fb95d17 420 return obj->mini_uart->STAT & TXRDY;
mbed_official 220:aa774fb95d17 421 }
mbed_official 174:8bb9f3a33240 422 }
mbed_official 174:8bb9f3a33240 423
mbed_official 174:8bb9f3a33240 424 void serial_clear(serial_t *obj) {
mbed_official 220:aa774fb95d17 425 if (obj->index == 0) {
mbed_official 220:aa774fb95d17 426 obj->uart->FCR = 1 << 1 // rx FIFO reset
mbed_official 220:aa774fb95d17 427 | 1 << 2 // tx FIFO reset
mbed_official 220:aa774fb95d17 428 | 0 << 6; // interrupt depth
mbed_official 220:aa774fb95d17 429 }
mbed_official 220:aa774fb95d17 430 else {
mbed_official 220:aa774fb95d17 431 obj->mini_uart->STAT = 0;
mbed_official 220:aa774fb95d17 432 }
mbed_official 174:8bb9f3a33240 433 }
mbed_official 174:8bb9f3a33240 434
mbed_official 174:8bb9f3a33240 435 void serial_pinout_tx(PinName tx) {
mbed_official 174:8bb9f3a33240 436 pinmap_pinout(tx, PinMap_UART_TX);
mbed_official 174:8bb9f3a33240 437 }
mbed_official 174:8bb9f3a33240 438
mbed_official 174:8bb9f3a33240 439 void serial_break_set(serial_t *obj) {
mbed_official 220:aa774fb95d17 440 if (obj->index == 0) {
mbed_official 220:aa774fb95d17 441 obj->uart->LCR |= (1 << 6);
mbed_official 220:aa774fb95d17 442 }
mbed_official 220:aa774fb95d17 443 else {
mbed_official 220:aa774fb95d17 444 obj->mini_uart->CTL |= TXBRKEN;
mbed_official 220:aa774fb95d17 445 }
mbed_official 174:8bb9f3a33240 446 }
mbed_official 174:8bb9f3a33240 447
mbed_official 174:8bb9f3a33240 448 void serial_break_clear(serial_t *obj) {
mbed_official 220:aa774fb95d17 449 if (obj->index == 0) {
mbed_official 220:aa774fb95d17 450 obj->uart->LCR &= ~(1 << 6);
mbed_official 220:aa774fb95d17 451 }
mbed_official 220:aa774fb95d17 452 else {
mbed_official 220:aa774fb95d17 453 obj->mini_uart->CTL &= ~TXBRKEN;
mbed_official 220:aa774fb95d17 454 }
mbed_official 174:8bb9f3a33240 455 }
mbed_official 174:8bb9f3a33240 456
mbed_official 174:8bb9f3a33240 457
mbed_official 174:8bb9f3a33240 458 #endif