Smeshlink / MxRadioRF2xx

A Atmel RF2xx Radio Library for Mbed

Dependents:   xBedRadio MxSniffer

MxRadio.h@0:5f1d66c85ae0, 2015-04-09 (annotated)

Committer:
fredqian
Date:
Thu Apr 09 16:42:51 2015 +0800
Revision:
0:5f1d66c85ae0
init commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
fredqian 0:5f1d66c85ae0 1 /* Copyright (c) 2011 Frank Zhao
fredqian 0:5f1d66c85ae0 2 All rights reserved.
fredqian 0:5f1d66c85ae0 3
fredqian 0:5f1d66c85ae0 4 Redistribution and use in source and binary forms, with or without
fredqian 0:5f1d66c85ae0 5 modification, are permitted provided that the following conditions
fredqian 0:5f1d66c85ae0 6 are met:
fredqian 0:5f1d66c85ae0 7
fredqian 0:5f1d66c85ae0 8 * Redistributions of source code must retain the above copyright
fredqian 0:5f1d66c85ae0 9 notice, this list of conditions and the following disclaimer.
fredqian 0:5f1d66c85ae0 10 * Redistributions in binary form must reproduce the above copyright
fredqian 0:5f1d66c85ae0 11 notice, this list of conditions and the following disclaimer in the
fredqian 0:5f1d66c85ae0 12 documentation and/or other materials provided with the distribution.
fredqian 0:5f1d66c85ae0 13 * Neither the name of the authors nor the names of its contributors
fredqian 0:5f1d66c85ae0 14 may be used to endorse or promote products derived from this software
fredqian 0:5f1d66c85ae0 15 without specific prior written permission.
fredqian 0:5f1d66c85ae0 16
fredqian 0:5f1d66c85ae0 17 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
fredqian 0:5f1d66c85ae0 18 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
fredqian 0:5f1d66c85ae0 19 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
fredqian 0:5f1d66c85ae0 20 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
fredqian 0:5f1d66c85ae0 21 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
fredqian 0:5f1d66c85ae0 22 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
fredqian 0:5f1d66c85ae0 23 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
fredqian 0:5f1d66c85ae0 24 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
fredqian 0:5f1d66c85ae0 25 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
fredqian 0:5f1d66c85ae0 26 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
fredqian 0:5f1d66c85ae0 27 POSSIBILITY OF SUCH DAMAGE. */
fredqian 0:5f1d66c85ae0 28
fredqian 0:5f1d66c85ae0 29 #ifndef MxRadio_h
fredqian 0:5f1d66c85ae0 30
fredqian 0:5f1d66c85ae0 31 #ifdef __cplusplus
fredqian 0:5f1d66c85ae0 32 extern "C" {
fredqian 0:5f1d66c85ae0 33 #endif
fredqian 0:5f1d66c85ae0 34 #include "uracolib/board.h"
fredqian 0:5f1d66c85ae0 35 #include "MxRadioCfg.h"
fredqian 0:5f1d66c85ae0 36 #include "uracolib/radio.h"
fredqian 0:5f1d66c85ae0 37 #include "uracolib/transceiver.h"
fredqian 0:5f1d66c85ae0 38 #include <stdint.h>
fredqian 0:5f1d66c85ae0 39 #ifdef __cplusplus
fredqian 0:5f1d66c85ae0 40 } /* extern "C" */
fredqian 0:5f1d66c85ae0 41 #endif
fredqian 0:5f1d66c85ae0 42
fredqian 0:5f1d66c85ae0 43 #include "mbed.h"
fredqian 0:5f1d66c85ae0 44 #define ZR_RXFRMBUFF_SIZE MAX_FRAME_SIZE
fredqian 0:5f1d66c85ae0 45 #define ZR_FIFO_SIZE 128 // size for the RX FIFO ring buffer
fredqian 0:5f1d66c85ae0 46 #define ZR_TXTMPBUFF_SIZE MAX_FRAME_SIZE // size for the TX non-immediate transmit buffer
fredqian 0:5f1d66c85ae0 47
fredqian 0:5f1d66c85ae0 48 #define ZR_TXWAIT_BEFORE // when you call any TX functions, it will wait until the previous transmission has finished before initiating a new transmission
fredqian 0:5f1d66c85ae0 49 #define ZR_TXWAIT_AFTER // when you call any TX functions, it will transmit and then wait until that transmission finished
fredqian 0:5f1d66c85ae0 50
fredqian 0:5f1d66c85ae0 51 // just a class definition, for usage and comments, see the cpp file
fredqian 0:5f1d66c85ae0 52 class cMxRadio
fredqian 0:5f1d66c85ae0 53 {
fredqian 0:5f1d66c85ae0 54 private:
fredqian 0:5f1d66c85ae0 55
fredqian 0:5f1d66c85ae0 56 uint8_t temprssi;
fredqian 0:5f1d66c85ae0 57 radio_status_t radiostatus;
fredqian 0:5f1d66c85ae0 58 SPI m_spi;
fredqian 0:5f1d66c85ae0 59 DigitalOut m_cs;
fredqian 0:5f1d66c85ae0 60 DigitalOut reset_pin;
fredqian 0:5f1d66c85ae0 61 DigitalOut sleep_pin;
fredqian 0:5f1d66c85ae0 62
fredqian 0:5f1d66c85ae0 63 protected:
fredqian 0:5f1d66c85ae0 64 InterruptIn irq_pin;
fredqian 0:5f1d66c85ae0 65 private:
fredqian 0:5f1d66c85ae0 66 uint8_t rxFrameBuffer[ZR_RXFRMBUFF_SIZE];
fredqian 0:5f1d66c85ae0 67 uint8_t rxRingBuffer[ZR_FIFO_SIZE];
fredqian 0:5f1d66c85ae0 68 uint8_t rxRingBufferHead;
fredqian 0:5f1d66c85ae0 69 uint8_t rxRingBufferTail;
fredqian 0:5f1d66c85ae0 70 uint8_t txTmpBuffer[ZR_TXTMPBUFF_SIZE];
fredqian 0:5f1d66c85ae0 71 uint8_t txTmpBufferLength;
fredqian 0:5f1d66c85ae0 72 uint8_t lastLqi;
fredqian 0:5f1d66c85ae0 73 uint8_t lastRssi;
fredqian 0:5f1d66c85ae0 74 uint8_t hasAttachedRxEvent;
fredqian 0:5f1d66c85ae0 75 uint8_t hasAttachedTxEvent;
fredqian 0:5f1d66c85ae0 76 uint8_t usedBeginTransmission;
fredqian 0:5f1d66c85ae0 77 volatile uint8_t txIsBusy;
fredqian 0:5f1d66c85ae0 78
fredqian 0:5f1d66c85ae0 79 uint8_t* (*zrEventReceiveFrame)(uint8_t, uint8_t*, uint8_t, int8_t,uint8_t);
fredqian 0:5f1d66c85ae0 80 void (*zrEventTxDone)(radio_tx_done_t);
fredqian 0:5f1d66c85ae0 81
fredqian 0:5f1d66c85ae0 82 uint8_t* onReceiveFrame(uint8_t, uint8_t*, uint8_t, int8_t,uint8_t);
fredqian 0:5f1d66c85ae0 83 void onTxDone(radio_tx_done_t);
fredqian 0:5f1d66c85ae0 84 bool setautotx,setautorx,needack;
fredqian 0:5f1d66c85ae0 85
fredqian 0:5f1d66c85ae0 86 //come from radio.h
fredqian 0:5f1d66c85ae0 87 void radio_init(uint8_t * rxbuf, uint8_t rxbufsz);
fredqian 0:5f1d66c85ae0 88 void radio_force_state(radio_state_t state);
fredqian 0:5f1d66c85ae0 89 void radio_set_state(radio_state_t state);
fredqian 0:5f1d66c85ae0 90 void radio_set_param(radio_attribute_t attr, radio_param_t parm);
fredqian 0:5f1d66c85ae0 91 void radio_send_frame(uint8_t len, uint8_t *frm, uint8_t compcrc);
fredqian 0:5f1d66c85ae0 92 radio_cca_t radio_do_cca(void);
fredqian 0:5f1d66c85ae0 93 int radio_putchar(int c);
fredqian 0:5f1d66c85ae0 94 int radio_getchar(void);
fredqian 0:5f1d66c85ae0 95 void usr_radio_error(radio_error_t err);
fredqian 0:5f1d66c85ae0 96 void usr_radio_irq(uint8_t cause);
fredqian 0:5f1d66c85ae0 97 uint8_t * usr_radio_receive_frame(uint8_t len, uint8_t *frm, uint8_t lqi, int8_t ed, uint8_t crc_fail);
fredqian 0:5f1d66c85ae0 98 void usr_radio_tx_done(radio_tx_done_t status);
fredqian 0:5f1d66c85ae0 99 //come from transciever
fredqian 0:5f1d66c85ae0 100 void trx_io_init (int spirate);
fredqian 0:5f1d66c85ae0 101 void trx_reg_write(trx_regaddr_t addr, trx_regval_t val);
fredqian 0:5f1d66c85ae0 102 uint8_t trx_reg_read(trx_regaddr_t addr);
fredqian 0:5f1d66c85ae0 103 trx_regval_t trx_bit_read(trx_regaddr_t addr, trx_regval_t mask, uint8_t pos);
fredqian 0:5f1d66c85ae0 104 void trx_bit_write(trx_regaddr_t addr, trx_regval_t mask, uint8_t pos, trx_regval_t value);
fredqian 0:5f1d66c85ae0 105 void trx_frame_write(uint8_t length, uint8_t *data);
fredqian 0:5f1d66c85ae0 106 uint8_t trx_frame_read(uint8_t *data, uint8_t datasz, uint8_t *lqi);
fredqian 0:5f1d66c85ae0 107 //uint8_t trx_frame_read_crc(uint8_t *data, uint8_t datasz, bool *crc_ok);
fredqian 0:5f1d66c85ae0 108 //uint8_t trx_frame_read_data_crc(uint8_t *data, uint8_t datasz, uint8_t *lqi, bool *crc_ok);
fredqian 0:5f1d66c85ae0 109 uint8_t trx_frame_get_length(void);
fredqian 0:5f1d66c85ae0 110 void trx_sram_write(trx_ramaddr_t addr, uint8_t length, uint8_t *data);
fredqian 0:5f1d66c85ae0 111 void trx_sram_read(trx_ramaddr_t addr, uint8_t length, uint8_t *data);
fredqian 0:5f1d66c85ae0 112 void trx_parms_get(trx_param_t *p);
fredqian 0:5f1d66c85ae0 113 uint8_t trx_parms_set(trx_param_t *p);
fredqian 0:5f1d66c85ae0 114 uint8_t trx_set_datarate(uint8_t rate_type);
fredqian 0:5f1d66c85ae0 115 uint8_t trx_get_datarate(void);
fredqian 0:5f1d66c85ae0 116 uint8_t trx_get_number_datarates(void);
fredqian 0:5f1d66c85ae0 117 //void * trx_get_datarate_str_p(uint8_t idx);
fredqian 0:5f1d66c85ae0 118 //void * trx_decode_datarate_p(uint8_t rhash);
fredqian 0:5f1d66c85ae0 119 //uint8_t trx_get_datarate_str(uint8_t idx, char * rstr, uint8_t nlen);
fredqian 0:5f1d66c85ae0 120 //uint8_t trx_decode_datarate(uint8_t rhash, char * rstr, uint8_t nlen);
fredqian 0:5f1d66c85ae0 121 /**
fredqian 0:5f1d66c85ae0 122 * @brief Basic radio initialization function,
fredqian 0:5f1d66c85ae0 123 */
fredqian 0:5f1d66c85ae0 124 inline uint8_t trx_init(void)
fredqian 0:5f1d66c85ae0 125 {
fredqian 0:5f1d66c85ae0 126 uint8_t val;
fredqian 0:5f1d66c85ae0 127 /* reset transceiver */
fredqian 0:5f1d66c85ae0 128 reset_pin=0;//TRX_RESET_LOW();
fredqian 0:5f1d66c85ae0 129 sleep_pin=0;//TRX_SLPTR_LOW();
fredqian 0:5f1d66c85ae0 130 DELAY_US(TRX_RESET_TIME_US);
fredqian 0:5f1d66c85ae0 131 reset_pin=1;//TRX_RESET_HIGH();
fredqian 0:5f1d66c85ae0 132 /* set TRX_OFF (for the case we come from P_ON) */
fredqian 0:5f1d66c85ae0 133 trx_reg_write(RG_TRX_STATE, CMD_TRX_OFF);
fredqian 0:5f1d66c85ae0 134
fredqian 0:5f1d66c85ae0 135 #if RADIO_TYPE == RADIO_AT86RF212
fredqian 0:5f1d66c85ae0 136 trx_reg_write(RG_TRX_CTRL_0, 0x19);
fredqian 0:5f1d66c85ae0 137 #ifdef CHINABAND
fredqian 0:5f1d66c85ae0 138 trx_reg_write(RG_CC_CTRL_1, CCBAND );
fredqian 0:5f1d66c85ae0 139 trx_reg_write(RG_CC_CTRL_0, 11);//channel 0
fredqian 0:5f1d66c85ae0 140 trx_reg_write(RG_TRX_CTRL_2, TRX_OQPSK250);
fredqian 0:5f1d66c85ae0 141 DELAY_US(510);
fredqian 0:5f1d66c85ae0 142 #endif
fredqian 0:5f1d66c85ae0 143 #endif
fredqian 0:5f1d66c85ae0 144
fredqian 0:5f1d66c85ae0 145 DELAY_US(TRX_INIT_TIME_US);
fredqian 0:5f1d66c85ae0 146 val = trx_reg_read(RG_TRX_STATUS);
fredqian 0:5f1d66c85ae0 147 return (val != TRX_OFF) ? TRX_OK : TRX_INIT_FAIL;
fredqian 0:5f1d66c85ae0 148 }
fredqian 0:5f1d66c85ae0 149 inline uint8_t trx_check_pll_lock(void)
fredqian 0:5f1d66c85ae0 150 {
fredqian 0:5f1d66c85ae0 151 uint8_t val, cnt = 255;
fredqian 0:5f1d66c85ae0 152
fredqian 0:5f1d66c85ae0 153 trx_reg_write(RG_TRX_STATE, CMD_FORCE_TRX_OFF);
fredqian 0:5f1d66c85ae0 154 trx_reg_write(RG_IRQ_MASK, TRX_IRQ_PLL_LOCK);
fredqian 0:5f1d66c85ae0 155 trx_reg_write(RG_TRX_STATE, CMD_PLL_ON);
fredqian 0:5f1d66c85ae0 156 cnt = 255;
fredqian 0:5f1d66c85ae0 157 do
fredqian 0:5f1d66c85ae0 158 {
fredqian 0:5f1d66c85ae0 159 DELAY_US(TRX_PLL_LOCK_TIME_US);
fredqian 0:5f1d66c85ae0 160 val = trx_reg_read(RG_IRQ_STATUS);
fredqian 0:5f1d66c85ae0 161 if (val & TRX_IRQ_PLL_LOCK)
fredqian 0:5f1d66c85ae0 162 {
fredqian 0:5f1d66c85ae0 163 break;
fredqian 0:5f1d66c85ae0 164 }
fredqian 0:5f1d66c85ae0 165 }
fredqian 0:5f1d66c85ae0 166 while(--cnt);
fredqian 0:5f1d66c85ae0 167
fredqian 0:5f1d66c85ae0 168 /* clear pending IRQs*/
fredqian 0:5f1d66c85ae0 169 trx_reg_write(RG_TRX_STATE, CMD_FORCE_TRX_OFF);
fredqian 0:5f1d66c85ae0 170 trx_reg_read(RG_IRQ_STATUS);
fredqian 0:5f1d66c85ae0 171 return (cnt > 0) ? TRX_OK : TRX_PLL_FAIL;
fredqian 0:5f1d66c85ae0 172 }
fredqian 0:5f1d66c85ae0 173
fredqian 0:5f1d66c85ae0 174 /**
fredqian 0:5f1d66c85ae0 175 * @brief Verify that correct radio type is used.
fredqian 0:5f1d66c85ae0 176 *
fredqian 0:5f1d66c85ae0 177 * @return status value, with the following meaning:
fredqian 0:5f1d66c85ae0 178 * - 0 if part and revision number match
fredqian 0:5f1d66c85ae0 179 * - 1 if revision number does @b not match
fredqian 0:5f1d66c85ae0 180 * - 2 if part number does @b not match
fredqian 0:5f1d66c85ae0 181 * - 3 if part and revision number does @b not match
fredqian 0:5f1d66c85ae0 182 */
fredqian 0:5f1d66c85ae0 183 inline int trx_identify(void)
fredqian 0:5f1d66c85ae0 184 {
fredqian 0:5f1d66c85ae0 185 int ret = 0;
fredqian 0:5f1d66c85ae0 186
fredqian 0:5f1d66c85ae0 187 if(RADIO_PART_NUM != trx_reg_read(RG_PART_NUM))
fredqian 0:5f1d66c85ae0 188 {
fredqian 0:5f1d66c85ae0 189 ret |= INVALID_PART_NUM;
fredqian 0:5f1d66c85ae0 190 }
fredqian 0:5f1d66c85ae0 191
fredqian 0:5f1d66c85ae0 192 if(RADIO_VERSION_NUM != trx_reg_read(RG_VERSION_NUM))
fredqian 0:5f1d66c85ae0 193 {
fredqian 0:5f1d66c85ae0 194 ret |= INVALID_REV_NUM;
fredqian 0:5f1d66c85ae0 195 }
fredqian 0:5f1d66c85ae0 196 return ret;
fredqian 0:5f1d66c85ae0 197 }
fredqian 0:5f1d66c85ae0 198
fredqian 0:5f1d66c85ae0 199 /**
fredqian 0:5f1d66c85ae0 200 * @brief Write the PANID to the address filter registers
fredqian 0:5f1d66c85ae0 201 */
fredqian 0:5f1d66c85ae0 202 inline void trx_set_panid(uint16_t panid)
fredqian 0:5f1d66c85ae0 203 {
fredqian 0:5f1d66c85ae0 204 trx_reg_write(RG_PAN_ID_0,(panid&0xff));
fredqian 0:5f1d66c85ae0 205 trx_reg_write(RG_PAN_ID_1,(panid>>8));
fredqian 0:5f1d66c85ae0 206 }
fredqian 0:5f1d66c85ae0 207
fredqian 0:5f1d66c85ae0 208 /**
fredqian 0:5f1d66c85ae0 209 * @brief Write the 16 bit short address to the
fredqian 0:5f1d66c85ae0 210 * address filter registers
fredqian 0:5f1d66c85ae0 211 */
fredqian 0:5f1d66c85ae0 212 inline void trx_set_shortaddr(uint16_t shortaddr)
fredqian 0:5f1d66c85ae0 213 {
fredqian 0:5f1d66c85ae0 214 trx_reg_write(RG_SHORT_ADDR_0,(shortaddr&0xff));
fredqian 0:5f1d66c85ae0 215 trx_reg_write(RG_SHORT_ADDR_1,(shortaddr>>8));
fredqian 0:5f1d66c85ae0 216 }
fredqian 0:5f1d66c85ae0 217
fredqian 0:5f1d66c85ae0 218 /**
fredqian 0:5f1d66c85ae0 219 * @brief Write the 64 bit long address (MAC address) to the
fredqian 0:5f1d66c85ae0 220 * address filter registers
fredqian 0:5f1d66c85ae0 221 */
fredqian 0:5f1d66c85ae0 222 inline void trx_set_longaddr(uint64_t longaddr)
fredqian 0:5f1d66c85ae0 223 {
fredqian 0:5f1d66c85ae0 224 trx_reg_write(RG_IEEE_ADDR_0, (uint8_t)(longaddr>>0) );
fredqian 0:5f1d66c85ae0 225 trx_reg_write(RG_IEEE_ADDR_1, (uint8_t)(longaddr>>8) );
fredqian 0:5f1d66c85ae0 226 trx_reg_write(RG_IEEE_ADDR_2, (uint8_t)(longaddr>>16));
fredqian 0:5f1d66c85ae0 227 trx_reg_write(RG_IEEE_ADDR_3, (uint8_t)(longaddr>>24));
fredqian 0:5f1d66c85ae0 228 trx_reg_write(RG_IEEE_ADDR_4, (uint8_t)(longaddr>>32));
fredqian 0:5f1d66c85ae0 229 trx_reg_write(RG_IEEE_ADDR_5, (uint8_t)(longaddr>>40));
fredqian 0:5f1d66c85ae0 230 trx_reg_write(RG_IEEE_ADDR_6, (uint8_t)(longaddr>>48));
fredqian 0:5f1d66c85ae0 231 trx_reg_write(RG_IEEE_ADDR_7, (uint8_t)(longaddr>>56));
fredqian 0:5f1d66c85ae0 232 }
fredqian 0:5f1d66c85ae0 233
fredqian 0:5f1d66c85ae0 234 inline uint16_t crc16_update(uint16_t crc, uint8_t a)
fredqian 0:5f1d66c85ae0 235 {
fredqian 0:5f1d66c85ae0 236 int i;
fredqian 0:5f1d66c85ae0 237
fredqian 0:5f1d66c85ae0 238 crc ^= a;
fredqian 0:5f1d66c85ae0 239 for (i = 0; i < 8; ++i)
fredqian 0:5f1d66c85ae0 240 {
fredqian 0:5f1d66c85ae0 241 if (crc & 1)
fredqian 0:5f1d66c85ae0 242 crc = (crc >> 1) ^ 0xA001;
fredqian 0:5f1d66c85ae0 243 else
fredqian 0:5f1d66c85ae0 244 crc = (crc >> 1);
fredqian 0:5f1d66c85ae0 245 }
fredqian 0:5f1d66c85ae0 246
fredqian 0:5f1d66c85ae0 247 return crc;
fredqian 0:5f1d66c85ae0 248 }
fredqian 0:5f1d66c85ae0 249
fredqian 0:5f1d66c85ae0 250 void rf_irq_callback();
fredqian 0:5f1d66c85ae0 251
fredqian 0:5f1d66c85ae0 252 //rf230.cpp
fredqian 0:5f1d66c85ae0 253 void radio_error(radio_error_t err);
fredqian 0:5f1d66c85ae0 254 void radio_receive_frame(void);
fredqian 0:5f1d66c85ae0 255 void radio_irq_handler(uint8_t cause);
fredqian 0:5f1d66c85ae0 256 //events
fredqian 0:5f1d66c85ae0 257 void zr_attach_error(void (*)(radio_error_t));
fredqian 0:5f1d66c85ae0 258 void zr_attach_irq(void (*)(uint8_t));
fredqian 0:5f1d66c85ae0 259 void zr_attach_receive_frame(uint8_t* (cMxRadio::*)(uint8_t, uint8_t*, uint8_t, int8_t,uint8_t));
fredqian 0:5f1d66c85ae0 260 void zr_attach_tx_done(void (cMxRadio::*)(radio_tx_done_t));
fredqian 0:5f1d66c85ae0 261
fredqian 0:5f1d66c85ae0 262 void (*user_radio_error)(radio_error_t);
fredqian 0:5f1d66c85ae0 263 void (*user_radio_irq)(uint8_t);
fredqian 0:5f1d66c85ae0 264 uint8_t* (cMxRadio::*user_radio_receive_frame)(uint8_t, uint8_t*, uint8_t, int8_t,uint8_t);
fredqian 0:5f1d66c85ae0 265 void (cMxRadio::*user_radio_tx_done)(radio_tx_done_t);
fredqian 0:5f1d66c85ae0 266
fredqian 0:5f1d66c85ae0 267
fredqian 0:5f1d66c85ae0 268 public:
fredqian 0:5f1d66c85ae0 269 cMxRadio(PinName mosi, PinName miso, PinName sclk, PinName cs, PinName rst, PinName slp, PinName irq);
fredqian 0:5f1d66c85ae0 270 ~cMxRadio();
fredqian 0:5f1d66c85ae0 271 void begin(channel_t);
fredqian 0:5f1d66c85ae0 272 void begin(channel_t,uint16_t,uint16_t,bool,bool,bool,char);
fredqian 0:5f1d66c85ae0 273 void begin(channel_t,uint16_t,uint16_t,bool,bool,bool);
fredqian 0:5f1d66c85ae0 274 void begin(channel_t, uint8_t*);
fredqian 0:5f1d66c85ae0 275 void setFrameHeader(uint8_t*);
fredqian 0:5f1d66c85ae0 276 void attachError(void(*)(radio_error_t));
fredqian 0:5f1d66c85ae0 277 void attachIrq(void(*)(uint8_t));
fredqian 0:5f1d66c85ae0 278 void attachReceiveFrame(uint8_t* (*)(uint8_t, uint8_t*, uint8_t, int8_t,uint8_t));
fredqian 0:5f1d66c85ae0 279 void sendFrame(uint16_t ,bool ,uint8_t* , uint8_t );
fredqian 0:5f1d66c85ae0 280 void attachTxDone(void(*)(radio_tx_done_t));
fredqian 0:5f1d66c85ae0 281 int8_t available();
fredqian 0:5f1d66c85ae0 282 int16_t peek();
fredqian 0:5f1d66c85ae0 283 int16_t read();
fredqian 0:5f1d66c85ae0 284 void flush();
fredqian 0:5f1d66c85ae0 285 void write(uint8_t);
fredqian 0:5f1d66c85ae0 286 void write(char*);
fredqian 0:5f1d66c85ae0 287 void write(uint8_t*, uint8_t);
fredqian 0:5f1d66c85ae0 288 void send(uint8_t);
fredqian 0:5f1d66c85ae0 289 void txFrame(uint8_t*, uint8_t);
fredqian 0:5f1d66c85ae0 290 void beginTransmission();
fredqian 0:5f1d66c85ae0 291 void beginTransmission(uint16_t);
fredqian 0:5f1d66c85ae0 292 void endTransmission();
fredqian 0:5f1d66c85ae0 293 void cancelTransmission();
fredqian 0:5f1d66c85ae0 294 void setParam(radio_attribute_t, radio_param_t);
fredqian 0:5f1d66c85ae0 295 radio_cca_t doCca();
fredqian 0:5f1d66c85ae0 296 void setState(radio_state_t, uint8_t);
fredqian 0:5f1d66c85ae0 297 void setState(radio_state_t);
fredqian 0:5f1d66c85ae0 298 void setStateRx();
fredqian 0:5f1d66c85ae0 299 void setChannel(channel_t);
fredqian 0:5f1d66c85ae0 300 uint8_t getChannel();
fredqian 0:5f1d66c85ae0 301 void forceState(radio_state_t);
fredqian 0:5f1d66c85ae0 302 void waitTxDone(uint16_t);
fredqian 0:5f1d66c85ae0 303 int8_t getRssiNow();
fredqian 0:5f1d66c85ae0 304 int8_t getLastRssi();
fredqian 0:5f1d66c85ae0 305 uint8_t getLqi();
fredqian 0:5f1d66c85ae0 306 int8_t getLastEd();
fredqian 0:5f1d66c85ae0 307 int8_t getEdNow();
fredqian 0:5f1d66c85ae0 308 };
fredqian 0:5f1d66c85ae0 309
fredqian 0:5f1d66c85ae0 310 extern cMxRadio MxRadio; // make single instance accessible
fredqian 0:5f1d66c85ae0 311
fredqian 0:5f1d66c85ae0 312 #define MxRadio_h
fredqian 0:5f1d66c85ae0 313 #endif