FMC_NORSRAM_InitTypeDef Struct Reference
[FMC Low Layer Exported Typedef]

Enables or disables wait signal during asynchronous transfers, valid only with asynchronous Flash memories. This parameter can be a value of FMC Asynchronous Wait

Definition at line 319 of file stm32l4xx_ll_fmc.h.

Enables or disables the burst access mode for Flash memory, valid only with synchronous burst Flash memories. This parameter can be a value of FMC Burst Access Mode

Definition at line 296 of file stm32l4xx_ll_fmc.h.

Enables or disables the FMC clock output to external memory devices. This parameter is only enabled through the FMC_BCR1 register, and don't care through FMC_BCR2..4 registers. This parameter can be a value of FMC Continous Clock

Definition at line 326 of file stm32l4xx_ll_fmc.h.

Specifies whether the address and data values are multiplexed on the data bus or not. This parameter can be a value of FMC Data Address Bus Multiplexing

Definition at line 285 of file stm32l4xx_ll_fmc.h.

Enables or disables the extended mode. This parameter can be a value of FMC Extended Mode

Definition at line 316 of file stm32l4xx_ll_fmc.h.

Specifies the external memory device width. This parameter can be a value of FMC NORSRAM Data Width

Definition at line 293 of file stm32l4xx_ll_fmc.h.

Specifies the type of external memory attached to the corresponding memory device. This parameter can be a value of FMC Memory Type

Definition at line 289 of file stm32l4xx_ll_fmc.h.

Specifies the NORSRAM memory device that will be used. This parameter can be a value of FMC NOR/SRAM Bank

Definition at line 282 of file stm32l4xx_ll_fmc.h.

Specifies the memory page size. This parameter can be a value of FMC Page Size

Definition at line 336 of file stm32l4xx_ll_fmc.h.

Enables or disables the wait state insertion via wait signal, valid for Flash memory access in burst mode. This parameter can be a value of FMC Wait Signal

Definition at line 312 of file stm32l4xx_ll_fmc.h.

Specifies if the wait signal is asserted by the memory one clock cycle before the wait state or during the wait state, valid only when accessing memories in burst mode. This parameter can be a value of FMC Wait Timing

Definition at line 304 of file stm32l4xx_ll_fmc.h.

Specifies the wait signal polarity, valid only when accessing the Flash memory in burst mode. This parameter can be a value of FMC Wait Signal Polarity

Definition at line 300 of file stm32l4xx_ll_fmc.h.

Enables or disables the write burst operation. This parameter can be a value of FMC Write Burst

Definition at line 323 of file stm32l4xx_ll_fmc.h.

Enables or disables the write FIFO used by the FMC controller. This parameter is only enabled through the FMC_BCR1 register, and don't care through FMC_BCR2..4 registers. This parameter can be a value of FMC Write FIFO

Definition at line 331 of file stm32l4xx_ll_fmc.h.

Enables or disables the write operation in the selected device by the FMC. This parameter can be a value of FMC Write Operation

Definition at line 309 of file stm32l4xx_ll_fmc.h.