STM32L4xx_HAL_Driver - L4 HAL Drivers

Senior Design: Sound Monitor » Code » STM32L4xx_HAL_Driver

Senior Design: Sound Monitor / STM32L4xx_HAL_Driver

L4 HAL Drivers

Src/stm32l4xx_hal_tim_ex.c@0:80ee8f3b695e, 2015-11-02 (annotated)

Committer:: EricLew
Date:: Mon Nov 02 19:37:23 2015 +0000
Revision:: 0:80ee8f3b695e

Errors are with definitions of LCD and QSPI functions. I believe all .h and .c files are  uploaded, but there may need to be certain functions called.

Who changed what in which revision?

User	Revision	Line number	New contents of line
EricLew	0:80ee8f3b695e	1	/**
EricLew	0:80ee8f3b695e	2	******************************************************************************
EricLew	0:80ee8f3b695e	3	* @file stm32l4xx_hal_tim_ex.c
EricLew	0:80ee8f3b695e	4	* @author MCD Application Team
EricLew	0:80ee8f3b695e	5	* @version V1.1.0
EricLew	0:80ee8f3b695e	6	* @date 16-September-2015
EricLew	0:80ee8f3b695e	7	* @brief TIM HAL module driver.
EricLew	0:80ee8f3b695e	8	* This file provides firmware functions to manage the following
EricLew	0:80ee8f3b695e	9	* functionalities of the Timer Extended peripheral:
EricLew	0:80ee8f3b695e	10	* + Time Hall Sensor Interface Initialization
EricLew	0:80ee8f3b695e	11	* + Time Hall Sensor Interface Start
EricLew	0:80ee8f3b695e	12	* + Time Complementary signal break and dead time configuration
EricLew	0:80ee8f3b695e	13	* + Time Master and Slave synchronization configuration
EricLew	0:80ee8f3b695e	14	* + Time Output Compare/PWM Channel Configuration (for channels 5 and 6)
EricLew	0:80ee8f3b695e	15	* + Time OCRef clear configuration
EricLew	0:80ee8f3b695e	16	* + Timer remapping capabilities configuration
EricLew	0:80ee8f3b695e	17	@verbatim
EricLew	0:80ee8f3b695e	18	==============================================================================
EricLew	0:80ee8f3b695e	19	##### TIMER Extended features #####
EricLew	0:80ee8f3b695e	20	==============================================================================
EricLew	0:80ee8f3b695e	21	[..]
EricLew	0:80ee8f3b695e	22	The Timer Extended features include:
EricLew	0:80ee8f3b695e	23	(#) Complementary outputs with programmable dead-time for :
EricLew	0:80ee8f3b695e	24	(++) Output Compare
EricLew	0:80ee8f3b695e	25	(++) PWM generation (Edge and Center-aligned Mode)
EricLew	0:80ee8f3b695e	26	(++) One-pulse mode output
EricLew	0:80ee8f3b695e	27	(#) Synchronization circuit to control the timer with external signals and to
EricLew	0:80ee8f3b695e	28	interconnect several timers together.
EricLew	0:80ee8f3b695e	29	(#) Break input to put the timer output signals in reset state or in a known state.
EricLew	0:80ee8f3b695e	30	(#) Supports incremental (quadrature) encoder and hall-sensor circuitry for
EricLew	0:80ee8f3b695e	31	positioning purposes
EricLew	0:80ee8f3b695e	32
EricLew	0:80ee8f3b695e	33	##### How to use this driver #####
EricLew	0:80ee8f3b695e	34	==============================================================================
EricLew	0:80ee8f3b695e	35	[..]
EricLew	0:80ee8f3b695e	36	(#) Initialize the TIM low level resources by implementing the following functions
EricLew	0:80ee8f3b695e	37	depending on the selected feature:
EricLew	0:80ee8f3b695e	38	(++) Hall Sensor output : HAL_TIMEx_HallSensor_MspInit()
EricLew	0:80ee8f3b695e	39
EricLew	0:80ee8f3b695e	40	(#) Initialize the TIM low level resources :
EricLew	0:80ee8f3b695e	41	(##) Enable the TIM interface clock using __HAL_RCC_TIMx_CLK_ENABLE();
EricLew	0:80ee8f3b695e	42	(##) TIM pins configuration
EricLew	0:80ee8f3b695e	43	(+++) Enable the clock for the TIM GPIOs using the following function:
EricLew	0:80ee8f3b695e	44	__HAL_RCC_GPIOx_CLK_ENABLE();
EricLew	0:80ee8f3b695e	45	(+++) Configure these TIM pins in Alternate function mode using HAL_GPIO_Init();
EricLew	0:80ee8f3b695e	46
EricLew	0:80ee8f3b695e	47	(#) The external Clock can be configured, if needed (the default clock is the
EricLew	0:80ee8f3b695e	48	internal clock from the APBx), using the following function:
EricLew	0:80ee8f3b695e	49	HAL_TIM_ConfigClockSource, the clock configuration should be done before
EricLew	0:80ee8f3b695e	50	any start function.
EricLew	0:80ee8f3b695e	51
EricLew	0:80ee8f3b695e	52	(#) Configure the TIM in the desired functioning mode using one of the
EricLew	0:80ee8f3b695e	53	initialization function of this driver:
EricLew	0:80ee8f3b695e	54	(++) HAL_TIMEx_HallSensor_Init() and HAL_TIMEx_ConfigCommutationEvent(): to use the
EricLew	0:80ee8f3b695e	55	Timer Hall Sensor Interface and the commutation event with the corresponding
EricLew	0:80ee8f3b695e	56	Interrupt and DMA request if needed (Note that One Timer is used to interface
EricLew	0:80ee8f3b695e	57	with the Hall sensor Interface and another Timer should be used to use
EricLew	0:80ee8f3b695e	58	the commutation event).
EricLew	0:80ee8f3b695e	59
EricLew	0:80ee8f3b695e	60	(#) Activate the TIM peripheral using one of the start functions:
EricLew	0:80ee8f3b695e	61	(++) Complementary Output Compare : HAL_TIMEx_OCN_Start(), HAL_TIMEx_OCN_Start_DMA(), HAL_TIMEx_OC_Start_IT()
EricLew	0:80ee8f3b695e	62	(++) Complementary PWM generation : HAL_TIMEx_PWMN_Start(), HAL_TIMEx_PWMN_Start_DMA(), HAL_TIMEx_PWMN_Start_IT()
EricLew	0:80ee8f3b695e	63	(++) Complementary One-pulse mode output : HAL_TIMEx_OnePulseN_Start(), HAL_TIMEx_OnePulseN_Start_IT()
EricLew	0:80ee8f3b695e	64	(++) Hall Sensor output : HAL_TIMEx_HallSensor_Start(), HAL_TIMEx_HallSensor_Start_DMA(), HAL_TIMEx_HallSensor_Start_IT().
EricLew	0:80ee8f3b695e	65
EricLew	0:80ee8f3b695e	66
EricLew	0:80ee8f3b695e	67	@endverbatim
EricLew	0:80ee8f3b695e	68	******************************************************************************
EricLew	0:80ee8f3b695e	69	* @attention
EricLew	0:80ee8f3b695e	70	*
EricLew	0:80ee8f3b695e	71	* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
EricLew	0:80ee8f3b695e	72	*
EricLew	0:80ee8f3b695e	73	* Redistribution and use in source and binary forms, with or without modification,
EricLew	0:80ee8f3b695e	74	* are permitted provided that the following conditions are met:
EricLew	0:80ee8f3b695e	75	* 1. Redistributions of source code must retain the above copyright notice,
EricLew	0:80ee8f3b695e	76	* this list of conditions and the following disclaimer.
EricLew	0:80ee8f3b695e	77	* 2. Redistributions in binary form must reproduce the above copyright notice,
EricLew	0:80ee8f3b695e	78	* this list of conditions and the following disclaimer in the documentation
EricLew	0:80ee8f3b695e	79	* and/or other materials provided with the distribution.
EricLew	0:80ee8f3b695e	80	* 3. Neither the name of STMicroelectronics nor the names of its contributors
EricLew	0:80ee8f3b695e	81	* may be used to endorse or promote products derived from this software
EricLew	0:80ee8f3b695e	82	* without specific prior written permission.
EricLew	0:80ee8f3b695e	83	*
EricLew	0:80ee8f3b695e	84	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
EricLew	0:80ee8f3b695e	85	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
EricLew	0:80ee8f3b695e	86	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
EricLew	0:80ee8f3b695e	87	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
EricLew	0:80ee8f3b695e	88	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
EricLew	0:80ee8f3b695e	89	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
EricLew	0:80ee8f3b695e	90	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
EricLew	0:80ee8f3b695e	91	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
EricLew	0:80ee8f3b695e	92	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
EricLew	0:80ee8f3b695e	93	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
EricLew	0:80ee8f3b695e	94	*
EricLew	0:80ee8f3b695e	95	******************************************************************************
EricLew	0:80ee8f3b695e	96	*/
EricLew	0:80ee8f3b695e	97
EricLew	0:80ee8f3b695e	98	/* Includes ------------------------------------------------------------------*/
EricLew	0:80ee8f3b695e	99	#include "stm32l4xx_hal.h"
EricLew	0:80ee8f3b695e	100
EricLew	0:80ee8f3b695e	101	/** @addtogroup STM32L4xx_HAL_Driver
EricLew	0:80ee8f3b695e	102	* @{
EricLew	0:80ee8f3b695e	103	*/
EricLew	0:80ee8f3b695e	104
EricLew	0:80ee8f3b695e	105	/** @defgroup TIMEx TIMEx
EricLew	0:80ee8f3b695e	106	* @brief TIM Extended HAL module driver
EricLew	0:80ee8f3b695e	107	* @{
EricLew	0:80ee8f3b695e	108	*/
EricLew	0:80ee8f3b695e	109
EricLew	0:80ee8f3b695e	110	#ifdef HAL_TIM_MODULE_ENABLED
EricLew	0:80ee8f3b695e	111
EricLew	0:80ee8f3b695e	112	/* Private typedef -----------------------------------------------------------*/
EricLew	0:80ee8f3b695e	113	/* Private define ------------------------------------------------------------*/
EricLew	0:80ee8f3b695e	114	#define BDTR_BKF_SHIFT (16)
EricLew	0:80ee8f3b695e	115	#define BDTR_BK2F_SHIFT (20)
EricLew	0:80ee8f3b695e	116	#define TIMx_ETRSEL_MASK ((uint32_t)0x0001C000)
EricLew	0:80ee8f3b695e	117
EricLew	0:80ee8f3b695e	118	/* Private macro -------------------------------------------------------------*/
EricLew	0:80ee8f3b695e	119	/* Private variables ---------------------------------------------------------*/
EricLew	0:80ee8f3b695e	120	/* Private function prototypes -----------------------------------------------*/
EricLew	0:80ee8f3b695e	121	static void TIM_OC5_SetConfig(TIM_TypeDef *TIMx,
EricLew	0:80ee8f3b695e	122	TIM_OC_InitTypeDef *OC_Config);
EricLew	0:80ee8f3b695e	123
EricLew	0:80ee8f3b695e	124	static void TIM_OC6_SetConfig(TIM_TypeDef *TIMx,
EricLew	0:80ee8f3b695e	125	TIM_OC_InitTypeDef *OC_Config);
EricLew	0:80ee8f3b695e	126
EricLew	0:80ee8f3b695e	127	static void TIM_CCxNChannelCmd(TIM_TypeDef* TIMx, uint32_t Channel, uint32_t ChannelNState);
EricLew	0:80ee8f3b695e	128
EricLew	0:80ee8f3b695e	129	/* Private functions ---------------------------------------------------------*/
EricLew	0:80ee8f3b695e	130	/**
EricLew	0:80ee8f3b695e	131	* @brief Timer Ouput Compare 5 configuration
EricLew	0:80ee8f3b695e	132	* @param TIMx to select the TIM peripheral
EricLew	0:80ee8f3b695e	133	* @param OC_Config: The ouput configuration structure
EricLew	0:80ee8f3b695e	134	* @retval None
EricLew	0:80ee8f3b695e	135	*/
EricLew	0:80ee8f3b695e	136	static void TIM_OC5_SetConfig(TIM_TypeDef *TIMx,
EricLew	0:80ee8f3b695e	137	TIM_OC_InitTypeDef *OC_Config)
EricLew	0:80ee8f3b695e	138	{
EricLew	0:80ee8f3b695e	139	uint32_t tmpccmrx = 0;
EricLew	0:80ee8f3b695e	140	uint32_t tmpccer = 0;
EricLew	0:80ee8f3b695e	141	uint32_t tmpcr2 = 0;
EricLew	0:80ee8f3b695e	142
EricLew	0:80ee8f3b695e	143	/* Disable the output: Reset the CCxE Bit */
EricLew	0:80ee8f3b695e	144	TIMx->CCER &= ~TIM_CCER_CC5E;
EricLew	0:80ee8f3b695e	145
EricLew	0:80ee8f3b695e	146	/* Get the TIMx CCER register value */
EricLew	0:80ee8f3b695e	147	tmpccer = TIMx->CCER;
EricLew	0:80ee8f3b695e	148	/* Get the TIMx CR2 register value */
EricLew	0:80ee8f3b695e	149	tmpcr2 = TIMx->CR2;
EricLew	0:80ee8f3b695e	150	/* Get the TIMx CCMR1 register value */
EricLew	0:80ee8f3b695e	151	tmpccmrx = TIMx->CCMR3;
EricLew	0:80ee8f3b695e	152
EricLew	0:80ee8f3b695e	153	/* Reset the Output Compare Mode Bits */
EricLew	0:80ee8f3b695e	154	tmpccmrx &= ~(TIM_CCMR3_OC5M);
EricLew	0:80ee8f3b695e	155	/* Select the Output Compare Mode */
EricLew	0:80ee8f3b695e	156	tmpccmrx \|= OC_Config->OCMode;
EricLew	0:80ee8f3b695e	157
EricLew	0:80ee8f3b695e	158	/* Reset the Output Polarity level */
EricLew	0:80ee8f3b695e	159	tmpccer &= ~TIM_CCER_CC5P;
EricLew	0:80ee8f3b695e	160	/* Set the Output Compare Polarity */
EricLew	0:80ee8f3b695e	161	tmpccer \|= (OC_Config->OCPolarity << 16);
EricLew	0:80ee8f3b695e	162
EricLew	0:80ee8f3b695e	163	if(IS_TIM_BREAK_INSTANCE(TIMx))
EricLew	0:80ee8f3b695e	164	{
EricLew	0:80ee8f3b695e	165	/* Reset the Output Compare IDLE State */
EricLew	0:80ee8f3b695e	166	tmpcr2 &= ~TIM_CR2_OIS5;
EricLew	0:80ee8f3b695e	167	/* Set the Output Idle state */
EricLew	0:80ee8f3b695e	168	tmpcr2 \|= (OC_Config->OCIdleState << 8);
EricLew	0:80ee8f3b695e	169	}
EricLew	0:80ee8f3b695e	170	/* Write to TIMx CR2 */
EricLew	0:80ee8f3b695e	171	TIMx->CR2 = tmpcr2;
EricLew	0:80ee8f3b695e	172
EricLew	0:80ee8f3b695e	173	/* Write to TIMx CCMR3 */
EricLew	0:80ee8f3b695e	174	TIMx->CCMR3 = tmpccmrx;
EricLew	0:80ee8f3b695e	175
EricLew	0:80ee8f3b695e	176	/* Set the Capture Compare Register value */
EricLew	0:80ee8f3b695e	177	TIMx->CCR5 = OC_Config->Pulse;
EricLew	0:80ee8f3b695e	178
EricLew	0:80ee8f3b695e	179	/* Write to TIMx CCER */
EricLew	0:80ee8f3b695e	180	TIMx->CCER = tmpccer;
EricLew	0:80ee8f3b695e	181	}
EricLew	0:80ee8f3b695e	182
EricLew	0:80ee8f3b695e	183	/**
EricLew	0:80ee8f3b695e	184	* @brief Timer Ouput Compare 6 configuration
EricLew	0:80ee8f3b695e	185	* @param TIMx to select the TIM peripheral
EricLew	0:80ee8f3b695e	186	* @param OC_Config: The ouput configuration structure
EricLew	0:80ee8f3b695e	187	* @retval None
EricLew	0:80ee8f3b695e	188	*/
EricLew	0:80ee8f3b695e	189	static void TIM_OC6_SetConfig(TIM_TypeDef *TIMx,
EricLew	0:80ee8f3b695e	190	TIM_OC_InitTypeDef *OC_Config)
EricLew	0:80ee8f3b695e	191	{
EricLew	0:80ee8f3b695e	192	uint32_t tmpccmrx = 0;
EricLew	0:80ee8f3b695e	193	uint32_t tmpccer = 0;
EricLew	0:80ee8f3b695e	194	uint32_t tmpcr2 = 0;
EricLew	0:80ee8f3b695e	195
EricLew	0:80ee8f3b695e	196	/* Disable the output: Reset the CCxE Bit */
EricLew	0:80ee8f3b695e	197	TIMx->CCER &= ~TIM_CCER_CC6E;
EricLew	0:80ee8f3b695e	198
EricLew	0:80ee8f3b695e	199	/* Get the TIMx CCER register value */
EricLew	0:80ee8f3b695e	200	tmpccer = TIMx->CCER;
EricLew	0:80ee8f3b695e	201	/* Get the TIMx CR2 register value */
EricLew	0:80ee8f3b695e	202	tmpcr2 = TIMx->CR2;
EricLew	0:80ee8f3b695e	203	/* Get the TIMx CCMR1 register value */
EricLew	0:80ee8f3b695e	204	tmpccmrx = TIMx->CCMR3;
EricLew	0:80ee8f3b695e	205
EricLew	0:80ee8f3b695e	206	/* Reset the Output Compare Mode Bits */
EricLew	0:80ee8f3b695e	207	tmpccmrx &= ~(TIM_CCMR3_OC6M);
EricLew	0:80ee8f3b695e	208	/* Select the Output Compare Mode */
EricLew	0:80ee8f3b695e	209	tmpccmrx \|= (OC_Config->OCMode << 8);
EricLew	0:80ee8f3b695e	210
EricLew	0:80ee8f3b695e	211	/* Reset the Output Polarity level */
EricLew	0:80ee8f3b695e	212	tmpccer &= (uint32_t)~TIM_CCER_CC6P;
EricLew	0:80ee8f3b695e	213	/* Set the Output Compare Polarity */
EricLew	0:80ee8f3b695e	214	tmpccer \|= (OC_Config->OCPolarity << 20);
EricLew	0:80ee8f3b695e	215
EricLew	0:80ee8f3b695e	216	if(IS_TIM_BREAK_INSTANCE(TIMx))
EricLew	0:80ee8f3b695e	217	{
EricLew	0:80ee8f3b695e	218	/* Reset the Output Compare IDLE State */
EricLew	0:80ee8f3b695e	219	tmpcr2 &= ~TIM_CR2_OIS6;
EricLew	0:80ee8f3b695e	220	/* Set the Output Idle state */
EricLew	0:80ee8f3b695e	221	tmpcr2 \|= (OC_Config->OCIdleState << 10);
EricLew	0:80ee8f3b695e	222	}
EricLew	0:80ee8f3b695e	223
EricLew	0:80ee8f3b695e	224	/* Write to TIMx CR2 */
EricLew	0:80ee8f3b695e	225	TIMx->CR2 = tmpcr2;
EricLew	0:80ee8f3b695e	226
EricLew	0:80ee8f3b695e	227	/* Write to TIMx CCMR3 */
EricLew	0:80ee8f3b695e	228	TIMx->CCMR3 = tmpccmrx;
EricLew	0:80ee8f3b695e	229
EricLew	0:80ee8f3b695e	230	/* Set the Capture Compare Register value */
EricLew	0:80ee8f3b695e	231	TIMx->CCR6 = OC_Config->Pulse;
EricLew	0:80ee8f3b695e	232
EricLew	0:80ee8f3b695e	233	/* Write to TIMx CCER */
EricLew	0:80ee8f3b695e	234	TIMx->CCER = tmpccer;
EricLew	0:80ee8f3b695e	235	}
EricLew	0:80ee8f3b695e	236
EricLew	0:80ee8f3b695e	237	/* Exported functions --------------------------------------------------------*/
EricLew	0:80ee8f3b695e	238	/** @defgroup TIMEx_Exported_Functions TIM Extended Exported Functions
EricLew	0:80ee8f3b695e	239	* @{
EricLew	0:80ee8f3b695e	240	*/
EricLew	0:80ee8f3b695e	241
EricLew	0:80ee8f3b695e	242	/** @defgroup TIMEx_Exported_Functions_Group1 Extended Timer Hall Sensor functions
EricLew	0:80ee8f3b695e	243	* @brief Timer Hall Sensor functions
EricLew	0:80ee8f3b695e	244	*
EricLew	0:80ee8f3b695e	245	@verbatim
EricLew	0:80ee8f3b695e	246	==============================================================================
EricLew	0:80ee8f3b695e	247	##### Timer Hall Sensor functions #####
EricLew	0:80ee8f3b695e	248	==============================================================================
EricLew	0:80ee8f3b695e	249	[..]
EricLew	0:80ee8f3b695e	250	This section provides functions allowing to:
EricLew	0:80ee8f3b695e	251	(+) Initialize and configure TIM HAL Sensor.
EricLew	0:80ee8f3b695e	252	(+) De-initialize TIM HAL Sensor.
EricLew	0:80ee8f3b695e	253	(+) Start the Hall Sensor Interface.
EricLew	0:80ee8f3b695e	254	(+) Stop the Hall Sensor Interface.
EricLew	0:80ee8f3b695e	255	(+) Start the Hall Sensor Interface and enable interrupts.
EricLew	0:80ee8f3b695e	256	(+) Stop the Hall Sensor Interface and disable interrupts.
EricLew	0:80ee8f3b695e	257	(+) Start the Hall Sensor Interface and enable DMA transfers.
EricLew	0:80ee8f3b695e	258	(+) Stop the Hall Sensor Interface and disable DMA transfers.
EricLew	0:80ee8f3b695e	259
EricLew	0:80ee8f3b695e	260	@endverbatim
EricLew	0:80ee8f3b695e	261	* @{
EricLew	0:80ee8f3b695e	262	*/
EricLew	0:80ee8f3b695e	263	/**
EricLew	0:80ee8f3b695e	264	* @brief Initializes the TIM Hall Sensor Interface and initialize the associated handle.
EricLew	0:80ee8f3b695e	265	* @param htim: TIM Encoder Interface handle
EricLew	0:80ee8f3b695e	266	* @param sConfig: TIM Hall Sensor configuration structure
EricLew	0:80ee8f3b695e	267	* @retval HAL status
EricLew	0:80ee8f3b695e	268	*/
EricLew	0:80ee8f3b695e	269	HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef htim, TIM_HallSensor_InitTypeDef sConfig)
EricLew	0:80ee8f3b695e	270	{
EricLew	0:80ee8f3b695e	271	TIM_OC_InitTypeDef OC_Config;
EricLew	0:80ee8f3b695e	272
EricLew	0:80ee8f3b695e	273	/* Check the TIM handle allocation */
EricLew	0:80ee8f3b695e	274	if(htim == NULL)
EricLew	0:80ee8f3b695e	275	{
EricLew	0:80ee8f3b695e	276	return HAL_ERROR;
EricLew	0:80ee8f3b695e	277	}
EricLew	0:80ee8f3b695e	278
EricLew	0:80ee8f3b695e	279	assert_param(IS_TIM_XOR_INSTANCE(htim->Instance));
EricLew	0:80ee8f3b695e	280	assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
EricLew	0:80ee8f3b695e	281	assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
EricLew	0:80ee8f3b695e	282	assert_param(IS_TIM_IC_POLARITY(sConfig->IC1Polarity));
EricLew	0:80ee8f3b695e	283	assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler));
EricLew	0:80ee8f3b695e	284	assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter));
EricLew	0:80ee8f3b695e	285
EricLew	0:80ee8f3b695e	286	if(htim->State == HAL_TIM_STATE_RESET)
EricLew	0:80ee8f3b695e	287	{
EricLew	0:80ee8f3b695e	288	/* Allocate lock resource and initialize it */
EricLew	0:80ee8f3b695e	289	htim->Lock = HAL_UNLOCKED;
EricLew	0:80ee8f3b695e	290
EricLew	0:80ee8f3b695e	291	/* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
EricLew	0:80ee8f3b695e	292	HAL_TIMEx_HallSensor_MspInit(htim);
EricLew	0:80ee8f3b695e	293	}
EricLew	0:80ee8f3b695e	294
EricLew	0:80ee8f3b695e	295	/* Set the TIM state */
EricLew	0:80ee8f3b695e	296	htim->State = HAL_TIM_STATE_BUSY;
EricLew	0:80ee8f3b695e	297
EricLew	0:80ee8f3b695e	298	/* Configure the Time base in the Encoder Mode */
EricLew	0:80ee8f3b695e	299	TIM_Base_SetConfig(htim->Instance, &htim->Init);
EricLew	0:80ee8f3b695e	300
EricLew	0:80ee8f3b695e	301	/* Configure the Channel 1 as Input Channel to interface with the three Outputs of the Hall sensor */
EricLew	0:80ee8f3b695e	302	TIM_TI1_SetConfig(htim->Instance, sConfig->IC1Polarity, TIM_ICSELECTION_TRC, sConfig->IC1Filter);
EricLew	0:80ee8f3b695e	303
EricLew	0:80ee8f3b695e	304	/* Reset the IC1PSC Bits */
EricLew	0:80ee8f3b695e	305	htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC;
EricLew	0:80ee8f3b695e	306	/* Set the IC1PSC value */
EricLew	0:80ee8f3b695e	307	htim->Instance->CCMR1 \|= sConfig->IC1Prescaler;
EricLew	0:80ee8f3b695e	308
EricLew	0:80ee8f3b695e	309	/* Enable the Hall sensor interface (XOR function of the three inputs) */
EricLew	0:80ee8f3b695e	310	htim->Instance->CR2 \|= TIM_CR2_TI1S;
EricLew	0:80ee8f3b695e	311
EricLew	0:80ee8f3b695e	312	/* Select the TIM_TS_TI1F_ED signal as Input trigger for the TIM */
EricLew	0:80ee8f3b695e	313	htim->Instance->SMCR &= ~TIM_SMCR_TS;
EricLew	0:80ee8f3b695e	314	htim->Instance->SMCR \|= TIM_TS_TI1F_ED;
EricLew	0:80ee8f3b695e	315
EricLew	0:80ee8f3b695e	316	/* Use the TIM_TS_TI1F_ED signal to reset the TIM counter each edge detection */
EricLew	0:80ee8f3b695e	317	htim->Instance->SMCR &= ~TIM_SMCR_SMS;
EricLew	0:80ee8f3b695e	318	htim->Instance->SMCR \|= TIM_SLAVEMODE_RESET;
EricLew	0:80ee8f3b695e	319
EricLew	0:80ee8f3b695e	320	/* Program channel 2 in PWM 2 mode with the desired Commutation_Delay*/
EricLew	0:80ee8f3b695e	321	OC_Config.OCFastMode = TIM_OCFAST_DISABLE;
EricLew	0:80ee8f3b695e	322	OC_Config.OCIdleState = TIM_OCIDLESTATE_RESET;
EricLew	0:80ee8f3b695e	323	OC_Config.OCMode = TIM_OCMODE_PWM2;
EricLew	0:80ee8f3b695e	324	OC_Config.OCNIdleState = TIM_OCNIDLESTATE_RESET;
EricLew	0:80ee8f3b695e	325	OC_Config.OCNPolarity = TIM_OCNPOLARITY_HIGH;
EricLew	0:80ee8f3b695e	326	OC_Config.OCPolarity = TIM_OCPOLARITY_HIGH;
EricLew	0:80ee8f3b695e	327	OC_Config.Pulse = sConfig->Commutation_Delay;
EricLew	0:80ee8f3b695e	328
EricLew	0:80ee8f3b695e	329	TIM_OC2_SetConfig(htim->Instance, &OC_Config);
EricLew	0:80ee8f3b695e	330
EricLew	0:80ee8f3b695e	331	/* Select OC2REF as trigger output on TRGO: write the MMS bits in the TIMx_CR2
EricLew	0:80ee8f3b695e	332	register to 101 */
EricLew	0:80ee8f3b695e	333	htim->Instance->CR2 &= ~TIM_CR2_MMS;
EricLew	0:80ee8f3b695e	334	htim->Instance->CR2 \|= TIM_TRGO_OC2REF;
EricLew	0:80ee8f3b695e	335
EricLew	0:80ee8f3b695e	336	/* Initialize the TIM state*/
EricLew	0:80ee8f3b695e	337	htim->State= HAL_TIM_STATE_READY;
EricLew	0:80ee8f3b695e	338
EricLew	0:80ee8f3b695e	339	return HAL_OK;
EricLew	0:80ee8f3b695e	340	}
EricLew	0:80ee8f3b695e	341
EricLew	0:80ee8f3b695e	342	/**
EricLew	0:80ee8f3b695e	343	* @brief DeInitialize the TIM Hall Sensor interface
EricLew	0:80ee8f3b695e	344	* @param htim: TIM Hall Sensor handle
EricLew	0:80ee8f3b695e	345	* @retval HAL status
EricLew	0:80ee8f3b695e	346	*/
EricLew	0:80ee8f3b695e	347	HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim)
EricLew	0:80ee8f3b695e	348	{
EricLew	0:80ee8f3b695e	349	/* Check the parameters */
EricLew	0:80ee8f3b695e	350	assert_param(IS_TIM_INSTANCE(htim->Instance));
EricLew	0:80ee8f3b695e	351
EricLew	0:80ee8f3b695e	352	htim->State = HAL_TIM_STATE_BUSY;
EricLew	0:80ee8f3b695e	353
EricLew	0:80ee8f3b695e	354	/* Disable the TIM Peripheral Clock */
EricLew	0:80ee8f3b695e	355	__HAL_TIM_DISABLE(htim);
EricLew	0:80ee8f3b695e	356
EricLew	0:80ee8f3b695e	357	/* DeInit the low level hardware: GPIO, CLOCK, NVIC */
EricLew	0:80ee8f3b695e	358	HAL_TIMEx_HallSensor_MspDeInit(htim);
EricLew	0:80ee8f3b695e	359
EricLew	0:80ee8f3b695e	360	/* Change TIM state */
EricLew	0:80ee8f3b695e	361	htim->State = HAL_TIM_STATE_RESET;
EricLew	0:80ee8f3b695e	362
EricLew	0:80ee8f3b695e	363	/* Release Lock */
EricLew	0:80ee8f3b695e	364	__HAL_UNLOCK(htim);
EricLew	0:80ee8f3b695e	365
EricLew	0:80ee8f3b695e	366	return HAL_OK;
EricLew	0:80ee8f3b695e	367	}
EricLew	0:80ee8f3b695e	368
EricLew	0:80ee8f3b695e	369	/**
EricLew	0:80ee8f3b695e	370	* @brief Initializes the TIM Hall Sensor MSP.
EricLew	0:80ee8f3b695e	371	* @param htim: TIM handle
EricLew	0:80ee8f3b695e	372	* @retval None
EricLew	0:80ee8f3b695e	373	*/
EricLew	0:80ee8f3b695e	374	__weak void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim)
EricLew	0:80ee8f3b695e	375	{
EricLew	0:80ee8f3b695e	376	/* NOTE : This function should not be modified, when the callback is needed,
EricLew	0:80ee8f3b695e	377	the HAL_TIMEx_HallSensor_MspInit could be implemented in the user file
EricLew	0:80ee8f3b695e	378	*/
EricLew	0:80ee8f3b695e	379	}
EricLew	0:80ee8f3b695e	380
EricLew	0:80ee8f3b695e	381	/**
EricLew	0:80ee8f3b695e	382	* @brief DeInitialize TIM Hall Sensor MSP.
EricLew	0:80ee8f3b695e	383	* @param htim: TIM handle
EricLew	0:80ee8f3b695e	384	* @retval None
EricLew	0:80ee8f3b695e	385	*/
EricLew	0:80ee8f3b695e	386	__weak void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim)
EricLew	0:80ee8f3b695e	387	{
EricLew	0:80ee8f3b695e	388	/* NOTE : This function should not be modified, when the callback is needed,
EricLew	0:80ee8f3b695e	389	the HAL_TIMEx_HallSensor_MspDeInit could be implemented in the user file
EricLew	0:80ee8f3b695e	390	*/
EricLew	0:80ee8f3b695e	391	}
EricLew	0:80ee8f3b695e	392
EricLew	0:80ee8f3b695e	393	/**
EricLew	0:80ee8f3b695e	394	* @brief Starts the TIM Hall Sensor Interface.
EricLew	0:80ee8f3b695e	395	* @param htim : TIM Hall Sensor handle
EricLew	0:80ee8f3b695e	396	* @retval HAL status
EricLew	0:80ee8f3b695e	397	*/
EricLew	0:80ee8f3b695e	398	HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim)
EricLew	0:80ee8f3b695e	399	{
EricLew	0:80ee8f3b695e	400	/* Check the parameters */
EricLew	0:80ee8f3b695e	401	assert_param(IS_TIM_XOR_INSTANCE(htim->Instance));
EricLew	0:80ee8f3b695e	402
EricLew	0:80ee8f3b695e	403	/* Enable the Input Capture channels 1
EricLew	0:80ee8f3b695e	404	(in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
EricLew	0:80ee8f3b695e	405	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
EricLew	0:80ee8f3b695e	406
EricLew	0:80ee8f3b695e	407	/* Enable the Peripheral */
EricLew	0:80ee8f3b695e	408	__HAL_TIM_ENABLE(htim);
EricLew	0:80ee8f3b695e	409
EricLew	0:80ee8f3b695e	410	/* Return function status */
EricLew	0:80ee8f3b695e	411	return HAL_OK;
EricLew	0:80ee8f3b695e	412	}
EricLew	0:80ee8f3b695e	413
EricLew	0:80ee8f3b695e	414	/**
EricLew	0:80ee8f3b695e	415	* @brief Stops the TIM Hall sensor Interface.
EricLew	0:80ee8f3b695e	416	* @param htim : TIM Hall Sensor handle
EricLew	0:80ee8f3b695e	417	* @retval HAL status
EricLew	0:80ee8f3b695e	418	*/
EricLew	0:80ee8f3b695e	419	HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim)
EricLew	0:80ee8f3b695e	420	{
EricLew	0:80ee8f3b695e	421	/* Check the parameters */
EricLew	0:80ee8f3b695e	422	assert_param(IS_TIM_XOR_INSTANCE(htim->Instance));
EricLew	0:80ee8f3b695e	423
EricLew	0:80ee8f3b695e	424	/* Disable the Input Capture channels 1, 2 and 3
EricLew	0:80ee8f3b695e	425	(in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
EricLew	0:80ee8f3b695e	426	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
EricLew	0:80ee8f3b695e	427
EricLew	0:80ee8f3b695e	428	/* Disable the Peripheral */
EricLew	0:80ee8f3b695e	429	__HAL_TIM_DISABLE(htim);
EricLew	0:80ee8f3b695e	430
EricLew	0:80ee8f3b695e	431	/* Return function status */
EricLew	0:80ee8f3b695e	432	return HAL_OK;
EricLew	0:80ee8f3b695e	433	}
EricLew	0:80ee8f3b695e	434
EricLew	0:80ee8f3b695e	435	/**
EricLew	0:80ee8f3b695e	436	* @brief Starts the TIM Hall Sensor Interface in interrupt mode.
EricLew	0:80ee8f3b695e	437	* @param htim : TIM Hall Sensor handle
EricLew	0:80ee8f3b695e	438	* @retval HAL status
EricLew	0:80ee8f3b695e	439	*/
EricLew	0:80ee8f3b695e	440	HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim)
EricLew	0:80ee8f3b695e	441	{
EricLew	0:80ee8f3b695e	442	/* Check the parameters */
EricLew	0:80ee8f3b695e	443	assert_param(IS_TIM_XOR_INSTANCE(htim->Instance));
EricLew	0:80ee8f3b695e	444
EricLew	0:80ee8f3b695e	445	/* Enable the capture compare Interrupts 1 event */
EricLew	0:80ee8f3b695e	446	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
EricLew	0:80ee8f3b695e	447
EricLew	0:80ee8f3b695e	448	/* Enable the Input Capture channels 1
EricLew	0:80ee8f3b695e	449	(in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
EricLew	0:80ee8f3b695e	450	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
EricLew	0:80ee8f3b695e	451
EricLew	0:80ee8f3b695e	452	/* Enable the Peripheral */
EricLew	0:80ee8f3b695e	453	__HAL_TIM_ENABLE(htim);
EricLew	0:80ee8f3b695e	454
EricLew	0:80ee8f3b695e	455	/* Return function status */
EricLew	0:80ee8f3b695e	456	return HAL_OK;
EricLew	0:80ee8f3b695e	457	}
EricLew	0:80ee8f3b695e	458
EricLew	0:80ee8f3b695e	459	/**
EricLew	0:80ee8f3b695e	460	* @brief Stops the TIM Hall Sensor Interface in interrupt mode.
EricLew	0:80ee8f3b695e	461	* @param htim : TIM handle
EricLew	0:80ee8f3b695e	462	* @retval HAL status
EricLew	0:80ee8f3b695e	463	*/
EricLew	0:80ee8f3b695e	464	HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim)
EricLew	0:80ee8f3b695e	465	{
EricLew	0:80ee8f3b695e	466	/* Check the parameters */
EricLew	0:80ee8f3b695e	467	assert_param(IS_TIM_XOR_INSTANCE(htim->Instance));
EricLew	0:80ee8f3b695e	468
EricLew	0:80ee8f3b695e	469	/* Disable the Input Capture channels 1
EricLew	0:80ee8f3b695e	470	(in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
EricLew	0:80ee8f3b695e	471	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
EricLew	0:80ee8f3b695e	472
EricLew	0:80ee8f3b695e	473	/* Disable the capture compare Interrupts event */
EricLew	0:80ee8f3b695e	474	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
EricLew	0:80ee8f3b695e	475
EricLew	0:80ee8f3b695e	476	/* Disable the Peripheral */
EricLew	0:80ee8f3b695e	477	__HAL_TIM_DISABLE(htim);
EricLew	0:80ee8f3b695e	478
EricLew	0:80ee8f3b695e	479	/* Return function status */
EricLew	0:80ee8f3b695e	480	return HAL_OK;
EricLew	0:80ee8f3b695e	481	}
EricLew	0:80ee8f3b695e	482
EricLew	0:80ee8f3b695e	483	/**
EricLew	0:80ee8f3b695e	484	* @brief Starts the TIM Hall Sensor Interface in DMA mode.
EricLew	0:80ee8f3b695e	485	* @param htim : TIM Hall Sensor handle
EricLew	0:80ee8f3b695e	486	* @param pData: The destination Buffer address.
EricLew	0:80ee8f3b695e	487	* @param Length: The length of data to be transferred from TIM peripheral to memory.
EricLew	0:80ee8f3b695e	488	* @retval HAL status
EricLew	0:80ee8f3b695e	489	*/
EricLew	0:80ee8f3b695e	490	HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef htim, uint32_t pData, uint16_t Length)
EricLew	0:80ee8f3b695e	491	{
EricLew	0:80ee8f3b695e	492	/* Check the parameters */
EricLew	0:80ee8f3b695e	493	assert_param(IS_TIM_XOR_INSTANCE(htim->Instance));
EricLew	0:80ee8f3b695e	494
EricLew	0:80ee8f3b695e	495	if((htim->State == HAL_TIM_STATE_BUSY))
EricLew	0:80ee8f3b695e	496	{
EricLew	0:80ee8f3b695e	497	return HAL_BUSY;
EricLew	0:80ee8f3b695e	498	}
EricLew	0:80ee8f3b695e	499	else if((htim->State == HAL_TIM_STATE_READY))
EricLew	0:80ee8f3b695e	500	{
EricLew	0:80ee8f3b695e	501	if(((uint32_t)pData == 0 ) && (Length > 0))
EricLew	0:80ee8f3b695e	502	{
EricLew	0:80ee8f3b695e	503	return HAL_ERROR;
EricLew	0:80ee8f3b695e	504	}
EricLew	0:80ee8f3b695e	505	else
EricLew	0:80ee8f3b695e	506	{
EricLew	0:80ee8f3b695e	507	htim->State = HAL_TIM_STATE_BUSY;
EricLew	0:80ee8f3b695e	508	}
EricLew	0:80ee8f3b695e	509	}
EricLew	0:80ee8f3b695e	510	/* Enable the Input Capture channels 1
EricLew	0:80ee8f3b695e	511	(in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
EricLew	0:80ee8f3b695e	512	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
EricLew	0:80ee8f3b695e	513
EricLew	0:80ee8f3b695e	514	/* Set the DMA Input Capture 1 Callback */
EricLew	0:80ee8f3b695e	515	htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt;
EricLew	0:80ee8f3b695e	516	/* Set the DMA error callback */
EricLew	0:80ee8f3b695e	517	htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
EricLew	0:80ee8f3b695e	518
EricLew	0:80ee8f3b695e	519	/* Enable the DMA channel for Capture 1*/
EricLew	0:80ee8f3b695e	520	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData, Length);
EricLew	0:80ee8f3b695e	521
EricLew	0:80ee8f3b695e	522	/* Enable the capture compare 1 Interrupt */
EricLew	0:80ee8f3b695e	523	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
EricLew	0:80ee8f3b695e	524
EricLew	0:80ee8f3b695e	525	/* Enable the Peripheral */
EricLew	0:80ee8f3b695e	526	__HAL_TIM_ENABLE(htim);
EricLew	0:80ee8f3b695e	527
EricLew	0:80ee8f3b695e	528	/* Return function status */
EricLew	0:80ee8f3b695e	529	return HAL_OK;
EricLew	0:80ee8f3b695e	530	}
EricLew	0:80ee8f3b695e	531
EricLew	0:80ee8f3b695e	532	/**
EricLew	0:80ee8f3b695e	533	* @brief Stops the TIM Hall Sensor Interface in DMA mode.
EricLew	0:80ee8f3b695e	534	* @param htim : TIM handle
EricLew	0:80ee8f3b695e	535	* @retval HAL status
EricLew	0:80ee8f3b695e	536	*/
EricLew	0:80ee8f3b695e	537	HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim)
EricLew	0:80ee8f3b695e	538	{
EricLew	0:80ee8f3b695e	539	/* Check the parameters */
EricLew	0:80ee8f3b695e	540	assert_param(IS_TIM_XOR_INSTANCE(htim->Instance));
EricLew	0:80ee8f3b695e	541
EricLew	0:80ee8f3b695e	542	/* Disable the Input Capture channels 1
EricLew	0:80ee8f3b695e	543	(in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
EricLew	0:80ee8f3b695e	544	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
EricLew	0:80ee8f3b695e	545
EricLew	0:80ee8f3b695e	546
EricLew	0:80ee8f3b695e	547	/* Disable the capture compare Interrupts 1 event */
EricLew	0:80ee8f3b695e	548	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
EricLew	0:80ee8f3b695e	549
EricLew	0:80ee8f3b695e	550	/* Disable the Peripheral */
EricLew	0:80ee8f3b695e	551	__HAL_TIM_DISABLE(htim);
EricLew	0:80ee8f3b695e	552
EricLew	0:80ee8f3b695e	553	/* Return function status */
EricLew	0:80ee8f3b695e	554	return HAL_OK;
EricLew	0:80ee8f3b695e	555	}
EricLew	0:80ee8f3b695e	556
EricLew	0:80ee8f3b695e	557	/**
EricLew	0:80ee8f3b695e	558	* @}
EricLew	0:80ee8f3b695e	559	*/
EricLew	0:80ee8f3b695e	560
EricLew	0:80ee8f3b695e	561	/** @defgroup TIMEx_Exported_Functions_Group2 Extended Timer Complementary Output Compare functions
EricLew	0:80ee8f3b695e	562	* @brief Timer Complementary Output Compare functions
EricLew	0:80ee8f3b695e	563	*
EricLew	0:80ee8f3b695e	564	@verbatim
EricLew	0:80ee8f3b695e	565	==============================================================================
EricLew	0:80ee8f3b695e	566	##### Timer Complementary Output Compare functions #####
EricLew	0:80ee8f3b695e	567	==============================================================================
EricLew	0:80ee8f3b695e	568	[..]
EricLew	0:80ee8f3b695e	569	This section provides functions allowing to:
EricLew	0:80ee8f3b695e	570	(+) Start the Complementary Output Compare/PWM.
EricLew	0:80ee8f3b695e	571	(+) Stop the Complementary Output Compare/PWM.
EricLew	0:80ee8f3b695e	572	(+) Start the Complementary Output Compare/PWM and enable interrupts.
EricLew	0:80ee8f3b695e	573	(+) Stop the Complementary Output Compare/PWM and disable interrupts.
EricLew	0:80ee8f3b695e	574	(+) Start the Complementary Output Compare/PWM and enable DMA transfers.
EricLew	0:80ee8f3b695e	575	(+) Stop the Complementary Output Compare/PWM and disable DMA transfers.
EricLew	0:80ee8f3b695e	576
EricLew	0:80ee8f3b695e	577	@endverbatim
EricLew	0:80ee8f3b695e	578	* @{
EricLew	0:80ee8f3b695e	579	*/
EricLew	0:80ee8f3b695e	580
EricLew	0:80ee8f3b695e	581	/**
EricLew	0:80ee8f3b695e	582	* @brief Starts the TIM Output Compare signal generation on the complementary
EricLew	0:80ee8f3b695e	583	* output.
EricLew	0:80ee8f3b695e	584	* @param htim : TIM Output Compare handle
EricLew	0:80ee8f3b695e	585	* @param Channel : TIM Channel to be enabled
EricLew	0:80ee8f3b695e	586	* This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	587	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
EricLew	0:80ee8f3b695e	588	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
EricLew	0:80ee8f3b695e	589	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
EricLew	0:80ee8f3b695e	590	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
EricLew	0:80ee8f3b695e	591	* @retval HAL status
EricLew	0:80ee8f3b695e	592	*/
EricLew	0:80ee8f3b695e	593	HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
EricLew	0:80ee8f3b695e	594	{
EricLew	0:80ee8f3b695e	595	/* Check the parameters */
EricLew	0:80ee8f3b695e	596	assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
EricLew	0:80ee8f3b695e	597
EricLew	0:80ee8f3b695e	598	/* Enable the Capture compare channel N */
EricLew	0:80ee8f3b695e	599	TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
EricLew	0:80ee8f3b695e	600
EricLew	0:80ee8f3b695e	601	/* Enable the Main Ouput */
EricLew	0:80ee8f3b695e	602	__HAL_TIM_MOE_ENABLE(htim);
EricLew	0:80ee8f3b695e	603
EricLew	0:80ee8f3b695e	604	/* Enable the Peripheral */
EricLew	0:80ee8f3b695e	605	__HAL_TIM_ENABLE(htim);
EricLew	0:80ee8f3b695e	606
EricLew	0:80ee8f3b695e	607	/* Return function status */
EricLew	0:80ee8f3b695e	608	return HAL_OK;
EricLew	0:80ee8f3b695e	609	}
EricLew	0:80ee8f3b695e	610
EricLew	0:80ee8f3b695e	611	/**
EricLew	0:80ee8f3b695e	612	* @brief Stops the TIM Output Compare signal generation on the complementary
EricLew	0:80ee8f3b695e	613	* output.
EricLew	0:80ee8f3b695e	614	* @param htim : TIM handle
EricLew	0:80ee8f3b695e	615	* @param Channel : TIM Channel to be disabled
EricLew	0:80ee8f3b695e	616	* This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	617	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
EricLew	0:80ee8f3b695e	618	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
EricLew	0:80ee8f3b695e	619	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
EricLew	0:80ee8f3b695e	620	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
EricLew	0:80ee8f3b695e	621	* @retval HAL status
EricLew	0:80ee8f3b695e	622	*/
EricLew	0:80ee8f3b695e	623	HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
EricLew	0:80ee8f3b695e	624	{
EricLew	0:80ee8f3b695e	625	/* Check the parameters */
EricLew	0:80ee8f3b695e	626	assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
EricLew	0:80ee8f3b695e	627
EricLew	0:80ee8f3b695e	628	/* Disable the Capture compare channel N */
EricLew	0:80ee8f3b695e	629	TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
EricLew	0:80ee8f3b695e	630
EricLew	0:80ee8f3b695e	631	/* Disable the Main Ouput */
EricLew	0:80ee8f3b695e	632	__HAL_TIM_MOE_DISABLE(htim);
EricLew	0:80ee8f3b695e	633
EricLew	0:80ee8f3b695e	634	/* Disable the Peripheral */
EricLew	0:80ee8f3b695e	635	__HAL_TIM_DISABLE(htim);
EricLew	0:80ee8f3b695e	636
EricLew	0:80ee8f3b695e	637	/* Return function status */
EricLew	0:80ee8f3b695e	638	return HAL_OK;
EricLew	0:80ee8f3b695e	639	}
EricLew	0:80ee8f3b695e	640
EricLew	0:80ee8f3b695e	641	/**
EricLew	0:80ee8f3b695e	642	* @brief Starts the TIM Output Compare signal generation in interrupt mode
EricLew	0:80ee8f3b695e	643	* on the complementary output.
EricLew	0:80ee8f3b695e	644	* @param htim : TIM OC handle
EricLew	0:80ee8f3b695e	645	* @param Channel : TIM Channel to be enabled
EricLew	0:80ee8f3b695e	646	* This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	647	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
EricLew	0:80ee8f3b695e	648	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
EricLew	0:80ee8f3b695e	649	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
EricLew	0:80ee8f3b695e	650	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
EricLew	0:80ee8f3b695e	651	* @retval HAL status
EricLew	0:80ee8f3b695e	652	*/
EricLew	0:80ee8f3b695e	653	HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
EricLew	0:80ee8f3b695e	654	{
EricLew	0:80ee8f3b695e	655	/* Check the parameters */
EricLew	0:80ee8f3b695e	656	assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
EricLew	0:80ee8f3b695e	657
EricLew	0:80ee8f3b695e	658	switch (Channel)
EricLew	0:80ee8f3b695e	659	{
EricLew	0:80ee8f3b695e	660	case TIM_CHANNEL_1:
EricLew	0:80ee8f3b695e	661	{
EricLew	0:80ee8f3b695e	662	/* Enable the TIM Output Compare interrupt */
EricLew	0:80ee8f3b695e	663	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
EricLew	0:80ee8f3b695e	664	}
EricLew	0:80ee8f3b695e	665	break;
EricLew	0:80ee8f3b695e	666
EricLew	0:80ee8f3b695e	667	case TIM_CHANNEL_2:
EricLew	0:80ee8f3b695e	668	{
EricLew	0:80ee8f3b695e	669	/* Enable the TIM Output Compare interrupt */
EricLew	0:80ee8f3b695e	670	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
EricLew	0:80ee8f3b695e	671	}
EricLew	0:80ee8f3b695e	672	break;
EricLew	0:80ee8f3b695e	673
EricLew	0:80ee8f3b695e	674	case TIM_CHANNEL_3:
EricLew	0:80ee8f3b695e	675	{
EricLew	0:80ee8f3b695e	676	/* Enable the TIM Output Compare interrupt */
EricLew	0:80ee8f3b695e	677	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
EricLew	0:80ee8f3b695e	678	}
EricLew	0:80ee8f3b695e	679	break;
EricLew	0:80ee8f3b695e	680
EricLew	0:80ee8f3b695e	681	case TIM_CHANNEL_4:
EricLew	0:80ee8f3b695e	682	{
EricLew	0:80ee8f3b695e	683	/* Enable the TIM Output Compare interrupt */
EricLew	0:80ee8f3b695e	684	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4);
EricLew	0:80ee8f3b695e	685	}
EricLew	0:80ee8f3b695e	686	break;
EricLew	0:80ee8f3b695e	687
EricLew	0:80ee8f3b695e	688	default:
EricLew	0:80ee8f3b695e	689	break;
EricLew	0:80ee8f3b695e	690	}
EricLew	0:80ee8f3b695e	691
EricLew	0:80ee8f3b695e	692	/* Enable the TIM Break interrupt */
EricLew	0:80ee8f3b695e	693	__HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK);
EricLew	0:80ee8f3b695e	694
EricLew	0:80ee8f3b695e	695	/* Enable the Capture compare channel N */
EricLew	0:80ee8f3b695e	696	TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
EricLew	0:80ee8f3b695e	697
EricLew	0:80ee8f3b695e	698	/* Enable the Main Ouput */
EricLew	0:80ee8f3b695e	699	__HAL_TIM_MOE_ENABLE(htim);
EricLew	0:80ee8f3b695e	700
EricLew	0:80ee8f3b695e	701	/* Enable the Peripheral */
EricLew	0:80ee8f3b695e	702	__HAL_TIM_ENABLE(htim);
EricLew	0:80ee8f3b695e	703
EricLew	0:80ee8f3b695e	704	/* Return function status */
EricLew	0:80ee8f3b695e	705	return HAL_OK;
EricLew	0:80ee8f3b695e	706	}
EricLew	0:80ee8f3b695e	707
EricLew	0:80ee8f3b695e	708	/**
EricLew	0:80ee8f3b695e	709	* @brief Stops the TIM Output Compare signal generation in interrupt mode
EricLew	0:80ee8f3b695e	710	* on the complementary output.
EricLew	0:80ee8f3b695e	711	* @param htim : TIM Output Compare handle
EricLew	0:80ee8f3b695e	712	* @param Channel : TIM Channel to be disabled
EricLew	0:80ee8f3b695e	713	* This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	714	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
EricLew	0:80ee8f3b695e	715	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
EricLew	0:80ee8f3b695e	716	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
EricLew	0:80ee8f3b695e	717	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
EricLew	0:80ee8f3b695e	718	* @retval HAL status
EricLew	0:80ee8f3b695e	719	*/
EricLew	0:80ee8f3b695e	720	HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
EricLew	0:80ee8f3b695e	721	{
EricLew	0:80ee8f3b695e	722	uint32_t tmpccer = 0;
EricLew	0:80ee8f3b695e	723
EricLew	0:80ee8f3b695e	724	/* Check the parameters */
EricLew	0:80ee8f3b695e	725	assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
EricLew	0:80ee8f3b695e	726
EricLew	0:80ee8f3b695e	727	switch (Channel)
EricLew	0:80ee8f3b695e	728	{
EricLew	0:80ee8f3b695e	729	case TIM_CHANNEL_1:
EricLew	0:80ee8f3b695e	730	{
EricLew	0:80ee8f3b695e	731	/* Disable the TIM Output Compare interrupt */
EricLew	0:80ee8f3b695e	732	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
EricLew	0:80ee8f3b695e	733	}
EricLew	0:80ee8f3b695e	734	break;
EricLew	0:80ee8f3b695e	735
EricLew	0:80ee8f3b695e	736	case TIM_CHANNEL_2:
EricLew	0:80ee8f3b695e	737	{
EricLew	0:80ee8f3b695e	738	/* Disable the TIM Output Compare interrupt */
EricLew	0:80ee8f3b695e	739	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
EricLew	0:80ee8f3b695e	740	}
EricLew	0:80ee8f3b695e	741	break;
EricLew	0:80ee8f3b695e	742
EricLew	0:80ee8f3b695e	743	case TIM_CHANNEL_3:
EricLew	0:80ee8f3b695e	744	{
EricLew	0:80ee8f3b695e	745	/* Disable the TIM Output Compare interrupt */
EricLew	0:80ee8f3b695e	746	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
EricLew	0:80ee8f3b695e	747	}
EricLew	0:80ee8f3b695e	748	break;
EricLew	0:80ee8f3b695e	749
EricLew	0:80ee8f3b695e	750	case TIM_CHANNEL_4:
EricLew	0:80ee8f3b695e	751	{
EricLew	0:80ee8f3b695e	752	/* Disable the TIM Output Compare interrupt */
EricLew	0:80ee8f3b695e	753	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4);
EricLew	0:80ee8f3b695e	754	}
EricLew	0:80ee8f3b695e	755	break;
EricLew	0:80ee8f3b695e	756
EricLew	0:80ee8f3b695e	757	default:
EricLew	0:80ee8f3b695e	758	break;
EricLew	0:80ee8f3b695e	759	}
EricLew	0:80ee8f3b695e	760
EricLew	0:80ee8f3b695e	761	/* Disable the Capture compare channel N */
EricLew	0:80ee8f3b695e	762	TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
EricLew	0:80ee8f3b695e	763
EricLew	0:80ee8f3b695e	764	/* Disable the TIM Break interrupt (only if no more channel is active) */
EricLew	0:80ee8f3b695e	765	tmpccer = htim->Instance->CCER;
EricLew	0:80ee8f3b695e	766	if ((tmpccer & (TIM_CCER_CC1NE \| TIM_CCER_CC2NE \| TIM_CCER_CC3NE)) == RESET)
EricLew	0:80ee8f3b695e	767	{
EricLew	0:80ee8f3b695e	768	__HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK);
EricLew	0:80ee8f3b695e	769	}
EricLew	0:80ee8f3b695e	770
EricLew	0:80ee8f3b695e	771	/* Disable the Main Ouput */
EricLew	0:80ee8f3b695e	772	__HAL_TIM_MOE_DISABLE(htim);
EricLew	0:80ee8f3b695e	773
EricLew	0:80ee8f3b695e	774	/* Disable the Peripheral */
EricLew	0:80ee8f3b695e	775	__HAL_TIM_DISABLE(htim);
EricLew	0:80ee8f3b695e	776
EricLew	0:80ee8f3b695e	777	/* Return function status */
EricLew	0:80ee8f3b695e	778	return HAL_OK;
EricLew	0:80ee8f3b695e	779	}
EricLew	0:80ee8f3b695e	780
EricLew	0:80ee8f3b695e	781	/**
EricLew	0:80ee8f3b695e	782	* @brief Starts the TIM Output Compare signal generation in DMA mode
EricLew	0:80ee8f3b695e	783	* on the complementary output.
EricLew	0:80ee8f3b695e	784	* @param htim : TIM Output Compare handle
EricLew	0:80ee8f3b695e	785	* @param Channel : TIM Channel to be enabled
EricLew	0:80ee8f3b695e	786	* This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	787	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
EricLew	0:80ee8f3b695e	788	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
EricLew	0:80ee8f3b695e	789	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
EricLew	0:80ee8f3b695e	790	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
EricLew	0:80ee8f3b695e	791	* @param pData: The source Buffer address.
EricLew	0:80ee8f3b695e	792	* @param Length: The length of data to be transferred from memory to TIM peripheral
EricLew	0:80ee8f3b695e	793	* @retval HAL status
EricLew	0:80ee8f3b695e	794	*/
EricLew	0:80ee8f3b695e	795	HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef htim, uint32_t Channel, uint32_t pData, uint16_t Length)
EricLew	0:80ee8f3b695e	796	{
EricLew	0:80ee8f3b695e	797	/* Check the parameters */
EricLew	0:80ee8f3b695e	798	assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
EricLew	0:80ee8f3b695e	799
EricLew	0:80ee8f3b695e	800	if((htim->State == HAL_TIM_STATE_BUSY))
EricLew	0:80ee8f3b695e	801	{
EricLew	0:80ee8f3b695e	802	return HAL_BUSY;
EricLew	0:80ee8f3b695e	803	}
EricLew	0:80ee8f3b695e	804	else if((htim->State == HAL_TIM_STATE_READY))
EricLew	0:80ee8f3b695e	805	{
EricLew	0:80ee8f3b695e	806	if(((uint32_t)pData == 0 ) && (Length > 0))
EricLew	0:80ee8f3b695e	807	{
EricLew	0:80ee8f3b695e	808	return HAL_ERROR;
EricLew	0:80ee8f3b695e	809	}
EricLew	0:80ee8f3b695e	810	else
EricLew	0:80ee8f3b695e	811	{
EricLew	0:80ee8f3b695e	812	htim->State = HAL_TIM_STATE_BUSY;
EricLew	0:80ee8f3b695e	813	}
EricLew	0:80ee8f3b695e	814	}
EricLew	0:80ee8f3b695e	815	switch (Channel)
EricLew	0:80ee8f3b695e	816	{
EricLew	0:80ee8f3b695e	817	case TIM_CHANNEL_1:
EricLew	0:80ee8f3b695e	818	{
EricLew	0:80ee8f3b695e	819	/* Set the DMA Period elapsed callback */
EricLew	0:80ee8f3b695e	820	htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt;
EricLew	0:80ee8f3b695e	821
EricLew	0:80ee8f3b695e	822	/* Set the DMA error callback */
EricLew	0:80ee8f3b695e	823	htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
EricLew	0:80ee8f3b695e	824
EricLew	0:80ee8f3b695e	825	/* Enable the DMA channel */
EricLew	0:80ee8f3b695e	826	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length);
EricLew	0:80ee8f3b695e	827
EricLew	0:80ee8f3b695e	828	/* Enable the TIM Output Compare DMA request */
EricLew	0:80ee8f3b695e	829	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
EricLew	0:80ee8f3b695e	830	}
EricLew	0:80ee8f3b695e	831	break;
EricLew	0:80ee8f3b695e	832
EricLew	0:80ee8f3b695e	833	case TIM_CHANNEL_2:
EricLew	0:80ee8f3b695e	834	{
EricLew	0:80ee8f3b695e	835	/* Set the DMA Period elapsed callback */
EricLew	0:80ee8f3b695e	836	htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt;
EricLew	0:80ee8f3b695e	837
EricLew	0:80ee8f3b695e	838	/* Set the DMA error callback */
EricLew	0:80ee8f3b695e	839	htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ;
EricLew	0:80ee8f3b695e	840
EricLew	0:80ee8f3b695e	841	/* Enable the DMA channel */
EricLew	0:80ee8f3b695e	842	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length);
EricLew	0:80ee8f3b695e	843
EricLew	0:80ee8f3b695e	844	/* Enable the TIM Output Compare DMA request */
EricLew	0:80ee8f3b695e	845	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
EricLew	0:80ee8f3b695e	846	}
EricLew	0:80ee8f3b695e	847	break;
EricLew	0:80ee8f3b695e	848
EricLew	0:80ee8f3b695e	849	case TIM_CHANNEL_3:
EricLew	0:80ee8f3b695e	850	{
EricLew	0:80ee8f3b695e	851	/* Set the DMA Period elapsed callback */
EricLew	0:80ee8f3b695e	852	htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt;
EricLew	0:80ee8f3b695e	853
EricLew	0:80ee8f3b695e	854	/* Set the DMA error callback */
EricLew	0:80ee8f3b695e	855	htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ;
EricLew	0:80ee8f3b695e	856
EricLew	0:80ee8f3b695e	857	/* Enable the DMA channel */
EricLew	0:80ee8f3b695e	858	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,Length);
EricLew	0:80ee8f3b695e	859
EricLew	0:80ee8f3b695e	860	/* Enable the TIM Output Compare DMA request */
EricLew	0:80ee8f3b695e	861	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
EricLew	0:80ee8f3b695e	862	}
EricLew	0:80ee8f3b695e	863	break;
EricLew	0:80ee8f3b695e	864
EricLew	0:80ee8f3b695e	865	case TIM_CHANNEL_4:
EricLew	0:80ee8f3b695e	866	{
EricLew	0:80ee8f3b695e	867	/* Set the DMA Period elapsed callback */
EricLew	0:80ee8f3b695e	868	htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMADelayPulseCplt;
EricLew	0:80ee8f3b695e	869
EricLew	0:80ee8f3b695e	870	/* Set the DMA error callback */
EricLew	0:80ee8f3b695e	871	htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ;
EricLew	0:80ee8f3b695e	872
EricLew	0:80ee8f3b695e	873	/* Enable the DMA channel */
EricLew	0:80ee8f3b695e	874	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4, Length);
EricLew	0:80ee8f3b695e	875
EricLew	0:80ee8f3b695e	876	/* Enable the TIM Output Compare DMA request */
EricLew	0:80ee8f3b695e	877	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4);
EricLew	0:80ee8f3b695e	878	}
EricLew	0:80ee8f3b695e	879	break;
EricLew	0:80ee8f3b695e	880
EricLew	0:80ee8f3b695e	881	default:
EricLew	0:80ee8f3b695e	882	break;
EricLew	0:80ee8f3b695e	883	}
EricLew	0:80ee8f3b695e	884
EricLew	0:80ee8f3b695e	885	/* Enable the Capture compare channel N */
EricLew	0:80ee8f3b695e	886	TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
EricLew	0:80ee8f3b695e	887
EricLew	0:80ee8f3b695e	888	/* Enable the Main Ouput */
EricLew	0:80ee8f3b695e	889	__HAL_TIM_MOE_ENABLE(htim);
EricLew	0:80ee8f3b695e	890
EricLew	0:80ee8f3b695e	891	/* Enable the Peripheral */
EricLew	0:80ee8f3b695e	892	__HAL_TIM_ENABLE(htim);
EricLew	0:80ee8f3b695e	893
EricLew	0:80ee8f3b695e	894	/* Return function status */
EricLew	0:80ee8f3b695e	895	return HAL_OK;
EricLew	0:80ee8f3b695e	896	}
EricLew	0:80ee8f3b695e	897
EricLew	0:80ee8f3b695e	898	/**
EricLew	0:80ee8f3b695e	899	* @brief Stops the TIM Output Compare signal generation in DMA mode
EricLew	0:80ee8f3b695e	900	* on the complementary output.
EricLew	0:80ee8f3b695e	901	* @param htim : TIM Output Compare handle
EricLew	0:80ee8f3b695e	902	* @param Channel : TIM Channel to be disabled
EricLew	0:80ee8f3b695e	903	* This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	904	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
EricLew	0:80ee8f3b695e	905	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
EricLew	0:80ee8f3b695e	906	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
EricLew	0:80ee8f3b695e	907	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
EricLew	0:80ee8f3b695e	908	* @retval HAL status
EricLew	0:80ee8f3b695e	909	*/
EricLew	0:80ee8f3b695e	910	HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
EricLew	0:80ee8f3b695e	911	{
EricLew	0:80ee8f3b695e	912	/* Check the parameters */
EricLew	0:80ee8f3b695e	913	assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
EricLew	0:80ee8f3b695e	914
EricLew	0:80ee8f3b695e	915	switch (Channel)
EricLew	0:80ee8f3b695e	916	{
EricLew	0:80ee8f3b695e	917	case TIM_CHANNEL_1:
EricLew	0:80ee8f3b695e	918	{
EricLew	0:80ee8f3b695e	919	/* Disable the TIM Output Compare DMA request */
EricLew	0:80ee8f3b695e	920	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
EricLew	0:80ee8f3b695e	921	}
EricLew	0:80ee8f3b695e	922	break;
EricLew	0:80ee8f3b695e	923
EricLew	0:80ee8f3b695e	924	case TIM_CHANNEL_2:
EricLew	0:80ee8f3b695e	925	{
EricLew	0:80ee8f3b695e	926	/* Disable the TIM Output Compare DMA request */
EricLew	0:80ee8f3b695e	927	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
EricLew	0:80ee8f3b695e	928	}
EricLew	0:80ee8f3b695e	929	break;
EricLew	0:80ee8f3b695e	930
EricLew	0:80ee8f3b695e	931	case TIM_CHANNEL_3:
EricLew	0:80ee8f3b695e	932	{
EricLew	0:80ee8f3b695e	933	/* Disable the TIM Output Compare DMA request */
EricLew	0:80ee8f3b695e	934	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
EricLew	0:80ee8f3b695e	935	}
EricLew	0:80ee8f3b695e	936	break;
EricLew	0:80ee8f3b695e	937
EricLew	0:80ee8f3b695e	938	case TIM_CHANNEL_4:
EricLew	0:80ee8f3b695e	939	{
EricLew	0:80ee8f3b695e	940	/* Disable the TIM Output Compare interrupt */
EricLew	0:80ee8f3b695e	941	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4);
EricLew	0:80ee8f3b695e	942	}
EricLew	0:80ee8f3b695e	943	break;
EricLew	0:80ee8f3b695e	944
EricLew	0:80ee8f3b695e	945	default:
EricLew	0:80ee8f3b695e	946	break;
EricLew	0:80ee8f3b695e	947	}
EricLew	0:80ee8f3b695e	948
EricLew	0:80ee8f3b695e	949	/* Disable the Capture compare channel N */
EricLew	0:80ee8f3b695e	950	TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
EricLew	0:80ee8f3b695e	951
EricLew	0:80ee8f3b695e	952	/* Disable the Main Ouput */
EricLew	0:80ee8f3b695e	953	__HAL_TIM_MOE_DISABLE(htim);
EricLew	0:80ee8f3b695e	954
EricLew	0:80ee8f3b695e	955	/* Disable the Peripheral */
EricLew	0:80ee8f3b695e	956	__HAL_TIM_DISABLE(htim);
EricLew	0:80ee8f3b695e	957
EricLew	0:80ee8f3b695e	958	/* Change the htim state */
EricLew	0:80ee8f3b695e	959	htim->State = HAL_TIM_STATE_READY;
EricLew	0:80ee8f3b695e	960
EricLew	0:80ee8f3b695e	961	/* Return function status */
EricLew	0:80ee8f3b695e	962	return HAL_OK;
EricLew	0:80ee8f3b695e	963	}
EricLew	0:80ee8f3b695e	964
EricLew	0:80ee8f3b695e	965	/**
EricLew	0:80ee8f3b695e	966	* @}
EricLew	0:80ee8f3b695e	967	*/
EricLew	0:80ee8f3b695e	968
EricLew	0:80ee8f3b695e	969	/** @defgroup TIMEx_Exported_Functions_Group3 Extended Timer Complementary PWM functions
EricLew	0:80ee8f3b695e	970	* @brief Timer Complementary PWM functions
EricLew	0:80ee8f3b695e	971	*
EricLew	0:80ee8f3b695e	972	@verbatim
EricLew	0:80ee8f3b695e	973	==============================================================================
EricLew	0:80ee8f3b695e	974	##### Timer Complementary PWM functions #####
EricLew	0:80ee8f3b695e	975	==============================================================================
EricLew	0:80ee8f3b695e	976	[..]
EricLew	0:80ee8f3b695e	977	This section provides functions allowing to:
EricLew	0:80ee8f3b695e	978	(+) Start the Complementary PWM.
EricLew	0:80ee8f3b695e	979	(+) Stop the Complementary PWM.
EricLew	0:80ee8f3b695e	980	(+) Start the Complementary PWM and enable interrupts.
EricLew	0:80ee8f3b695e	981	(+) Stop the Complementary PWM and disable interrupts.
EricLew	0:80ee8f3b695e	982	(+) Start the Complementary PWM and enable DMA transfers.
EricLew	0:80ee8f3b695e	983	(+) Stop the Complementary PWM and disable DMA transfers.
EricLew	0:80ee8f3b695e	984	(+) Start the Complementary Input Capture measurement.
EricLew	0:80ee8f3b695e	985	(+) Stop the Complementary Input Capture.
EricLew	0:80ee8f3b695e	986	(+) Start the Complementary Input Capture and enable interrupts.
EricLew	0:80ee8f3b695e	987	(+) Stop the Complementary Input Capture and disable interrupts.
EricLew	0:80ee8f3b695e	988	(+) Start the Complementary Input Capture and enable DMA transfers.
EricLew	0:80ee8f3b695e	989	(+) Stop the Complementary Input Capture and disable DMA transfers.
EricLew	0:80ee8f3b695e	990	(+) Start the Complementary One Pulse generation.
EricLew	0:80ee8f3b695e	991	(+) Stop the Complementary One Pulse.
EricLew	0:80ee8f3b695e	992	(+) Start the Complementary One Pulse and enable interrupts.
EricLew	0:80ee8f3b695e	993	(+) Stop the Complementary One Pulse and disable interrupts.
EricLew	0:80ee8f3b695e	994
EricLew	0:80ee8f3b695e	995	@endverbatim
EricLew	0:80ee8f3b695e	996	* @{
EricLew	0:80ee8f3b695e	997	*/
EricLew	0:80ee8f3b695e	998
EricLew	0:80ee8f3b695e	999	/**
EricLew	0:80ee8f3b695e	1000	* @brief Starts the PWM signal generation on the complementary output.
EricLew	0:80ee8f3b695e	1001	* @param htim : TIM handle
EricLew	0:80ee8f3b695e	1002	* @param Channel : TIM Channel to be enabled
EricLew	0:80ee8f3b695e	1003	* This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	1004	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
EricLew	0:80ee8f3b695e	1005	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
EricLew	0:80ee8f3b695e	1006	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
EricLew	0:80ee8f3b695e	1007	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
EricLew	0:80ee8f3b695e	1008	* @retval HAL status
EricLew	0:80ee8f3b695e	1009	*/
EricLew	0:80ee8f3b695e	1010	HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
EricLew	0:80ee8f3b695e	1011	{
EricLew	0:80ee8f3b695e	1012	/* Check the parameters */
EricLew	0:80ee8f3b695e	1013	assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
EricLew	0:80ee8f3b695e	1014
EricLew	0:80ee8f3b695e	1015	/* Enable the complementary PWM output */
EricLew	0:80ee8f3b695e	1016	TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
EricLew	0:80ee8f3b695e	1017
EricLew	0:80ee8f3b695e	1018	/* Enable the Main Ouput */
EricLew	0:80ee8f3b695e	1019	__HAL_TIM_MOE_ENABLE(htim);
EricLew	0:80ee8f3b695e	1020
EricLew	0:80ee8f3b695e	1021	/* Enable the Peripheral */
EricLew	0:80ee8f3b695e	1022	__HAL_TIM_ENABLE(htim);
EricLew	0:80ee8f3b695e	1023
EricLew	0:80ee8f3b695e	1024	/* Return function status */
EricLew	0:80ee8f3b695e	1025	return HAL_OK;
EricLew	0:80ee8f3b695e	1026	}
EricLew	0:80ee8f3b695e	1027
EricLew	0:80ee8f3b695e	1028	/**
EricLew	0:80ee8f3b695e	1029	* @brief Stops the PWM signal generation on the complementary output.
EricLew	0:80ee8f3b695e	1030	* @param htim : TIM handle
EricLew	0:80ee8f3b695e	1031	* @param Channel : TIM Channel to be disabled
EricLew	0:80ee8f3b695e	1032	* This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	1033	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
EricLew	0:80ee8f3b695e	1034	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
EricLew	0:80ee8f3b695e	1035	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
EricLew	0:80ee8f3b695e	1036	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
EricLew	0:80ee8f3b695e	1037	* @retval HAL status
EricLew	0:80ee8f3b695e	1038	*/
EricLew	0:80ee8f3b695e	1039	HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
EricLew	0:80ee8f3b695e	1040	{
EricLew	0:80ee8f3b695e	1041	/* Check the parameters */
EricLew	0:80ee8f3b695e	1042	assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
EricLew	0:80ee8f3b695e	1043
EricLew	0:80ee8f3b695e	1044	/* Disable the complementary PWM output */
EricLew	0:80ee8f3b695e	1045	TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
EricLew	0:80ee8f3b695e	1046
EricLew	0:80ee8f3b695e	1047	/* Disable the Main Ouput */
EricLew	0:80ee8f3b695e	1048	__HAL_TIM_MOE_DISABLE(htim);
EricLew	0:80ee8f3b695e	1049
EricLew	0:80ee8f3b695e	1050	/* Disable the Peripheral */
EricLew	0:80ee8f3b695e	1051	__HAL_TIM_DISABLE(htim);
EricLew	0:80ee8f3b695e	1052
EricLew	0:80ee8f3b695e	1053	/* Return function status */
EricLew	0:80ee8f3b695e	1054	return HAL_OK;
EricLew	0:80ee8f3b695e	1055	}
EricLew	0:80ee8f3b695e	1056
EricLew	0:80ee8f3b695e	1057	/**
EricLew	0:80ee8f3b695e	1058	* @brief Starts the PWM signal generation in interrupt mode on the
EricLew	0:80ee8f3b695e	1059	* complementary output.
EricLew	0:80ee8f3b695e	1060	* @param htim : TIM handle
EricLew	0:80ee8f3b695e	1061	* @param Channel : TIM Channel to be disabled
EricLew	0:80ee8f3b695e	1062	* This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	1063	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
EricLew	0:80ee8f3b695e	1064	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
EricLew	0:80ee8f3b695e	1065	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
EricLew	0:80ee8f3b695e	1066	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
EricLew	0:80ee8f3b695e	1067	* @retval HAL status
EricLew	0:80ee8f3b695e	1068	*/
EricLew	0:80ee8f3b695e	1069	HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
EricLew	0:80ee8f3b695e	1070	{
EricLew	0:80ee8f3b695e	1071	/* Check the parameters */
EricLew	0:80ee8f3b695e	1072	assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
EricLew	0:80ee8f3b695e	1073
EricLew	0:80ee8f3b695e	1074	switch (Channel)
EricLew	0:80ee8f3b695e	1075	{
EricLew	0:80ee8f3b695e	1076	case TIM_CHANNEL_1:
EricLew	0:80ee8f3b695e	1077	{
EricLew	0:80ee8f3b695e	1078	/* Enable the TIM Capture/Compare 1 interrupt */
EricLew	0:80ee8f3b695e	1079	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
EricLew	0:80ee8f3b695e	1080	}
EricLew	0:80ee8f3b695e	1081	break;
EricLew	0:80ee8f3b695e	1082
EricLew	0:80ee8f3b695e	1083	case TIM_CHANNEL_2:
EricLew	0:80ee8f3b695e	1084	{
EricLew	0:80ee8f3b695e	1085	/* Enable the TIM Capture/Compare 2 interrupt */
EricLew	0:80ee8f3b695e	1086	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
EricLew	0:80ee8f3b695e	1087	}
EricLew	0:80ee8f3b695e	1088	break;
EricLew	0:80ee8f3b695e	1089
EricLew	0:80ee8f3b695e	1090	case TIM_CHANNEL_3:
EricLew	0:80ee8f3b695e	1091	{
EricLew	0:80ee8f3b695e	1092	/* Enable the TIM Capture/Compare 3 interrupt */
EricLew	0:80ee8f3b695e	1093	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
EricLew	0:80ee8f3b695e	1094	}
EricLew	0:80ee8f3b695e	1095	break;
EricLew	0:80ee8f3b695e	1096
EricLew	0:80ee8f3b695e	1097	case TIM_CHANNEL_4:
EricLew	0:80ee8f3b695e	1098	{
EricLew	0:80ee8f3b695e	1099	/* Enable the TIM Capture/Compare 4 interrupt */
EricLew	0:80ee8f3b695e	1100	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4);
EricLew	0:80ee8f3b695e	1101	}
EricLew	0:80ee8f3b695e	1102	break;
EricLew	0:80ee8f3b695e	1103
EricLew	0:80ee8f3b695e	1104	default:
EricLew	0:80ee8f3b695e	1105	break;
EricLew	0:80ee8f3b695e	1106	}
EricLew	0:80ee8f3b695e	1107
EricLew	0:80ee8f3b695e	1108	/* Enable the TIM Break interrupt */
EricLew	0:80ee8f3b695e	1109	__HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK);
EricLew	0:80ee8f3b695e	1110
EricLew	0:80ee8f3b695e	1111	/* Enable the complementary PWM output */
EricLew	0:80ee8f3b695e	1112	TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
EricLew	0:80ee8f3b695e	1113
EricLew	0:80ee8f3b695e	1114	/* Enable the Main Ouput */
EricLew	0:80ee8f3b695e	1115	__HAL_TIM_MOE_ENABLE(htim);
EricLew	0:80ee8f3b695e	1116
EricLew	0:80ee8f3b695e	1117	/* Enable the Peripheral */
EricLew	0:80ee8f3b695e	1118	__HAL_TIM_ENABLE(htim);
EricLew	0:80ee8f3b695e	1119
EricLew	0:80ee8f3b695e	1120	/* Return function status */
EricLew	0:80ee8f3b695e	1121	return HAL_OK;
EricLew	0:80ee8f3b695e	1122	}
EricLew	0:80ee8f3b695e	1123
EricLew	0:80ee8f3b695e	1124	/**
EricLew	0:80ee8f3b695e	1125	* @brief Stops the PWM signal generation in interrupt mode on the
EricLew	0:80ee8f3b695e	1126	* complementary output.
EricLew	0:80ee8f3b695e	1127	* @param htim : TIM handle
EricLew	0:80ee8f3b695e	1128	* @param Channel : TIM Channel to be disabled
EricLew	0:80ee8f3b695e	1129	* This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	1130	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
EricLew	0:80ee8f3b695e	1131	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
EricLew	0:80ee8f3b695e	1132	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
EricLew	0:80ee8f3b695e	1133	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
EricLew	0:80ee8f3b695e	1134	* @retval HAL status
EricLew	0:80ee8f3b695e	1135	*/
EricLew	0:80ee8f3b695e	1136	HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT (TIM_HandleTypeDef *htim, uint32_t Channel)
EricLew	0:80ee8f3b695e	1137	{
EricLew	0:80ee8f3b695e	1138	uint32_t tmpccer = 0;
EricLew	0:80ee8f3b695e	1139
EricLew	0:80ee8f3b695e	1140	/* Check the parameters */
EricLew	0:80ee8f3b695e	1141	assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
EricLew	0:80ee8f3b695e	1142
EricLew	0:80ee8f3b695e	1143	switch (Channel)
EricLew	0:80ee8f3b695e	1144	{
EricLew	0:80ee8f3b695e	1145	case TIM_CHANNEL_1:
EricLew	0:80ee8f3b695e	1146	{
EricLew	0:80ee8f3b695e	1147	/* Disable the TIM Capture/Compare 1 interrupt */
EricLew	0:80ee8f3b695e	1148	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
EricLew	0:80ee8f3b695e	1149	}
EricLew	0:80ee8f3b695e	1150	break;
EricLew	0:80ee8f3b695e	1151
EricLew	0:80ee8f3b695e	1152	case TIM_CHANNEL_2:
EricLew	0:80ee8f3b695e	1153	{
EricLew	0:80ee8f3b695e	1154	/* Disable the TIM Capture/Compare 2 interrupt */
EricLew	0:80ee8f3b695e	1155	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
EricLew	0:80ee8f3b695e	1156	}
EricLew	0:80ee8f3b695e	1157	break;
EricLew	0:80ee8f3b695e	1158
EricLew	0:80ee8f3b695e	1159	case TIM_CHANNEL_3:
EricLew	0:80ee8f3b695e	1160	{
EricLew	0:80ee8f3b695e	1161	/* Disable the TIM Capture/Compare 3 interrupt */
EricLew	0:80ee8f3b695e	1162	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
EricLew	0:80ee8f3b695e	1163	}
EricLew	0:80ee8f3b695e	1164	break;
EricLew	0:80ee8f3b695e	1165
EricLew	0:80ee8f3b695e	1166	case TIM_CHANNEL_4:
EricLew	0:80ee8f3b695e	1167	{
EricLew	0:80ee8f3b695e	1168	/* Disable the TIM Capture/Compare 3 interrupt */
EricLew	0:80ee8f3b695e	1169	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4);
EricLew	0:80ee8f3b695e	1170	}
EricLew	0:80ee8f3b695e	1171	break;
EricLew	0:80ee8f3b695e	1172
EricLew	0:80ee8f3b695e	1173	default:
EricLew	0:80ee8f3b695e	1174	break;
EricLew	0:80ee8f3b695e	1175	}
EricLew	0:80ee8f3b695e	1176
EricLew	0:80ee8f3b695e	1177	/* Disable the complementary PWM output */
EricLew	0:80ee8f3b695e	1178	TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
EricLew	0:80ee8f3b695e	1179
EricLew	0:80ee8f3b695e	1180
EricLew	0:80ee8f3b695e	1181	/* Disable the TIM Break interrupt (only if no more channel is active) */
EricLew	0:80ee8f3b695e	1182	tmpccer = htim->Instance->CCER;
EricLew	0:80ee8f3b695e	1183	if ((tmpccer & (TIM_CCER_CC1NE \| TIM_CCER_CC2NE \| TIM_CCER_CC3NE)) == RESET)
EricLew	0:80ee8f3b695e	1184	{
EricLew	0:80ee8f3b695e	1185	__HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK);
EricLew	0:80ee8f3b695e	1186	}
EricLew	0:80ee8f3b695e	1187
EricLew	0:80ee8f3b695e	1188	/* Disable the Main Ouput */
EricLew	0:80ee8f3b695e	1189	__HAL_TIM_MOE_DISABLE(htim);
EricLew	0:80ee8f3b695e	1190
EricLew	0:80ee8f3b695e	1191	/* Disable the Peripheral */
EricLew	0:80ee8f3b695e	1192	__HAL_TIM_DISABLE(htim);
EricLew	0:80ee8f3b695e	1193
EricLew	0:80ee8f3b695e	1194	/* Return function status */
EricLew	0:80ee8f3b695e	1195	return HAL_OK;
EricLew	0:80ee8f3b695e	1196	}
EricLew	0:80ee8f3b695e	1197
EricLew	0:80ee8f3b695e	1198	/**
EricLew	0:80ee8f3b695e	1199	* @brief Starts the TIM PWM signal generation in DMA mode on the
EricLew	0:80ee8f3b695e	1200	* complementary output
EricLew	0:80ee8f3b695e	1201	* @param htim : TIM handle
EricLew	0:80ee8f3b695e	1202	* @param Channel : TIM Channel to be enabled
EricLew	0:80ee8f3b695e	1203	* This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	1204	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
EricLew	0:80ee8f3b695e	1205	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
EricLew	0:80ee8f3b695e	1206	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
EricLew	0:80ee8f3b695e	1207	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
EricLew	0:80ee8f3b695e	1208	* @param pData: The source Buffer address.
EricLew	0:80ee8f3b695e	1209	* @param Length: The length of data to be transferred from memory to TIM peripheral
EricLew	0:80ee8f3b695e	1210	* @retval HAL status
EricLew	0:80ee8f3b695e	1211	*/
EricLew	0:80ee8f3b695e	1212	HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef htim, uint32_t Channel, uint32_t pData, uint16_t Length)
EricLew	0:80ee8f3b695e	1213	{
EricLew	0:80ee8f3b695e	1214	/* Check the parameters */
EricLew	0:80ee8f3b695e	1215	assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
EricLew	0:80ee8f3b695e	1216
EricLew	0:80ee8f3b695e	1217	if((htim->State == HAL_TIM_STATE_BUSY))
EricLew	0:80ee8f3b695e	1218	{
EricLew	0:80ee8f3b695e	1219	return HAL_BUSY;
EricLew	0:80ee8f3b695e	1220	}
EricLew	0:80ee8f3b695e	1221	else if((htim->State == HAL_TIM_STATE_READY))
EricLew	0:80ee8f3b695e	1222	{
EricLew	0:80ee8f3b695e	1223	if(((uint32_t)pData == 0 ) && (Length > 0))
EricLew	0:80ee8f3b695e	1224	{
EricLew	0:80ee8f3b695e	1225	return HAL_ERROR;
EricLew	0:80ee8f3b695e	1226	}
EricLew	0:80ee8f3b695e	1227	else
EricLew	0:80ee8f3b695e	1228	{
EricLew	0:80ee8f3b695e	1229	htim->State = HAL_TIM_STATE_BUSY;
EricLew	0:80ee8f3b695e	1230	}
EricLew	0:80ee8f3b695e	1231	}
EricLew	0:80ee8f3b695e	1232	switch (Channel)
EricLew	0:80ee8f3b695e	1233	{
EricLew	0:80ee8f3b695e	1234	case TIM_CHANNEL_1:
EricLew	0:80ee8f3b695e	1235	{
EricLew	0:80ee8f3b695e	1236	/* Set the DMA Period elapsed callback */
EricLew	0:80ee8f3b695e	1237	htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt;
EricLew	0:80ee8f3b695e	1238
EricLew	0:80ee8f3b695e	1239	/* Set the DMA error callback */
EricLew	0:80ee8f3b695e	1240	htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
EricLew	0:80ee8f3b695e	1241
EricLew	0:80ee8f3b695e	1242	/* Enable the DMA channel */
EricLew	0:80ee8f3b695e	1243	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length);
EricLew	0:80ee8f3b695e	1244
EricLew	0:80ee8f3b695e	1245	/* Enable the TIM Capture/Compare 1 DMA request */
EricLew	0:80ee8f3b695e	1246	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
EricLew	0:80ee8f3b695e	1247	}
EricLew	0:80ee8f3b695e	1248	break;
EricLew	0:80ee8f3b695e	1249
EricLew	0:80ee8f3b695e	1250	case TIM_CHANNEL_2:
EricLew	0:80ee8f3b695e	1251	{
EricLew	0:80ee8f3b695e	1252	/* Set the DMA Period elapsed callback */
EricLew	0:80ee8f3b695e	1253	htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt;
EricLew	0:80ee8f3b695e	1254
EricLew	0:80ee8f3b695e	1255	/* Set the DMA error callback */
EricLew	0:80ee8f3b695e	1256	htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ;
EricLew	0:80ee8f3b695e	1257
EricLew	0:80ee8f3b695e	1258	/* Enable the DMA channel */
EricLew	0:80ee8f3b695e	1259	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length);
EricLew	0:80ee8f3b695e	1260
EricLew	0:80ee8f3b695e	1261	/* Enable the TIM Capture/Compare 2 DMA request */
EricLew	0:80ee8f3b695e	1262	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
EricLew	0:80ee8f3b695e	1263	}
EricLew	0:80ee8f3b695e	1264	break;
EricLew	0:80ee8f3b695e	1265
EricLew	0:80ee8f3b695e	1266	case TIM_CHANNEL_3:
EricLew	0:80ee8f3b695e	1267	{
EricLew	0:80ee8f3b695e	1268	/* Set the DMA Period elapsed callback */
EricLew	0:80ee8f3b695e	1269	htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt;
EricLew	0:80ee8f3b695e	1270
EricLew	0:80ee8f3b695e	1271	/* Set the DMA error callback */
EricLew	0:80ee8f3b695e	1272	htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ;
EricLew	0:80ee8f3b695e	1273
EricLew	0:80ee8f3b695e	1274	/* Enable the DMA channel */
EricLew	0:80ee8f3b695e	1275	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,Length);
EricLew	0:80ee8f3b695e	1276
EricLew	0:80ee8f3b695e	1277	/* Enable the TIM Capture/Compare 3 DMA request */
EricLew	0:80ee8f3b695e	1278	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
EricLew	0:80ee8f3b695e	1279	}
EricLew	0:80ee8f3b695e	1280	break;
EricLew	0:80ee8f3b695e	1281
EricLew	0:80ee8f3b695e	1282	case TIM_CHANNEL_4:
EricLew	0:80ee8f3b695e	1283	{
EricLew	0:80ee8f3b695e	1284	/* Set the DMA Period elapsed callback */
EricLew	0:80ee8f3b695e	1285	htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMADelayPulseCplt;
EricLew	0:80ee8f3b695e	1286
EricLew	0:80ee8f3b695e	1287	/* Set the DMA error callback */
EricLew	0:80ee8f3b695e	1288	htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ;
EricLew	0:80ee8f3b695e	1289
EricLew	0:80ee8f3b695e	1290	/* Enable the DMA channel */
EricLew	0:80ee8f3b695e	1291	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4, Length);
EricLew	0:80ee8f3b695e	1292
EricLew	0:80ee8f3b695e	1293	/* Enable the TIM Capture/Compare 4 DMA request */
EricLew	0:80ee8f3b695e	1294	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4);
EricLew	0:80ee8f3b695e	1295	}
EricLew	0:80ee8f3b695e	1296	break;
EricLew	0:80ee8f3b695e	1297
EricLew	0:80ee8f3b695e	1298	default:
EricLew	0:80ee8f3b695e	1299	break;
EricLew	0:80ee8f3b695e	1300	}
EricLew	0:80ee8f3b695e	1301
EricLew	0:80ee8f3b695e	1302	/* Enable the complementary PWM output */
EricLew	0:80ee8f3b695e	1303	TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
EricLew	0:80ee8f3b695e	1304
EricLew	0:80ee8f3b695e	1305	/* Enable the Main Ouput */
EricLew	0:80ee8f3b695e	1306	__HAL_TIM_MOE_ENABLE(htim);
EricLew	0:80ee8f3b695e	1307
EricLew	0:80ee8f3b695e	1308	/* Enable the Peripheral */
EricLew	0:80ee8f3b695e	1309	__HAL_TIM_ENABLE(htim);
EricLew	0:80ee8f3b695e	1310
EricLew	0:80ee8f3b695e	1311	/* Return function status */
EricLew	0:80ee8f3b695e	1312	return HAL_OK;
EricLew	0:80ee8f3b695e	1313	}
EricLew	0:80ee8f3b695e	1314
EricLew	0:80ee8f3b695e	1315	/**
EricLew	0:80ee8f3b695e	1316	* @brief Stops the TIM PWM signal generation in DMA mode on the complementary
EricLew	0:80ee8f3b695e	1317	* output
EricLew	0:80ee8f3b695e	1318	* @param htim : TIM handle
EricLew	0:80ee8f3b695e	1319	* @param Channel : TIM Channel to be disabled
EricLew	0:80ee8f3b695e	1320	* This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	1321	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
EricLew	0:80ee8f3b695e	1322	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
EricLew	0:80ee8f3b695e	1323	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
EricLew	0:80ee8f3b695e	1324	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
EricLew	0:80ee8f3b695e	1325	* @retval HAL status
EricLew	0:80ee8f3b695e	1326	*/
EricLew	0:80ee8f3b695e	1327	HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
EricLew	0:80ee8f3b695e	1328	{
EricLew	0:80ee8f3b695e	1329	/* Check the parameters */
EricLew	0:80ee8f3b695e	1330	assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
EricLew	0:80ee8f3b695e	1331
EricLew	0:80ee8f3b695e	1332	switch (Channel)
EricLew	0:80ee8f3b695e	1333	{
EricLew	0:80ee8f3b695e	1334	case TIM_CHANNEL_1:
EricLew	0:80ee8f3b695e	1335	{
EricLew	0:80ee8f3b695e	1336	/* Disable the TIM Capture/Compare 1 DMA request */
EricLew	0:80ee8f3b695e	1337	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
EricLew	0:80ee8f3b695e	1338	}
EricLew	0:80ee8f3b695e	1339	break;
EricLew	0:80ee8f3b695e	1340
EricLew	0:80ee8f3b695e	1341	case TIM_CHANNEL_2:
EricLew	0:80ee8f3b695e	1342	{
EricLew	0:80ee8f3b695e	1343	/* Disable the TIM Capture/Compare 2 DMA request */
EricLew	0:80ee8f3b695e	1344	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
EricLew	0:80ee8f3b695e	1345	}
EricLew	0:80ee8f3b695e	1346	break;
EricLew	0:80ee8f3b695e	1347
EricLew	0:80ee8f3b695e	1348	case TIM_CHANNEL_3:
EricLew	0:80ee8f3b695e	1349	{
EricLew	0:80ee8f3b695e	1350	/* Disable the TIM Capture/Compare 3 DMA request */
EricLew	0:80ee8f3b695e	1351	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
EricLew	0:80ee8f3b695e	1352	}
EricLew	0:80ee8f3b695e	1353	break;
EricLew	0:80ee8f3b695e	1354
EricLew	0:80ee8f3b695e	1355	case TIM_CHANNEL_4:
EricLew	0:80ee8f3b695e	1356	{
EricLew	0:80ee8f3b695e	1357	/* Disable the TIM Capture/Compare 4 DMA request */
EricLew	0:80ee8f3b695e	1358	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4);
EricLew	0:80ee8f3b695e	1359	}
EricLew	0:80ee8f3b695e	1360	break;
EricLew	0:80ee8f3b695e	1361
EricLew	0:80ee8f3b695e	1362	default:
EricLew	0:80ee8f3b695e	1363	break;
EricLew	0:80ee8f3b695e	1364	}
EricLew	0:80ee8f3b695e	1365
EricLew	0:80ee8f3b695e	1366	/* Disable the complementary PWM output */
EricLew	0:80ee8f3b695e	1367	TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
EricLew	0:80ee8f3b695e	1368
EricLew	0:80ee8f3b695e	1369	/* Disable the Main Ouput */
EricLew	0:80ee8f3b695e	1370	__HAL_TIM_MOE_DISABLE(htim);
EricLew	0:80ee8f3b695e	1371
EricLew	0:80ee8f3b695e	1372	/* Disable the Peripheral */
EricLew	0:80ee8f3b695e	1373	__HAL_TIM_DISABLE(htim);
EricLew	0:80ee8f3b695e	1374
EricLew	0:80ee8f3b695e	1375	/* Change the htim state */
EricLew	0:80ee8f3b695e	1376	htim->State = HAL_TIM_STATE_READY;
EricLew	0:80ee8f3b695e	1377
EricLew	0:80ee8f3b695e	1378	/* Return function status */
EricLew	0:80ee8f3b695e	1379	return HAL_OK;
EricLew	0:80ee8f3b695e	1380	}
EricLew	0:80ee8f3b695e	1381
EricLew	0:80ee8f3b695e	1382	/**
EricLew	0:80ee8f3b695e	1383	* @}
EricLew	0:80ee8f3b695e	1384	*/
EricLew	0:80ee8f3b695e	1385
EricLew	0:80ee8f3b695e	1386	/** @defgroup TIMEx_Exported_Functions_Group4 Extended Timer Complementary One Pulse functions
EricLew	0:80ee8f3b695e	1387	* @brief Timer Complementary One Pulse functions
EricLew	0:80ee8f3b695e	1388	*
EricLew	0:80ee8f3b695e	1389	@verbatim
EricLew	0:80ee8f3b695e	1390	==============================================================================
EricLew	0:80ee8f3b695e	1391	##### Timer Complementary One Pulse functions #####
EricLew	0:80ee8f3b695e	1392	==============================================================================
EricLew	0:80ee8f3b695e	1393	[..]
EricLew	0:80ee8f3b695e	1394	This section provides functions allowing to:
EricLew	0:80ee8f3b695e	1395	(+) Start the Complementary One Pulse generation.
EricLew	0:80ee8f3b695e	1396	(+) Stop the Complementary One Pulse.
EricLew	0:80ee8f3b695e	1397	(+) Start the Complementary One Pulse and enable interrupts.
EricLew	0:80ee8f3b695e	1398	(+) Stop the Complementary One Pulse and disable interrupts.
EricLew	0:80ee8f3b695e	1399
EricLew	0:80ee8f3b695e	1400	@endverbatim
EricLew	0:80ee8f3b695e	1401	* @{
EricLew	0:80ee8f3b695e	1402	*/
EricLew	0:80ee8f3b695e	1403
EricLew	0:80ee8f3b695e	1404	/**
EricLew	0:80ee8f3b695e	1405	* @brief Starts the TIM One Pulse signal generation on the complementary
EricLew	0:80ee8f3b695e	1406	* output.
EricLew	0:80ee8f3b695e	1407	* @param htim : TIM One Pulse handle
EricLew	0:80ee8f3b695e	1408	* @param OutputChannel : TIM Channel to be enabled
EricLew	0:80ee8f3b695e	1409	* This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	1410	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
EricLew	0:80ee8f3b695e	1411	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
EricLew	0:80ee8f3b695e	1412	* @retval HAL status
EricLew	0:80ee8f3b695e	1413	*/
EricLew	0:80ee8f3b695e	1414	HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
EricLew	0:80ee8f3b695e	1415	{
EricLew	0:80ee8f3b695e	1416	/* Check the parameters */
EricLew	0:80ee8f3b695e	1417	assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
EricLew	0:80ee8f3b695e	1418
EricLew	0:80ee8f3b695e	1419	/* Enable the complementary One Pulse output */
EricLew	0:80ee8f3b695e	1420	TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE);
EricLew	0:80ee8f3b695e	1421
EricLew	0:80ee8f3b695e	1422	/* Enable the Main Ouput */
EricLew	0:80ee8f3b695e	1423	__HAL_TIM_MOE_ENABLE(htim);
EricLew	0:80ee8f3b695e	1424
EricLew	0:80ee8f3b695e	1425	/* Return function status */
EricLew	0:80ee8f3b695e	1426	return HAL_OK;
EricLew	0:80ee8f3b695e	1427	}
EricLew	0:80ee8f3b695e	1428
EricLew	0:80ee8f3b695e	1429	/**
EricLew	0:80ee8f3b695e	1430	* @brief Stops the TIM One Pulse signal generation on the complementary
EricLew	0:80ee8f3b695e	1431	* output.
EricLew	0:80ee8f3b695e	1432	* @param htim : TIM One Pulse handle
EricLew	0:80ee8f3b695e	1433	* @param OutputChannel : TIM Channel to be disabled
EricLew	0:80ee8f3b695e	1434	* This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	1435	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
EricLew	0:80ee8f3b695e	1436	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
EricLew	0:80ee8f3b695e	1437	* @retval HAL status
EricLew	0:80ee8f3b695e	1438	*/
EricLew	0:80ee8f3b695e	1439	HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
EricLew	0:80ee8f3b695e	1440	{
EricLew	0:80ee8f3b695e	1441
EricLew	0:80ee8f3b695e	1442	/* Check the parameters */
EricLew	0:80ee8f3b695e	1443	assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
EricLew	0:80ee8f3b695e	1444
EricLew	0:80ee8f3b695e	1445	/* Disable the complementary One Pulse output */
EricLew	0:80ee8f3b695e	1446	TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE);
EricLew	0:80ee8f3b695e	1447
EricLew	0:80ee8f3b695e	1448	/* Disable the Main Ouput */
EricLew	0:80ee8f3b695e	1449	__HAL_TIM_MOE_DISABLE(htim);
EricLew	0:80ee8f3b695e	1450
EricLew	0:80ee8f3b695e	1451	/* Disable the Peripheral */
EricLew	0:80ee8f3b695e	1452	__HAL_TIM_DISABLE(htim);
EricLew	0:80ee8f3b695e	1453
EricLew	0:80ee8f3b695e	1454	/* Return function status */
EricLew	0:80ee8f3b695e	1455	return HAL_OK;
EricLew	0:80ee8f3b695e	1456	}
EricLew	0:80ee8f3b695e	1457
EricLew	0:80ee8f3b695e	1458	/**
EricLew	0:80ee8f3b695e	1459	* @brief Starts the TIM One Pulse signal generation in interrupt mode on the
EricLew	0:80ee8f3b695e	1460	* complementary channel.
EricLew	0:80ee8f3b695e	1461	* @param htim : TIM One Pulse handle
EricLew	0:80ee8f3b695e	1462	* @param OutputChannel : TIM Channel to be enabled
EricLew	0:80ee8f3b695e	1463	* This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	1464	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
EricLew	0:80ee8f3b695e	1465	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
EricLew	0:80ee8f3b695e	1466	* @retval HAL status
EricLew	0:80ee8f3b695e	1467	*/
EricLew	0:80ee8f3b695e	1468	HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
EricLew	0:80ee8f3b695e	1469	{
EricLew	0:80ee8f3b695e	1470	/* Check the parameters */
EricLew	0:80ee8f3b695e	1471	assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
EricLew	0:80ee8f3b695e	1472
EricLew	0:80ee8f3b695e	1473	/* Enable the TIM Capture/Compare 1 interrupt */
EricLew	0:80ee8f3b695e	1474	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
EricLew	0:80ee8f3b695e	1475
EricLew	0:80ee8f3b695e	1476	/* Enable the TIM Capture/Compare 2 interrupt */
EricLew	0:80ee8f3b695e	1477	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
EricLew	0:80ee8f3b695e	1478
EricLew	0:80ee8f3b695e	1479	/* Enable the complementary One Pulse output */
EricLew	0:80ee8f3b695e	1480	TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE);
EricLew	0:80ee8f3b695e	1481
EricLew	0:80ee8f3b695e	1482	/* Enable the Main Ouput */
EricLew	0:80ee8f3b695e	1483	__HAL_TIM_MOE_ENABLE(htim);
EricLew	0:80ee8f3b695e	1484
EricLew	0:80ee8f3b695e	1485	/* Return function status */
EricLew	0:80ee8f3b695e	1486	return HAL_OK;
EricLew	0:80ee8f3b695e	1487	}
EricLew	0:80ee8f3b695e	1488
EricLew	0:80ee8f3b695e	1489	/**
EricLew	0:80ee8f3b695e	1490	* @brief Stops the TIM One Pulse signal generation in interrupt mode on the
EricLew	0:80ee8f3b695e	1491	* complementary channel.
EricLew	0:80ee8f3b695e	1492	* @param htim : TIM One Pulse handle
EricLew	0:80ee8f3b695e	1493	* @param OutputChannel : TIM Channel to be disabled
EricLew	0:80ee8f3b695e	1494	* This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	1495	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
EricLew	0:80ee8f3b695e	1496	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
EricLew	0:80ee8f3b695e	1497	* @retval HAL status
EricLew	0:80ee8f3b695e	1498	*/
EricLew	0:80ee8f3b695e	1499	HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
EricLew	0:80ee8f3b695e	1500	{
EricLew	0:80ee8f3b695e	1501	/* Check the parameters */
EricLew	0:80ee8f3b695e	1502	assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
EricLew	0:80ee8f3b695e	1503
EricLew	0:80ee8f3b695e	1504	/* Disable the TIM Capture/Compare 1 interrupt */
EricLew	0:80ee8f3b695e	1505	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
EricLew	0:80ee8f3b695e	1506
EricLew	0:80ee8f3b695e	1507	/* Disable the TIM Capture/Compare 2 interrupt */
EricLew	0:80ee8f3b695e	1508	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
EricLew	0:80ee8f3b695e	1509
EricLew	0:80ee8f3b695e	1510	/* Disable the complementary One Pulse output */
EricLew	0:80ee8f3b695e	1511	TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE);
EricLew	0:80ee8f3b695e	1512
EricLew	0:80ee8f3b695e	1513	/* Disable the Main Ouput */
EricLew	0:80ee8f3b695e	1514	__HAL_TIM_MOE_DISABLE(htim);
EricLew	0:80ee8f3b695e	1515
EricLew	0:80ee8f3b695e	1516	/* Disable the Peripheral */
EricLew	0:80ee8f3b695e	1517	__HAL_TIM_DISABLE(htim);
EricLew	0:80ee8f3b695e	1518
EricLew	0:80ee8f3b695e	1519	/* Return function status */
EricLew	0:80ee8f3b695e	1520	return HAL_OK;
EricLew	0:80ee8f3b695e	1521	}
EricLew	0:80ee8f3b695e	1522
EricLew	0:80ee8f3b695e	1523	/**
EricLew	0:80ee8f3b695e	1524	* @}
EricLew	0:80ee8f3b695e	1525	*/
EricLew	0:80ee8f3b695e	1526
EricLew	0:80ee8f3b695e	1527	/** @defgroup TIMEx_Exported_Functions_Group5 Extended Peripheral Control functions
EricLew	0:80ee8f3b695e	1528	* @brief Peripheral Control functions
EricLew	0:80ee8f3b695e	1529	*
EricLew	0:80ee8f3b695e	1530	@verbatim
EricLew	0:80ee8f3b695e	1531	==============================================================================
EricLew	0:80ee8f3b695e	1532	##### Peripheral Control functions #####
EricLew	0:80ee8f3b695e	1533	==============================================================================
EricLew	0:80ee8f3b695e	1534	[..]
EricLew	0:80ee8f3b695e	1535	This section provides functions allowing to:
EricLew	0:80ee8f3b695e	1536	(+) Configure the commutation event in case of use of the Hall sensor interface.
EricLew	0:80ee8f3b695e	1537	(+) Configure Output channels for OC and PWM mode.
EricLew	0:80ee8f3b695e	1538
EricLew	0:80ee8f3b695e	1539	(+) Configure Complementary channels, break features and dead time.
EricLew	0:80ee8f3b695e	1540	(+) Configure Master synchronization.
EricLew	0:80ee8f3b695e	1541	(+) Configure timer remapping capabilities.
EricLew	0:80ee8f3b695e	1542	(+) Enable or disable channel grouping
EricLew	0:80ee8f3b695e	1543
EricLew	0:80ee8f3b695e	1544	@endverbatim
EricLew	0:80ee8f3b695e	1545	* @{
EricLew	0:80ee8f3b695e	1546	*/
EricLew	0:80ee8f3b695e	1547
EricLew	0:80ee8f3b695e	1548	/**
EricLew	0:80ee8f3b695e	1549	* @brief Configure the TIM commutation event sequence.
EricLew	0:80ee8f3b695e	1550	* @note This function is mandatory to use the commutation event in order to
EricLew	0:80ee8f3b695e	1551	* update the configuration at each commutation detection on the TRGI input of the Timer,
EricLew	0:80ee8f3b695e	1552	* the typical use of this feature is with the use of another Timer(interface Timer)
EricLew	0:80ee8f3b695e	1553	* configured in Hall sensor interface, this interface Timer will generate the
EricLew	0:80ee8f3b695e	1554	* commutation at its TRGO output (connected to Timer used in this function) each time
EricLew	0:80ee8f3b695e	1555	* the TI1 of the Interface Timer detect a commutation at its input TI1.
EricLew	0:80ee8f3b695e	1556	* @param htim: TIM handle
EricLew	0:80ee8f3b695e	1557	* @param InputTrigger : the Internal trigger corresponding to the Timer Interfacing with the Hall sensor
EricLew	0:80ee8f3b695e	1558	* This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	1559	* @arg TIM_TS_ITR0: Internal trigger 0 selected
EricLew	0:80ee8f3b695e	1560	* @arg TIM_TS_ITR1: Internal trigger 1 selected
EricLew	0:80ee8f3b695e	1561	* @arg TIM_TS_ITR2: Internal trigger 2 selected
EricLew	0:80ee8f3b695e	1562	* @arg TIM_TS_ITR3: Internal trigger 3 selected
EricLew	0:80ee8f3b695e	1563	* @arg TIM_TS_NONE: No trigger is needed
EricLew	0:80ee8f3b695e	1564	* @param CommutationSource : the Commutation Event source
EricLew	0:80ee8f3b695e	1565	* This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	1566	* @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
EricLew	0:80ee8f3b695e	1567	* @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit
EricLew	0:80ee8f3b695e	1568	* @retval HAL status
EricLew	0:80ee8f3b695e	1569	*/
EricLew	0:80ee8f3b695e	1570	HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource)
EricLew	0:80ee8f3b695e	1571	{
EricLew	0:80ee8f3b695e	1572	/* Check the parameters */
EricLew	0:80ee8f3b695e	1573	assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
EricLew	0:80ee8f3b695e	1574	assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
EricLew	0:80ee8f3b695e	1575
EricLew	0:80ee8f3b695e	1576	__HAL_LOCK(htim);
EricLew	0:80ee8f3b695e	1577
EricLew	0:80ee8f3b695e	1578	if ((InputTrigger == TIM_TS_ITR0) \|\| (InputTrigger == TIM_TS_ITR1) \|\|
EricLew	0:80ee8f3b695e	1579	(InputTrigger == TIM_TS_ITR2) \|\| (InputTrigger == TIM_TS_ITR3))
EricLew	0:80ee8f3b695e	1580	{
EricLew	0:80ee8f3b695e	1581	/* Select the Input trigger */
EricLew	0:80ee8f3b695e	1582	htim->Instance->SMCR &= ~TIM_SMCR_TS;
EricLew	0:80ee8f3b695e	1583	htim->Instance->SMCR \|= InputTrigger;
EricLew	0:80ee8f3b695e	1584	}
EricLew	0:80ee8f3b695e	1585
EricLew	0:80ee8f3b695e	1586	/* Select the Capture Compare preload feature */
EricLew	0:80ee8f3b695e	1587	htim->Instance->CR2 \|= TIM_CR2_CCPC;
EricLew	0:80ee8f3b695e	1588	/* Select the Commutation event source */
EricLew	0:80ee8f3b695e	1589	htim->Instance->CR2 &= ~TIM_CR2_CCUS;
EricLew	0:80ee8f3b695e	1590	htim->Instance->CR2 \|= CommutationSource;
EricLew	0:80ee8f3b695e	1591
EricLew	0:80ee8f3b695e	1592	__HAL_UNLOCK(htim);
EricLew	0:80ee8f3b695e	1593
EricLew	0:80ee8f3b695e	1594	return HAL_OK;
EricLew	0:80ee8f3b695e	1595	}
EricLew	0:80ee8f3b695e	1596
EricLew	0:80ee8f3b695e	1597	/**
EricLew	0:80ee8f3b695e	1598	* @brief Configure the TIM commutation event sequence with interrupt.
EricLew	0:80ee8f3b695e	1599	* @note This function is mandatory to use the commutation event in order to
EricLew	0:80ee8f3b695e	1600	* update the configuration at each commutation detection on the TRGI input of the Timer,
EricLew	0:80ee8f3b695e	1601	* the typical use of this feature is with the use of another Timer(interface Timer)
EricLew	0:80ee8f3b695e	1602	* configured in Hall sensor interface, this interface Timer will generate the
EricLew	0:80ee8f3b695e	1603	* commutation at its TRGO output (connected to Timer used in this function) each time
EricLew	0:80ee8f3b695e	1604	* the TI1 of the Interface Timer detect a commutation at its input TI1.
EricLew	0:80ee8f3b695e	1605	* @param htim: TIM handle
EricLew	0:80ee8f3b695e	1606	* @param InputTrigger : the Internal trigger corresponding to the Timer Interfacing with the Hall sensor
EricLew	0:80ee8f3b695e	1607	* This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	1608	* @arg TIM_TS_ITR0: Internal trigger 0 selected
EricLew	0:80ee8f3b695e	1609	* @arg TIM_TS_ITR1: Internal trigger 1 selected
EricLew	0:80ee8f3b695e	1610	* @arg TIM_TS_ITR2: Internal trigger 2 selected
EricLew	0:80ee8f3b695e	1611	* @arg TIM_TS_ITR3: Internal trigger 3 selected
EricLew	0:80ee8f3b695e	1612	* @arg TIM_TS_NONE: No trigger is needed
EricLew	0:80ee8f3b695e	1613	* @param CommutationSource : the Commutation Event source
EricLew	0:80ee8f3b695e	1614	* This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	1615	* @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
EricLew	0:80ee8f3b695e	1616	* @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit
EricLew	0:80ee8f3b695e	1617	* @retval HAL status
EricLew	0:80ee8f3b695e	1618	*/
EricLew	0:80ee8f3b695e	1619	HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource)
EricLew	0:80ee8f3b695e	1620	{
EricLew	0:80ee8f3b695e	1621	/* Check the parameters */
EricLew	0:80ee8f3b695e	1622	assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
EricLew	0:80ee8f3b695e	1623	assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
EricLew	0:80ee8f3b695e	1624
EricLew	0:80ee8f3b695e	1625	__HAL_LOCK(htim);
EricLew	0:80ee8f3b695e	1626
EricLew	0:80ee8f3b695e	1627	if ((InputTrigger == TIM_TS_ITR0) \|\| (InputTrigger == TIM_TS_ITR1) \|\|
EricLew	0:80ee8f3b695e	1628	(InputTrigger == TIM_TS_ITR2) \|\| (InputTrigger == TIM_TS_ITR3))
EricLew	0:80ee8f3b695e	1629	{
EricLew	0:80ee8f3b695e	1630	/* Select the Input trigger */
EricLew	0:80ee8f3b695e	1631	htim->Instance->SMCR &= ~TIM_SMCR_TS;
EricLew	0:80ee8f3b695e	1632	htim->Instance->SMCR \|= InputTrigger;
EricLew	0:80ee8f3b695e	1633	}
EricLew	0:80ee8f3b695e	1634
EricLew	0:80ee8f3b695e	1635	/* Select the Capture Compare preload feature */
EricLew	0:80ee8f3b695e	1636	htim->Instance->CR2 \|= TIM_CR2_CCPC;
EricLew	0:80ee8f3b695e	1637	/* Select the Commutation event source */
EricLew	0:80ee8f3b695e	1638	htim->Instance->CR2 &= ~TIM_CR2_CCUS;
EricLew	0:80ee8f3b695e	1639	htim->Instance->CR2 \|= CommutationSource;
EricLew	0:80ee8f3b695e	1640
EricLew	0:80ee8f3b695e	1641	/* Enable the Commutation Interrupt Request */
EricLew	0:80ee8f3b695e	1642	__HAL_TIM_ENABLE_IT(htim, TIM_IT_COM);
EricLew	0:80ee8f3b695e	1643
EricLew	0:80ee8f3b695e	1644	__HAL_UNLOCK(htim);
EricLew	0:80ee8f3b695e	1645
EricLew	0:80ee8f3b695e	1646	return HAL_OK;
EricLew	0:80ee8f3b695e	1647	}
EricLew	0:80ee8f3b695e	1648
EricLew	0:80ee8f3b695e	1649	/**
EricLew	0:80ee8f3b695e	1650	* @brief Configure the TIM commutation event sequence with DMA.
EricLew	0:80ee8f3b695e	1651	* @note This function is mandatory to use the commutation event in order to
EricLew	0:80ee8f3b695e	1652	* update the configuration at each commutation detection on the TRGI input of the Timer,
EricLew	0:80ee8f3b695e	1653	* the typical use of this feature is with the use of another Timer(interface Timer)
EricLew	0:80ee8f3b695e	1654	* configured in Hall sensor interface, this interface Timer will generate the
EricLew	0:80ee8f3b695e	1655	* commutation at its TRGO output (connected to Timer used in this function) each time
EricLew	0:80ee8f3b695e	1656	* the TI1 of the Interface Timer detect a commutation at its input TI1.
EricLew	0:80ee8f3b695e	1657	* @note The user should configure the DMA in his own software, in This function only the COMDE bit is set
EricLew	0:80ee8f3b695e	1658	* @param htim: TIM handle
EricLew	0:80ee8f3b695e	1659	* @param InputTrigger : the Internal trigger corresponding to the Timer Interfacing with the Hall sensor
EricLew	0:80ee8f3b695e	1660	* This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	1661	* @arg TIM_TS_ITR0: Internal trigger 0 selected
EricLew	0:80ee8f3b695e	1662	* @arg TIM_TS_ITR1: Internal trigger 1 selected
EricLew	0:80ee8f3b695e	1663	* @arg TIM_TS_ITR2: Internal trigger 2 selected
EricLew	0:80ee8f3b695e	1664	* @arg TIM_TS_ITR3: Internal trigger 3 selected
EricLew	0:80ee8f3b695e	1665	* @arg TIM_TS_NONE: No trigger is needed
EricLew	0:80ee8f3b695e	1666	* @param CommutationSource : the Commutation Event source
EricLew	0:80ee8f3b695e	1667	* This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	1668	* @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
EricLew	0:80ee8f3b695e	1669	* @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit
EricLew	0:80ee8f3b695e	1670	* @retval HAL status
EricLew	0:80ee8f3b695e	1671	*/
EricLew	0:80ee8f3b695e	1672	HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource)
EricLew	0:80ee8f3b695e	1673	{
EricLew	0:80ee8f3b695e	1674	/* Check the parameters */
EricLew	0:80ee8f3b695e	1675	assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
EricLew	0:80ee8f3b695e	1676	assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
EricLew	0:80ee8f3b695e	1677
EricLew	0:80ee8f3b695e	1678	__HAL_LOCK(htim);
EricLew	0:80ee8f3b695e	1679
EricLew	0:80ee8f3b695e	1680	if ((InputTrigger == TIM_TS_ITR0) \|\| (InputTrigger == TIM_TS_ITR1) \|\|
EricLew	0:80ee8f3b695e	1681	(InputTrigger == TIM_TS_ITR2) \|\| (InputTrigger == TIM_TS_ITR3))
EricLew	0:80ee8f3b695e	1682	{
EricLew	0:80ee8f3b695e	1683	/* Select the Input trigger */
EricLew	0:80ee8f3b695e	1684	htim->Instance->SMCR &= ~TIM_SMCR_TS;
EricLew	0:80ee8f3b695e	1685	htim->Instance->SMCR \|= InputTrigger;
EricLew	0:80ee8f3b695e	1686	}
EricLew	0:80ee8f3b695e	1687
EricLew	0:80ee8f3b695e	1688	/* Select the Capture Compare preload feature */
EricLew	0:80ee8f3b695e	1689	htim->Instance->CR2 \|= TIM_CR2_CCPC;
EricLew	0:80ee8f3b695e	1690	/* Select the Commutation event source */
EricLew	0:80ee8f3b695e	1691	htim->Instance->CR2 &= ~TIM_CR2_CCUS;
EricLew	0:80ee8f3b695e	1692	htim->Instance->CR2 \|= CommutationSource;
EricLew	0:80ee8f3b695e	1693
EricLew	0:80ee8f3b695e	1694	/* Enable the Commutation DMA Request */
EricLew	0:80ee8f3b695e	1695	/* Set the DMA Commutation Callback */
EricLew	0:80ee8f3b695e	1696	htim->hdma[TIM_DMA_ID_COMMUTATION]->XferCpltCallback = TIMEx_DMACommutationCplt;
EricLew	0:80ee8f3b695e	1697	/* Set the DMA error callback */
EricLew	0:80ee8f3b695e	1698	htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = TIM_DMAError;
EricLew	0:80ee8f3b695e	1699
EricLew	0:80ee8f3b695e	1700	/* Enable the Commutation DMA Request */
EricLew	0:80ee8f3b695e	1701	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_COM);
EricLew	0:80ee8f3b695e	1702
EricLew	0:80ee8f3b695e	1703	__HAL_UNLOCK(htim);
EricLew	0:80ee8f3b695e	1704
EricLew	0:80ee8f3b695e	1705	return HAL_OK;
EricLew	0:80ee8f3b695e	1706	}
EricLew	0:80ee8f3b695e	1707
EricLew	0:80ee8f3b695e	1708	/**
EricLew	0:80ee8f3b695e	1709	* @brief Initializes the TIM Output Compare Channels according to the specified
EricLew	0:80ee8f3b695e	1710	* parameters in the TIM_OC_InitTypeDef.
EricLew	0:80ee8f3b695e	1711	* @param htim: TIM Output Compare handle
EricLew	0:80ee8f3b695e	1712	* @param sConfig: TIM Output Compare configuration structure
EricLew	0:80ee8f3b695e	1713	* @param Channel : TIM Channels to configure
EricLew	0:80ee8f3b695e	1714	* This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	1715	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
EricLew	0:80ee8f3b695e	1716	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
EricLew	0:80ee8f3b695e	1717	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
EricLew	0:80ee8f3b695e	1718	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
EricLew	0:80ee8f3b695e	1719	* @arg TIM_CHANNEL_5: TIM Channel 5 selected
EricLew	0:80ee8f3b695e	1720	* @arg TIM_CHANNEL_6: TIM Channel 6 selected
EricLew	0:80ee8f3b695e	1721	* @arg TIM_CHANNEL_ALL: all output channels supported by the timer instance selected
EricLew	0:80ee8f3b695e	1722	* @retval HAL status
EricLew	0:80ee8f3b695e	1723	*/
EricLew	0:80ee8f3b695e	1724	HAL_StatusTypeDef HAL_TIM_OC_ConfigChannel(TIM_HandleTypeDef *htim,
EricLew	0:80ee8f3b695e	1725	TIM_OC_InitTypeDef* sConfig,
EricLew	0:80ee8f3b695e	1726	uint32_t Channel)
EricLew	0:80ee8f3b695e	1727	{
EricLew	0:80ee8f3b695e	1728	/* Check the parameters */
EricLew	0:80ee8f3b695e	1729	assert_param(IS_TIM_CHANNELS(Channel));
EricLew	0:80ee8f3b695e	1730	assert_param(IS_TIM_OC_MODE(sConfig->OCMode));
EricLew	0:80ee8f3b695e	1731	assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity));
EricLew	0:80ee8f3b695e	1732	assert_param(IS_TIM_OCN_POLARITY(sConfig->OCNPolarity));
EricLew	0:80ee8f3b695e	1733	assert_param(IS_TIM_OCNIDLE_STATE(sConfig->OCNIdleState));
EricLew	0:80ee8f3b695e	1734	assert_param(IS_TIM_OCIDLE_STATE(sConfig->OCIdleState));
EricLew	0:80ee8f3b695e	1735
EricLew	0:80ee8f3b695e	1736	/* Check input state */
EricLew	0:80ee8f3b695e	1737	__HAL_LOCK(htim);
EricLew	0:80ee8f3b695e	1738
EricLew	0:80ee8f3b695e	1739	htim->State = HAL_TIM_STATE_BUSY;
EricLew	0:80ee8f3b695e	1740
EricLew	0:80ee8f3b695e	1741	switch (Channel)
EricLew	0:80ee8f3b695e	1742	{
EricLew	0:80ee8f3b695e	1743	case TIM_CHANNEL_1:
EricLew	0:80ee8f3b695e	1744	{
EricLew	0:80ee8f3b695e	1745	/* Check the parameters */
EricLew	0:80ee8f3b695e	1746	assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
EricLew	0:80ee8f3b695e	1747
EricLew	0:80ee8f3b695e	1748	/* Configure the TIM Channel 1 in Output Compare */
EricLew	0:80ee8f3b695e	1749	TIM_OC1_SetConfig(htim->Instance, sConfig);
EricLew	0:80ee8f3b695e	1750	}
EricLew	0:80ee8f3b695e	1751	break;
EricLew	0:80ee8f3b695e	1752
EricLew	0:80ee8f3b695e	1753	case TIM_CHANNEL_2:
EricLew	0:80ee8f3b695e	1754	{
EricLew	0:80ee8f3b695e	1755	/* Check the parameters */
EricLew	0:80ee8f3b695e	1756	assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
EricLew	0:80ee8f3b695e	1757
EricLew	0:80ee8f3b695e	1758	/* Configure the TIM Channel 2 in Output Compare */
EricLew	0:80ee8f3b695e	1759	TIM_OC2_SetConfig(htim->Instance, sConfig);
EricLew	0:80ee8f3b695e	1760	}
EricLew	0:80ee8f3b695e	1761	break;
EricLew	0:80ee8f3b695e	1762
EricLew	0:80ee8f3b695e	1763	case TIM_CHANNEL_3:
EricLew	0:80ee8f3b695e	1764	{
EricLew	0:80ee8f3b695e	1765	/* Check the parameters */
EricLew	0:80ee8f3b695e	1766	assert_param(IS_TIM_CC3_INSTANCE(htim->Instance));
EricLew	0:80ee8f3b695e	1767
EricLew	0:80ee8f3b695e	1768	/* Configure the TIM Channel 3 in Output Compare */
EricLew	0:80ee8f3b695e	1769	TIM_OC3_SetConfig(htim->Instance, sConfig);
EricLew	0:80ee8f3b695e	1770	}
EricLew	0:80ee8f3b695e	1771	break;
EricLew	0:80ee8f3b695e	1772
EricLew	0:80ee8f3b695e	1773	case TIM_CHANNEL_4:
EricLew	0:80ee8f3b695e	1774	{
EricLew	0:80ee8f3b695e	1775	/* Check the parameters */
EricLew	0:80ee8f3b695e	1776	assert_param(IS_TIM_CC4_INSTANCE(htim->Instance));
EricLew	0:80ee8f3b695e	1777
EricLew	0:80ee8f3b695e	1778	/* Configure the TIM Channel 4 in Output Compare */
EricLew	0:80ee8f3b695e	1779	TIM_OC4_SetConfig(htim->Instance, sConfig);
EricLew	0:80ee8f3b695e	1780	}
EricLew	0:80ee8f3b695e	1781	break;
EricLew	0:80ee8f3b695e	1782
EricLew	0:80ee8f3b695e	1783	case TIM_CHANNEL_5:
EricLew	0:80ee8f3b695e	1784	{
EricLew	0:80ee8f3b695e	1785	/* Check the parameters */
EricLew	0:80ee8f3b695e	1786	assert_param(IS_TIM_CC5_INSTANCE(htim->Instance));
EricLew	0:80ee8f3b695e	1787
EricLew	0:80ee8f3b695e	1788	/* Configure the TIM Channel 5 in Output Compare */
EricLew	0:80ee8f3b695e	1789	TIM_OC5_SetConfig(htim->Instance, sConfig);
EricLew	0:80ee8f3b695e	1790	}
EricLew	0:80ee8f3b695e	1791	break;
EricLew	0:80ee8f3b695e	1792
EricLew	0:80ee8f3b695e	1793	case TIM_CHANNEL_6:
EricLew	0:80ee8f3b695e	1794	{
EricLew	0:80ee8f3b695e	1795	/* Check the parameters */
EricLew	0:80ee8f3b695e	1796	assert_param(IS_TIM_CC6_INSTANCE(htim->Instance));
EricLew	0:80ee8f3b695e	1797
EricLew	0:80ee8f3b695e	1798	/* Configure the TIM Channel 6 in Output Compare */
EricLew	0:80ee8f3b695e	1799	TIM_OC6_SetConfig(htim->Instance, sConfig);
EricLew	0:80ee8f3b695e	1800	}
EricLew	0:80ee8f3b695e	1801	break;
EricLew	0:80ee8f3b695e	1802
EricLew	0:80ee8f3b695e	1803	default:
EricLew	0:80ee8f3b695e	1804	break;
EricLew	0:80ee8f3b695e	1805	}
EricLew	0:80ee8f3b695e	1806
EricLew	0:80ee8f3b695e	1807	htim->State = HAL_TIM_STATE_READY;
EricLew	0:80ee8f3b695e	1808
EricLew	0:80ee8f3b695e	1809	__HAL_UNLOCK(htim);
EricLew	0:80ee8f3b695e	1810
EricLew	0:80ee8f3b695e	1811	return HAL_OK;
EricLew	0:80ee8f3b695e	1812	}
EricLew	0:80ee8f3b695e	1813
EricLew	0:80ee8f3b695e	1814	/**
EricLew	0:80ee8f3b695e	1815	* @brief Initializes the TIM PWM channels according to the specified
EricLew	0:80ee8f3b695e	1816	* parameters in the TIM_OC_InitTypeDef.
EricLew	0:80ee8f3b695e	1817	* @param htim: TIM PWM handle
EricLew	0:80ee8f3b695e	1818	* @param sConfig: TIM PWM configuration structure
EricLew	0:80ee8f3b695e	1819	* @param Channel : TIM Channels to be configured
EricLew	0:80ee8f3b695e	1820	* This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	1821	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
EricLew	0:80ee8f3b695e	1822	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
EricLew	0:80ee8f3b695e	1823	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
EricLew	0:80ee8f3b695e	1824	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
EricLew	0:80ee8f3b695e	1825	* @arg TIM_CHANNEL_5: TIM Channel 5 selected
EricLew	0:80ee8f3b695e	1826	* @arg TIM_CHANNEL_6: TIM Channel 6 selected
EricLew	0:80ee8f3b695e	1827	* @arg TIM_CHANNEL_ALL: all PWM channels supported by the timer instance selected
EricLew	0:80ee8f3b695e	1828	* @retval HAL status
EricLew	0:80ee8f3b695e	1829	*/
EricLew	0:80ee8f3b695e	1830	HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef *htim,
EricLew	0:80ee8f3b695e	1831	TIM_OC_InitTypeDef* sConfig,
EricLew	0:80ee8f3b695e	1832	uint32_t Channel)
EricLew	0:80ee8f3b695e	1833	{
EricLew	0:80ee8f3b695e	1834	/* Check the parameters */
EricLew	0:80ee8f3b695e	1835	assert_param(IS_TIM_CHANNELS(Channel));
EricLew	0:80ee8f3b695e	1836	assert_param(IS_TIM_PWM_MODE(sConfig->OCMode));
EricLew	0:80ee8f3b695e	1837	assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity));
EricLew	0:80ee8f3b695e	1838	assert_param(IS_TIM_OCN_POLARITY(sConfig->OCNPolarity));
EricLew	0:80ee8f3b695e	1839	assert_param(IS_TIM_FAST_STATE(sConfig->OCFastMode));
EricLew	0:80ee8f3b695e	1840	assert_param(IS_TIM_OCNIDLE_STATE(sConfig->OCNIdleState));
EricLew	0:80ee8f3b695e	1841	assert_param(IS_TIM_OCIDLE_STATE(sConfig->OCIdleState));
EricLew	0:80ee8f3b695e	1842
EricLew	0:80ee8f3b695e	1843	/* Check input state */
EricLew	0:80ee8f3b695e	1844	__HAL_LOCK(htim);
EricLew	0:80ee8f3b695e	1845
EricLew	0:80ee8f3b695e	1846	htim->State = HAL_TIM_STATE_BUSY;
EricLew	0:80ee8f3b695e	1847
EricLew	0:80ee8f3b695e	1848	switch (Channel)
EricLew	0:80ee8f3b695e	1849	{
EricLew	0:80ee8f3b695e	1850	case TIM_CHANNEL_1:
EricLew	0:80ee8f3b695e	1851	{
EricLew	0:80ee8f3b695e	1852	/* Check the parameters */
EricLew	0:80ee8f3b695e	1853	assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
EricLew	0:80ee8f3b695e	1854
EricLew	0:80ee8f3b695e	1855	/* Configure the Channel 1 in PWM mode */
EricLew	0:80ee8f3b695e	1856	TIM_OC1_SetConfig(htim->Instance, sConfig);
EricLew	0:80ee8f3b695e	1857
EricLew	0:80ee8f3b695e	1858	/* Set the Preload enable bit for channel1 */
EricLew	0:80ee8f3b695e	1859	htim->Instance->CCMR1 \|= TIM_CCMR1_OC1PE;
EricLew	0:80ee8f3b695e	1860
EricLew	0:80ee8f3b695e	1861	/* Configure the Output Fast mode */
EricLew	0:80ee8f3b695e	1862	htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1FE;
EricLew	0:80ee8f3b695e	1863	htim->Instance->CCMR1 \|= sConfig->OCFastMode;
EricLew	0:80ee8f3b695e	1864	}
EricLew	0:80ee8f3b695e	1865	break;
EricLew	0:80ee8f3b695e	1866
EricLew	0:80ee8f3b695e	1867	case TIM_CHANNEL_2:
EricLew	0:80ee8f3b695e	1868	{
EricLew	0:80ee8f3b695e	1869	/* Check the parameters */
EricLew	0:80ee8f3b695e	1870	assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
EricLew	0:80ee8f3b695e	1871
EricLew	0:80ee8f3b695e	1872	/* Configure the Channel 2 in PWM mode */
EricLew	0:80ee8f3b695e	1873	TIM_OC2_SetConfig(htim->Instance, sConfig);
EricLew	0:80ee8f3b695e	1874
EricLew	0:80ee8f3b695e	1875	/* Set the Preload enable bit for channel2 */
EricLew	0:80ee8f3b695e	1876	htim->Instance->CCMR1 \|= TIM_CCMR1_OC2PE;
EricLew	0:80ee8f3b695e	1877
EricLew	0:80ee8f3b695e	1878	/* Configure the Output Fast mode */
EricLew	0:80ee8f3b695e	1879	htim->Instance->CCMR1 &= ~TIM_CCMR1_OC2FE;
EricLew	0:80ee8f3b695e	1880	htim->Instance->CCMR1 \|= sConfig->OCFastMode << 8;
EricLew	0:80ee8f3b695e	1881	}
EricLew	0:80ee8f3b695e	1882	break;
EricLew	0:80ee8f3b695e	1883
EricLew	0:80ee8f3b695e	1884	case TIM_CHANNEL_3:
EricLew	0:80ee8f3b695e	1885	{
EricLew	0:80ee8f3b695e	1886	/* Check the parameters */
EricLew	0:80ee8f3b695e	1887	assert_param(IS_TIM_CC3_INSTANCE(htim->Instance));
EricLew	0:80ee8f3b695e	1888
EricLew	0:80ee8f3b695e	1889	/* Configure the Channel 3 in PWM mode */
EricLew	0:80ee8f3b695e	1890	TIM_OC3_SetConfig(htim->Instance, sConfig);
EricLew	0:80ee8f3b695e	1891
EricLew	0:80ee8f3b695e	1892	/* Set the Preload enable bit for channel3 */
EricLew	0:80ee8f3b695e	1893	htim->Instance->CCMR2 \|= TIM_CCMR2_OC3PE;
EricLew	0:80ee8f3b695e	1894
EricLew	0:80ee8f3b695e	1895	/* Configure the Output Fast mode */
EricLew	0:80ee8f3b695e	1896	htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3FE;
EricLew	0:80ee8f3b695e	1897	htim->Instance->CCMR2 \|= sConfig->OCFastMode;
EricLew	0:80ee8f3b695e	1898	}
EricLew	0:80ee8f3b695e	1899	break;
EricLew	0:80ee8f3b695e	1900
EricLew	0:80ee8f3b695e	1901	case TIM_CHANNEL_4:
EricLew	0:80ee8f3b695e	1902	{
EricLew	0:80ee8f3b695e	1903	/* Check the parameters */
EricLew	0:80ee8f3b695e	1904	assert_param(IS_TIM_CC4_INSTANCE(htim->Instance));
EricLew	0:80ee8f3b695e	1905
EricLew	0:80ee8f3b695e	1906	/* Configure the Channel 4 in PWM mode */
EricLew	0:80ee8f3b695e	1907	TIM_OC4_SetConfig(htim->Instance, sConfig);
EricLew	0:80ee8f3b695e	1908
EricLew	0:80ee8f3b695e	1909	/* Set the Preload enable bit for channel4 */
EricLew	0:80ee8f3b695e	1910	htim->Instance->CCMR2 \|= TIM_CCMR2_OC4PE;
EricLew	0:80ee8f3b695e	1911
EricLew	0:80ee8f3b695e	1912	/* Configure the Output Fast mode */
EricLew	0:80ee8f3b695e	1913	htim->Instance->CCMR2 &= ~TIM_CCMR2_OC4FE;
EricLew	0:80ee8f3b695e	1914	htim->Instance->CCMR2 \|= sConfig->OCFastMode << 8;
EricLew	0:80ee8f3b695e	1915	}
EricLew	0:80ee8f3b695e	1916	break;
EricLew	0:80ee8f3b695e	1917
EricLew	0:80ee8f3b695e	1918	case TIM_CHANNEL_5:
EricLew	0:80ee8f3b695e	1919	{
EricLew	0:80ee8f3b695e	1920	/* Check the parameters */
EricLew	0:80ee8f3b695e	1921	assert_param(IS_TIM_CC5_INSTANCE(htim->Instance));
EricLew	0:80ee8f3b695e	1922
EricLew	0:80ee8f3b695e	1923	/* Configure the Channel 5 in PWM mode */
EricLew	0:80ee8f3b695e	1924	TIM_OC5_SetConfig(htim->Instance, sConfig);
EricLew	0:80ee8f3b695e	1925
EricLew	0:80ee8f3b695e	1926	/* Set the Preload enable bit for channel5*/
EricLew	0:80ee8f3b695e	1927	htim->Instance->CCMR3 \|= TIM_CCMR3_OC5PE;
EricLew	0:80ee8f3b695e	1928
EricLew	0:80ee8f3b695e	1929	/* Configure the Output Fast mode */
EricLew	0:80ee8f3b695e	1930	htim->Instance->CCMR3 &= ~TIM_CCMR3_OC5FE;
EricLew	0:80ee8f3b695e	1931	htim->Instance->CCMR3 \|= sConfig->OCFastMode;
EricLew	0:80ee8f3b695e	1932	}
EricLew	0:80ee8f3b695e	1933	break;
EricLew	0:80ee8f3b695e	1934
EricLew	0:80ee8f3b695e	1935	case TIM_CHANNEL_6:
EricLew	0:80ee8f3b695e	1936	{
EricLew	0:80ee8f3b695e	1937	/* Check the parameters */
EricLew	0:80ee8f3b695e	1938	assert_param(IS_TIM_CC6_INSTANCE(htim->Instance));
EricLew	0:80ee8f3b695e	1939
EricLew	0:80ee8f3b695e	1940	/* Configure the Channel 5 in PWM mode */
EricLew	0:80ee8f3b695e	1941	TIM_OC6_SetConfig(htim->Instance, sConfig);
EricLew	0:80ee8f3b695e	1942
EricLew	0:80ee8f3b695e	1943	/* Set the Preload enable bit for channel6 */
EricLew	0:80ee8f3b695e	1944	htim->Instance->CCMR3 \|= TIM_CCMR3_OC6PE;
EricLew	0:80ee8f3b695e	1945
EricLew	0:80ee8f3b695e	1946	/* Configure the Output Fast mode */
EricLew	0:80ee8f3b695e	1947	htim->Instance->CCMR3 &= ~TIM_CCMR3_OC6FE;
EricLew	0:80ee8f3b695e	1948	htim->Instance->CCMR3 \|= sConfig->OCFastMode << 8;
EricLew	0:80ee8f3b695e	1949	}
EricLew	0:80ee8f3b695e	1950	break;
EricLew	0:80ee8f3b695e	1951
EricLew	0:80ee8f3b695e	1952	default:
EricLew	0:80ee8f3b695e	1953	break;
EricLew	0:80ee8f3b695e	1954	}
EricLew	0:80ee8f3b695e	1955
EricLew	0:80ee8f3b695e	1956	htim->State = HAL_TIM_STATE_READY;
EricLew	0:80ee8f3b695e	1957
EricLew	0:80ee8f3b695e	1958	__HAL_UNLOCK(htim);
EricLew	0:80ee8f3b695e	1959
EricLew	0:80ee8f3b695e	1960	return HAL_OK;
EricLew	0:80ee8f3b695e	1961	}
EricLew	0:80ee8f3b695e	1962
EricLew	0:80ee8f3b695e	1963	/**
EricLew	0:80ee8f3b695e	1964	* @brief Configures the OCRef clear feature
EricLew	0:80ee8f3b695e	1965	* @param htim: TIM handle
EricLew	0:80ee8f3b695e	1966	* @param sClearInputConfig: pointer to a TIM_ClearInputConfigTypeDef structure that
EricLew	0:80ee8f3b695e	1967	* contains the OCREF clear feature and parameters for the TIM peripheral.
EricLew	0:80ee8f3b695e	1968	* @param Channel: specifies the TIM Channel
EricLew	0:80ee8f3b695e	1969	* This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	1970	* @arg TIM_Channel_1: TIM Channel 1
EricLew	0:80ee8f3b695e	1971	* @arg TIM_Channel_2: TIM Channel 2
EricLew	0:80ee8f3b695e	1972	* @arg TIM_Channel_3: TIM Channel 3
EricLew	0:80ee8f3b695e	1973	* @arg TIM_Channel_4: TIM Channel 4
EricLew	0:80ee8f3b695e	1974	* @arg TIM_Channel_5: TIM Channel 5
EricLew	0:80ee8f3b695e	1975	* @arg TIM_Channel_6: TIM Channel 6
EricLew	0:80ee8f3b695e	1976	* @retval None
EricLew	0:80ee8f3b695e	1977	*/
EricLew	0:80ee8f3b695e	1978	HAL_StatusTypeDef HAL_TIM_ConfigOCrefClear(TIM_HandleTypeDef *htim,
EricLew	0:80ee8f3b695e	1979	TIM_ClearInputConfigTypeDef *sClearInputConfig,
EricLew	0:80ee8f3b695e	1980	uint32_t Channel)
EricLew	0:80ee8f3b695e	1981	{
EricLew	0:80ee8f3b695e	1982	uint32_t tmpsmcr = 0;
EricLew	0:80ee8f3b695e	1983
EricLew	0:80ee8f3b695e	1984	/* Check the parameters */
EricLew	0:80ee8f3b695e	1985	assert_param(IS_TIM_OCXREF_CLEAR_INSTANCE(htim->Instance));
EricLew	0:80ee8f3b695e	1986	assert_param(IS_TIM_CLEARINPUT_SOURCE(sClearInputConfig->ClearInputSource));
EricLew	0:80ee8f3b695e	1987
EricLew	0:80ee8f3b695e	1988	/* Check input state */
EricLew	0:80ee8f3b695e	1989	__HAL_LOCK(htim);
EricLew	0:80ee8f3b695e	1990
EricLew	0:80ee8f3b695e	1991	switch (sClearInputConfig->ClearInputSource)
EricLew	0:80ee8f3b695e	1992	{
EricLew	0:80ee8f3b695e	1993	case TIM_CLEARINPUTSOURCE_NONE:
EricLew	0:80ee8f3b695e	1994	{
EricLew	0:80ee8f3b695e	1995	/* Get the TIMx SMCR register value */
EricLew	0:80ee8f3b695e	1996	tmpsmcr = htim->Instance->SMCR;
EricLew	0:80ee8f3b695e	1997
EricLew	0:80ee8f3b695e	1998	/* Clear the OCREF clear selection bit */
EricLew	0:80ee8f3b695e	1999	tmpsmcr &= ~TIM_SMCR_OCCS;
EricLew	0:80ee8f3b695e	2000
EricLew	0:80ee8f3b695e	2001	/* Clear the ETR Bits */
EricLew	0:80ee8f3b695e	2002	tmpsmcr &= ~(TIM_SMCR_ETF \| TIM_SMCR_ETPS \| TIM_SMCR_ECE \| TIM_SMCR_ETP);
EricLew	0:80ee8f3b695e	2003
EricLew	0:80ee8f3b695e	2004	/* Set TIMx_SMCR */
EricLew	0:80ee8f3b695e	2005	htim->Instance->SMCR = tmpsmcr;
EricLew	0:80ee8f3b695e	2006	}
EricLew	0:80ee8f3b695e	2007	break;
EricLew	0:80ee8f3b695e	2008
EricLew	0:80ee8f3b695e	2009	case TIM_CLEARINPUTSOURCE_OCREFCLR:
EricLew	0:80ee8f3b695e	2010	{
EricLew	0:80ee8f3b695e	2011	/* Clear the OCREF clear selection bit */
EricLew	0:80ee8f3b695e	2012	htim->Instance->SMCR &= ~TIM_SMCR_OCCS;
EricLew	0:80ee8f3b695e	2013	}
EricLew	0:80ee8f3b695e	2014	break;
EricLew	0:80ee8f3b695e	2015
EricLew	0:80ee8f3b695e	2016	case TIM_CLEARINPUTSOURCE_ETR:
EricLew	0:80ee8f3b695e	2017	{
EricLew	0:80ee8f3b695e	2018	/* Check the parameters */
EricLew	0:80ee8f3b695e	2019	assert_param(IS_TIM_CLEARINPUT_POLARITY(sClearInputConfig->ClearInputPolarity));
EricLew	0:80ee8f3b695e	2020	assert_param(IS_TIM_CLEARINPUT_PRESCALER(sClearInputConfig->ClearInputPrescaler));
EricLew	0:80ee8f3b695e	2021	assert_param(IS_TIM_CLEARINPUT_FILTER(sClearInputConfig->ClearInputFilter));
EricLew	0:80ee8f3b695e	2022
EricLew	0:80ee8f3b695e	2023	TIM_ETR_SetConfig(htim->Instance,
EricLew	0:80ee8f3b695e	2024	sClearInputConfig->ClearInputPrescaler,
EricLew	0:80ee8f3b695e	2025	sClearInputConfig->ClearInputPolarity,
EricLew	0:80ee8f3b695e	2026	sClearInputConfig->ClearInputFilter);
EricLew	0:80ee8f3b695e	2027
EricLew	0:80ee8f3b695e	2028	/* Set the OCREF clear selection bit */
EricLew	0:80ee8f3b695e	2029	htim->Instance->SMCR \|= TIM_SMCR_OCCS;
EricLew	0:80ee8f3b695e	2030	}
EricLew	0:80ee8f3b695e	2031	break;
EricLew	0:80ee8f3b695e	2032
EricLew	0:80ee8f3b695e	2033	default:
EricLew	0:80ee8f3b695e	2034	break;
EricLew	0:80ee8f3b695e	2035	}
EricLew	0:80ee8f3b695e	2036
EricLew	0:80ee8f3b695e	2037	switch (Channel)
EricLew	0:80ee8f3b695e	2038	{
EricLew	0:80ee8f3b695e	2039	case TIM_CHANNEL_1:
EricLew	0:80ee8f3b695e	2040	{
EricLew	0:80ee8f3b695e	2041	if(sClearInputConfig->ClearInputState != RESET)
EricLew	0:80ee8f3b695e	2042	{
EricLew	0:80ee8f3b695e	2043	/* Enable the OCREF clear feature for Channel 1 */
EricLew	0:80ee8f3b695e	2044	htim->Instance->CCMR1 \|= TIM_CCMR1_OC1CE;
EricLew	0:80ee8f3b695e	2045	}
EricLew	0:80ee8f3b695e	2046	else
EricLew	0:80ee8f3b695e	2047	{
EricLew	0:80ee8f3b695e	2048	/* Disable the OCREF clear feature for Channel 1 */
EricLew	0:80ee8f3b695e	2049	htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1CE;
EricLew	0:80ee8f3b695e	2050	}
EricLew	0:80ee8f3b695e	2051	}
EricLew	0:80ee8f3b695e	2052	break;
EricLew	0:80ee8f3b695e	2053	case TIM_CHANNEL_2:
EricLew	0:80ee8f3b695e	2054	{
EricLew	0:80ee8f3b695e	2055	if(sClearInputConfig->ClearInputState != RESET)
EricLew	0:80ee8f3b695e	2056	{
EricLew	0:80ee8f3b695e	2057	/* Enable the OCREF clear feature for Channel 2 */
EricLew	0:80ee8f3b695e	2058	htim->Instance->CCMR1 \|= TIM_CCMR1_OC2CE;
EricLew	0:80ee8f3b695e	2059	}
EricLew	0:80ee8f3b695e	2060	else
EricLew	0:80ee8f3b695e	2061	{
EricLew	0:80ee8f3b695e	2062	/* Disable the OCREF clear feature for Channel 2 */
EricLew	0:80ee8f3b695e	2063	htim->Instance->CCMR1 &= ~TIM_CCMR1_OC2CE;
EricLew	0:80ee8f3b695e	2064	}
EricLew	0:80ee8f3b695e	2065	}
EricLew	0:80ee8f3b695e	2066	break;
EricLew	0:80ee8f3b695e	2067	case TIM_CHANNEL_3:
EricLew	0:80ee8f3b695e	2068	{
EricLew	0:80ee8f3b695e	2069	if(sClearInputConfig->ClearInputState != RESET)
EricLew	0:80ee8f3b695e	2070	{
EricLew	0:80ee8f3b695e	2071	/* Enable the OCREF clear feature for Channel 3 */
EricLew	0:80ee8f3b695e	2072	htim->Instance->CCMR2 \|= TIM_CCMR2_OC3CE;
EricLew	0:80ee8f3b695e	2073	}
EricLew	0:80ee8f3b695e	2074	else
EricLew	0:80ee8f3b695e	2075	{
EricLew	0:80ee8f3b695e	2076	/* Disable the OCREF clear feature for Channel 3 */
EricLew	0:80ee8f3b695e	2077	htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3CE;
EricLew	0:80ee8f3b695e	2078	}
EricLew	0:80ee8f3b695e	2079	}
EricLew	0:80ee8f3b695e	2080	break;
EricLew	0:80ee8f3b695e	2081	case TIM_CHANNEL_4:
EricLew	0:80ee8f3b695e	2082	{
EricLew	0:80ee8f3b695e	2083	if(sClearInputConfig->ClearInputState != RESET)
EricLew	0:80ee8f3b695e	2084	{
EricLew	0:80ee8f3b695e	2085	/* Enable the OCREF clear feature for Channel 4 */
EricLew	0:80ee8f3b695e	2086	htim->Instance->CCMR2 \|= TIM_CCMR2_OC4CE;
EricLew	0:80ee8f3b695e	2087	}
EricLew	0:80ee8f3b695e	2088	else
EricLew	0:80ee8f3b695e	2089	{
EricLew	0:80ee8f3b695e	2090	/* Disable the OCREF clear feature for Channel 4 */
EricLew	0:80ee8f3b695e	2091	htim->Instance->CCMR2 &= ~TIM_CCMR2_OC4CE;
EricLew	0:80ee8f3b695e	2092	}
EricLew	0:80ee8f3b695e	2093	}
EricLew	0:80ee8f3b695e	2094	break;
EricLew	0:80ee8f3b695e	2095	case TIM_CHANNEL_5:
EricLew	0:80ee8f3b695e	2096	{
EricLew	0:80ee8f3b695e	2097	if(sClearInputConfig->ClearInputState != RESET)
EricLew	0:80ee8f3b695e	2098	{
EricLew	0:80ee8f3b695e	2099	/* Enable the OCREF clear feature for Channel 1 */
EricLew	0:80ee8f3b695e	2100	htim->Instance->CCMR3 \|= TIM_CCMR3_OC5CE;
EricLew	0:80ee8f3b695e	2101	}
EricLew	0:80ee8f3b695e	2102	else
EricLew	0:80ee8f3b695e	2103	{
EricLew	0:80ee8f3b695e	2104	/* Disable the OCREF clear feature for Channel 1 */
EricLew	0:80ee8f3b695e	2105	htim->Instance->CCMR3 &= ~TIM_CCMR3_OC5CE;
EricLew	0:80ee8f3b695e	2106	}
EricLew	0:80ee8f3b695e	2107	}
EricLew	0:80ee8f3b695e	2108	break;
EricLew	0:80ee8f3b695e	2109	case TIM_CHANNEL_6:
EricLew	0:80ee8f3b695e	2110	{
EricLew	0:80ee8f3b695e	2111	if(sClearInputConfig->ClearInputState != RESET)
EricLew	0:80ee8f3b695e	2112	{
EricLew	0:80ee8f3b695e	2113	/* Enable the OCREF clear feature for Channel 1 */
EricLew	0:80ee8f3b695e	2114	htim->Instance->CCMR3 \|= TIM_CCMR3_OC6CE;
EricLew	0:80ee8f3b695e	2115	}
EricLew	0:80ee8f3b695e	2116	else
EricLew	0:80ee8f3b695e	2117	{
EricLew	0:80ee8f3b695e	2118	/* Disable the OCREF clear feature for Channel 1 */
EricLew	0:80ee8f3b695e	2119	htim->Instance->CCMR3 &= ~TIM_CCMR3_OC6CE;
EricLew	0:80ee8f3b695e	2120	}
EricLew	0:80ee8f3b695e	2121	}
EricLew	0:80ee8f3b695e	2122	break;
EricLew	0:80ee8f3b695e	2123	default:
EricLew	0:80ee8f3b695e	2124	break;
EricLew	0:80ee8f3b695e	2125	}
EricLew	0:80ee8f3b695e	2126
EricLew	0:80ee8f3b695e	2127	__HAL_UNLOCK(htim);
EricLew	0:80ee8f3b695e	2128
EricLew	0:80ee8f3b695e	2129	return HAL_OK;
EricLew	0:80ee8f3b695e	2130	}
EricLew	0:80ee8f3b695e	2131
EricLew	0:80ee8f3b695e	2132	/**
EricLew	0:80ee8f3b695e	2133	* @brief Configures the TIM in master mode.
EricLew	0:80ee8f3b695e	2134	* @param htim: TIM handle.
EricLew	0:80ee8f3b695e	2135	* @param sMasterConfig: pointer to a TIM_MasterConfigTypeDef structure that
EricLew	0:80ee8f3b695e	2136	* contains the selected trigger output (TRGO) and the Master/Slave
EricLew	0:80ee8f3b695e	2137	* mode.
EricLew	0:80ee8f3b695e	2138	* @retval HAL status
EricLew	0:80ee8f3b695e	2139	*/
EricLew	0:80ee8f3b695e	2140	HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim,
EricLew	0:80ee8f3b695e	2141	TIM_MasterConfigTypeDef * sMasterConfig)
EricLew	0:80ee8f3b695e	2142	{
EricLew	0:80ee8f3b695e	2143	uint32_t tmpcr2;
EricLew	0:80ee8f3b695e	2144	uint32_t tmpsmcr;
EricLew	0:80ee8f3b695e	2145
EricLew	0:80ee8f3b695e	2146	/* Check the parameters */
EricLew	0:80ee8f3b695e	2147	assert_param(IS_TIM_SYNCHRO_INSTANCE(htim->Instance));
EricLew	0:80ee8f3b695e	2148	assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger));
EricLew	0:80ee8f3b695e	2149	assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode));
EricLew	0:80ee8f3b695e	2150
EricLew	0:80ee8f3b695e	2151	/* Check input state */
EricLew	0:80ee8f3b695e	2152	__HAL_LOCK(htim);
EricLew	0:80ee8f3b695e	2153
EricLew	0:80ee8f3b695e	2154	/* Get the TIMx CR2 register value */
EricLew	0:80ee8f3b695e	2155	tmpcr2 = htim->Instance->CR2;
EricLew	0:80ee8f3b695e	2156
EricLew	0:80ee8f3b695e	2157	/* Get the TIMx SMCR register value */
EricLew	0:80ee8f3b695e	2158	tmpsmcr = htim->Instance->SMCR;
EricLew	0:80ee8f3b695e	2159
EricLew	0:80ee8f3b695e	2160	/* If the timer supports ADC synchronization through TRGO2, set the master mode selection 2 */
EricLew	0:80ee8f3b695e	2161	if (IS_TIM_TRGO2_INSTANCE(htim->Instance))
EricLew	0:80ee8f3b695e	2162	{
EricLew	0:80ee8f3b695e	2163	/* Check the parameters */
EricLew	0:80ee8f3b695e	2164	assert_param(IS_TIM_TRGO2_SOURCE(sMasterConfig->MasterOutputTrigger2));
EricLew	0:80ee8f3b695e	2165
EricLew	0:80ee8f3b695e	2166	/* Clear the MMS2 bits */
EricLew	0:80ee8f3b695e	2167	tmpcr2 &= ~TIM_CR2_MMS2;
EricLew	0:80ee8f3b695e	2168	/* Select the TRGO2 source*/
EricLew	0:80ee8f3b695e	2169	tmpcr2 \|= sMasterConfig->MasterOutputTrigger2;
EricLew	0:80ee8f3b695e	2170	}
EricLew	0:80ee8f3b695e	2171
EricLew	0:80ee8f3b695e	2172	/* Reset the MMS Bits */
EricLew	0:80ee8f3b695e	2173	tmpcr2 &= ~TIM_CR2_MMS;
EricLew	0:80ee8f3b695e	2174	/* Select the TRGO source */
EricLew	0:80ee8f3b695e	2175	tmpcr2 \|= sMasterConfig->MasterOutputTrigger;
EricLew	0:80ee8f3b695e	2176
EricLew	0:80ee8f3b695e	2177	/* Reset the MSM Bit */
EricLew	0:80ee8f3b695e	2178	tmpsmcr &= ~TIM_SMCR_MSM;
EricLew	0:80ee8f3b695e	2179	/* Set master mode */
EricLew	0:80ee8f3b695e	2180	tmpsmcr \|= sMasterConfig->MasterSlaveMode;
EricLew	0:80ee8f3b695e	2181
EricLew	0:80ee8f3b695e	2182	/* Update TIMx CR2 */
EricLew	0:80ee8f3b695e	2183	htim->Instance->CR2 = tmpcr2;
EricLew	0:80ee8f3b695e	2184
EricLew	0:80ee8f3b695e	2185	/* Update TIMx SMCR */
EricLew	0:80ee8f3b695e	2186	htim->Instance->SMCR = tmpsmcr;
EricLew	0:80ee8f3b695e	2187
EricLew	0:80ee8f3b695e	2188	__HAL_UNLOCK(htim);
EricLew	0:80ee8f3b695e	2189
EricLew	0:80ee8f3b695e	2190	return HAL_OK;
EricLew	0:80ee8f3b695e	2191	}
EricLew	0:80ee8f3b695e	2192
EricLew	0:80ee8f3b695e	2193	/**
EricLew	0:80ee8f3b695e	2194	* @brief Configures the Break feature, dead time, Lock level, OSSI/OSSR State
EricLew	0:80ee8f3b695e	2195	* and the AOE(automatic output enable).
EricLew	0:80ee8f3b695e	2196	* @param htim: TIM handle
EricLew	0:80ee8f3b695e	2197	* @param sBreakDeadTimeConfig: pointer to a TIM_ConfigBreakDeadConfigTypeDef structure that
EricLew	0:80ee8f3b695e	2198	* contains the BDTR Register configuration information for the TIM peripheral.
EricLew	0:80ee8f3b695e	2199	* @retval HAL status
EricLew	0:80ee8f3b695e	2200	*/
EricLew	0:80ee8f3b695e	2201	HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim,
EricLew	0:80ee8f3b695e	2202	TIM_BreakDeadTimeConfigTypeDef * sBreakDeadTimeConfig)
EricLew	0:80ee8f3b695e	2203	{
EricLew	0:80ee8f3b695e	2204	uint32_t tmpbdtr = 0;
EricLew	0:80ee8f3b695e	2205
EricLew	0:80ee8f3b695e	2206	/* Check the parameters */
EricLew	0:80ee8f3b695e	2207	assert_param(IS_TIM_BREAK_INSTANCE(htim->Instance));
EricLew	0:80ee8f3b695e	2208	assert_param(IS_TIM_OSSR_STATE(sBreakDeadTimeConfig->OffStateRunMode));
EricLew	0:80ee8f3b695e	2209	assert_param(IS_TIM_OSSI_STATE(sBreakDeadTimeConfig->OffStateIDLEMode));
EricLew	0:80ee8f3b695e	2210	assert_param(IS_TIM_LOCK_LEVEL(sBreakDeadTimeConfig->LockLevel));
EricLew	0:80ee8f3b695e	2211	assert_param(IS_TIM_DEADTIME(sBreakDeadTimeConfig->DeadTime));
EricLew	0:80ee8f3b695e	2212	assert_param(IS_TIM_BREAK_STATE(sBreakDeadTimeConfig->BreakState));
EricLew	0:80ee8f3b695e	2213	assert_param(IS_TIM_BREAK_POLARITY(sBreakDeadTimeConfig->BreakPolarity));
EricLew	0:80ee8f3b695e	2214	assert_param(IS_TIM_BREAK_FILTER(sBreakDeadTimeConfig->BreakFilter));
EricLew	0:80ee8f3b695e	2215	assert_param(IS_TIM_AUTOMATIC_OUTPUT_STATE(sBreakDeadTimeConfig->AutomaticOutput));
EricLew	0:80ee8f3b695e	2216
EricLew	0:80ee8f3b695e	2217	/* Check input state */
EricLew	0:80ee8f3b695e	2218	__HAL_LOCK(htim);
EricLew	0:80ee8f3b695e	2219
EricLew	0:80ee8f3b695e	2220	/* Set the Lock level, the Break enable Bit and the Polarity, the OSSR State,
EricLew	0:80ee8f3b695e	2221	the OSSI State, the dead time value and the Automatic Output Enable Bit */
EricLew	0:80ee8f3b695e	2222	if (IS_TIM_BKIN2_INSTANCE(htim->Instance))
EricLew	0:80ee8f3b695e	2223	{
EricLew	0:80ee8f3b695e	2224	assert_param(IS_TIM_BREAK2_STATE(sBreakDeadTimeConfig->Break2State));
EricLew	0:80ee8f3b695e	2225	assert_param(IS_TIM_BREAK2_POLARITY(sBreakDeadTimeConfig->Break2Polarity));
EricLew	0:80ee8f3b695e	2226	assert_param(IS_TIM_BREAK_FILTER(sBreakDeadTimeConfig->Break2Filter));
EricLew	0:80ee8f3b695e	2227
EricLew	0:80ee8f3b695e	2228	/* Clear the BDTR bits */
EricLew	0:80ee8f3b695e	2229	tmpbdtr &= ~(TIM_BDTR_DTG \| TIM_BDTR_LOCK \| TIM_BDTR_OSSI \|
EricLew	0:80ee8f3b695e	2230	TIM_BDTR_OSSR \| TIM_BDTR_BKE \| TIM_BDTR_BKP \|
EricLew	0:80ee8f3b695e	2231	TIM_BDTR_AOE \| TIM_BDTR_MOE \| TIM_BDTR_BKF \|
EricLew	0:80ee8f3b695e	2232	TIM_BDTR_BK2F \| TIM_BDTR_BK2E \| TIM_BDTR_BK2P);
EricLew	0:80ee8f3b695e	2233
EricLew	0:80ee8f3b695e	2234	/* Set the BDTR bits */
EricLew	0:80ee8f3b695e	2235	tmpbdtr \|= sBreakDeadTimeConfig->DeadTime;
EricLew	0:80ee8f3b695e	2236	tmpbdtr \|= sBreakDeadTimeConfig->LockLevel;
EricLew	0:80ee8f3b695e	2237	tmpbdtr \|= sBreakDeadTimeConfig->OffStateIDLEMode;
EricLew	0:80ee8f3b695e	2238	tmpbdtr \|= sBreakDeadTimeConfig->OffStateRunMode;
EricLew	0:80ee8f3b695e	2239	tmpbdtr \|= sBreakDeadTimeConfig->BreakState;
EricLew	0:80ee8f3b695e	2240	tmpbdtr \|= sBreakDeadTimeConfig->BreakPolarity;
EricLew	0:80ee8f3b695e	2241	tmpbdtr \|= sBreakDeadTimeConfig->AutomaticOutput;
EricLew	0:80ee8f3b695e	2242	tmpbdtr \|= (sBreakDeadTimeConfig->BreakFilter << BDTR_BKF_SHIFT);
EricLew	0:80ee8f3b695e	2243	tmpbdtr \|= (sBreakDeadTimeConfig->Break2Filter << BDTR_BK2F_SHIFT);
EricLew	0:80ee8f3b695e	2244	tmpbdtr \|= sBreakDeadTimeConfig->Break2State;
EricLew	0:80ee8f3b695e	2245	tmpbdtr \|= sBreakDeadTimeConfig->Break2Polarity;
EricLew	0:80ee8f3b695e	2246	}
EricLew	0:80ee8f3b695e	2247	else
EricLew	0:80ee8f3b695e	2248	{
EricLew	0:80ee8f3b695e	2249	/* Clear the BDTR bits */
EricLew	0:80ee8f3b695e	2250	tmpbdtr &= ~(TIM_BDTR_DTG \| TIM_BDTR_LOCK \| TIM_BDTR_OSSI \|
EricLew	0:80ee8f3b695e	2251	TIM_BDTR_OSSR \| TIM_BDTR_BKE \| TIM_BDTR_BKP \|
EricLew	0:80ee8f3b695e	2252	TIM_BDTR_AOE \| TIM_BDTR_MOE \| TIM_BDTR_BKF);
EricLew	0:80ee8f3b695e	2253
EricLew	0:80ee8f3b695e	2254	/* Set the BDTR bits */
EricLew	0:80ee8f3b695e	2255	tmpbdtr \|= sBreakDeadTimeConfig->DeadTime;
EricLew	0:80ee8f3b695e	2256	tmpbdtr \|= sBreakDeadTimeConfig->LockLevel;
EricLew	0:80ee8f3b695e	2257	tmpbdtr \|= sBreakDeadTimeConfig->OffStateIDLEMode;
EricLew	0:80ee8f3b695e	2258	tmpbdtr \|= sBreakDeadTimeConfig->OffStateRunMode;
EricLew	0:80ee8f3b695e	2259	tmpbdtr \|= sBreakDeadTimeConfig->BreakState;
EricLew	0:80ee8f3b695e	2260	tmpbdtr \|= sBreakDeadTimeConfig->BreakPolarity;
EricLew	0:80ee8f3b695e	2261	tmpbdtr \|= sBreakDeadTimeConfig->AutomaticOutput;
EricLew	0:80ee8f3b695e	2262	tmpbdtr \|= (sBreakDeadTimeConfig->BreakFilter << BDTR_BKF_SHIFT);
EricLew	0:80ee8f3b695e	2263	}
EricLew	0:80ee8f3b695e	2264
EricLew	0:80ee8f3b695e	2265	/* Set TIMx_BDTR */
EricLew	0:80ee8f3b695e	2266	htim->Instance->BDTR = tmpbdtr;
EricLew	0:80ee8f3b695e	2267
EricLew	0:80ee8f3b695e	2268	__HAL_UNLOCK(htim);
EricLew	0:80ee8f3b695e	2269
EricLew	0:80ee8f3b695e	2270	return HAL_OK;
EricLew	0:80ee8f3b695e	2271	}
EricLew	0:80ee8f3b695e	2272
EricLew	0:80ee8f3b695e	2273	/**
EricLew	0:80ee8f3b695e	2274	* @brief Configures the break input source.
EricLew	0:80ee8f3b695e	2275	* @param htim: TIM handle.
EricLew	0:80ee8f3b695e	2276	* @param BreakInput: Break input to configure
EricLew	0:80ee8f3b695e	2277	* This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	2278	* @arg TIM_BREAKINPUT_BRK: Timer break input
EricLew	0:80ee8f3b695e	2279	* @arg TIM_BREAKINPUT_BRK2: Timer break 2 input
EricLew	0:80ee8f3b695e	2280	* @param sBreakInputConfig: Break input source configuration
EricLew	0:80ee8f3b695e	2281	* @retval HAL status
EricLew	0:80ee8f3b695e	2282	*/
EricLew	0:80ee8f3b695e	2283	HAL_StatusTypeDef HAL_TIMEx_ConfigBreakInput(TIM_HandleTypeDef *htim,
EricLew	0:80ee8f3b695e	2284	uint32_t BreakInput,
EricLew	0:80ee8f3b695e	2285	TIMEx_BreakInputConfigTypeDef *sBreakInputConfig)
EricLew	0:80ee8f3b695e	2286
EricLew	0:80ee8f3b695e	2287	{
EricLew	0:80ee8f3b695e	2288	uint32_t tmporx = 0;
EricLew	0:80ee8f3b695e	2289	uint32_t bkin_enable_mask = 0;
EricLew	0:80ee8f3b695e	2290	uint32_t bkin_polarity_mask = 0;
EricLew	0:80ee8f3b695e	2291	uint32_t bkin_enable_bitpos = 0;
EricLew	0:80ee8f3b695e	2292	uint32_t bkin_polarity_bitpos = 0;
EricLew	0:80ee8f3b695e	2293
EricLew	0:80ee8f3b695e	2294	/* Check the parameters */
EricLew	0:80ee8f3b695e	2295	assert_param(IS_TIM_BREAK_INSTANCE(htim->Instance));
EricLew	0:80ee8f3b695e	2296	assert_param(IS_TIM_BREAKINPUT(BreakInput));
EricLew	0:80ee8f3b695e	2297	assert_param(IS_TIM_BREAKINPUTSOURCE(sBreakInputConfig->Source));
EricLew	0:80ee8f3b695e	2298	assert_param(IS_TIM_BREAKINPUTSOURCE_STATE(sBreakInputConfig->Enable));
EricLew	0:80ee8f3b695e	2299	if (sBreakInputConfig->Source != TIM_BREAKINPUTSOURCE_DFSDM)
EricLew	0:80ee8f3b695e	2300	{
EricLew	0:80ee8f3b695e	2301	assert_param(IS_TIM_BREAKINPUTSOURCE_POLARITY(sBreakInputConfig->Polarity));
EricLew	0:80ee8f3b695e	2302	}
EricLew	0:80ee8f3b695e	2303
EricLew	0:80ee8f3b695e	2304	/* Check input state */
EricLew	0:80ee8f3b695e	2305	__HAL_LOCK(htim);
EricLew	0:80ee8f3b695e	2306
EricLew	0:80ee8f3b695e	2307	switch(sBreakInputConfig->Source)
EricLew	0:80ee8f3b695e	2308	{
EricLew	0:80ee8f3b695e	2309	case TIM_BREAKINPUTSOURCE_BKIN:
EricLew	0:80ee8f3b695e	2310	{
EricLew	0:80ee8f3b695e	2311	bkin_enable_mask = TIM1_OR2_BKINE;
EricLew	0:80ee8f3b695e	2312	bkin_enable_bitpos = 0;
EricLew	0:80ee8f3b695e	2313	bkin_polarity_mask = TIM1_OR2_BKINP;
EricLew	0:80ee8f3b695e	2314	bkin_polarity_bitpos = 9;
EricLew	0:80ee8f3b695e	2315	}
EricLew	0:80ee8f3b695e	2316	break;
EricLew	0:80ee8f3b695e	2317	case TIM_BREAKINPUTSOURCE_COMP1:
EricLew	0:80ee8f3b695e	2318	{
EricLew	0:80ee8f3b695e	2319	bkin_enable_mask = TIM1_OR2_BKCMP1E;
EricLew	0:80ee8f3b695e	2320	bkin_enable_bitpos = 1;
EricLew	0:80ee8f3b695e	2321	bkin_polarity_mask = TIM1_OR2_BKCMP1P;
EricLew	0:80ee8f3b695e	2322	bkin_polarity_bitpos = 10;
EricLew	0:80ee8f3b695e	2323	}
EricLew	0:80ee8f3b695e	2324	break;
EricLew	0:80ee8f3b695e	2325	case TIM_BREAKINPUTSOURCE_COMP2:
EricLew	0:80ee8f3b695e	2326	{
EricLew	0:80ee8f3b695e	2327	bkin_enable_mask = TIM1_OR2_BKCMP2E;
EricLew	0:80ee8f3b695e	2328	bkin_enable_bitpos = 2;
EricLew	0:80ee8f3b695e	2329	bkin_polarity_mask = TIM1_OR2_BKCMP2P;
EricLew	0:80ee8f3b695e	2330	bkin_polarity_bitpos = 11;
EricLew	0:80ee8f3b695e	2331	}
EricLew	0:80ee8f3b695e	2332	break;
EricLew	0:80ee8f3b695e	2333	case TIM_BREAKINPUTSOURCE_DFSDM:
EricLew	0:80ee8f3b695e	2334	{
EricLew	0:80ee8f3b695e	2335	bkin_enable_mask = TIM1_OR2_BKDFBK0E;
EricLew	0:80ee8f3b695e	2336	bkin_enable_bitpos = 8;
EricLew	0:80ee8f3b695e	2337	}
EricLew	0:80ee8f3b695e	2338	break;
EricLew	0:80ee8f3b695e	2339	default:
EricLew	0:80ee8f3b695e	2340	break;
EricLew	0:80ee8f3b695e	2341	}
EricLew	0:80ee8f3b695e	2342
EricLew	0:80ee8f3b695e	2343	switch(BreakInput)
EricLew	0:80ee8f3b695e	2344	{
EricLew	0:80ee8f3b695e	2345	case TIM_BREAKINPUT_BRK:
EricLew	0:80ee8f3b695e	2346	{
EricLew	0:80ee8f3b695e	2347	/* Get the TIMx_OR2 register value */
EricLew	0:80ee8f3b695e	2348	tmporx = htim->Instance->OR2;
EricLew	0:80ee8f3b695e	2349
EricLew	0:80ee8f3b695e	2350	/* Enable the break input */
EricLew	0:80ee8f3b695e	2351	tmporx &= ~bkin_enable_mask;
EricLew	0:80ee8f3b695e	2352	tmporx \|= (sBreakInputConfig->Enable << bkin_enable_bitpos) & bkin_enable_mask;
EricLew	0:80ee8f3b695e	2353
EricLew	0:80ee8f3b695e	2354	/* Set the break input polarity */
EricLew	0:80ee8f3b695e	2355	if (sBreakInputConfig->Source != TIM_BREAKINPUTSOURCE_DFSDM)
EricLew	0:80ee8f3b695e	2356	{
EricLew	0:80ee8f3b695e	2357	tmporx &= ~bkin_polarity_mask;
EricLew	0:80ee8f3b695e	2358	tmporx \|= (sBreakInputConfig->Polarity << bkin_polarity_bitpos) & bkin_polarity_mask;
EricLew	0:80ee8f3b695e	2359	}
EricLew	0:80ee8f3b695e	2360
EricLew	0:80ee8f3b695e	2361	/* Set TIMx_OR2 */
EricLew	0:80ee8f3b695e	2362	htim->Instance->OR2 = tmporx;
EricLew	0:80ee8f3b695e	2363	}
EricLew	0:80ee8f3b695e	2364	break;
EricLew	0:80ee8f3b695e	2365	case TIM_BREAKINPUT_BRK2:
EricLew	0:80ee8f3b695e	2366	{
EricLew	0:80ee8f3b695e	2367	/* Get the TIMx_OR3 register value */
EricLew	0:80ee8f3b695e	2368	tmporx = htim->Instance->OR3;
EricLew	0:80ee8f3b695e	2369
EricLew	0:80ee8f3b695e	2370	/* Enable the break input */
EricLew	0:80ee8f3b695e	2371	tmporx &= ~bkin_enable_mask;
EricLew	0:80ee8f3b695e	2372	tmporx \|= (sBreakInputConfig->Enable << bkin_enable_bitpos) & bkin_enable_mask;
EricLew	0:80ee8f3b695e	2373
EricLew	0:80ee8f3b695e	2374	/* Set the break input polarity */
EricLew	0:80ee8f3b695e	2375	if (sBreakInputConfig->Source != TIM_BREAKINPUTSOURCE_DFSDM)
EricLew	0:80ee8f3b695e	2376	{
EricLew	0:80ee8f3b695e	2377	tmporx &= ~bkin_polarity_mask;
EricLew	0:80ee8f3b695e	2378	tmporx \|= (sBreakInputConfig->Polarity << bkin_polarity_bitpos) & bkin_polarity_mask;
EricLew	0:80ee8f3b695e	2379	}
EricLew	0:80ee8f3b695e	2380
EricLew	0:80ee8f3b695e	2381	/* Set TIMx_OR3 */
EricLew	0:80ee8f3b695e	2382	htim->Instance->OR3 = tmporx;
EricLew	0:80ee8f3b695e	2383	}
EricLew	0:80ee8f3b695e	2384	break;
EricLew	0:80ee8f3b695e	2385	default:
EricLew	0:80ee8f3b695e	2386	break;
EricLew	0:80ee8f3b695e	2387	}
EricLew	0:80ee8f3b695e	2388
EricLew	0:80ee8f3b695e	2389	__HAL_UNLOCK(htim);
EricLew	0:80ee8f3b695e	2390
EricLew	0:80ee8f3b695e	2391	return HAL_OK;
EricLew	0:80ee8f3b695e	2392	}
EricLew	0:80ee8f3b695e	2393
EricLew	0:80ee8f3b695e	2394	/**
EricLew	0:80ee8f3b695e	2395	* @brief Configures the TIMx Remapping input capabilities.
EricLew	0:80ee8f3b695e	2396	* @param htim: TIM handle.
EricLew	0:80ee8f3b695e	2397	* @param Remap: specifies the TIM remapping source.
EricLew	0:80ee8f3b695e	2398	* For TIM1, the parameter is a combination of 4 fields (field1 \| field2 \| field3 \| field4):
EricLew	0:80ee8f3b695e	2399	* field1 can have the following values:
EricLew	0:80ee8f3b695e	2400	* @arg TIM_TIM1_ETR_ADC1_NONE: TIM1_ETR is not connected to any ADC1 AWD (analog watchdog)
EricLew	0:80ee8f3b695e	2401	* @arg TIM_TIM1_ETR_ADC1_AWD1: TIM1_ETR is connected to ADC1 AWD1
EricLew	0:80ee8f3b695e	2402	* @arg TIM_TIM1_ETR_ADC1_AWD2: TIM1_ETR is connected to ADC1 AWD2
EricLew	0:80ee8f3b695e	2403	* @arg TIM_TIM1_ETR_ADC1_AWD3: TIM1_ETR is connected to ADC1 AWD3
EricLew	0:80ee8f3b695e	2404	* field2 can have the following values:
EricLew	0:80ee8f3b695e	2405	* @arg TIM_TIM1_ETR_ADC3_NONE: TIM1_ETR is not connected to any ADC3 AWD (analog watchdog)
EricLew	0:80ee8f3b695e	2406	* @arg TIM_TIM1_ETR_ADC3_AWD1: TIM1_ETR is connected to ADC3 AWD1
EricLew	0:80ee8f3b695e	2407	* @arg TIM_TIM1_ETR_ADC3_AWD2: TIM1_ETR is connected to ADC3 AWD2
EricLew	0:80ee8f3b695e	2408	* @arg TIM_TIM1_ETR_ADC3_AWD3: TIM1_ETR is connected to ADC3 AWD3
EricLew	0:80ee8f3b695e	2409	* field3 can have the following values:
EricLew	0:80ee8f3b695e	2410	* @arg TIM_TIM1_TI1_GPIO: TIM1 TI1 is connected to GPIO
EricLew	0:80ee8f3b695e	2411	* @arg TIM_TIM1_TI1_COMP1: TIM1 TI1 is connected to COMP1 output
EricLew	0:80ee8f3b695e	2412	* field4 can have the following values:
EricLew	0:80ee8f3b695e	2413	* @arg TIM_TIM1_ETR_COMP1: TIM1_ETR is connected to COMP1 output
EricLew	0:80ee8f3b695e	2414	* @arg TIM_TIM1_ETR_COMP2: TIM1_ETR is connected to COMP2 output
EricLew	0:80ee8f3b695e	2415	* @note When field4 is set to TIM_TIM1_ETR_COMP1 or TIM_TIM1_ETR_COMP2 field1 and field2 values are not significant
EricLew	0:80ee8f3b695e	2416	*
EricLew	0:80ee8f3b695e	2417	* For TIM2, the parameter is a combination of 3 fields (field1 \| field2 \| field3):
EricLew	0:80ee8f3b695e	2418	* field1 can have the following values:
EricLew	0:80ee8f3b695e	2419	* @arg TIM_TIM2_ITR1_TIM8_TRGO: TIM2_ITR1 is connected to TIM8_TRGO
EricLew	0:80ee8f3b695e	2420	* @arg TIM_TIM2_ITR1_OTG_FS_SOF: TIM2_ITR1 is connected to OTG_FS SOF
EricLew	0:80ee8f3b695e	2421	* field2 can have the following values:
EricLew	0:80ee8f3b695e	2422	* @arg TIM_TIM2_ETR_GPIO: TIM2_ETR is connected to GPIO
EricLew	0:80ee8f3b695e	2423	* @arg TIM_TIM2_ETR_LSE: TIM2_ETR is connected to LSE
EricLew	0:80ee8f3b695e	2424	* @arg TIM_TIM2_ETR_COMP1: TIM2_ETR is connected to COMP1 output
EricLew	0:80ee8f3b695e	2425	* @arg TIM_TIM2_ETR_COMP2: TIM2_ETR is connected to COMP2 output
EricLew	0:80ee8f3b695e	2426	* field3 can have the following values:
EricLew	0:80ee8f3b695e	2427	* @arg TIM_TIM2_TI4_GPIO: TIM2 TI4 is connected to GPIO
EricLew	0:80ee8f3b695e	2428	* @arg TIM_TIM2_TI4_COMP1: TIM2 TI4 is connected to COMP1 output
EricLew	0:80ee8f3b695e	2429	* @arg TIM_TIM2_TI4_COMP2: TIM2 TI4 is connected to COMP2 output
EricLew	0:80ee8f3b695e	2430	* @arg TIM_TIM2_TI4_COMP1_COMP2: TIM2 TI4 is connected to logical OR between COMP1 and COMP2 output
EricLew	0:80ee8f3b695e	2431	*
EricLew	0:80ee8f3b695e	2432	* For TIM3, the parameter is a combination 2 fields(field1 \| field2):
EricLew	0:80ee8f3b695e	2433	* field1 can have the following values:
EricLew	0:80ee8f3b695e	2434	* @arg TIM_TIM3_TI1_GPIO: TIM3 TI1 is connected to GPIO
EricLew	0:80ee8f3b695e	2435	* @arg TIM_TIM3_TI1_COMP1: TIM3 TI1 is connected to COMP1 output
EricLew	0:80ee8f3b695e	2436	* @arg TIM_TIM3_TI1_COMP2: TIM3 TI1 is connected to COMP2 output
EricLew	0:80ee8f3b695e	2437	* @arg TIM_TIM3_TI1_COMP1_COMP2: TIM3 TI1 is connected to logical OR between COMP1 and COMP2 output
EricLew	0:80ee8f3b695e	2438	* field2 can have the following values:
EricLew	0:80ee8f3b695e	2439	* @arg TIM_TIM3_ETR_GPIO: TIM3_ETR is connected to GPIO
EricLew	0:80ee8f3b695e	2440	* @arg TIM_TIM3_ETR_COMP1: TIM3_ETR is connected to COMP1 output
EricLew	0:80ee8f3b695e	2441	*
EricLew	0:80ee8f3b695e	2442	* For TIM8, the parameter is a combination of 3 fields (field1 \| field2 \| field3):
EricLew	0:80ee8f3b695e	2443	* field1 can have the following values:
EricLew	0:80ee8f3b695e	2444	* @arg TIM_TIM8_ETR_ADC2_NONE: TIM8_ETR is not connected to any ADC2 AWD (analog watchdog)
EricLew	0:80ee8f3b695e	2445	* @arg TIM_TIM8_ETR_ADC2_AWD1: TIM8_ETR is connected to ADC2 AWD1
EricLew	0:80ee8f3b695e	2446	* @arg TIM_TIM8_ETR_ADC2_AWD2: TIM8_ETR is connected to ADC2 AWD2
EricLew	0:80ee8f3b695e	2447	* @arg TIM_TIM8_ETR_ADC2_AWD3: TIM8_ETR is connected to ADC2 AWD3
EricLew	0:80ee8f3b695e	2448	* field2 can have the following values:
EricLew	0:80ee8f3b695e	2449	* @arg TIM_TIM8_ETR_ADC3_NONE: TIM8_ETR is not connected to any ADC3 AWD (analog watchdog)
EricLew	0:80ee8f3b695e	2450	* @arg TIM_TIM8_ETR_ADC3_AWD1: TIM8_ETR is connected to ADC3 AWD1
EricLew	0:80ee8f3b695e	2451	* @arg TIM_TIM8_ETR_ADC3_AWD2: TIM8_ETR is connected to ADC3 AWD2
EricLew	0:80ee8f3b695e	2452	* @arg TIM_TIM8_ETR_ADC3_AWD3: TIM8_ETR is connected to ADC3 AWD3
EricLew	0:80ee8f3b695e	2453	* field3 can have the following values:
EricLew	0:80ee8f3b695e	2454	* @arg TIM_TIM8_TI1_GPIO: TIM8 TI1 is connected to GPIO
EricLew	0:80ee8f3b695e	2455	* @arg TIM_TIM8_TI1_COMP2: TIM8 TI1 is connected to COMP2 output
EricLew	0:80ee8f3b695e	2456	* field4 can have the following values:
EricLew	0:80ee8f3b695e	2457	* @arg TIM_TIM8_ETR_COMP1: TIM8_ETR is connected to COMP1 output
EricLew	0:80ee8f3b695e	2458	* @arg TIM_TIM8_ETR_COMP2: TIM8_ETR is connected to COMP2 output
EricLew	0:80ee8f3b695e	2459	* @note When field4 is set to TIM_TIM8_ETR_COMP1 or TIM_TIM8_ETR_COMP2 field1 and field2 values are not significant
EricLew	0:80ee8f3b695e	2460	*
EricLew	0:80ee8f3b695e	2461	* For TIM15, the parameter is a combination of 3 fields (field1 \| field2):
EricLew	0:80ee8f3b695e	2462	* field1 can have the following values:
EricLew	0:80ee8f3b695e	2463	* @arg TIM_TIM15_TI1_GPIO: TIM15 TI1 is connected to GPIO
EricLew	0:80ee8f3b695e	2464	* @arg TIM_TIM15_TI1_LSE: TIM15 TI1 is connected to LSE
EricLew	0:80ee8f3b695e	2465	* field2 can have the following values:
EricLew	0:80ee8f3b695e	2466	* @arg TIM_TIM15_ENCODERMODE_NONE: No redirection
EricLew	0:80ee8f3b695e	2467	* @arg TIM_TIM15_ENCODERMODE_TIM2: TIM2 IC1 and TIM2 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively
EricLew	0:80ee8f3b695e	2468	* @arg TIM_TIM15_ENCODERMODE_TIM3: TIM3 IC1 and TIM3 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively
EricLew	0:80ee8f3b695e	2469	* @arg TIM_TIM15_ENCODERMODE_TIM4: TIM4 IC1 and TIM4 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively
EricLew	0:80ee8f3b695e	2470	*
EricLew	0:80ee8f3b695e	2471	* For TIM16, the parameter can have the following values:
EricLew	0:80ee8f3b695e	2472	* @arg TIM_TIM16_TI1_GPIO: TIM16 TI1 is connected to GPIO
EricLew	0:80ee8f3b695e	2473	* @arg TIM_TIM16_TI1_LSI: TIM16 TI1 is connected to LSI
EricLew	0:80ee8f3b695e	2474	* @arg TIM_TIM16_TI1_LSE: TIM16 TI1 is connected to LSE
EricLew	0:80ee8f3b695e	2475	* @arg TIM_TIM16_TI1_RTC: TIM16 TI1 is connected to RTC wakeup interrupt
EricLew	0:80ee8f3b695e	2476	*
EricLew	0:80ee8f3b695e	2477	* For TIM17, the parameter can have the following values:
EricLew	0:80ee8f3b695e	2478	* @arg TIM_TIM17_TI1_GPIO: TIM17 TI1 is connected to GPIO
EricLew	0:80ee8f3b695e	2479	* @arg TIM_TIM17_TI1_MSI: TIM17 TI1 is connected to MSI
EricLew	0:80ee8f3b695e	2480	* @arg TIM_TIM17_TI1_HSE_32: TIM17 TI1 is connected to HSE div 32
EricLew	0:80ee8f3b695e	2481	* @arg TIM_TIM17_TI1_MCO: TIM17 TI1 is connected to MCO
EricLew	0:80ee8f3b695e	2482	*
EricLew	0:80ee8f3b695e	2483	* @retval HAL status
EricLew	0:80ee8f3b695e	2484	*/
EricLew	0:80ee8f3b695e	2485	HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap)
EricLew	0:80ee8f3b695e	2486	{
EricLew	0:80ee8f3b695e	2487	uint32_t tmpor1 = 0;
EricLew	0:80ee8f3b695e	2488	uint32_t tmpor2 = 0;
EricLew	0:80ee8f3b695e	2489
EricLew	0:80ee8f3b695e	2490	__HAL_LOCK(htim);
EricLew	0:80ee8f3b695e	2491
EricLew	0:80ee8f3b695e	2492	/* Check parameters */
EricLew	0:80ee8f3b695e	2493	assert_param(IS_TIM_REMAP_INSTANCE(htim->Instance));
EricLew	0:80ee8f3b695e	2494	assert_param(IS_TIM_REMAP(Remap));
EricLew	0:80ee8f3b695e	2495
EricLew	0:80ee8f3b695e	2496	/* Set ETR_SEL bit field (if required) */
EricLew	0:80ee8f3b695e	2497	if (IS_TIM_ETRSEL_INSTANCE(htim->Instance))
EricLew	0:80ee8f3b695e	2498	{
EricLew	0:80ee8f3b695e	2499	tmpor2 = htim->Instance->OR2;
EricLew	0:80ee8f3b695e	2500	tmpor2 &= ~TIMx_ETRSEL_MASK;
EricLew	0:80ee8f3b695e	2501	tmpor2 \|= (Remap & TIMx_ETRSEL_MASK);
EricLew	0:80ee8f3b695e	2502
EricLew	0:80ee8f3b695e	2503	/* Set TIMx_OR2 */
EricLew	0:80ee8f3b695e	2504	htim->Instance->OR2 = tmpor2;
EricLew	0:80ee8f3b695e	2505	}
EricLew	0:80ee8f3b695e	2506
EricLew	0:80ee8f3b695e	2507	/* Set other remapping capabilities */
EricLew	0:80ee8f3b695e	2508	tmpor1 = Remap;
EricLew	0:80ee8f3b695e	2509	tmpor1 &= ~TIMx_ETRSEL_MASK;
EricLew	0:80ee8f3b695e	2510
EricLew	0:80ee8f3b695e	2511	/* Set TIMx_OR1 */
EricLew	0:80ee8f3b695e	2512	htim->Instance->OR1 = Remap;
EricLew	0:80ee8f3b695e	2513
EricLew	0:80ee8f3b695e	2514	/* Set TIMx_OR1 */
EricLew	0:80ee8f3b695e	2515	htim->Instance->OR1 = tmpor1;
EricLew	0:80ee8f3b695e	2516
EricLew	0:80ee8f3b695e	2517	htim->State = HAL_TIM_STATE_READY;
EricLew	0:80ee8f3b695e	2518
EricLew	0:80ee8f3b695e	2519	__HAL_UNLOCK(htim);
EricLew	0:80ee8f3b695e	2520
EricLew	0:80ee8f3b695e	2521	return HAL_OK;
EricLew	0:80ee8f3b695e	2522	}
EricLew	0:80ee8f3b695e	2523
EricLew	0:80ee8f3b695e	2524	/**
EricLew	0:80ee8f3b695e	2525	* @brief Group channel 5 and channel 1, 2 or 3
EricLew	0:80ee8f3b695e	2526	* @param htim: TIM handle.
EricLew	0:80ee8f3b695e	2527	* @param Channels: specifies the reference signal(s) the OC5REF is combined with.
EricLew	0:80ee8f3b695e	2528	* This parameter can be any combination of the following values:
EricLew	0:80ee8f3b695e	2529	* TIM_GROUPCH5_NONE: No effect of OC5REF on OC1REFC, OC2REFC and OC3REFC
EricLew	0:80ee8f3b695e	2530	* TIM_GROUPCH5_OC1REFC: OC1REFC is the logical AND of OC1REFC and OC5REF
EricLew	0:80ee8f3b695e	2531	* TIM_GROUPCH5_OC2REFC: OC2REFC is the logical AND of OC2REFC and OC5REF
EricLew	0:80ee8f3b695e	2532	* TIM_GROUPCH5_OC3REFC: OC3REFC is the logical AND of OC3REFC and OC5REF
EricLew	0:80ee8f3b695e	2533	* @retval HAL status
EricLew	0:80ee8f3b695e	2534	*/
EricLew	0:80ee8f3b695e	2535	HAL_StatusTypeDef HAL_TIMEx_GroupChannel5(TIM_HandleTypeDef *htim, uint32_t Channels)
EricLew	0:80ee8f3b695e	2536	{
EricLew	0:80ee8f3b695e	2537	/* Check parameters */
EricLew	0:80ee8f3b695e	2538	assert_param(IS_TIM_COMBINED3PHASEPWM_INSTANCE(htim->Instance));
EricLew	0:80ee8f3b695e	2539	assert_param(IS_TIM_GROUPCH5(Channels));
EricLew	0:80ee8f3b695e	2540
EricLew	0:80ee8f3b695e	2541	/* Process Locked */
EricLew	0:80ee8f3b695e	2542	__HAL_LOCK(htim);
EricLew	0:80ee8f3b695e	2543
EricLew	0:80ee8f3b695e	2544	htim->State = HAL_TIM_STATE_BUSY;
EricLew	0:80ee8f3b695e	2545
EricLew	0:80ee8f3b695e	2546	/* Clear GC5Cx bit fields */
EricLew	0:80ee8f3b695e	2547	htim->Instance->CCR5 &= ~(TIM_CCR5_GC5C3\|TIM_CCR5_GC5C2\|TIM_CCR5_GC5C1);
EricLew	0:80ee8f3b695e	2548
EricLew	0:80ee8f3b695e	2549	/* Set GC5Cx bit fields */
EricLew	0:80ee8f3b695e	2550	htim->Instance->CCR5 \|= Channels;
EricLew	0:80ee8f3b695e	2551
EricLew	0:80ee8f3b695e	2552	htim->State = HAL_TIM_STATE_READY;
EricLew	0:80ee8f3b695e	2553
EricLew	0:80ee8f3b695e	2554	__HAL_UNLOCK(htim);
EricLew	0:80ee8f3b695e	2555
EricLew	0:80ee8f3b695e	2556	return HAL_OK;
EricLew	0:80ee8f3b695e	2557	}
EricLew	0:80ee8f3b695e	2558
EricLew	0:80ee8f3b695e	2559	/**
EricLew	0:80ee8f3b695e	2560	* @}
EricLew	0:80ee8f3b695e	2561	*/
EricLew	0:80ee8f3b695e	2562
EricLew	0:80ee8f3b695e	2563	/** @defgroup TIMEx_Exported_Functions_Group6 Extended Callbacks functions
EricLew	0:80ee8f3b695e	2564	* @brief Extended Callbacks functions
EricLew	0:80ee8f3b695e	2565	*
EricLew	0:80ee8f3b695e	2566	@verbatim
EricLew	0:80ee8f3b695e	2567	==============================================================================
EricLew	0:80ee8f3b695e	2568	##### Extended Callbacks functions #####
EricLew	0:80ee8f3b695e	2569	==============================================================================
EricLew	0:80ee8f3b695e	2570	[..]
EricLew	0:80ee8f3b695e	2571	This section provides Extended TIM callback functions:
EricLew	0:80ee8f3b695e	2572	(+) Timer Commutation callback
EricLew	0:80ee8f3b695e	2573	(+) Timer Break callback
EricLew	0:80ee8f3b695e	2574
EricLew	0:80ee8f3b695e	2575	@endverbatim
EricLew	0:80ee8f3b695e	2576	* @{
EricLew	0:80ee8f3b695e	2577	*/
EricLew	0:80ee8f3b695e	2578
EricLew	0:80ee8f3b695e	2579	/**
EricLew	0:80ee8f3b695e	2580	* @brief Hall commutation changed callback in non-blocking mode
EricLew	0:80ee8f3b695e	2581	* @param htim : TIM handle
EricLew	0:80ee8f3b695e	2582	* @retval None
EricLew	0:80ee8f3b695e	2583	*/
EricLew	0:80ee8f3b695e	2584	__weak void HAL_TIMEx_CommutationCallback(TIM_HandleTypeDef *htim)
EricLew	0:80ee8f3b695e	2585	{
EricLew	0:80ee8f3b695e	2586	/* NOTE : This function should not be modified, when the callback is needed,
EricLew	0:80ee8f3b695e	2587	the HAL_TIMEx_CommutationCallback could be implemented in the user file
EricLew	0:80ee8f3b695e	2588	*/
EricLew	0:80ee8f3b695e	2589	}
EricLew	0:80ee8f3b695e	2590
EricLew	0:80ee8f3b695e	2591	/**
EricLew	0:80ee8f3b695e	2592	* @brief Hall Break detection callback in non-blocking mode
EricLew	0:80ee8f3b695e	2593	* @param htim : TIM handle
EricLew	0:80ee8f3b695e	2594	* @retval None
EricLew	0:80ee8f3b695e	2595	*/
EricLew	0:80ee8f3b695e	2596	__weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim)
EricLew	0:80ee8f3b695e	2597	{
EricLew	0:80ee8f3b695e	2598	/* NOTE : This function should not be modified, when the callback is needed,
EricLew	0:80ee8f3b695e	2599	the HAL_TIMEx_BreakCallback could be implemented in the user file
EricLew	0:80ee8f3b695e	2600	*/
EricLew	0:80ee8f3b695e	2601	}
EricLew	0:80ee8f3b695e	2602
EricLew	0:80ee8f3b695e	2603	/**
EricLew	0:80ee8f3b695e	2604	* @}
EricLew	0:80ee8f3b695e	2605	*/
EricLew	0:80ee8f3b695e	2606
EricLew	0:80ee8f3b695e	2607	/** @defgroup TIMEx_Exported_Functions_Group7 Extended Peripheral State functions
EricLew	0:80ee8f3b695e	2608	* @brief Extended Peripheral State functions
EricLew	0:80ee8f3b695e	2609	*
EricLew	0:80ee8f3b695e	2610	@verbatim
EricLew	0:80ee8f3b695e	2611	==============================================================================
EricLew	0:80ee8f3b695e	2612	##### Extended Peripheral State functions #####
EricLew	0:80ee8f3b695e	2613	==============================================================================
EricLew	0:80ee8f3b695e	2614	[..]
EricLew	0:80ee8f3b695e	2615	This subsection permits to get in run-time the status of the peripheral
EricLew	0:80ee8f3b695e	2616	and the data flow.
EricLew	0:80ee8f3b695e	2617
EricLew	0:80ee8f3b695e	2618	@endverbatim
EricLew	0:80ee8f3b695e	2619	* @{
EricLew	0:80ee8f3b695e	2620	*/
EricLew	0:80ee8f3b695e	2621
EricLew	0:80ee8f3b695e	2622	/**
EricLew	0:80ee8f3b695e	2623	* @brief Return the TIM Hall Sensor interface handle state.
EricLew	0:80ee8f3b695e	2624	* @param htim: TIM Hall Sensor handle
EricLew	0:80ee8f3b695e	2625	* @retval HAL state
EricLew	0:80ee8f3b695e	2626	*/
EricLew	0:80ee8f3b695e	2627	HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim)
EricLew	0:80ee8f3b695e	2628	{
EricLew	0:80ee8f3b695e	2629	return htim->State;
EricLew	0:80ee8f3b695e	2630	}
EricLew	0:80ee8f3b695e	2631
EricLew	0:80ee8f3b695e	2632	/**
EricLew	0:80ee8f3b695e	2633	* @}
EricLew	0:80ee8f3b695e	2634	*/
EricLew	0:80ee8f3b695e	2635
EricLew	0:80ee8f3b695e	2636	/**
EricLew	0:80ee8f3b695e	2637	* @brief TIM DMA Commutation callback.
EricLew	0:80ee8f3b695e	2638	* @param hdma : pointer to DMA handle.
EricLew	0:80ee8f3b695e	2639	* @retval None
EricLew	0:80ee8f3b695e	2640	*/
EricLew	0:80ee8f3b695e	2641	void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma)
EricLew	0:80ee8f3b695e	2642	{
EricLew	0:80ee8f3b695e	2643	TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
EricLew	0:80ee8f3b695e	2644
EricLew	0:80ee8f3b695e	2645	htim->State= HAL_TIM_STATE_READY;
EricLew	0:80ee8f3b695e	2646
EricLew	0:80ee8f3b695e	2647	HAL_TIMEx_CommutationCallback(htim);
EricLew	0:80ee8f3b695e	2648	}
EricLew	0:80ee8f3b695e	2649
EricLew	0:80ee8f3b695e	2650	/**
EricLew	0:80ee8f3b695e	2651	* @brief Enables or disables the TIM Capture Compare Channel xN.
EricLew	0:80ee8f3b695e	2652	* @param TIMx to select the TIM peripheral
EricLew	0:80ee8f3b695e	2653	* @param Channel: specifies the TIM Channel
EricLew	0:80ee8f3b695e	2654	* This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	2655	* @arg TIM_Channel_1: TIM Channel 1
EricLew	0:80ee8f3b695e	2656	* @arg TIM_Channel_2: TIM Channel 2
EricLew	0:80ee8f3b695e	2657	* @arg TIM_Channel_3: TIM Channel 3
EricLew	0:80ee8f3b695e	2658	* @param ChannelNState: specifies the TIM Channel CCxNE bit new state.
EricLew	0:80ee8f3b695e	2659	* This parameter can be: TIM_CCxN_ENABLE or TIM_CCxN_Disable.
EricLew	0:80ee8f3b695e	2660	* @retval None
EricLew	0:80ee8f3b695e	2661	*/
EricLew	0:80ee8f3b695e	2662	static void TIM_CCxNChannelCmd(TIM_TypeDef* TIMx, uint32_t Channel, uint32_t ChannelNState)
EricLew	0:80ee8f3b695e	2663	{
EricLew	0:80ee8f3b695e	2664	uint32_t tmp = 0;
EricLew	0:80ee8f3b695e	2665
EricLew	0:80ee8f3b695e	2666	tmp = TIM_CCER_CC1NE << Channel;
EricLew	0:80ee8f3b695e	2667
EricLew	0:80ee8f3b695e	2668	/* Reset the CCxNE Bit */
EricLew	0:80ee8f3b695e	2669	TIMx->CCER &= ~tmp;
EricLew	0:80ee8f3b695e	2670
EricLew	0:80ee8f3b695e	2671	/* Set or reset the CCxNE Bit */
EricLew	0:80ee8f3b695e	2672	TIMx->CCER \|= (uint32_t)(ChannelNState << Channel);
EricLew	0:80ee8f3b695e	2673	}
EricLew	0:80ee8f3b695e	2674
EricLew	0:80ee8f3b695e	2675	/**
EricLew	0:80ee8f3b695e	2676	* @}
EricLew	0:80ee8f3b695e	2677	*/
EricLew	0:80ee8f3b695e	2678
EricLew	0:80ee8f3b695e	2679	#endif /* HAL_TIM_MODULE_ENABLED */
EricLew	0:80ee8f3b695e	2680	/**
EricLew	0:80ee8f3b695e	2681	* @}
EricLew	0:80ee8f3b695e	2682	*/
EricLew	0:80ee8f3b695e	2683
EricLew	0:80ee8f3b695e	2684	/**
EricLew	0:80ee8f3b695e	2685	* @}
EricLew	0:80ee8f3b695e	2686	*/
EricLew	0:80ee8f3b695e	2687
EricLew	0:80ee8f3b695e	2688	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/
EricLew	0:80ee8f3b695e	2689

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Type:	Library
Created:	02 Nov 2015
Imports:	1072
Forks:	1
Commits:	1
Dependents:	0
Dependencies:	0
Followers:	42

Src/stm32l4xx_hal_tim_ex.c@0:80ee8f3b695e, 2015-11-02 (annotated)

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