STM32L4xx_HAL_Driver - L4 HAL Drivers

Senior Design: Sound Monitor » Code » STM32L4xx_HAL_Driver

Senior Design: Sound Monitor / STM32L4xx_HAL_Driver

L4 HAL Drivers

Src/stm32l4xx_hal_spi.c@0:80ee8f3b695e, 2015-11-02 (annotated)

Committer:: EricLew
Date:: Mon Nov 02 19:37:23 2015 +0000
Revision:: 0:80ee8f3b695e

Errors are with definitions of LCD and QSPI functions. I believe all .h and .c files are  uploaded, but there may need to be certain functions called.

Who changed what in which revision?

User	Revision	Line number	New contents of line
EricLew	0:80ee8f3b695e	1	/**
EricLew	0:80ee8f3b695e	2	******************************************************************************
EricLew	0:80ee8f3b695e	3	* @file stm32l4xx_hal_spi.c
EricLew	0:80ee8f3b695e	4	* @author MCD Application Team
EricLew	0:80ee8f3b695e	5	* @version V1.1.0
EricLew	0:80ee8f3b695e	6	* @date 16-September-2015
EricLew	0:80ee8f3b695e	7	* @brief SPI HAL module driver.
EricLew	0:80ee8f3b695e	8	* This file provides firmware functions to manage the following
EricLew	0:80ee8f3b695e	9	* functionalities of the Serial Peripheral Interface (SPI) peripheral:
EricLew	0:80ee8f3b695e	10	* + Initialization and de-initialization functions
EricLew	0:80ee8f3b695e	11	* + IO operation functions
EricLew	0:80ee8f3b695e	12	* + Peripheral Control functions
EricLew	0:80ee8f3b695e	13	* + Peripheral State functions
EricLew	0:80ee8f3b695e	14	*
EricLew	0:80ee8f3b695e	15	@verbatim
EricLew	0:80ee8f3b695e	16	==============================================================================
EricLew	0:80ee8f3b695e	17	##### How to use this driver #####
EricLew	0:80ee8f3b695e	18	==============================================================================
EricLew	0:80ee8f3b695e	19	[..]
EricLew	0:80ee8f3b695e	20	The SPI HAL driver can be used as follows:
EricLew	0:80ee8f3b695e	21
EricLew	0:80ee8f3b695e	22	(#) Declare a SPI_HandleTypeDef handle structure, for example:
EricLew	0:80ee8f3b695e	23	SPI_HandleTypeDef hspi;
EricLew	0:80ee8f3b695e	24
EricLew	0:80ee8f3b695e	25	(#)Initialize the SPI low level resources by implementing the HAL_SPI_MspInit() API:
EricLew	0:80ee8f3b695e	26	(##) Enable the SPIx interface clock
EricLew	0:80ee8f3b695e	27	(##) SPI pins configuration
EricLew	0:80ee8f3b695e	28	(+++) Enable the clock for the SPI GPIOs
EricLew	0:80ee8f3b695e	29	(+++) Configure these SPI pins as alternate function push-pull
EricLew	0:80ee8f3b695e	30	(##) NVIC configuration if you need to use interrupt process
EricLew	0:80ee8f3b695e	31	(+++) Configure the SPIx interrupt priority
EricLew	0:80ee8f3b695e	32	(+++) Enable the NVIC SPI IRQ handle
EricLew	0:80ee8f3b695e	33	(##) DMA Configuration if you need to use DMA process
EricLew	0:80ee8f3b695e	34	(+++) Declare a DMA_HandleTypeDef handle structure for the transmit or receive channel
EricLew	0:80ee8f3b695e	35	(+++) Enable the DMAx clock
EricLew	0:80ee8f3b695e	36	(+++) Configure the DMA handle parameters
EricLew	0:80ee8f3b695e	37	(+++) Configure the DMA Tx or Rx channel
EricLew	0:80ee8f3b695e	38	(+++) Associate the initialized hdma_tx handle to the hspi DMA Tx or Rx handle
EricLew	0:80ee8f3b695e	39	(+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the DMA Tx or Rx channel
EricLew	0:80ee8f3b695e	40
EricLew	0:80ee8f3b695e	41	(#) Program the Mode, BidirectionalMode , Data size, Baudrate Prescaler, NSS
EricLew	0:80ee8f3b695e	42	management, Clock polarity and phase, FirstBit and CRC configuration in the hspi Init structure.
EricLew	0:80ee8f3b695e	43
EricLew	0:80ee8f3b695e	44	(#) Initialize the SPI registers by calling the HAL_SPI_Init() API:
EricLew	0:80ee8f3b695e	45	(++) This API configures also the low level Hardware GPIO, CLOCK, CORTEX...etc)
EricLew	0:80ee8f3b695e	46	by calling the customized HAL_SPI_MspInit() API.
EricLew	0:80ee8f3b695e	47	[..]
EricLew	0:80ee8f3b695e	48	Circular mode restriction:
EricLew	0:80ee8f3b695e	49	(#) The DMA circular mode cannot be used when the SPI is configured in these modes:
EricLew	0:80ee8f3b695e	50	(##) Master 2Lines RxOnly
EricLew	0:80ee8f3b695e	51	(##) Master 1Line Rx
EricLew	0:80ee8f3b695e	52	(#) The CRC feature is not managed when the DMA circular mode is enabled
EricLew	0:80ee8f3b695e	53	(#) When the SPI DMA Pause/Stop features are used, we must use the following APIs
EricLew	0:80ee8f3b695e	54	the HAL_SPI_DMAPause()/ HAL_SPI_DMAStop() only under the SPI callbacks
EricLew	0:80ee8f3b695e	55
EricLew	0:80ee8f3b695e	56	@endverbatim
EricLew	0:80ee8f3b695e	57	******************************************************************************
EricLew	0:80ee8f3b695e	58	* @attention
EricLew	0:80ee8f3b695e	59	*
EricLew	0:80ee8f3b695e	60	* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
EricLew	0:80ee8f3b695e	61	*
EricLew	0:80ee8f3b695e	62	* Redistribution and use in source and binary forms, with or without modification,
EricLew	0:80ee8f3b695e	63	* are permitted provided that the following conditions are met:
EricLew	0:80ee8f3b695e	64	* 1. Redistributions of source code must retain the above copyright notice,
EricLew	0:80ee8f3b695e	65	* this list of conditions and the following disclaimer.
EricLew	0:80ee8f3b695e	66	* 2. Redistributions in binary form must reproduce the above copyright notice,
EricLew	0:80ee8f3b695e	67	* this list of conditions and the following disclaimer in the documentation
EricLew	0:80ee8f3b695e	68	* and/or other materials provided with the distribution.
EricLew	0:80ee8f3b695e	69	* 3. Neither the name of STMicroelectronics nor the names of its contributors
EricLew	0:80ee8f3b695e	70	* may be used to endorse or promote products derived from this software
EricLew	0:80ee8f3b695e	71	* without specific prior written permission.
EricLew	0:80ee8f3b695e	72	*
EricLew	0:80ee8f3b695e	73	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
EricLew	0:80ee8f3b695e	74	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
EricLew	0:80ee8f3b695e	75	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
EricLew	0:80ee8f3b695e	76	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
EricLew	0:80ee8f3b695e	77	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
EricLew	0:80ee8f3b695e	78	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
EricLew	0:80ee8f3b695e	79	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
EricLew	0:80ee8f3b695e	80	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
EricLew	0:80ee8f3b695e	81	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
EricLew	0:80ee8f3b695e	82	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
EricLew	0:80ee8f3b695e	83	*
EricLew	0:80ee8f3b695e	84	******************************************************************************
EricLew	0:80ee8f3b695e	85	*/
EricLew	0:80ee8f3b695e	86
EricLew	0:80ee8f3b695e	87	/* Includes ------------------------------------------------------------------*/
EricLew	0:80ee8f3b695e	88	#include "stm32l4xx_hal.h"
EricLew	0:80ee8f3b695e	89
EricLew	0:80ee8f3b695e	90	/** @addtogroup STM32L4xx_HAL_Driver
EricLew	0:80ee8f3b695e	91	* @{
EricLew	0:80ee8f3b695e	92	*/
EricLew	0:80ee8f3b695e	93
EricLew	0:80ee8f3b695e	94	/** @defgroup SPI SPI
EricLew	0:80ee8f3b695e	95	* @brief SPI HAL module driver
EricLew	0:80ee8f3b695e	96	* @{
EricLew	0:80ee8f3b695e	97	*/
EricLew	0:80ee8f3b695e	98	#ifdef HAL_SPI_MODULE_ENABLED
EricLew	0:80ee8f3b695e	99
EricLew	0:80ee8f3b695e	100	/* Private typedef -----------------------------------------------------------*/
EricLew	0:80ee8f3b695e	101	/* Private defines -----------------------------------------------------------*/
EricLew	0:80ee8f3b695e	102	/** @defgroup SPI_Private_Constants SPI Private Constants
EricLew	0:80ee8f3b695e	103	* @{
EricLew	0:80ee8f3b695e	104	*/
EricLew	0:80ee8f3b695e	105	#define SPI_DEFAULT_TIMEOUT 50
EricLew	0:80ee8f3b695e	106	/**
EricLew	0:80ee8f3b695e	107	* @}
EricLew	0:80ee8f3b695e	108	*/
EricLew	0:80ee8f3b695e	109
EricLew	0:80ee8f3b695e	110	/* Private macros ------------------------------------------------------------*/
EricLew	0:80ee8f3b695e	111	/* Private variables ---------------------------------------------------------*/
EricLew	0:80ee8f3b695e	112	/* Private function prototypes -----------------------------------------------*/
EricLew	0:80ee8f3b695e	113	/** @defgroup SPI_Private_Functions SPI Private Functions
EricLew	0:80ee8f3b695e	114	* @{
EricLew	0:80ee8f3b695e	115	*/
EricLew	0:80ee8f3b695e	116	static void SPI_DMATransmitCplt(DMA_HandleTypeDef *hdma);
EricLew	0:80ee8f3b695e	117	static void SPI_DMAReceiveCplt(DMA_HandleTypeDef *hdma);
EricLew	0:80ee8f3b695e	118	static void SPI_DMATransmitReceiveCplt(DMA_HandleTypeDef *hdma);
EricLew	0:80ee8f3b695e	119	static void SPI_DMAHalfTransmitCplt(DMA_HandleTypeDef *hdma);
EricLew	0:80ee8f3b695e	120	static void SPI_DMAHalfReceiveCplt(DMA_HandleTypeDef *hdma);
EricLew	0:80ee8f3b695e	121	static void SPI_DMAHalfTransmitReceiveCplt(DMA_HandleTypeDef *hdma);
EricLew	0:80ee8f3b695e	122	static void SPI_DMAError(DMA_HandleTypeDef *hdma);
EricLew	0:80ee8f3b695e	123	static HAL_StatusTypeDef SPI_WaitFlagStateUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Flag, uint32_t State, uint32_t Timeout);
EricLew	0:80ee8f3b695e	124	static HAL_StatusTypeDef SPI_WaitFifoStateUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Fifo, uint32_t State, uint32_t Timeout);
EricLew	0:80ee8f3b695e	125	static void SPI_TxISR_8BIT(struct __SPI_HandleTypeDef *hspi);
EricLew	0:80ee8f3b695e	126	static void SPI_TxISR_16BIT(struct __SPI_HandleTypeDef *hspi);
EricLew	0:80ee8f3b695e	127	static void SPI_RxISR_8BIT(struct __SPI_HandleTypeDef *hspi);
EricLew	0:80ee8f3b695e	128	static void SPI_RxISR_8BITCRC(struct __SPI_HandleTypeDef *hspi);
EricLew	0:80ee8f3b695e	129	static void SPI_RxISR_16BIT(struct __SPI_HandleTypeDef *hspi);
EricLew	0:80ee8f3b695e	130	static void SPI_RxISR_16BITCRC(struct __SPI_HandleTypeDef *hspi);
EricLew	0:80ee8f3b695e	131	static void SPI_2linesRxISR_8BIT(struct __SPI_HandleTypeDef *hspi);
EricLew	0:80ee8f3b695e	132	static void SPI_2linesRxISR_8BITCRC(struct __SPI_HandleTypeDef *hspi);
EricLew	0:80ee8f3b695e	133	static void SPI_2linesTxISR_8BIT(struct __SPI_HandleTypeDef *hspi);
EricLew	0:80ee8f3b695e	134	static void SPI_2linesTxISR_16BIT(struct __SPI_HandleTypeDef *hspi);
EricLew	0:80ee8f3b695e	135	static void SPI_2linesRxISR_16BIT(struct __SPI_HandleTypeDef *hspi);
EricLew	0:80ee8f3b695e	136	static void SPI_2linesRxISR_16BITCRC(struct __SPI_HandleTypeDef *hspi);
EricLew	0:80ee8f3b695e	137	static void SPI_CloseRxTx_ISR(SPI_HandleTypeDef *hspi);
EricLew	0:80ee8f3b695e	138	static void SPI_CloseRx_ISR(SPI_HandleTypeDef *hspi);
EricLew	0:80ee8f3b695e	139	static void SPI_CloseTx_ISR(SPI_HandleTypeDef *hspi);
EricLew	0:80ee8f3b695e	140	static HAL_StatusTypeDef SPI_EndRxTransaction(SPI_HandleTypeDef *hspi, uint32_t Timeout);
EricLew	0:80ee8f3b695e	141	static HAL_StatusTypeDef SPI_EndRxTxTransaction(SPI_HandleTypeDef *hspi, uint32_t Timeout);
EricLew	0:80ee8f3b695e	142	/**
EricLew	0:80ee8f3b695e	143	* @}
EricLew	0:80ee8f3b695e	144	*/
EricLew	0:80ee8f3b695e	145
EricLew	0:80ee8f3b695e	146	/* Exported functions ---------------------------------------------------------*/
EricLew	0:80ee8f3b695e	147
EricLew	0:80ee8f3b695e	148	/** @defgroup SPI_Exported_Functions SPI Exported Functions
EricLew	0:80ee8f3b695e	149	* @{
EricLew	0:80ee8f3b695e	150	*/
EricLew	0:80ee8f3b695e	151
EricLew	0:80ee8f3b695e	152	/** @defgroup SPI_Exported_Functions_Group1 Initialization and de-initialization functions
EricLew	0:80ee8f3b695e	153	* @brief Initialization and Configuration functions
EricLew	0:80ee8f3b695e	154	*
EricLew	0:80ee8f3b695e	155	@verbatim
EricLew	0:80ee8f3b695e	156	===============================================================================
EricLew	0:80ee8f3b695e	157	##### Initialization and de-initialization functions #####
EricLew	0:80ee8f3b695e	158	===============================================================================
EricLew	0:80ee8f3b695e	159	[..] This subsection provides a set of functions allowing to initialize and
EricLew	0:80ee8f3b695e	160	de-initialize the SPIx peripheral:
EricLew	0:80ee8f3b695e	161
EricLew	0:80ee8f3b695e	162	(+) User must implement HAL_SPI_MspInit() function in which he configures
EricLew	0:80ee8f3b695e	163	all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ).
EricLew	0:80ee8f3b695e	164
EricLew	0:80ee8f3b695e	165	(+) Call the function HAL_SPI_Init() to configure the selected device with
EricLew	0:80ee8f3b695e	166	the selected configuration:
EricLew	0:80ee8f3b695e	167	(++) Mode
EricLew	0:80ee8f3b695e	168	(++) Direction
EricLew	0:80ee8f3b695e	169	(++) Data Size
EricLew	0:80ee8f3b695e	170	(++) Clock Polarity and Phase
EricLew	0:80ee8f3b695e	171	(++) NSS Management
EricLew	0:80ee8f3b695e	172	(++) BaudRate Prescaler
EricLew	0:80ee8f3b695e	173	(++) FirstBit
EricLew	0:80ee8f3b695e	174	(++) TIMode
EricLew	0:80ee8f3b695e	175	(++) CRC Calculation
EricLew	0:80ee8f3b695e	176	(++) CRC Polynomial if CRC enabled
EricLew	0:80ee8f3b695e	177	(++) CRC Length, used only with Data8 and Data16
EricLew	0:80ee8f3b695e	178	(++) FIFO reception threshold
EricLew	0:80ee8f3b695e	179
EricLew	0:80ee8f3b695e	180	(+) Call the function HAL_SPI_DeInit() to restore the default configuration
EricLew	0:80ee8f3b695e	181	of the selected SPIx peripheral.
EricLew	0:80ee8f3b695e	182
EricLew	0:80ee8f3b695e	183	@endverbatim
EricLew	0:80ee8f3b695e	184	* @{
EricLew	0:80ee8f3b695e	185	*/
EricLew	0:80ee8f3b695e	186
EricLew	0:80ee8f3b695e	187	/**
EricLew	0:80ee8f3b695e	188	* @brief Initialize the SPI according to the specified parameters
EricLew	0:80ee8f3b695e	189	* in the SPI_InitTypeDef and initialize the associated handle.
EricLew	0:80ee8f3b695e	190	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
EricLew	0:80ee8f3b695e	191	* the configuration information for SPI module.
EricLew	0:80ee8f3b695e	192	* @retval HAL status
EricLew	0:80ee8f3b695e	193	*/
EricLew	0:80ee8f3b695e	194	HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi)
EricLew	0:80ee8f3b695e	195	{
EricLew	0:80ee8f3b695e	196	uint32_t frxth;
EricLew	0:80ee8f3b695e	197
EricLew	0:80ee8f3b695e	198	/* Check the SPI handle allocation */
EricLew	0:80ee8f3b695e	199	if(hspi == NULL)
EricLew	0:80ee8f3b695e	200	{
EricLew	0:80ee8f3b695e	201	return HAL_ERROR;
EricLew	0:80ee8f3b695e	202	}
EricLew	0:80ee8f3b695e	203
EricLew	0:80ee8f3b695e	204	/* Check the parameters */
EricLew	0:80ee8f3b695e	205	assert_param(IS_SPI_ALL_INSTANCE(hspi->Instance));
EricLew	0:80ee8f3b695e	206	assert_param(IS_SPI_MODE(hspi->Init.Mode));
EricLew	0:80ee8f3b695e	207	assert_param(IS_SPI_DIRECTION(hspi->Init.Direction));
EricLew	0:80ee8f3b695e	208	assert_param(IS_SPI_DATASIZE(hspi->Init.DataSize));
EricLew	0:80ee8f3b695e	209	assert_param(IS_SPI_CPOL(hspi->Init.CLKPolarity));
EricLew	0:80ee8f3b695e	210	assert_param(IS_SPI_CPHA(hspi->Init.CLKPhase));
EricLew	0:80ee8f3b695e	211	assert_param(IS_SPI_NSS(hspi->Init.NSS));
EricLew	0:80ee8f3b695e	212	assert_param(IS_SPI_NSSP(hspi->Init.NSSPMode));
EricLew	0:80ee8f3b695e	213	assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler));
EricLew	0:80ee8f3b695e	214	assert_param(IS_SPI_FIRST_BIT(hspi->Init.FirstBit));
EricLew	0:80ee8f3b695e	215	assert_param(IS_SPI_TIMODE(hspi->Init.TIMode));
EricLew	0:80ee8f3b695e	216	assert_param(IS_SPI_CRC_CALCULATION(hspi->Init.CRCCalculation));
EricLew	0:80ee8f3b695e	217	assert_param(IS_SPI_CRC_POLYNOMIAL(hspi->Init.CRCPolynomial));
EricLew	0:80ee8f3b695e	218	assert_param(IS_SPI_CRC_LENGTH(hspi->Init.CRCLength));
EricLew	0:80ee8f3b695e	219
EricLew	0:80ee8f3b695e	220	if(hspi->State == HAL_SPI_STATE_RESET)
EricLew	0:80ee8f3b695e	221	{
EricLew	0:80ee8f3b695e	222	/* Allocate lock resource and initialize it */
EricLew	0:80ee8f3b695e	223	hspi->Lock = HAL_UNLOCKED;
EricLew	0:80ee8f3b695e	224
EricLew	0:80ee8f3b695e	225	/* Init the low level hardware : GPIO, CLOCK, NVIC... */
EricLew	0:80ee8f3b695e	226	HAL_SPI_MspInit(hspi);
EricLew	0:80ee8f3b695e	227	}
EricLew	0:80ee8f3b695e	228
EricLew	0:80ee8f3b695e	229	hspi->State = HAL_SPI_STATE_BUSY;
EricLew	0:80ee8f3b695e	230
EricLew	0:80ee8f3b695e	231	/* Disable the selected SPI peripheral */
EricLew	0:80ee8f3b695e	232	__HAL_SPI_DISABLE(hspi);
EricLew	0:80ee8f3b695e	233
EricLew	0:80ee8f3b695e	234	/* Align by default the rs fifo threshold on the data size */
EricLew	0:80ee8f3b695e	235	if(hspi->Init.DataSize > SPI_DATASIZE_8BIT)
EricLew	0:80ee8f3b695e	236	{
EricLew	0:80ee8f3b695e	237	frxth = SPI_RXFIFO_THRESHOLD_HF;
EricLew	0:80ee8f3b695e	238	}
EricLew	0:80ee8f3b695e	239	else
EricLew	0:80ee8f3b695e	240	{
EricLew	0:80ee8f3b695e	241	frxth = SPI_RXFIFO_THRESHOLD_QF;
EricLew	0:80ee8f3b695e	242	}
EricLew	0:80ee8f3b695e	243
EricLew	0:80ee8f3b695e	244	/* CRC calculation is valid only for 16Bit and 8 Bit */
EricLew	0:80ee8f3b695e	245	if(( hspi->Init.DataSize != SPI_DATASIZE_16BIT ) && ( hspi->Init.DataSize != SPI_DATASIZE_8BIT ))
EricLew	0:80ee8f3b695e	246	{
EricLew	0:80ee8f3b695e	247	/* CRC must be disabled */
EricLew	0:80ee8f3b695e	248	hspi->Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
EricLew	0:80ee8f3b695e	249	}
EricLew	0:80ee8f3b695e	250
EricLew	0:80ee8f3b695e	251	/* Align the CRC Length on the data size */
EricLew	0:80ee8f3b695e	252	if( hspi->Init.CRCLength == SPI_CRC_LENGTH_DATASIZE)
EricLew	0:80ee8f3b695e	253	{
EricLew	0:80ee8f3b695e	254	/* CRC Length aligned on the data size : value set by default */
EricLew	0:80ee8f3b695e	255	if(hspi->Init.DataSize > SPI_DATASIZE_8BIT)
EricLew	0:80ee8f3b695e	256	{
EricLew	0:80ee8f3b695e	257	hspi->Init.CRCLength = SPI_CRC_LENGTH_16BIT;
EricLew	0:80ee8f3b695e	258	}
EricLew	0:80ee8f3b695e	259	else
EricLew	0:80ee8f3b695e	260	{
EricLew	0:80ee8f3b695e	261	hspi->Init.CRCLength = SPI_CRC_LENGTH_8BIT;
EricLew	0:80ee8f3b695e	262	}
EricLew	0:80ee8f3b695e	263	}
EricLew	0:80ee8f3b695e	264
EricLew	0:80ee8f3b695e	265	/---------------------------- SPIx CR1 & CR2 Configuration ------------------------/
EricLew	0:80ee8f3b695e	266	/* Configure : SPI Mode, Communication Mode, Clock polarity and phase, NSS management,
EricLew	0:80ee8f3b695e	267	Communication speed, First bit, CRC calculation state, CRC Length */
EricLew	0:80ee8f3b695e	268	hspi->Instance->CR1 = (hspi->Init.Mode \| hspi->Init.Direction \|
EricLew	0:80ee8f3b695e	269	hspi->Init.CLKPolarity \| hspi->Init.CLKPhase \| (hspi->Init.NSS & SPI_CR1_SSM) \|
EricLew	0:80ee8f3b695e	270	hspi->Init.BaudRatePrescaler \| hspi->Init.FirstBit \| hspi->Init.CRCCalculation);
EricLew	0:80ee8f3b695e	271
EricLew	0:80ee8f3b695e	272	if( hspi->Init.CRCLength == SPI_CRC_LENGTH_16BIT)
EricLew	0:80ee8f3b695e	273	{
EricLew	0:80ee8f3b695e	274	hspi->Instance->CR1\|= SPI_CR1_CRCL;
EricLew	0:80ee8f3b695e	275	}
EricLew	0:80ee8f3b695e	276
EricLew	0:80ee8f3b695e	277	/* Configure : NSS management */
EricLew	0:80ee8f3b695e	278	/* Configure : Rx Fifo Threshold */
EricLew	0:80ee8f3b695e	279	hspi->Instance->CR2 = (((hspi->Init.NSS >> 16) & SPI_CR2_SSOE) \| hspi->Init.TIMode \| hspi->Init.NSSPMode \|
EricLew	0:80ee8f3b695e	280	hspi->Init.DataSize ) \| frxth;
EricLew	0:80ee8f3b695e	281
EricLew	0:80ee8f3b695e	282	/---------------------------- SPIx CRCPOLY Configuration --------------------/
EricLew	0:80ee8f3b695e	283	/* Configure : CRC Polynomial */
EricLew	0:80ee8f3b695e	284	hspi->Instance->CRCPR = hspi->Init.CRCPolynomial;
EricLew	0:80ee8f3b695e	285
EricLew	0:80ee8f3b695e	286	hspi->ErrorCode = HAL_SPI_ERROR_NONE;
EricLew	0:80ee8f3b695e	287	hspi->State= HAL_SPI_STATE_READY;
EricLew	0:80ee8f3b695e	288
EricLew	0:80ee8f3b695e	289	return HAL_OK;
EricLew	0:80ee8f3b695e	290	}
EricLew	0:80ee8f3b695e	291
EricLew	0:80ee8f3b695e	292	/**
EricLew	0:80ee8f3b695e	293	* @brief DeInitialize the SPI peripheral.
EricLew	0:80ee8f3b695e	294	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
EricLew	0:80ee8f3b695e	295	* the configuration information for SPI module.
EricLew	0:80ee8f3b695e	296	* @retval HAL status
EricLew	0:80ee8f3b695e	297	*/
EricLew	0:80ee8f3b695e	298	HAL_StatusTypeDef HAL_SPI_DeInit(SPI_HandleTypeDef *hspi)
EricLew	0:80ee8f3b695e	299	{
EricLew	0:80ee8f3b695e	300	/* Check the SPI handle allocation */
EricLew	0:80ee8f3b695e	301	if(hspi == NULL)
EricLew	0:80ee8f3b695e	302	{
EricLew	0:80ee8f3b695e	303	return HAL_ERROR;
EricLew	0:80ee8f3b695e	304	}
EricLew	0:80ee8f3b695e	305
EricLew	0:80ee8f3b695e	306	/* Check the parameters */
EricLew	0:80ee8f3b695e	307	assert_param(IS_SPI_ALL_INSTANCE(hspi->Instance));
EricLew	0:80ee8f3b695e	308	hspi->State = HAL_SPI_STATE_BUSY;
EricLew	0:80ee8f3b695e	309
EricLew	0:80ee8f3b695e	310	/* Disable the SPI Peripheral Clock */
EricLew	0:80ee8f3b695e	311	__HAL_SPI_DISABLE(hspi);
EricLew	0:80ee8f3b695e	312
EricLew	0:80ee8f3b695e	313	/* DeInit the low level hardware: GPIO, CLOCK, NVIC... */
EricLew	0:80ee8f3b695e	314	HAL_SPI_MspDeInit(hspi);
EricLew	0:80ee8f3b695e	315
EricLew	0:80ee8f3b695e	316	hspi->ErrorCode = HAL_SPI_ERROR_NONE;
EricLew	0:80ee8f3b695e	317	hspi->State = HAL_SPI_STATE_RESET;
EricLew	0:80ee8f3b695e	318
EricLew	0:80ee8f3b695e	319	__HAL_UNLOCK(hspi);
EricLew	0:80ee8f3b695e	320
EricLew	0:80ee8f3b695e	321	return HAL_OK;
EricLew	0:80ee8f3b695e	322	}
EricLew	0:80ee8f3b695e	323
EricLew	0:80ee8f3b695e	324	/**
EricLew	0:80ee8f3b695e	325	* @brief Initialize the SPI MSP.
EricLew	0:80ee8f3b695e	326	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
EricLew	0:80ee8f3b695e	327	* the configuration information for SPI module.
EricLew	0:80ee8f3b695e	328	* @retval None
EricLew	0:80ee8f3b695e	329	*/
EricLew	0:80ee8f3b695e	330	__weak void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi)
EricLew	0:80ee8f3b695e	331	{
EricLew	0:80ee8f3b695e	332	/* NOTE : This function should not be modified, when the callback is needed,
EricLew	0:80ee8f3b695e	333	the HAL_SPI_MspInit should be implemented in the user file
EricLew	0:80ee8f3b695e	334	*/
EricLew	0:80ee8f3b695e	335	}
EricLew	0:80ee8f3b695e	336
EricLew	0:80ee8f3b695e	337	/**
EricLew	0:80ee8f3b695e	338	* @brief DeInitialize the SPI MSP.
EricLew	0:80ee8f3b695e	339	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
EricLew	0:80ee8f3b695e	340	* the configuration information for SPI module.
EricLew	0:80ee8f3b695e	341	* @retval None
EricLew	0:80ee8f3b695e	342	*/
EricLew	0:80ee8f3b695e	343	__weak void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi)
EricLew	0:80ee8f3b695e	344	{
EricLew	0:80ee8f3b695e	345	/* NOTE : This function should not be modified, when the callback is needed,
EricLew	0:80ee8f3b695e	346	the HAL_SPI_MspDeInit should be implemented in the user file
EricLew	0:80ee8f3b695e	347	*/
EricLew	0:80ee8f3b695e	348	}
EricLew	0:80ee8f3b695e	349
EricLew	0:80ee8f3b695e	350	/**
EricLew	0:80ee8f3b695e	351	* @}
EricLew	0:80ee8f3b695e	352	*/
EricLew	0:80ee8f3b695e	353
EricLew	0:80ee8f3b695e	354	/** @defgroup SPI_Exported_Functions_Group2 IO operation functions
EricLew	0:80ee8f3b695e	355	* @brief Data transfers functions
EricLew	0:80ee8f3b695e	356	*
EricLew	0:80ee8f3b695e	357	@verbatim
EricLew	0:80ee8f3b695e	358	==============================================================================
EricLew	0:80ee8f3b695e	359	##### IO operation functions #####
EricLew	0:80ee8f3b695e	360	===============================================================================
EricLew	0:80ee8f3b695e	361	[..]
EricLew	0:80ee8f3b695e	362	This subsection provides a set of functions allowing to manage the SPI
EricLew	0:80ee8f3b695e	363	data transfers.
EricLew	0:80ee8f3b695e	364
EricLew	0:80ee8f3b695e	365	[..] The SPI supports master and slave mode :
EricLew	0:80ee8f3b695e	366
EricLew	0:80ee8f3b695e	367	(#) There are two modes of transfer:
EricLew	0:80ee8f3b695e	368	(++) Blocking mode: The communication is performed in polling mode.
EricLew	0:80ee8f3b695e	369	The HAL status of all data processing is returned by the same function
EricLew	0:80ee8f3b695e	370	after finishing transfer.
EricLew	0:80ee8f3b695e	371	(++) No-Blocking mode: The communication is performed using Interrupts
EricLew	0:80ee8f3b695e	372	or DMA, These APIs return the HAL status.
EricLew	0:80ee8f3b695e	373	The end of the data processing will be indicated through the
EricLew	0:80ee8f3b695e	374	dedicated SPI IRQ when using Interrupt mode or the DMA IRQ when
EricLew	0:80ee8f3b695e	375	using DMA mode.
EricLew	0:80ee8f3b695e	376	The HAL_SPI_TxCpltCallback(), HAL_SPI_RxCpltCallback() and HAL_SPI_TxRxCpltCallback() user callbacks
EricLew	0:80ee8f3b695e	377	will be executed respectively at the end of the transmit or Receive process
EricLew	0:80ee8f3b695e	378	The HAL_SPI_ErrorCallback()user callback will be executed when a communication error is detected
EricLew	0:80ee8f3b695e	379
EricLew	0:80ee8f3b695e	380	(#) APIs provided for these 2 transfer modes (Blocking mode or Non blocking mode using either Interrupt or DMA)
EricLew	0:80ee8f3b695e	381	exist for 1Line (simplex) and 2Lines (full duplex) modes.
EricLew	0:80ee8f3b695e	382
EricLew	0:80ee8f3b695e	383	@endverbatim
EricLew	0:80ee8f3b695e	384	* @{
EricLew	0:80ee8f3b695e	385	*/
EricLew	0:80ee8f3b695e	386
EricLew	0:80ee8f3b695e	387	/**
EricLew	0:80ee8f3b695e	388	* @brief Transmit an amount of data in blocking mode.
EricLew	0:80ee8f3b695e	389	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
EricLew	0:80ee8f3b695e	390	* the configuration information for SPI module.
EricLew	0:80ee8f3b695e	391	* @param pData: pointer to data buffer
EricLew	0:80ee8f3b695e	392	* @param Size: amount of data to be sent
EricLew	0:80ee8f3b695e	393	* @param Timeout: Timeout duration
EricLew	0:80ee8f3b695e	394	* @retval HAL status
EricLew	0:80ee8f3b695e	395	*/
EricLew	0:80ee8f3b695e	396	HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef hspi, uint8_t pData, uint16_t Size, uint32_t Timeout)
EricLew	0:80ee8f3b695e	397	{
EricLew	0:80ee8f3b695e	398	uint32_t tickstart = HAL_GetTick();
EricLew	0:80ee8f3b695e	399	HAL_StatusTypeDef errorcode = HAL_OK;
EricLew	0:80ee8f3b695e	400
EricLew	0:80ee8f3b695e	401	assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
EricLew	0:80ee8f3b695e	402
EricLew	0:80ee8f3b695e	403	/* Process Locked */
EricLew	0:80ee8f3b695e	404	__HAL_LOCK(hspi);
EricLew	0:80ee8f3b695e	405
EricLew	0:80ee8f3b695e	406	if(hspi->State != HAL_SPI_STATE_READY)
EricLew	0:80ee8f3b695e	407	{
EricLew	0:80ee8f3b695e	408	errorcode = HAL_BUSY;
EricLew	0:80ee8f3b695e	409	goto error;
EricLew	0:80ee8f3b695e	410	}
EricLew	0:80ee8f3b695e	411
EricLew	0:80ee8f3b695e	412	if((pData == NULL ) \|\| (Size == 0))
EricLew	0:80ee8f3b695e	413	{
EricLew	0:80ee8f3b695e	414	errorcode = HAL_ERROR;
EricLew	0:80ee8f3b695e	415	goto error;
EricLew	0:80ee8f3b695e	416	}
EricLew	0:80ee8f3b695e	417
EricLew	0:80ee8f3b695e	418	/* Set the transaction information */
EricLew	0:80ee8f3b695e	419	hspi->State = HAL_SPI_STATE_BUSY_TX;
EricLew	0:80ee8f3b695e	420	hspi->ErrorCode = HAL_SPI_ERROR_NONE;
EricLew	0:80ee8f3b695e	421	hspi->pTxBuffPtr = pData;
EricLew	0:80ee8f3b695e	422	hspi->TxXferSize = Size;
EricLew	0:80ee8f3b695e	423	hspi->TxXferCount = Size;
EricLew	0:80ee8f3b695e	424	hspi->pRxBuffPtr = (uint8_t *)NULL;
EricLew	0:80ee8f3b695e	425	hspi->RxXferSize = 0;
EricLew	0:80ee8f3b695e	426	hspi->RxXferCount = 0;
EricLew	0:80ee8f3b695e	427
EricLew	0:80ee8f3b695e	428	/* Configure communication direction : 1Line */
EricLew	0:80ee8f3b695e	429	if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
EricLew	0:80ee8f3b695e	430	{
EricLew	0:80ee8f3b695e	431	SPI_1LINE_TX(hspi);
EricLew	0:80ee8f3b695e	432	}
EricLew	0:80ee8f3b695e	433
EricLew	0:80ee8f3b695e	434	/* Reset CRC Calculation */
EricLew	0:80ee8f3b695e	435	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
EricLew	0:80ee8f3b695e	436	{
EricLew	0:80ee8f3b695e	437	SPI_RESET_CRC(hspi);
EricLew	0:80ee8f3b695e	438	}
EricLew	0:80ee8f3b695e	439
EricLew	0:80ee8f3b695e	440	/* Check if the SPI is already enabled */
EricLew	0:80ee8f3b695e	441	if((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
EricLew	0:80ee8f3b695e	442	{
EricLew	0:80ee8f3b695e	443	/* Enable SPI peripheral */
EricLew	0:80ee8f3b695e	444	__HAL_SPI_ENABLE(hspi);
EricLew	0:80ee8f3b695e	445	}
EricLew	0:80ee8f3b695e	446
EricLew	0:80ee8f3b695e	447	/* Transmit data in 16 Bit mode */
EricLew	0:80ee8f3b695e	448	if(hspi->Init.DataSize > SPI_DATASIZE_8BIT)
EricLew	0:80ee8f3b695e	449	{
EricLew	0:80ee8f3b695e	450	/* Transmit data in 16 Bit mode */
EricLew	0:80ee8f3b695e	451	while (hspi->TxXferCount > 0)
EricLew	0:80ee8f3b695e	452	{
EricLew	0:80ee8f3b695e	453	/* Wait until TXE flag is set to send data */
EricLew	0:80ee8f3b695e	454	if((hspi->Instance->SR & SPI_FLAG_TXE) == SPI_FLAG_TXE)
EricLew	0:80ee8f3b695e	455	{
EricLew	0:80ee8f3b695e	456	hspi->Instance->DR = ((uint16_t )hspi->pTxBuffPtr);
EricLew	0:80ee8f3b695e	457	hspi->pTxBuffPtr += sizeof(uint16_t);
EricLew	0:80ee8f3b695e	458	hspi->TxXferCount--;
EricLew	0:80ee8f3b695e	459	}
EricLew	0:80ee8f3b695e	460	else
EricLew	0:80ee8f3b695e	461	{
EricLew	0:80ee8f3b695e	462	/* Timeout management */
EricLew	0:80ee8f3b695e	463	if((Timeout == 0) \|\| ((Timeout != HAL_MAX_DELAY) && ((HAL_GetTick()-tickstart) >= Timeout)))
EricLew	0:80ee8f3b695e	464	{
EricLew	0:80ee8f3b695e	465	errorcode = HAL_TIMEOUT;
EricLew	0:80ee8f3b695e	466	goto error;
EricLew	0:80ee8f3b695e	467	}
EricLew	0:80ee8f3b695e	468	}
EricLew	0:80ee8f3b695e	469	}
EricLew	0:80ee8f3b695e	470	}
EricLew	0:80ee8f3b695e	471	/* Transmit data in 8 Bit mode */
EricLew	0:80ee8f3b695e	472	else
EricLew	0:80ee8f3b695e	473	{
EricLew	0:80ee8f3b695e	474	while (hspi->TxXferCount > 0)
EricLew	0:80ee8f3b695e	475	{
EricLew	0:80ee8f3b695e	476	/* Wait until TXE flag is set to send data */
EricLew	0:80ee8f3b695e	477	if((hspi->Instance->SR & SPI_FLAG_TXE) == SPI_FLAG_TXE)
EricLew	0:80ee8f3b695e	478	{
EricLew	0:80ee8f3b695e	479	if(hspi->TxXferCount > 1)
EricLew	0:80ee8f3b695e	480	{
EricLew	0:80ee8f3b695e	481	/* write on the data register in packing mode */
EricLew	0:80ee8f3b695e	482	hspi->Instance->DR = ((uint16_t)hspi->pTxBuffPtr);
EricLew	0:80ee8f3b695e	483	hspi->pTxBuffPtr += sizeof(uint16_t);
EricLew	0:80ee8f3b695e	484	hspi->TxXferCount -= 2;
EricLew	0:80ee8f3b695e	485	}
EricLew	0:80ee8f3b695e	486	else
EricLew	0:80ee8f3b695e	487	{
EricLew	0:80ee8f3b695e	488	((__IO uint8_t)&hspi->Instance->DR) = (*hspi->pTxBuffPtr++);
EricLew	0:80ee8f3b695e	489	hspi->TxXferCount--;
EricLew	0:80ee8f3b695e	490	}
EricLew	0:80ee8f3b695e	491	}
EricLew	0:80ee8f3b695e	492	else
EricLew	0:80ee8f3b695e	493	{
EricLew	0:80ee8f3b695e	494	/* Timeout management */
EricLew	0:80ee8f3b695e	495	if((Timeout == 0) \|\| ((Timeout != HAL_MAX_DELAY) && ((HAL_GetTick()-tickstart) >= Timeout)))
EricLew	0:80ee8f3b695e	496	{
EricLew	0:80ee8f3b695e	497	errorcode = HAL_TIMEOUT;
EricLew	0:80ee8f3b695e	498	goto error;
EricLew	0:80ee8f3b695e	499	}
EricLew	0:80ee8f3b695e	500	}
EricLew	0:80ee8f3b695e	501	}
EricLew	0:80ee8f3b695e	502	}
EricLew	0:80ee8f3b695e	503
EricLew	0:80ee8f3b695e	504	/* Enable CRC Transmission */
EricLew	0:80ee8f3b695e	505	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
EricLew	0:80ee8f3b695e	506	{
EricLew	0:80ee8f3b695e	507	hspi->Instance->CR1\|= SPI_CR1_CRCNEXT;
EricLew	0:80ee8f3b695e	508	}
EricLew	0:80ee8f3b695e	509
EricLew	0:80ee8f3b695e	510	/* Check the end of the transaction */
EricLew	0:80ee8f3b695e	511	if(SPI_EndRxTxTransaction(hspi,Timeout) != HAL_OK)
EricLew	0:80ee8f3b695e	512	{
EricLew	0:80ee8f3b695e	513	hspi->ErrorCode = HAL_SPI_ERROR_FLAG;
EricLew	0:80ee8f3b695e	514	}
EricLew	0:80ee8f3b695e	515
EricLew	0:80ee8f3b695e	516	/* Clear overrun flag in 2 Lines communication mode because received is not read */
EricLew	0:80ee8f3b695e	517	if(hspi->Init.Direction == SPI_DIRECTION_2LINES)
EricLew	0:80ee8f3b695e	518	{
EricLew	0:80ee8f3b695e	519	__HAL_SPI_CLEAR_OVRFLAG(hspi);
EricLew	0:80ee8f3b695e	520	}
EricLew	0:80ee8f3b695e	521
EricLew	0:80ee8f3b695e	522	if(hspi->ErrorCode != HAL_SPI_ERROR_NONE)
EricLew	0:80ee8f3b695e	523	{
EricLew	0:80ee8f3b695e	524	errorcode = HAL_ERROR;
EricLew	0:80ee8f3b695e	525	}
EricLew	0:80ee8f3b695e	526
EricLew	0:80ee8f3b695e	527	error:
EricLew	0:80ee8f3b695e	528	hspi->State = HAL_SPI_STATE_READY;
EricLew	0:80ee8f3b695e	529	/* Process Unlocked */
EricLew	0:80ee8f3b695e	530	__HAL_UNLOCK(hspi);
EricLew	0:80ee8f3b695e	531	return errorcode;
EricLew	0:80ee8f3b695e	532	}
EricLew	0:80ee8f3b695e	533
EricLew	0:80ee8f3b695e	534	/**
EricLew	0:80ee8f3b695e	535	* @brief Receive an amount of data in blocking mode.
EricLew	0:80ee8f3b695e	536	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
EricLew	0:80ee8f3b695e	537	* the configuration information for SPI module.
EricLew	0:80ee8f3b695e	538	* @param pData: pointer to data buffer
EricLew	0:80ee8f3b695e	539	* @param Size: amount of data to be received
EricLew	0:80ee8f3b695e	540	* @param Timeout: Timeout duration
EricLew	0:80ee8f3b695e	541	* @retval HAL status
EricLew	0:80ee8f3b695e	542	*/
EricLew	0:80ee8f3b695e	543	HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef hspi, uint8_t pData, uint16_t Size, uint32_t Timeout)
EricLew	0:80ee8f3b695e	544	{
EricLew	0:80ee8f3b695e	545	__IO uint16_t tmpreg;
EricLew	0:80ee8f3b695e	546	uint32_t tickstart = HAL_GetTick();
EricLew	0:80ee8f3b695e	547	HAL_StatusTypeDef errorcode = HAL_OK;
EricLew	0:80ee8f3b695e	548
EricLew	0:80ee8f3b695e	549	if((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES))
EricLew	0:80ee8f3b695e	550	{
EricLew	0:80ee8f3b695e	551	/* the receive process is not supported in 2Lines direction master mode */
EricLew	0:80ee8f3b695e	552	/* in this case we call the TransmitReceive process */
EricLew	0:80ee8f3b695e	553	/* Process Locked */
EricLew	0:80ee8f3b695e	554	return HAL_SPI_TransmitReceive(hspi,pData,pData,Size,Timeout);
EricLew	0:80ee8f3b695e	555	}
EricLew	0:80ee8f3b695e	556
EricLew	0:80ee8f3b695e	557	/* Process Locked */
EricLew	0:80ee8f3b695e	558	__HAL_LOCK(hspi);
EricLew	0:80ee8f3b695e	559
EricLew	0:80ee8f3b695e	560	if(hspi->State != HAL_SPI_STATE_READY)
EricLew	0:80ee8f3b695e	561	{
EricLew	0:80ee8f3b695e	562	errorcode = HAL_BUSY;
EricLew	0:80ee8f3b695e	563	goto error;
EricLew	0:80ee8f3b695e	564	}
EricLew	0:80ee8f3b695e	565
EricLew	0:80ee8f3b695e	566	if((pData == NULL ) \|\| (Size == 0))
EricLew	0:80ee8f3b695e	567	{
EricLew	0:80ee8f3b695e	568	errorcode = HAL_ERROR;
EricLew	0:80ee8f3b695e	569	goto error;
EricLew	0:80ee8f3b695e	570	}
EricLew	0:80ee8f3b695e	571
EricLew	0:80ee8f3b695e	572	hspi->State = HAL_SPI_STATE_BUSY_RX;
EricLew	0:80ee8f3b695e	573	hspi->ErrorCode = HAL_SPI_ERROR_NONE;
EricLew	0:80ee8f3b695e	574	hspi->pRxBuffPtr = pData;
EricLew	0:80ee8f3b695e	575	hspi->RxXferSize = Size;
EricLew	0:80ee8f3b695e	576	hspi->RxXferCount = Size;
EricLew	0:80ee8f3b695e	577	hspi->pTxBuffPtr = (uint8_t *)NULL;
EricLew	0:80ee8f3b695e	578	hspi->TxXferSize = 0;
EricLew	0:80ee8f3b695e	579	hspi->TxXferCount = 0;
EricLew	0:80ee8f3b695e	580
EricLew	0:80ee8f3b695e	581	/* Reset CRC Calculation */
EricLew	0:80ee8f3b695e	582	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
EricLew	0:80ee8f3b695e	583	{
EricLew	0:80ee8f3b695e	584	SPI_RESET_CRC(hspi);
EricLew	0:80ee8f3b695e	585	/* this is done to handle the CRCNEXT before the latest data */
EricLew	0:80ee8f3b695e	586	hspi->RxXferCount--;
EricLew	0:80ee8f3b695e	587	}
EricLew	0:80ee8f3b695e	588
EricLew	0:80ee8f3b695e	589	/* Set the Rx Fido threshold */
EricLew	0:80ee8f3b695e	590	if(hspi->Init.DataSize > SPI_DATASIZE_8BIT)
EricLew	0:80ee8f3b695e	591	{
EricLew	0:80ee8f3b695e	592	/* set fiforxthresold according the reception data length: 16bit */
EricLew	0:80ee8f3b695e	593	CLEAR_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
EricLew	0:80ee8f3b695e	594	}
EricLew	0:80ee8f3b695e	595	else
EricLew	0:80ee8f3b695e	596	{
EricLew	0:80ee8f3b695e	597	/* set fiforxthresold according the reception data length: 8bit */
EricLew	0:80ee8f3b695e	598	SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
EricLew	0:80ee8f3b695e	599	}
EricLew	0:80ee8f3b695e	600
EricLew	0:80ee8f3b695e	601	/* Configure communication direction 1Line and enabled SPI if needed */
EricLew	0:80ee8f3b695e	602	if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
EricLew	0:80ee8f3b695e	603	{
EricLew	0:80ee8f3b695e	604	SPI_1LINE_RX(hspi);
EricLew	0:80ee8f3b695e	605	}
EricLew	0:80ee8f3b695e	606
EricLew	0:80ee8f3b695e	607	/* Check if the SPI is already enabled */
EricLew	0:80ee8f3b695e	608	if((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
EricLew	0:80ee8f3b695e	609	{
EricLew	0:80ee8f3b695e	610	/* Enable SPI peripheral */
EricLew	0:80ee8f3b695e	611	__HAL_SPI_ENABLE(hspi);
EricLew	0:80ee8f3b695e	612	}
EricLew	0:80ee8f3b695e	613
EricLew	0:80ee8f3b695e	614	if(hspi->Init.DataSize <= SPI_DATASIZE_8BIT)
EricLew	0:80ee8f3b695e	615	{
EricLew	0:80ee8f3b695e	616	/* Transfer loop */
EricLew	0:80ee8f3b695e	617	while(hspi->RxXferCount > 0)
EricLew	0:80ee8f3b695e	618	{
EricLew	0:80ee8f3b695e	619	/* Check the RXNE flag */
EricLew	0:80ee8f3b695e	620	if((hspi->Instance->SR & SPI_FLAG_RXNE) == SPI_FLAG_RXNE)
EricLew	0:80ee8f3b695e	621	{
EricLew	0:80ee8f3b695e	622	/* read the received data */
EricLew	0:80ee8f3b695e	623	(hspi->pRxBuffPtr++)= (__IO uint8_t *)&hspi->Instance->DR;
EricLew	0:80ee8f3b695e	624	hspi->RxXferCount--;
EricLew	0:80ee8f3b695e	625	}
EricLew	0:80ee8f3b695e	626	else
EricLew	0:80ee8f3b695e	627	{
EricLew	0:80ee8f3b695e	628	/* Timeout management */
EricLew	0:80ee8f3b695e	629	if((Timeout == 0) \|\| ((Timeout != HAL_MAX_DELAY) && ((HAL_GetTick()-tickstart) >= Timeout)))
EricLew	0:80ee8f3b695e	630	{
EricLew	0:80ee8f3b695e	631	errorcode = HAL_TIMEOUT;
EricLew	0:80ee8f3b695e	632	goto error;
EricLew	0:80ee8f3b695e	633	}
EricLew	0:80ee8f3b695e	634	}
EricLew	0:80ee8f3b695e	635	}
EricLew	0:80ee8f3b695e	636	}
EricLew	0:80ee8f3b695e	637	else
EricLew	0:80ee8f3b695e	638	{
EricLew	0:80ee8f3b695e	639	/* Transfer loop */
EricLew	0:80ee8f3b695e	640	while(hspi->RxXferCount > 0)
EricLew	0:80ee8f3b695e	641	{
EricLew	0:80ee8f3b695e	642	/* Check the RXNE flag */
EricLew	0:80ee8f3b695e	643	if((hspi->Instance->SR & SPI_FLAG_RXNE) == SPI_FLAG_RXNE)
EricLew	0:80ee8f3b695e	644	{
EricLew	0:80ee8f3b695e	645	((uint16_t)hspi->pRxBuffPtr) = hspi->Instance->DR;
EricLew	0:80ee8f3b695e	646	hspi->pRxBuffPtr += sizeof(uint16_t);
EricLew	0:80ee8f3b695e	647	hspi->RxXferCount--;
EricLew	0:80ee8f3b695e	648	}
EricLew	0:80ee8f3b695e	649	else
EricLew	0:80ee8f3b695e	650	{
EricLew	0:80ee8f3b695e	651	/* Timeout management */
EricLew	0:80ee8f3b695e	652	if((Timeout == 0) \|\| ((Timeout != HAL_MAX_DELAY) && ((HAL_GetTick()-tickstart) >= Timeout)))
EricLew	0:80ee8f3b695e	653	{
EricLew	0:80ee8f3b695e	654	errorcode = HAL_TIMEOUT;
EricLew	0:80ee8f3b695e	655	goto error;
EricLew	0:80ee8f3b695e	656	}
EricLew	0:80ee8f3b695e	657	}
EricLew	0:80ee8f3b695e	658	}
EricLew	0:80ee8f3b695e	659	}
EricLew	0:80ee8f3b695e	660
EricLew	0:80ee8f3b695e	661	/* Handle the CRC Transmission */
EricLew	0:80ee8f3b695e	662	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
EricLew	0:80ee8f3b695e	663	{
EricLew	0:80ee8f3b695e	664	/* freeze the CRC before the latest data */
EricLew	0:80ee8f3b695e	665	hspi->Instance->CR1\|= SPI_CR1_CRCNEXT;
EricLew	0:80ee8f3b695e	666
EricLew	0:80ee8f3b695e	667	/* Read the latest data */
EricLew	0:80ee8f3b695e	668	if(SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SPI_FLAG_RXNE, Timeout) != HAL_OK)
EricLew	0:80ee8f3b695e	669	{
EricLew	0:80ee8f3b695e	670	/* the latest data has not been received */
EricLew	0:80ee8f3b695e	671	errorcode = HAL_TIMEOUT;
EricLew	0:80ee8f3b695e	672	goto error;
EricLew	0:80ee8f3b695e	673	}
EricLew	0:80ee8f3b695e	674
EricLew	0:80ee8f3b695e	675	/* Receive last data in 16 Bit mode */
EricLew	0:80ee8f3b695e	676	if(hspi->Init.DataSize > SPI_DATASIZE_8BIT)
EricLew	0:80ee8f3b695e	677	{
EricLew	0:80ee8f3b695e	678	((uint16_t)hspi->pRxBuffPtr) = hspi->Instance->DR;
EricLew	0:80ee8f3b695e	679	}
EricLew	0:80ee8f3b695e	680	/* Receive last data in 8 Bit mode */
EricLew	0:80ee8f3b695e	681	else
EricLew	0:80ee8f3b695e	682	{
EricLew	0:80ee8f3b695e	683	hspi->pRxBuffPtr = (__IO uint8_t *)&hspi->Instance->DR;
EricLew	0:80ee8f3b695e	684	}
EricLew	0:80ee8f3b695e	685
EricLew	0:80ee8f3b695e	686	/* Wait until TXE flag */
EricLew	0:80ee8f3b695e	687	if(SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SPI_FLAG_RXNE, Timeout) != HAL_OK)
EricLew	0:80ee8f3b695e	688	{
EricLew	0:80ee8f3b695e	689	/* Flag Error*/
EricLew	0:80ee8f3b695e	690	hspi->ErrorCode = HAL_SPI_ERROR_CRC;
EricLew	0:80ee8f3b695e	691	errorcode = HAL_TIMEOUT;
EricLew	0:80ee8f3b695e	692	goto error;
EricLew	0:80ee8f3b695e	693	}
EricLew	0:80ee8f3b695e	694
EricLew	0:80ee8f3b695e	695	if(hspi->Init.DataSize == SPI_DATASIZE_16BIT)
EricLew	0:80ee8f3b695e	696	{
EricLew	0:80ee8f3b695e	697	tmpreg = hspi->Instance->DR;
EricLew	0:80ee8f3b695e	698	UNUSED(tmpreg); /* To avoid GCC warning */
EricLew	0:80ee8f3b695e	699	}
EricLew	0:80ee8f3b695e	700	else
EricLew	0:80ee8f3b695e	701	{
EricLew	0:80ee8f3b695e	702	tmpreg = (__IO uint8_t )&hspi->Instance->DR;
EricLew	0:80ee8f3b695e	703	UNUSED(tmpreg); /* To avoid GCC warning */
EricLew	0:80ee8f3b695e	704
EricLew	0:80ee8f3b695e	705	if((hspi->Init.DataSize == SPI_DATASIZE_8BIT) && (hspi->Init.CRCLength == SPI_CRC_LENGTH_16BIT))
EricLew	0:80ee8f3b695e	706	{
EricLew	0:80ee8f3b695e	707	if(SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SPI_FLAG_RXNE, Timeout) != HAL_OK)
EricLew	0:80ee8f3b695e	708	{
EricLew	0:80ee8f3b695e	709	/* Error on the CRC reception */
EricLew	0:80ee8f3b695e	710	hspi->ErrorCode = HAL_SPI_ERROR_CRC;
EricLew	0:80ee8f3b695e	711	errorcode = HAL_TIMEOUT;
EricLew	0:80ee8f3b695e	712	goto error;
EricLew	0:80ee8f3b695e	713	}
EricLew	0:80ee8f3b695e	714	tmpreg = (__IO uint8_t )&hspi->Instance->DR;
EricLew	0:80ee8f3b695e	715	UNUSED(tmpreg); /* To avoid GCC warning */
EricLew	0:80ee8f3b695e	716	}
EricLew	0:80ee8f3b695e	717	}
EricLew	0:80ee8f3b695e	718	}
EricLew	0:80ee8f3b695e	719
EricLew	0:80ee8f3b695e	720	/* Check the end of the transaction */
EricLew	0:80ee8f3b695e	721	if(SPI_EndRxTransaction(hspi,Timeout) != HAL_OK)
EricLew	0:80ee8f3b695e	722	{
EricLew	0:80ee8f3b695e	723	hspi->ErrorCode = HAL_SPI_ERROR_FLAG;
EricLew	0:80ee8f3b695e	724	}
EricLew	0:80ee8f3b695e	725
EricLew	0:80ee8f3b695e	726	/* Check if CRC error occurred */
EricLew	0:80ee8f3b695e	727	if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
EricLew	0:80ee8f3b695e	728	{
EricLew	0:80ee8f3b695e	729	hspi->ErrorCode\|= HAL_SPI_ERROR_CRC;
EricLew	0:80ee8f3b695e	730	__HAL_SPI_CLEAR_CRCERRFLAG(hspi);
EricLew	0:80ee8f3b695e	731	}
EricLew	0:80ee8f3b695e	732
EricLew	0:80ee8f3b695e	733	if(hspi->ErrorCode != HAL_SPI_ERROR_NONE)
EricLew	0:80ee8f3b695e	734	{
EricLew	0:80ee8f3b695e	735	errorcode = HAL_ERROR;
EricLew	0:80ee8f3b695e	736	}
EricLew	0:80ee8f3b695e	737
EricLew	0:80ee8f3b695e	738	error :
EricLew	0:80ee8f3b695e	739	hspi->State = HAL_SPI_STATE_READY;
EricLew	0:80ee8f3b695e	740	__HAL_UNLOCK(hspi);
EricLew	0:80ee8f3b695e	741	return errorcode;
EricLew	0:80ee8f3b695e	742	}
EricLew	0:80ee8f3b695e	743
EricLew	0:80ee8f3b695e	744	/**
EricLew	0:80ee8f3b695e	745	* @brief Transmit and Receive an amount of data in blocking mode.
EricLew	0:80ee8f3b695e	746	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
EricLew	0:80ee8f3b695e	747	* the configuration information for SPI module.
EricLew	0:80ee8f3b695e	748	* @param pTxData: pointer to transmission data buffer
EricLew	0:80ee8f3b695e	749	* @param pRxData: pointer to reception data buffer
EricLew	0:80ee8f3b695e	750	* @param Size: amount of data to be sent and received
EricLew	0:80ee8f3b695e	751	* @param Timeout: Timeout duration
EricLew	0:80ee8f3b695e	752	* @retval HAL status
EricLew	0:80ee8f3b695e	753	*/
EricLew	0:80ee8f3b695e	754	HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef hspi, uint8_t pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout)
EricLew	0:80ee8f3b695e	755	{
EricLew	0:80ee8f3b695e	756	__IO uint16_t tmpreg;
EricLew	0:80ee8f3b695e	757	uint32_t tickstart = HAL_GetTick();
EricLew	0:80ee8f3b695e	758	HAL_StatusTypeDef errorcode = HAL_OK;
EricLew	0:80ee8f3b695e	759
EricLew	0:80ee8f3b695e	760	assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
EricLew	0:80ee8f3b695e	761
EricLew	0:80ee8f3b695e	762	/* Process Locked */
EricLew	0:80ee8f3b695e	763	__HAL_LOCK(hspi);
EricLew	0:80ee8f3b695e	764
EricLew	0:80ee8f3b695e	765	if(hspi->State != HAL_SPI_STATE_READY)
EricLew	0:80ee8f3b695e	766	{
EricLew	0:80ee8f3b695e	767	errorcode = HAL_BUSY;
EricLew	0:80ee8f3b695e	768	goto error;
EricLew	0:80ee8f3b695e	769	}
EricLew	0:80ee8f3b695e	770
EricLew	0:80ee8f3b695e	771	if((pTxData == NULL) \|\| (pRxData == NULL) \|\| (Size == 0))
EricLew	0:80ee8f3b695e	772	{
EricLew	0:80ee8f3b695e	773	errorcode = HAL_ERROR;
EricLew	0:80ee8f3b695e	774	goto error;
EricLew	0:80ee8f3b695e	775	}
EricLew	0:80ee8f3b695e	776
EricLew	0:80ee8f3b695e	777	hspi->State = HAL_SPI_STATE_BUSY_TX_RX;
EricLew	0:80ee8f3b695e	778	hspi->ErrorCode = HAL_SPI_ERROR_NONE;
EricLew	0:80ee8f3b695e	779	hspi->pRxBuffPtr = pRxData;
EricLew	0:80ee8f3b695e	780	hspi->RxXferCount = Size;
EricLew	0:80ee8f3b695e	781	hspi->RxXferSize = Size;
EricLew	0:80ee8f3b695e	782	hspi->pTxBuffPtr = pTxData;
EricLew	0:80ee8f3b695e	783	hspi->TxXferCount = Size;
EricLew	0:80ee8f3b695e	784	hspi->TxXferSize = Size;
EricLew	0:80ee8f3b695e	785
EricLew	0:80ee8f3b695e	786	/* Reset CRC Calculation */
EricLew	0:80ee8f3b695e	787	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
EricLew	0:80ee8f3b695e	788	{
EricLew	0:80ee8f3b695e	789	SPI_RESET_CRC(hspi);
EricLew	0:80ee8f3b695e	790	}
EricLew	0:80ee8f3b695e	791
EricLew	0:80ee8f3b695e	792	/* Set the Rx Fido threshold */
EricLew	0:80ee8f3b695e	793	if((hspi->Init.DataSize > SPI_DATASIZE_8BIT) \|\| (hspi->RxXferCount > 1))
EricLew	0:80ee8f3b695e	794	{
EricLew	0:80ee8f3b695e	795	/* set fiforxthreshold according the reception data length: 16bit */
EricLew	0:80ee8f3b695e	796	CLEAR_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
EricLew	0:80ee8f3b695e	797	}
EricLew	0:80ee8f3b695e	798	else
EricLew	0:80ee8f3b695e	799	{
EricLew	0:80ee8f3b695e	800	/* set fiforxthreshold according the reception data length: 8bit */
EricLew	0:80ee8f3b695e	801	SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
EricLew	0:80ee8f3b695e	802	}
EricLew	0:80ee8f3b695e	803
EricLew	0:80ee8f3b695e	804	/* Check if the SPI is already enabled */
EricLew	0:80ee8f3b695e	805	if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
EricLew	0:80ee8f3b695e	806	{
EricLew	0:80ee8f3b695e	807	/* Enable SPI peripheral */
EricLew	0:80ee8f3b695e	808	__HAL_SPI_ENABLE(hspi);
EricLew	0:80ee8f3b695e	809	}
EricLew	0:80ee8f3b695e	810
EricLew	0:80ee8f3b695e	811	/* Transmit and Receive data in 16 Bit mode */
EricLew	0:80ee8f3b695e	812	if(hspi->Init.DataSize > SPI_DATASIZE_8BIT)
EricLew	0:80ee8f3b695e	813	{
EricLew	0:80ee8f3b695e	814	while ((hspi->TxXferCount > 0 ) \|\| (hspi->RxXferCount > 0))
EricLew	0:80ee8f3b695e	815	{
EricLew	0:80ee8f3b695e	816	/* Check TXE flag */
EricLew	0:80ee8f3b695e	817	if((hspi->TxXferCount > 0) && ((hspi->Instance->SR & SPI_FLAG_TXE) == SPI_FLAG_TXE))
EricLew	0:80ee8f3b695e	818	{
EricLew	0:80ee8f3b695e	819	hspi->Instance->DR = ((uint16_t )hspi->pTxBuffPtr);
EricLew	0:80ee8f3b695e	820	hspi->pTxBuffPtr += sizeof(uint16_t);
EricLew	0:80ee8f3b695e	821	hspi->TxXferCount--;
EricLew	0:80ee8f3b695e	822
EricLew	0:80ee8f3b695e	823	/* Enable CRC Transmission */
EricLew	0:80ee8f3b695e	824	if((hspi->TxXferCount == 0) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE))
EricLew	0:80ee8f3b695e	825	{
EricLew	0:80ee8f3b695e	826	hspi->Instance->CR1\|= SPI_CR1_CRCNEXT;
EricLew	0:80ee8f3b695e	827	}
EricLew	0:80ee8f3b695e	828	}
EricLew	0:80ee8f3b695e	829
EricLew	0:80ee8f3b695e	830	/* Check RXNE flag */
EricLew	0:80ee8f3b695e	831	if((hspi->RxXferCount > 0) && ((hspi->Instance->SR & SPI_FLAG_RXNE) == SPI_FLAG_RXNE))
EricLew	0:80ee8f3b695e	832	{
EricLew	0:80ee8f3b695e	833	((uint16_t )hspi->pRxBuffPtr) = hspi->Instance->DR;
EricLew	0:80ee8f3b695e	834	hspi->pRxBuffPtr += sizeof(uint16_t);
EricLew	0:80ee8f3b695e	835	hspi->RxXferCount--;
EricLew	0:80ee8f3b695e	836	}
EricLew	0:80ee8f3b695e	837	if((Timeout != HAL_MAX_DELAY) && ((HAL_GetTick()-tickstart) >= Timeout))
EricLew	0:80ee8f3b695e	838	{
EricLew	0:80ee8f3b695e	839	errorcode = HAL_TIMEOUT;
EricLew	0:80ee8f3b695e	840	goto error;
EricLew	0:80ee8f3b695e	841	}
EricLew	0:80ee8f3b695e	842	}
EricLew	0:80ee8f3b695e	843	}
EricLew	0:80ee8f3b695e	844	/* Transmit and Receive data in 8 Bit mode */
EricLew	0:80ee8f3b695e	845	else
EricLew	0:80ee8f3b695e	846	{
EricLew	0:80ee8f3b695e	847	while((hspi->TxXferCount > 0) \|\| (hspi->RxXferCount > 0))
EricLew	0:80ee8f3b695e	848	{
EricLew	0:80ee8f3b695e	849	/* check TXE flag */
EricLew	0:80ee8f3b695e	850	if((hspi->TxXferCount > 0) && ((hspi->Instance->SR & SPI_FLAG_TXE) == SPI_FLAG_TXE))
EricLew	0:80ee8f3b695e	851	{
EricLew	0:80ee8f3b695e	852	if(hspi->TxXferCount > 1)
EricLew	0:80ee8f3b695e	853	{
EricLew	0:80ee8f3b695e	854	hspi->Instance->DR = ((uint16_t)hspi->pTxBuffPtr);
EricLew	0:80ee8f3b695e	855	hspi->pTxBuffPtr += sizeof(uint16_t);
EricLew	0:80ee8f3b695e	856	hspi->TxXferCount -= 2;
EricLew	0:80ee8f3b695e	857	}
EricLew	0:80ee8f3b695e	858	else
EricLew	0:80ee8f3b695e	859	{
EricLew	0:80ee8f3b695e	860	(__IO uint8_t )&hspi->Instance->DR = (*hspi->pTxBuffPtr++);
EricLew	0:80ee8f3b695e	861	hspi->TxXferCount--;
EricLew	0:80ee8f3b695e	862	}
EricLew	0:80ee8f3b695e	863
EricLew	0:80ee8f3b695e	864	/* Enable CRC Transmission */
EricLew	0:80ee8f3b695e	865	if((hspi->TxXferCount == 0) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE))
EricLew	0:80ee8f3b695e	866	{
EricLew	0:80ee8f3b695e	867	hspi->Instance->CR1 \|= SPI_CR1_CRCNEXT;
EricLew	0:80ee8f3b695e	868	}
EricLew	0:80ee8f3b695e	869	}
EricLew	0:80ee8f3b695e	870
EricLew	0:80ee8f3b695e	871	/* Wait until RXNE flag is reset */
EricLew	0:80ee8f3b695e	872	if((hspi->RxXferCount > 0) && ((hspi->Instance->SR & SPI_FLAG_RXNE) == SPI_FLAG_RXNE))
EricLew	0:80ee8f3b695e	873	{
EricLew	0:80ee8f3b695e	874	if(hspi->RxXferCount > 1)
EricLew	0:80ee8f3b695e	875	{
EricLew	0:80ee8f3b695e	876	((uint16_t)hspi->pRxBuffPtr) = hspi->Instance->DR;
EricLew	0:80ee8f3b695e	877	hspi->pRxBuffPtr += sizeof(uint16_t);
EricLew	0:80ee8f3b695e	878	hspi->RxXferCount -= 2;
EricLew	0:80ee8f3b695e	879	if(hspi->RxXferCount <= 1)
EricLew	0:80ee8f3b695e	880	{
EricLew	0:80ee8f3b695e	881	/* set fiforxthresold before to switch on 8 bit data size */
EricLew	0:80ee8f3b695e	882	SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
EricLew	0:80ee8f3b695e	883	}
EricLew	0:80ee8f3b695e	884	}
EricLew	0:80ee8f3b695e	885	else
EricLew	0:80ee8f3b695e	886	{
EricLew	0:80ee8f3b695e	887	(hspi->pRxBuffPtr++) = (__IO uint8_t *)&hspi->Instance->DR;
EricLew	0:80ee8f3b695e	888	hspi->RxXferCount--;
EricLew	0:80ee8f3b695e	889	}
EricLew	0:80ee8f3b695e	890	}
EricLew	0:80ee8f3b695e	891	if((Timeout != HAL_MAX_DELAY) && ((HAL_GetTick()-tickstart) >= Timeout))
EricLew	0:80ee8f3b695e	892	{
EricLew	0:80ee8f3b695e	893	errorcode = HAL_TIMEOUT;
EricLew	0:80ee8f3b695e	894	goto error;
EricLew	0:80ee8f3b695e	895	}
EricLew	0:80ee8f3b695e	896	}
EricLew	0:80ee8f3b695e	897	}
EricLew	0:80ee8f3b695e	898
EricLew	0:80ee8f3b695e	899	/* Read CRC from DR to close CRC calculation process */
EricLew	0:80ee8f3b695e	900	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
EricLew	0:80ee8f3b695e	901	{
EricLew	0:80ee8f3b695e	902	/* Wait until TXE flag */
EricLew	0:80ee8f3b695e	903	if(SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SPI_FLAG_RXNE, Timeout) != HAL_OK)
EricLew	0:80ee8f3b695e	904	{
EricLew	0:80ee8f3b695e	905	/* Error on the CRC reception */
EricLew	0:80ee8f3b695e	906	hspi->ErrorCode\|= HAL_SPI_ERROR_CRC;
EricLew	0:80ee8f3b695e	907	errorcode = HAL_TIMEOUT;
EricLew	0:80ee8f3b695e	908	goto error;
EricLew	0:80ee8f3b695e	909	}
EricLew	0:80ee8f3b695e	910
EricLew	0:80ee8f3b695e	911	if(hspi->Init.DataSize == SPI_DATASIZE_16BIT)
EricLew	0:80ee8f3b695e	912	{
EricLew	0:80ee8f3b695e	913	tmpreg = hspi->Instance->DR;
EricLew	0:80ee8f3b695e	914	UNUSED(tmpreg); /* To avoid GCC warning */
EricLew	0:80ee8f3b695e	915	}
EricLew	0:80ee8f3b695e	916	else
EricLew	0:80ee8f3b695e	917	{
EricLew	0:80ee8f3b695e	918	tmpreg = (__IO uint8_t )&hspi->Instance->DR;
EricLew	0:80ee8f3b695e	919	UNUSED(tmpreg); /* To avoid GCC warning */
EricLew	0:80ee8f3b695e	920
EricLew	0:80ee8f3b695e	921	if(hspi->Init.CRCLength == SPI_CRC_LENGTH_16BIT)
EricLew	0:80ee8f3b695e	922	{
EricLew	0:80ee8f3b695e	923	if(SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SPI_FLAG_RXNE, Timeout) != HAL_OK)
EricLew	0:80ee8f3b695e	924	{
EricLew	0:80ee8f3b695e	925	/* Error on the CRC reception */
EricLew	0:80ee8f3b695e	926	hspi->ErrorCode\|= HAL_SPI_ERROR_CRC;
EricLew	0:80ee8f3b695e	927	errorcode = HAL_TIMEOUT;
EricLew	0:80ee8f3b695e	928	goto error;
EricLew	0:80ee8f3b695e	929	}
EricLew	0:80ee8f3b695e	930	tmpreg = (__IO uint8_t )&hspi->Instance->DR;
EricLew	0:80ee8f3b695e	931	UNUSED(tmpreg); /* To avoid GCC warning */
EricLew	0:80ee8f3b695e	932	}
EricLew	0:80ee8f3b695e	933	}
EricLew	0:80ee8f3b695e	934	}
EricLew	0:80ee8f3b695e	935
EricLew	0:80ee8f3b695e	936	/* Check if CRC error occurred */
EricLew	0:80ee8f3b695e	937	if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
EricLew	0:80ee8f3b695e	938	{
EricLew	0:80ee8f3b695e	939	hspi->ErrorCode\|= HAL_SPI_ERROR_CRC;
EricLew	0:80ee8f3b695e	940	/* Clear CRC Flag */
EricLew	0:80ee8f3b695e	941	__HAL_SPI_CLEAR_CRCERRFLAG(hspi);
EricLew	0:80ee8f3b695e	942
EricLew	0:80ee8f3b695e	943	errorcode = HAL_ERROR;
EricLew	0:80ee8f3b695e	944	}
EricLew	0:80ee8f3b695e	945
EricLew	0:80ee8f3b695e	946	/* Check the end of the transaction */
EricLew	0:80ee8f3b695e	947	if(SPI_EndRxTxTransaction(hspi,Timeout) != HAL_OK)
EricLew	0:80ee8f3b695e	948	{
EricLew	0:80ee8f3b695e	949	hspi->ErrorCode = HAL_SPI_ERROR_FLAG;
EricLew	0:80ee8f3b695e	950	}
EricLew	0:80ee8f3b695e	951
EricLew	0:80ee8f3b695e	952	if(hspi->ErrorCode != HAL_SPI_ERROR_NONE)
EricLew	0:80ee8f3b695e	953	{
EricLew	0:80ee8f3b695e	954	errorcode = HAL_ERROR;
EricLew	0:80ee8f3b695e	955	}
EricLew	0:80ee8f3b695e	956
EricLew	0:80ee8f3b695e	957	error :
EricLew	0:80ee8f3b695e	958	hspi->State = HAL_SPI_STATE_READY;
EricLew	0:80ee8f3b695e	959	__HAL_UNLOCK(hspi);
EricLew	0:80ee8f3b695e	960	return errorcode;
EricLew	0:80ee8f3b695e	961	}
EricLew	0:80ee8f3b695e	962
EricLew	0:80ee8f3b695e	963	/**
EricLew	0:80ee8f3b695e	964	* @brief Transmit an amount of data in non-blocking mode with Interrupt.
EricLew	0:80ee8f3b695e	965	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
EricLew	0:80ee8f3b695e	966	* the configuration information for SPI module.
EricLew	0:80ee8f3b695e	967	* @param pData: pointer to data buffer
EricLew	0:80ee8f3b695e	968	* @param Size: amount of data to be sent
EricLew	0:80ee8f3b695e	969	* @retval HAL status
EricLew	0:80ee8f3b695e	970	*/
EricLew	0:80ee8f3b695e	971	HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef hspi, uint8_t pData, uint16_t Size)
EricLew	0:80ee8f3b695e	972	{
EricLew	0:80ee8f3b695e	973	HAL_StatusTypeDef errorcode = HAL_OK;
EricLew	0:80ee8f3b695e	974	assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
EricLew	0:80ee8f3b695e	975
EricLew	0:80ee8f3b695e	976	/* Process Locked */
EricLew	0:80ee8f3b695e	977	__HAL_LOCK(hspi);
EricLew	0:80ee8f3b695e	978
EricLew	0:80ee8f3b695e	979	if((pData == NULL) \|\| (Size == 0))
EricLew	0:80ee8f3b695e	980	{
EricLew	0:80ee8f3b695e	981	errorcode = HAL_ERROR;
EricLew	0:80ee8f3b695e	982	goto error;
EricLew	0:80ee8f3b695e	983	}
EricLew	0:80ee8f3b695e	984
EricLew	0:80ee8f3b695e	985	if(hspi->State != HAL_SPI_STATE_READY)
EricLew	0:80ee8f3b695e	986	{
EricLew	0:80ee8f3b695e	987	errorcode = HAL_BUSY;
EricLew	0:80ee8f3b695e	988	goto error;
EricLew	0:80ee8f3b695e	989	}
EricLew	0:80ee8f3b695e	990
EricLew	0:80ee8f3b695e	991	/* prepare the transfer */
EricLew	0:80ee8f3b695e	992	hspi->State = HAL_SPI_STATE_BUSY_TX;
EricLew	0:80ee8f3b695e	993	hspi->ErrorCode = HAL_SPI_ERROR_NONE;
EricLew	0:80ee8f3b695e	994	hspi->pTxBuffPtr = pData;
EricLew	0:80ee8f3b695e	995	hspi->TxXferSize = Size;
EricLew	0:80ee8f3b695e	996	hspi->TxXferCount = Size;
EricLew	0:80ee8f3b695e	997	hspi->pRxBuffPtr = (uint8_t *)NULL;
EricLew	0:80ee8f3b695e	998	hspi->RxXferSize = 0;
EricLew	0:80ee8f3b695e	999	hspi->RxXferCount = 0;
EricLew	0:80ee8f3b695e	1000	hspi->RxISR = NULL;
EricLew	0:80ee8f3b695e	1001
EricLew	0:80ee8f3b695e	1002	/* Set the function for IT treatment */
EricLew	0:80ee8f3b695e	1003	if(hspi->Init.DataSize > SPI_DATASIZE_8BIT )
EricLew	0:80ee8f3b695e	1004	{
EricLew	0:80ee8f3b695e	1005	hspi->TxISR = SPI_TxISR_16BIT;
EricLew	0:80ee8f3b695e	1006	}
EricLew	0:80ee8f3b695e	1007	else
EricLew	0:80ee8f3b695e	1008	{
EricLew	0:80ee8f3b695e	1009	hspi->TxISR = SPI_TxISR_8BIT;
EricLew	0:80ee8f3b695e	1010	}
EricLew	0:80ee8f3b695e	1011
EricLew	0:80ee8f3b695e	1012	/* Configure communication direction : 1Line */
EricLew	0:80ee8f3b695e	1013	if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
EricLew	0:80ee8f3b695e	1014	{
EricLew	0:80ee8f3b695e	1015	SPI_1LINE_TX(hspi);
EricLew	0:80ee8f3b695e	1016	}
EricLew	0:80ee8f3b695e	1017
EricLew	0:80ee8f3b695e	1018	/* Reset CRC Calculation */
EricLew	0:80ee8f3b695e	1019	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
EricLew	0:80ee8f3b695e	1020	{
EricLew	0:80ee8f3b695e	1021	SPI_RESET_CRC(hspi);
EricLew	0:80ee8f3b695e	1022	}
EricLew	0:80ee8f3b695e	1023
EricLew	0:80ee8f3b695e	1024	/* Enable TXE and ERR interrupt */
EricLew	0:80ee8f3b695e	1025	__HAL_SPI_ENABLE_IT(hspi,(SPI_IT_TXE));
EricLew	0:80ee8f3b695e	1026
EricLew	0:80ee8f3b695e	1027
EricLew	0:80ee8f3b695e	1028	/* Check if the SPI is already enabled */
EricLew	0:80ee8f3b695e	1029	if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
EricLew	0:80ee8f3b695e	1030	{
EricLew	0:80ee8f3b695e	1031	/* Enable SPI peripheral */
EricLew	0:80ee8f3b695e	1032	__HAL_SPI_ENABLE(hspi);
EricLew	0:80ee8f3b695e	1033	}
EricLew	0:80ee8f3b695e	1034
EricLew	0:80ee8f3b695e	1035	error :
EricLew	0:80ee8f3b695e	1036	__HAL_UNLOCK(hspi);
EricLew	0:80ee8f3b695e	1037	return errorcode;
EricLew	0:80ee8f3b695e	1038	}
EricLew	0:80ee8f3b695e	1039
EricLew	0:80ee8f3b695e	1040	/**
EricLew	0:80ee8f3b695e	1041	* @brief Receive an amount of data in non-blocking mode with Interrupt.
EricLew	0:80ee8f3b695e	1042	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
EricLew	0:80ee8f3b695e	1043	* the configuration information for SPI module.
EricLew	0:80ee8f3b695e	1044	* @param pData: pointer to data buffer
EricLew	0:80ee8f3b695e	1045	* @param Size: amount of data to be sent
EricLew	0:80ee8f3b695e	1046	* @retval HAL status
EricLew	0:80ee8f3b695e	1047	*/
EricLew	0:80ee8f3b695e	1048	HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef hspi, uint8_t pData, uint16_t Size)
EricLew	0:80ee8f3b695e	1049	{
EricLew	0:80ee8f3b695e	1050	HAL_StatusTypeDef errorcode = HAL_OK;
EricLew	0:80ee8f3b695e	1051
EricLew	0:80ee8f3b695e	1052	/* Process Locked */
EricLew	0:80ee8f3b695e	1053	__HAL_LOCK(hspi);
EricLew	0:80ee8f3b695e	1054
EricLew	0:80ee8f3b695e	1055	if(hspi->State != HAL_SPI_STATE_READY)
EricLew	0:80ee8f3b695e	1056	{
EricLew	0:80ee8f3b695e	1057	errorcode = HAL_BUSY;
EricLew	0:80ee8f3b695e	1058	goto error;
EricLew	0:80ee8f3b695e	1059	}
EricLew	0:80ee8f3b695e	1060	if((pData == NULL) \|\| (Size == 0))
EricLew	0:80ee8f3b695e	1061	{
EricLew	0:80ee8f3b695e	1062	errorcode = HAL_ERROR;
EricLew	0:80ee8f3b695e	1063	goto error;
EricLew	0:80ee8f3b695e	1064	}
EricLew	0:80ee8f3b695e	1065
EricLew	0:80ee8f3b695e	1066	/* Configure communication */
EricLew	0:80ee8f3b695e	1067	hspi->State = HAL_SPI_STATE_BUSY_RX;
EricLew	0:80ee8f3b695e	1068	hspi->ErrorCode = HAL_SPI_ERROR_NONE;
EricLew	0:80ee8f3b695e	1069	hspi->pRxBuffPtr = pData;
EricLew	0:80ee8f3b695e	1070	hspi->RxXferSize = Size;
EricLew	0:80ee8f3b695e	1071	hspi->RxXferCount = Size;
EricLew	0:80ee8f3b695e	1072	hspi->pTxBuffPtr = (uint8_t *)NULL;
EricLew	0:80ee8f3b695e	1073	hspi->TxXferSize = 0;
EricLew	0:80ee8f3b695e	1074	hspi->TxXferCount = 0;
EricLew	0:80ee8f3b695e	1075
EricLew	0:80ee8f3b695e	1076	if((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES))
EricLew	0:80ee8f3b695e	1077	{
EricLew	0:80ee8f3b695e	1078	/* Process Unlocked */
EricLew	0:80ee8f3b695e	1079	__HAL_UNLOCK(hspi);
EricLew	0:80ee8f3b695e	1080	/* the receive process is not supported in 2Lines direction master mode */
EricLew	0:80ee8f3b695e	1081	/* in this we call the TransmitReceive process */
EricLew	0:80ee8f3b695e	1082	return HAL_SPI_TransmitReceive_IT(hspi,pData,pData,Size);
EricLew	0:80ee8f3b695e	1083	}
EricLew	0:80ee8f3b695e	1084
EricLew	0:80ee8f3b695e	1085	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
EricLew	0:80ee8f3b695e	1086	{
EricLew	0:80ee8f3b695e	1087	hspi->CRCSize = 1;
EricLew	0:80ee8f3b695e	1088	if((hspi->Init.DataSize <= SPI_DATASIZE_8BIT) && (hspi->Init.CRCLength == SPI_CRC_LENGTH_16BIT))
EricLew	0:80ee8f3b695e	1089	{
EricLew	0:80ee8f3b695e	1090	hspi->CRCSize = 2;
EricLew	0:80ee8f3b695e	1091	}
EricLew	0:80ee8f3b695e	1092	}
EricLew	0:80ee8f3b695e	1093	else
EricLew	0:80ee8f3b695e	1094	{
EricLew	0:80ee8f3b695e	1095	hspi->CRCSize = 0;
EricLew	0:80ee8f3b695e	1096	}
EricLew	0:80ee8f3b695e	1097
EricLew	0:80ee8f3b695e	1098	hspi->TxISR = NULL;
EricLew	0:80ee8f3b695e	1099	/* check the data size to adapt Rx threshold and the set the function for IT treatment */
EricLew	0:80ee8f3b695e	1100	if(hspi->Init.DataSize > SPI_DATASIZE_8BIT )
EricLew	0:80ee8f3b695e	1101	{
EricLew	0:80ee8f3b695e	1102	/* set fiforxthresold according the reception data length: 16 bit */
EricLew	0:80ee8f3b695e	1103	CLEAR_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
EricLew	0:80ee8f3b695e	1104	hspi->RxISR = SPI_RxISR_16BIT;
EricLew	0:80ee8f3b695e	1105	}
EricLew	0:80ee8f3b695e	1106	else
EricLew	0:80ee8f3b695e	1107	{
EricLew	0:80ee8f3b695e	1108	/* set fiforxthresold according the reception data length: 8 bit */
EricLew	0:80ee8f3b695e	1109	SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
EricLew	0:80ee8f3b695e	1110	hspi->RxISR = SPI_RxISR_8BIT;
EricLew	0:80ee8f3b695e	1111	}
EricLew	0:80ee8f3b695e	1112
EricLew	0:80ee8f3b695e	1113	/* Configure communication direction : 1Line */
EricLew	0:80ee8f3b695e	1114	if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
EricLew	0:80ee8f3b695e	1115	{
EricLew	0:80ee8f3b695e	1116	SPI_1LINE_RX(hspi);
EricLew	0:80ee8f3b695e	1117	}
EricLew	0:80ee8f3b695e	1118
EricLew	0:80ee8f3b695e	1119	/* Reset CRC Calculation */
EricLew	0:80ee8f3b695e	1120	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
EricLew	0:80ee8f3b695e	1121	{
EricLew	0:80ee8f3b695e	1122	SPI_RESET_CRC(hspi);
EricLew	0:80ee8f3b695e	1123	}
EricLew	0:80ee8f3b695e	1124
EricLew	0:80ee8f3b695e	1125	/* Enable TXE and ERR interrupt */
EricLew	0:80ee8f3b695e	1126	__HAL_SPI_ENABLE_IT(hspi, (SPI_IT_RXNE \| SPI_IT_ERR));
EricLew	0:80ee8f3b695e	1127
EricLew	0:80ee8f3b695e	1128	/* Check if the SPI is already enabled */
EricLew	0:80ee8f3b695e	1129	if((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
EricLew	0:80ee8f3b695e	1130	{
EricLew	0:80ee8f3b695e	1131	/* Enable SPI peripheral */
EricLew	0:80ee8f3b695e	1132	__HAL_SPI_ENABLE(hspi);
EricLew	0:80ee8f3b695e	1133	}
EricLew	0:80ee8f3b695e	1134
EricLew	0:80ee8f3b695e	1135	error :
EricLew	0:80ee8f3b695e	1136	/* Process Unlocked */
EricLew	0:80ee8f3b695e	1137	__HAL_UNLOCK(hspi);
EricLew	0:80ee8f3b695e	1138	return errorcode;
EricLew	0:80ee8f3b695e	1139	}
EricLew	0:80ee8f3b695e	1140
EricLew	0:80ee8f3b695e	1141	/**
EricLew	0:80ee8f3b695e	1142	* @brief Transmit and Receive an amount of data in non-blocking mode with Interrupt.
EricLew	0:80ee8f3b695e	1143	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
EricLew	0:80ee8f3b695e	1144	* the configuration information for SPI module.
EricLew	0:80ee8f3b695e	1145	* @param pTxData: pointer to transmission data buffer
EricLew	0:80ee8f3b695e	1146	* @param pRxData: pointer to reception data buffer
EricLew	0:80ee8f3b695e	1147	* @param Size: amount of data to be sent and received
EricLew	0:80ee8f3b695e	1148	* @retval HAL status
EricLew	0:80ee8f3b695e	1149	*/
EricLew	0:80ee8f3b695e	1150	HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef hspi, uint8_t pTxData, uint8_t *pRxData, uint16_t Size)
EricLew	0:80ee8f3b695e	1151	{
EricLew	0:80ee8f3b695e	1152	HAL_StatusTypeDef errorcode = HAL_OK;
EricLew	0:80ee8f3b695e	1153	assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
EricLew	0:80ee8f3b695e	1154
EricLew	0:80ee8f3b695e	1155	/* Process locked */
EricLew	0:80ee8f3b695e	1156	__HAL_LOCK(hspi);
EricLew	0:80ee8f3b695e	1157
EricLew	0:80ee8f3b695e	1158	if(!((hspi->State == HAL_SPI_STATE_READY) \|\| \
EricLew	0:80ee8f3b695e	1159	((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->State == HAL_SPI_STATE_BUSY_RX))))
EricLew	0:80ee8f3b695e	1160	{
EricLew	0:80ee8f3b695e	1161	errorcode = HAL_BUSY;
EricLew	0:80ee8f3b695e	1162	goto error;
EricLew	0:80ee8f3b695e	1163	}
EricLew	0:80ee8f3b695e	1164
EricLew	0:80ee8f3b695e	1165	if((pTxData == NULL ) \|\| (pRxData == NULL ) \|\| (Size == 0))
EricLew	0:80ee8f3b695e	1166	{
EricLew	0:80ee8f3b695e	1167	errorcode = HAL_ERROR;
EricLew	0:80ee8f3b695e	1168	goto error;
EricLew	0:80ee8f3b695e	1169	}
EricLew	0:80ee8f3b695e	1170
EricLew	0:80ee8f3b695e	1171	hspi->CRCSize = 0;
EricLew	0:80ee8f3b695e	1172	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
EricLew	0:80ee8f3b695e	1173	{
EricLew	0:80ee8f3b695e	1174	hspi->CRCSize = 1;
EricLew	0:80ee8f3b695e	1175	if((hspi->Init.DataSize <= SPI_DATASIZE_8BIT) && (hspi->Init.CRCLength == SPI_CRC_LENGTH_16BIT))
EricLew	0:80ee8f3b695e	1176	{
EricLew	0:80ee8f3b695e	1177	hspi->CRCSize = 2;
EricLew	0:80ee8f3b695e	1178	}
EricLew	0:80ee8f3b695e	1179	}
EricLew	0:80ee8f3b695e	1180
EricLew	0:80ee8f3b695e	1181	if(hspi->State != HAL_SPI_STATE_BUSY_RX)
EricLew	0:80ee8f3b695e	1182	{
EricLew	0:80ee8f3b695e	1183	hspi->State = HAL_SPI_STATE_BUSY_TX_RX;
EricLew	0:80ee8f3b695e	1184	}
EricLew	0:80ee8f3b695e	1185
EricLew	0:80ee8f3b695e	1186	hspi->ErrorCode = HAL_SPI_ERROR_NONE;
EricLew	0:80ee8f3b695e	1187	hspi->pTxBuffPtr = pTxData;
EricLew	0:80ee8f3b695e	1188	hspi->TxXferSize = Size;
EricLew	0:80ee8f3b695e	1189	hspi->TxXferCount = Size;
EricLew	0:80ee8f3b695e	1190	hspi->pRxBuffPtr = pRxData;
EricLew	0:80ee8f3b695e	1191	hspi->RxXferSize = Size;
EricLew	0:80ee8f3b695e	1192	hspi->RxXferCount = Size;
EricLew	0:80ee8f3b695e	1193
EricLew	0:80ee8f3b695e	1194	/* Set the function for IT treatment */
EricLew	0:80ee8f3b695e	1195	if(hspi->Init.DataSize > SPI_DATASIZE_8BIT )
EricLew	0:80ee8f3b695e	1196	{
EricLew	0:80ee8f3b695e	1197	hspi->RxISR = SPI_2linesRxISR_16BIT;
EricLew	0:80ee8f3b695e	1198	hspi->TxISR = SPI_2linesTxISR_16BIT;
EricLew	0:80ee8f3b695e	1199	}
EricLew	0:80ee8f3b695e	1200	else
EricLew	0:80ee8f3b695e	1201	{
EricLew	0:80ee8f3b695e	1202	hspi->RxISR = SPI_2linesRxISR_8BIT;
EricLew	0:80ee8f3b695e	1203	hspi->TxISR = SPI_2linesTxISR_8BIT;
EricLew	0:80ee8f3b695e	1204	}
EricLew	0:80ee8f3b695e	1205
EricLew	0:80ee8f3b695e	1206	/* Reset CRC Calculation */
EricLew	0:80ee8f3b695e	1207	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
EricLew	0:80ee8f3b695e	1208	{
EricLew	0:80ee8f3b695e	1209	SPI_RESET_CRC(hspi);
EricLew	0:80ee8f3b695e	1210	}
EricLew	0:80ee8f3b695e	1211
EricLew	0:80ee8f3b695e	1212	/* check if packing mode is enabled and if there is more than 2 data to receive */
EricLew	0:80ee8f3b695e	1213	if((hspi->Init.DataSize > SPI_DATASIZE_8BIT) \|\| (hspi->RxXferCount >= 2))
EricLew	0:80ee8f3b695e	1214	{
EricLew	0:80ee8f3b695e	1215	/* set fiforxthresold according the reception data length: 16 bit */
EricLew	0:80ee8f3b695e	1216	CLEAR_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
EricLew	0:80ee8f3b695e	1217	}
EricLew	0:80ee8f3b695e	1218	else
EricLew	0:80ee8f3b695e	1219	{
EricLew	0:80ee8f3b695e	1220	/* set fiforxthresold according the reception data length: 8 bit */
EricLew	0:80ee8f3b695e	1221	SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
EricLew	0:80ee8f3b695e	1222	}
EricLew	0:80ee8f3b695e	1223
EricLew	0:80ee8f3b695e	1224	/* Enable TXE, RXNE and ERR interrupt */
EricLew	0:80ee8f3b695e	1225	__HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE \| SPI_IT_RXNE \| SPI_IT_ERR));
EricLew	0:80ee8f3b695e	1226
EricLew	0:80ee8f3b695e	1227	/* Check if the SPI is already enabled */
EricLew	0:80ee8f3b695e	1228	if((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
EricLew	0:80ee8f3b695e	1229	{
EricLew	0:80ee8f3b695e	1230	/* Enable SPI peripheral */
EricLew	0:80ee8f3b695e	1231	__HAL_SPI_ENABLE(hspi);
EricLew	0:80ee8f3b695e	1232	}
EricLew	0:80ee8f3b695e	1233
EricLew	0:80ee8f3b695e	1234	error :
EricLew	0:80ee8f3b695e	1235	/* Process Unlocked */
EricLew	0:80ee8f3b695e	1236	__HAL_UNLOCK(hspi);
EricLew	0:80ee8f3b695e	1237	return errorcode;
EricLew	0:80ee8f3b695e	1238	}
EricLew	0:80ee8f3b695e	1239
EricLew	0:80ee8f3b695e	1240	/**
EricLew	0:80ee8f3b695e	1241	* @brief Transmit an amount of data in non-blocking mode with DMA.
EricLew	0:80ee8f3b695e	1242	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
EricLew	0:80ee8f3b695e	1243	* the configuration information for SPI module.
EricLew	0:80ee8f3b695e	1244	* @param pData: pointer to data buffer
EricLew	0:80ee8f3b695e	1245	* @param Size: amount of data to be sent
EricLew	0:80ee8f3b695e	1246	* @retval HAL status
EricLew	0:80ee8f3b695e	1247	*/
EricLew	0:80ee8f3b695e	1248	HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef hspi, uint8_t pData, uint16_t Size)
EricLew	0:80ee8f3b695e	1249	{
EricLew	0:80ee8f3b695e	1250	HAL_StatusTypeDef errorcode = HAL_OK;
EricLew	0:80ee8f3b695e	1251	assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
EricLew	0:80ee8f3b695e	1252
EricLew	0:80ee8f3b695e	1253	/* Process Locked */
EricLew	0:80ee8f3b695e	1254	__HAL_LOCK(hspi);
EricLew	0:80ee8f3b695e	1255
EricLew	0:80ee8f3b695e	1256	if(hspi->State != HAL_SPI_STATE_READY)
EricLew	0:80ee8f3b695e	1257	{
EricLew	0:80ee8f3b695e	1258	errorcode = HAL_BUSY;
EricLew	0:80ee8f3b695e	1259	goto error;
EricLew	0:80ee8f3b695e	1260	}
EricLew	0:80ee8f3b695e	1261
EricLew	0:80ee8f3b695e	1262	if((pData == NULL) \|\| (Size == 0))
EricLew	0:80ee8f3b695e	1263	{
EricLew	0:80ee8f3b695e	1264	errorcode = HAL_ERROR;
EricLew	0:80ee8f3b695e	1265	goto error;
EricLew	0:80ee8f3b695e	1266	}
EricLew	0:80ee8f3b695e	1267
EricLew	0:80ee8f3b695e	1268	hspi->State = HAL_SPI_STATE_BUSY_TX;
EricLew	0:80ee8f3b695e	1269	hspi->ErrorCode = HAL_SPI_ERROR_NONE;
EricLew	0:80ee8f3b695e	1270	hspi->pTxBuffPtr = pData;
EricLew	0:80ee8f3b695e	1271	hspi->TxXferSize = Size;
EricLew	0:80ee8f3b695e	1272	hspi->TxXferCount = Size;
EricLew	0:80ee8f3b695e	1273	hspi->pRxBuffPtr = (uint8_t *)NULL;
EricLew	0:80ee8f3b695e	1274	hspi->RxXferSize = 0;
EricLew	0:80ee8f3b695e	1275	hspi->RxXferCount = 0;
EricLew	0:80ee8f3b695e	1276
EricLew	0:80ee8f3b695e	1277	/* Configure communication direction : 1Line */
EricLew	0:80ee8f3b695e	1278	if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
EricLew	0:80ee8f3b695e	1279	{
EricLew	0:80ee8f3b695e	1280	SPI_1LINE_TX(hspi);
EricLew	0:80ee8f3b695e	1281	}
EricLew	0:80ee8f3b695e	1282
EricLew	0:80ee8f3b695e	1283	/* Reset CRC Calculation */
EricLew	0:80ee8f3b695e	1284	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
EricLew	0:80ee8f3b695e	1285	{
EricLew	0:80ee8f3b695e	1286	SPI_RESET_CRC(hspi);
EricLew	0:80ee8f3b695e	1287	}
EricLew	0:80ee8f3b695e	1288
EricLew	0:80ee8f3b695e	1289	/* Set the SPI TxDMA Half transfer complete callback */
EricLew	0:80ee8f3b695e	1290	hspi->hdmatx->XferHalfCpltCallback = SPI_DMAHalfTransmitCplt;
EricLew	0:80ee8f3b695e	1291
EricLew	0:80ee8f3b695e	1292	/* Set the SPI TxDMA transfer complete callback */
EricLew	0:80ee8f3b695e	1293	hspi->hdmatx->XferCpltCallback = SPI_DMATransmitCplt;
EricLew	0:80ee8f3b695e	1294
EricLew	0:80ee8f3b695e	1295	/* Set the DMA error callback */
EricLew	0:80ee8f3b695e	1296	hspi->hdmatx->XferErrorCallback = SPI_DMAError;
EricLew	0:80ee8f3b695e	1297
EricLew	0:80ee8f3b695e	1298	CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_LDMATX);
EricLew	0:80ee8f3b695e	1299	/* packing mode is enabled only if the DMA setting is HALWORD */
EricLew	0:80ee8f3b695e	1300	if((hspi->Init.DataSize <= SPI_DATASIZE_8BIT) && (hspi->hdmatx->Init.MemDataAlignment == DMA_MDATAALIGN_HALFWORD))
EricLew	0:80ee8f3b695e	1301	{
EricLew	0:80ee8f3b695e	1302	/* Check the even/odd of the data size + crc if enabled */
EricLew	0:80ee8f3b695e	1303	if((hspi->TxXferCount & 0x1) == 0)
EricLew	0:80ee8f3b695e	1304	{
EricLew	0:80ee8f3b695e	1305	CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_LDMATX);
EricLew	0:80ee8f3b695e	1306	hspi->TxXferCount = (hspi->TxXferCount >> 1);
EricLew	0:80ee8f3b695e	1307	}
EricLew	0:80ee8f3b695e	1308	else
EricLew	0:80ee8f3b695e	1309	{
EricLew	0:80ee8f3b695e	1310	SET_BIT(hspi->Instance->CR2, SPI_CR2_LDMATX);
EricLew	0:80ee8f3b695e	1311	hspi->TxXferCount = (hspi->TxXferCount >> 1) + 1;
EricLew	0:80ee8f3b695e	1312	}
EricLew	0:80ee8f3b695e	1313	}
EricLew	0:80ee8f3b695e	1314
EricLew	0:80ee8f3b695e	1315	/* Enable the Tx DMA channel */
EricLew	0:80ee8f3b695e	1316	HAL_DMA_Start_IT(hspi->hdmatx, (uint32_t)hspi->pTxBuffPtr, (uint32_t)&hspi->Instance->DR, hspi->TxXferCount);
EricLew	0:80ee8f3b695e	1317
EricLew	0:80ee8f3b695e	1318	/* Check if the SPI is already enabled */
EricLew	0:80ee8f3b695e	1319	if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
EricLew	0:80ee8f3b695e	1320	{
EricLew	0:80ee8f3b695e	1321	/* Enable SPI peripheral */
EricLew	0:80ee8f3b695e	1322	__HAL_SPI_ENABLE(hspi);
EricLew	0:80ee8f3b695e	1323	}
EricLew	0:80ee8f3b695e	1324
EricLew	0:80ee8f3b695e	1325	/* Enable Tx DMA Request */
EricLew	0:80ee8f3b695e	1326	SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
EricLew	0:80ee8f3b695e	1327
EricLew	0:80ee8f3b695e	1328	error :
EricLew	0:80ee8f3b695e	1329	/* Process Unlocked */
EricLew	0:80ee8f3b695e	1330	__HAL_UNLOCK(hspi);
EricLew	0:80ee8f3b695e	1331	return errorcode;
EricLew	0:80ee8f3b695e	1332	}
EricLew	0:80ee8f3b695e	1333
EricLew	0:80ee8f3b695e	1334	/**
EricLew	0:80ee8f3b695e	1335	* @brief Receive an amount of data in non-blocking mode with DMA.
EricLew	0:80ee8f3b695e	1336	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
EricLew	0:80ee8f3b695e	1337	* the configuration information for SPI module.
EricLew	0:80ee8f3b695e	1338	* @param pData: pointer to data buffer
EricLew	0:80ee8f3b695e	1339	* @note When the CRC feature is enabled the pData Length must be Size + 1.
EricLew	0:80ee8f3b695e	1340	* @param Size: amount of data to be sent
EricLew	0:80ee8f3b695e	1341	* @retval HAL status
EricLew	0:80ee8f3b695e	1342	*/
EricLew	0:80ee8f3b695e	1343	HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef hspi, uint8_t pData, uint16_t Size)
EricLew	0:80ee8f3b695e	1344	{
EricLew	0:80ee8f3b695e	1345	HAL_StatusTypeDef errorcode = HAL_OK;
EricLew	0:80ee8f3b695e	1346
EricLew	0:80ee8f3b695e	1347	/* Process Locked */
EricLew	0:80ee8f3b695e	1348	__HAL_LOCK(hspi);
EricLew	0:80ee8f3b695e	1349
EricLew	0:80ee8f3b695e	1350	if(hspi->State != HAL_SPI_STATE_READY)
EricLew	0:80ee8f3b695e	1351	{
EricLew	0:80ee8f3b695e	1352	errorcode = HAL_BUSY;
EricLew	0:80ee8f3b695e	1353	goto error;
EricLew	0:80ee8f3b695e	1354	}
EricLew	0:80ee8f3b695e	1355
EricLew	0:80ee8f3b695e	1356	if((pData == NULL) \|\| (Size == 0))
EricLew	0:80ee8f3b695e	1357	{
EricLew	0:80ee8f3b695e	1358	errorcode = HAL_ERROR;
EricLew	0:80ee8f3b695e	1359	goto error;
EricLew	0:80ee8f3b695e	1360	}
EricLew	0:80ee8f3b695e	1361
EricLew	0:80ee8f3b695e	1362	hspi->State = HAL_SPI_STATE_BUSY_RX;
EricLew	0:80ee8f3b695e	1363	hspi->ErrorCode = HAL_SPI_ERROR_NONE;
EricLew	0:80ee8f3b695e	1364	hspi->pRxBuffPtr = pData;
EricLew	0:80ee8f3b695e	1365	hspi->RxXferSize = Size;
EricLew	0:80ee8f3b695e	1366	hspi->RxXferCount = Size;
EricLew	0:80ee8f3b695e	1367	hspi->pTxBuffPtr = (uint8_t *)NULL;
EricLew	0:80ee8f3b695e	1368	hspi->TxXferSize = 0;
EricLew	0:80ee8f3b695e	1369	hspi->TxXferCount = 0;
EricLew	0:80ee8f3b695e	1370
EricLew	0:80ee8f3b695e	1371	if((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES))
EricLew	0:80ee8f3b695e	1372	{
EricLew	0:80ee8f3b695e	1373	/* Process Unlocked */
EricLew	0:80ee8f3b695e	1374	__HAL_UNLOCK(hspi);
EricLew	0:80ee8f3b695e	1375	/* the receive process is not supported in 2Lines direction master mode */
EricLew	0:80ee8f3b695e	1376	/* in this case we call the TransmitReceive process */
EricLew	0:80ee8f3b695e	1377	return HAL_SPI_TransmitReceive_DMA(hspi,pData,pData,Size);
EricLew	0:80ee8f3b695e	1378	}
EricLew	0:80ee8f3b695e	1379
EricLew	0:80ee8f3b695e	1380	/* Configure communication direction : 1Line */
EricLew	0:80ee8f3b695e	1381	if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
EricLew	0:80ee8f3b695e	1382	{
EricLew	0:80ee8f3b695e	1383	SPI_1LINE_RX(hspi);
EricLew	0:80ee8f3b695e	1384	}
EricLew	0:80ee8f3b695e	1385
EricLew	0:80ee8f3b695e	1386	/* Reset CRC Calculation */
EricLew	0:80ee8f3b695e	1387	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
EricLew	0:80ee8f3b695e	1388	{
EricLew	0:80ee8f3b695e	1389	SPI_RESET_CRC(hspi);
EricLew	0:80ee8f3b695e	1390	}
EricLew	0:80ee8f3b695e	1391
EricLew	0:80ee8f3b695e	1392	/* packing mode management is enabled by the DMA settings */
EricLew	0:80ee8f3b695e	1393	if((hspi->Init.DataSize <= SPI_DATASIZE_8BIT) && (hspi->hdmarx->Init.MemDataAlignment == DMA_MDATAALIGN_HALFWORD))
EricLew	0:80ee8f3b695e	1394	{
EricLew	0:80ee8f3b695e	1395	/* Restriction the DMA data received is not allowed in this mode */
EricLew	0:80ee8f3b695e	1396	errorcode = HAL_ERROR;
EricLew	0:80ee8f3b695e	1397	goto error;
EricLew	0:80ee8f3b695e	1398	}
EricLew	0:80ee8f3b695e	1399
EricLew	0:80ee8f3b695e	1400	CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_LDMARX);
EricLew	0:80ee8f3b695e	1401	if( hspi->Init.DataSize > SPI_DATASIZE_8BIT)
EricLew	0:80ee8f3b695e	1402	{
EricLew	0:80ee8f3b695e	1403	/* set fiforxthresold according the reception data length: 16bit */
EricLew	0:80ee8f3b695e	1404	CLEAR_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
EricLew	0:80ee8f3b695e	1405	}
EricLew	0:80ee8f3b695e	1406	else
EricLew	0:80ee8f3b695e	1407	{
EricLew	0:80ee8f3b695e	1408	/* set fiforxthresold according the reception data length: 8bit */
EricLew	0:80ee8f3b695e	1409	SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
EricLew	0:80ee8f3b695e	1410	}
EricLew	0:80ee8f3b695e	1411
EricLew	0:80ee8f3b695e	1412	/* Set the SPI RxDMA Half transfer complete callback */
EricLew	0:80ee8f3b695e	1413	hspi->hdmarx->XferHalfCpltCallback = SPI_DMAHalfReceiveCplt;
EricLew	0:80ee8f3b695e	1414
EricLew	0:80ee8f3b695e	1415	/* Set the SPI Rx DMA transfer complete callback */
EricLew	0:80ee8f3b695e	1416	hspi->hdmarx->XferCpltCallback = SPI_DMAReceiveCplt;
EricLew	0:80ee8f3b695e	1417
EricLew	0:80ee8f3b695e	1418	/* Set the DMA error callback */
EricLew	0:80ee8f3b695e	1419	hspi->hdmarx->XferErrorCallback = SPI_DMAError;
EricLew	0:80ee8f3b695e	1420
EricLew	0:80ee8f3b695e	1421	/* Enable Rx DMA Request */
EricLew	0:80ee8f3b695e	1422	SET_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
EricLew	0:80ee8f3b695e	1423
EricLew	0:80ee8f3b695e	1424	/* Enable the Rx DMA channel */
EricLew	0:80ee8f3b695e	1425	HAL_DMA_Start_IT(hspi->hdmarx, (uint32_t)&hspi->Instance->DR, (uint32_t)hspi->pRxBuffPtr, hspi->RxXferCount);
EricLew	0:80ee8f3b695e	1426
EricLew	0:80ee8f3b695e	1427	/* Check if the SPI is already enabled */
EricLew	0:80ee8f3b695e	1428	if((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
EricLew	0:80ee8f3b695e	1429	{
EricLew	0:80ee8f3b695e	1430	/* Enable SPI peripheral */
EricLew	0:80ee8f3b695e	1431	__HAL_SPI_ENABLE(hspi);
EricLew	0:80ee8f3b695e	1432	}
EricLew	0:80ee8f3b695e	1433
EricLew	0:80ee8f3b695e	1434	error:
EricLew	0:80ee8f3b695e	1435	/* Process Unlocked */
EricLew	0:80ee8f3b695e	1436	__HAL_UNLOCK(hspi);
EricLew	0:80ee8f3b695e	1437	return errorcode;
EricLew	0:80ee8f3b695e	1438	}
EricLew	0:80ee8f3b695e	1439
EricLew	0:80ee8f3b695e	1440	/**
EricLew	0:80ee8f3b695e	1441	* @brief Transmit and Receive an amount of data in non-blocking mode with DMA.
EricLew	0:80ee8f3b695e	1442	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
EricLew	0:80ee8f3b695e	1443	* the configuration information for SPI module.
EricLew	0:80ee8f3b695e	1444	* @param pTxData: pointer to transmission data buffer
EricLew	0:80ee8f3b695e	1445	* @param pRxData: pointer to reception data buffer
EricLew	0:80ee8f3b695e	1446	* @note When the CRC feature is enabled the pRxData Length must be Size + 1
EricLew	0:80ee8f3b695e	1447	* @param Size: amount of data to be sent
EricLew	0:80ee8f3b695e	1448	* @retval HAL status
EricLew	0:80ee8f3b695e	1449	*/
EricLew	0:80ee8f3b695e	1450	HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef hspi, uint8_t pTxData, uint8_t *pRxData, uint16_t Size)
EricLew	0:80ee8f3b695e	1451	{
EricLew	0:80ee8f3b695e	1452	HAL_StatusTypeDef errorcode = HAL_OK;
EricLew	0:80ee8f3b695e	1453	assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
EricLew	0:80ee8f3b695e	1454
EricLew	0:80ee8f3b695e	1455	/* Process locked */
EricLew	0:80ee8f3b695e	1456	__HAL_LOCK(hspi);
EricLew	0:80ee8f3b695e	1457
EricLew	0:80ee8f3b695e	1458	if(!((hspi->State == HAL_SPI_STATE_READY) \|\|
EricLew	0:80ee8f3b695e	1459	((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->State == HAL_SPI_STATE_BUSY_RX))))
EricLew	0:80ee8f3b695e	1460	{
EricLew	0:80ee8f3b695e	1461	errorcode = HAL_BUSY;
EricLew	0:80ee8f3b695e	1462	goto error;
EricLew	0:80ee8f3b695e	1463	}
EricLew	0:80ee8f3b695e	1464
EricLew	0:80ee8f3b695e	1465	if((pTxData == NULL ) \|\| (pRxData == NULL ) \|\| (Size == 0))
EricLew	0:80ee8f3b695e	1466	{
EricLew	0:80ee8f3b695e	1467	errorcode = HAL_ERROR;
EricLew	0:80ee8f3b695e	1468	goto error;
EricLew	0:80ee8f3b695e	1469	}
EricLew	0:80ee8f3b695e	1470
EricLew	0:80ee8f3b695e	1471	/* check if the transmit Receive function is not called by a receive master */
EricLew	0:80ee8f3b695e	1472	if(hspi->State != HAL_SPI_STATE_BUSY_RX)
EricLew	0:80ee8f3b695e	1473	{
EricLew	0:80ee8f3b695e	1474	hspi->State = HAL_SPI_STATE_BUSY_TX_RX;
EricLew	0:80ee8f3b695e	1475	}
EricLew	0:80ee8f3b695e	1476
EricLew	0:80ee8f3b695e	1477	hspi->ErrorCode = HAL_SPI_ERROR_NONE;
EricLew	0:80ee8f3b695e	1478	hspi->pTxBuffPtr = (uint8_t *)pTxData;
EricLew	0:80ee8f3b695e	1479	hspi->TxXferSize = Size;
EricLew	0:80ee8f3b695e	1480	hspi->TxXferCount = Size;
EricLew	0:80ee8f3b695e	1481	hspi->pRxBuffPtr = (uint8_t *)pRxData;
EricLew	0:80ee8f3b695e	1482	hspi->RxXferSize = Size;
EricLew	0:80ee8f3b695e	1483	hspi->RxXferCount = Size;
EricLew	0:80ee8f3b695e	1484
EricLew	0:80ee8f3b695e	1485	/* Reset CRC Calculation + increase the rxsize */
EricLew	0:80ee8f3b695e	1486	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
EricLew	0:80ee8f3b695e	1487	{
EricLew	0:80ee8f3b695e	1488	SPI_RESET_CRC(hspi);
EricLew	0:80ee8f3b695e	1489	}
EricLew	0:80ee8f3b695e	1490
EricLew	0:80ee8f3b695e	1491	/* Reset the threshold bit */
EricLew	0:80ee8f3b695e	1492	CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_LDMATX \| SPI_CR2_LDMARX);
EricLew	0:80ee8f3b695e	1493
EricLew	0:80ee8f3b695e	1494	/* the packing mode management is enabled by the DMA settings according the spi data size */
EricLew	0:80ee8f3b695e	1495	if(hspi->Init.DataSize > SPI_DATASIZE_8BIT)
EricLew	0:80ee8f3b695e	1496	{
EricLew	0:80ee8f3b695e	1497	/* set fiforxthreshold according the reception data length: 16bit */
EricLew	0:80ee8f3b695e	1498	CLEAR_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
EricLew	0:80ee8f3b695e	1499	}
EricLew	0:80ee8f3b695e	1500	else
EricLew	0:80ee8f3b695e	1501	{
EricLew	0:80ee8f3b695e	1502	/* set fiforxthresold according the reception data length: 8bit */
EricLew	0:80ee8f3b695e	1503	SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
EricLew	0:80ee8f3b695e	1504
EricLew	0:80ee8f3b695e	1505	if(hspi->hdmatx->Init.MemDataAlignment == DMA_MDATAALIGN_HALFWORD)
EricLew	0:80ee8f3b695e	1506	{
EricLew	0:80ee8f3b695e	1507	if((hspi->TxXferSize & 0x1) == 0x0)
EricLew	0:80ee8f3b695e	1508	{
EricLew	0:80ee8f3b695e	1509	CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_LDMATX);
EricLew	0:80ee8f3b695e	1510	hspi->TxXferCount = hspi->TxXferCount >> 1;
EricLew	0:80ee8f3b695e	1511	}
EricLew	0:80ee8f3b695e	1512	else
EricLew	0:80ee8f3b695e	1513	{
EricLew	0:80ee8f3b695e	1514	SET_BIT(hspi->Instance->CR2, SPI_CR2_LDMATX);
EricLew	0:80ee8f3b695e	1515	hspi->TxXferCount = (hspi->TxXferCount >> 1) + 1;
EricLew	0:80ee8f3b695e	1516	}
EricLew	0:80ee8f3b695e	1517	}
EricLew	0:80ee8f3b695e	1518
EricLew	0:80ee8f3b695e	1519	if(hspi->hdmarx->Init.MemDataAlignment == DMA_MDATAALIGN_HALFWORD)
EricLew	0:80ee8f3b695e	1520	{
EricLew	0:80ee8f3b695e	1521	/* set fiforxthresold according the reception data length: 16bit */
EricLew	0:80ee8f3b695e	1522	CLEAR_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
EricLew	0:80ee8f3b695e	1523
EricLew	0:80ee8f3b695e	1524	if((hspi->RxXferCount & 0x1) == 0x0 )
EricLew	0:80ee8f3b695e	1525	{
EricLew	0:80ee8f3b695e	1526	CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_LDMARX);
EricLew	0:80ee8f3b695e	1527	hspi->RxXferCount = hspi->RxXferCount >> 1;
EricLew	0:80ee8f3b695e	1528	}
EricLew	0:80ee8f3b695e	1529	else
EricLew	0:80ee8f3b695e	1530	{
EricLew	0:80ee8f3b695e	1531	SET_BIT(hspi->Instance->CR2, SPI_CR2_LDMARX);
EricLew	0:80ee8f3b695e	1532	hspi->RxXferCount = (hspi->RxXferCount >> 1) + 1;
EricLew	0:80ee8f3b695e	1533	}
EricLew	0:80ee8f3b695e	1534	}
EricLew	0:80ee8f3b695e	1535	}
EricLew	0:80ee8f3b695e	1536
EricLew	0:80ee8f3b695e	1537	/* Set the SPI Rx DMA transfer complete callback if the transfer request is a
EricLew	0:80ee8f3b695e	1538	reception request (RXNE) */
EricLew	0:80ee8f3b695e	1539	if(hspi->State == HAL_SPI_STATE_BUSY_RX)
EricLew	0:80ee8f3b695e	1540	{
EricLew	0:80ee8f3b695e	1541	/* Set the SPI Rx DMA Half transfer complete callback */
EricLew	0:80ee8f3b695e	1542	hspi->hdmarx->XferHalfCpltCallback = SPI_DMAHalfReceiveCplt;
EricLew	0:80ee8f3b695e	1543	hspi->hdmarx->XferCpltCallback = SPI_DMAReceiveCplt;
EricLew	0:80ee8f3b695e	1544	}
EricLew	0:80ee8f3b695e	1545	else
EricLew	0:80ee8f3b695e	1546	{
EricLew	0:80ee8f3b695e	1547	/* Set the SPI Rx DMA Half transfer complete callback */
EricLew	0:80ee8f3b695e	1548	hspi->hdmarx->XferHalfCpltCallback = SPI_DMAHalfTransmitReceiveCplt;
EricLew	0:80ee8f3b695e	1549	hspi->hdmarx->XferCpltCallback = SPI_DMATransmitReceiveCplt;
EricLew	0:80ee8f3b695e	1550	}
EricLew	0:80ee8f3b695e	1551
EricLew	0:80ee8f3b695e	1552	/* Set the DMA error callback */
EricLew	0:80ee8f3b695e	1553	hspi->hdmarx->XferErrorCallback = SPI_DMAError;
EricLew	0:80ee8f3b695e	1554
EricLew	0:80ee8f3b695e	1555	/* Enable Rx DMA Request */
EricLew	0:80ee8f3b695e	1556	SET_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
EricLew	0:80ee8f3b695e	1557
EricLew	0:80ee8f3b695e	1558	/* Enable the Rx DMA channel */
EricLew	0:80ee8f3b695e	1559	HAL_DMA_Start_IT(hspi->hdmarx, (uint32_t)&hspi->Instance->DR, (uint32_t) hspi->pRxBuffPtr, hspi->RxXferCount);
EricLew	0:80ee8f3b695e	1560
EricLew	0:80ee8f3b695e	1561	/* Set the SPI Tx DMA transfer complete callback as NULL because the communication closing
EricLew	0:80ee8f3b695e	1562	is performed in DMA reception complete callback */
EricLew	0:80ee8f3b695e	1563	hspi->hdmatx->XferHalfCpltCallback = NULL;
EricLew	0:80ee8f3b695e	1564	hspi->hdmatx->XferCpltCallback = NULL;
EricLew	0:80ee8f3b695e	1565
EricLew	0:80ee8f3b695e	1566	/* Set the DMA error callback */
EricLew	0:80ee8f3b695e	1567	hspi->hdmatx->XferErrorCallback = SPI_DMAError;
EricLew	0:80ee8f3b695e	1568
EricLew	0:80ee8f3b695e	1569	/* Enable the Tx DMA channel */
EricLew	0:80ee8f3b695e	1570	HAL_DMA_Start_IT(hspi->hdmatx, (uint32_t)hspi->pTxBuffPtr, (uint32_t)&hspi->Instance->DR, hspi->TxXferCount);
EricLew	0:80ee8f3b695e	1571
EricLew	0:80ee8f3b695e	1572	/* Check if the SPI is already enabled */
EricLew	0:80ee8f3b695e	1573	if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
EricLew	0:80ee8f3b695e	1574	{
EricLew	0:80ee8f3b695e	1575	/* Enable SPI peripheral */
EricLew	0:80ee8f3b695e	1576	__HAL_SPI_ENABLE(hspi);
EricLew	0:80ee8f3b695e	1577	}
EricLew	0:80ee8f3b695e	1578
EricLew	0:80ee8f3b695e	1579	/* Enable Tx DMA Request */
EricLew	0:80ee8f3b695e	1580	SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
EricLew	0:80ee8f3b695e	1581
EricLew	0:80ee8f3b695e	1582	error :
EricLew	0:80ee8f3b695e	1583	/* Process Unlocked */
EricLew	0:80ee8f3b695e	1584	__HAL_UNLOCK(hspi);
EricLew	0:80ee8f3b695e	1585	return errorcode;
EricLew	0:80ee8f3b695e	1586	}
EricLew	0:80ee8f3b695e	1587
EricLew	0:80ee8f3b695e	1588	/**
EricLew	0:80ee8f3b695e	1589	* @brief Pause the DMA Transfer.
EricLew	0:80ee8f3b695e	1590	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
EricLew	0:80ee8f3b695e	1591	* the configuration information for the specified SPI module.
EricLew	0:80ee8f3b695e	1592	* @retval HAL status
EricLew	0:80ee8f3b695e	1593	*/
EricLew	0:80ee8f3b695e	1594	HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi)
EricLew	0:80ee8f3b695e	1595	{
EricLew	0:80ee8f3b695e	1596	/* Process Locked */
EricLew	0:80ee8f3b695e	1597	__HAL_LOCK(hspi);
EricLew	0:80ee8f3b695e	1598
EricLew	0:80ee8f3b695e	1599	/* Disable the SPI DMA Tx & Rx requests */
EricLew	0:80ee8f3b695e	1600	CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN \| SPI_CR2_RXDMAEN);
EricLew	0:80ee8f3b695e	1601
EricLew	0:80ee8f3b695e	1602	/* Process Unlocked */
EricLew	0:80ee8f3b695e	1603	__HAL_UNLOCK(hspi);
EricLew	0:80ee8f3b695e	1604
EricLew	0:80ee8f3b695e	1605	return HAL_OK;
EricLew	0:80ee8f3b695e	1606	}
EricLew	0:80ee8f3b695e	1607
EricLew	0:80ee8f3b695e	1608	/**
EricLew	0:80ee8f3b695e	1609	* @brief Resume the DMA Transfer.
EricLew	0:80ee8f3b695e	1610	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
EricLew	0:80ee8f3b695e	1611	* the configuration information for the specified SPI module.
EricLew	0:80ee8f3b695e	1612	* @retval HAL status
EricLew	0:80ee8f3b695e	1613	*/
EricLew	0:80ee8f3b695e	1614	HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi)
EricLew	0:80ee8f3b695e	1615	{
EricLew	0:80ee8f3b695e	1616	/* Process Locked */
EricLew	0:80ee8f3b695e	1617	__HAL_LOCK(hspi);
EricLew	0:80ee8f3b695e	1618
EricLew	0:80ee8f3b695e	1619	/* Enable the SPI DMA Tx & Rx requests */
EricLew	0:80ee8f3b695e	1620	SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN \| SPI_CR2_RXDMAEN);
EricLew	0:80ee8f3b695e	1621
EricLew	0:80ee8f3b695e	1622	/* Process Unlocked */
EricLew	0:80ee8f3b695e	1623	__HAL_UNLOCK(hspi);
EricLew	0:80ee8f3b695e	1624
EricLew	0:80ee8f3b695e	1625	return HAL_OK;
EricLew	0:80ee8f3b695e	1626	}
EricLew	0:80ee8f3b695e	1627
EricLew	0:80ee8f3b695e	1628	/**
EricLew	0:80ee8f3b695e	1629	* @brief Stop the DMA Transfer.
EricLew	0:80ee8f3b695e	1630	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
EricLew	0:80ee8f3b695e	1631	* the configuration information for the specified SPI module.
EricLew	0:80ee8f3b695e	1632	* @retval HAL status
EricLew	0:80ee8f3b695e	1633	*/
EricLew	0:80ee8f3b695e	1634	HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi)
EricLew	0:80ee8f3b695e	1635	{
EricLew	0:80ee8f3b695e	1636	/* The Lock is not implemented on this API to allow the user application
EricLew	0:80ee8f3b695e	1637	to call the HAL SPI API under callbacks HAL_SPI_TxCpltCallback() or HAL_SPI_RxCpltCallback() or HAL_SPI_TxRxCpltCallback():
EricLew	0:80ee8f3b695e	1638	when calling HAL_DMA_Abort() API the DMA TX/RX Transfer complete interrupt is generated
EricLew	0:80ee8f3b695e	1639	and the correspond call back is executed HAL_SPI_TxCpltCallback() or HAL_SPI_RxCpltCallback() or HAL_SPI_TxRxCpltCallback()
EricLew	0:80ee8f3b695e	1640	*/
EricLew	0:80ee8f3b695e	1641
EricLew	0:80ee8f3b695e	1642	/* Abort the SPI DMA tx channel */
EricLew	0:80ee8f3b695e	1643	if(hspi->hdmatx != NULL)
EricLew	0:80ee8f3b695e	1644	{
EricLew	0:80ee8f3b695e	1645	HAL_DMA_Abort(hspi->hdmatx);
EricLew	0:80ee8f3b695e	1646	}
EricLew	0:80ee8f3b695e	1647	/* Abort the SPI DMA rx channel */
EricLew	0:80ee8f3b695e	1648	if(hspi->hdmarx != NULL)
EricLew	0:80ee8f3b695e	1649	{
EricLew	0:80ee8f3b695e	1650	HAL_DMA_Abort(hspi->hdmarx);
EricLew	0:80ee8f3b695e	1651	}
EricLew	0:80ee8f3b695e	1652
EricLew	0:80ee8f3b695e	1653	/* Disable the SPI DMA Tx & Rx requests */
EricLew	0:80ee8f3b695e	1654	CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN \| SPI_CR2_RXDMAEN);
EricLew	0:80ee8f3b695e	1655	hspi->State = HAL_SPI_STATE_READY;
EricLew	0:80ee8f3b695e	1656	return HAL_OK;
EricLew	0:80ee8f3b695e	1657	}
EricLew	0:80ee8f3b695e	1658
EricLew	0:80ee8f3b695e	1659	/**
EricLew	0:80ee8f3b695e	1660	* @brief Handle SPI interrupt request.
EricLew	0:80ee8f3b695e	1661	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
EricLew	0:80ee8f3b695e	1662	* the configuration information for the specified SPI module.
EricLew	0:80ee8f3b695e	1663	* @retval None
EricLew	0:80ee8f3b695e	1664	*/
EricLew	0:80ee8f3b695e	1665	void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi)
EricLew	0:80ee8f3b695e	1666	{
EricLew	0:80ee8f3b695e	1667	uint32_t itsource = hspi->Instance->CR2;
EricLew	0:80ee8f3b695e	1668	uint32_t itflag = hspi->Instance->SR;
EricLew	0:80ee8f3b695e	1669
EricLew	0:80ee8f3b695e	1670	/* SPI in mode Receiver ----------------------------------------------------*/
EricLew	0:80ee8f3b695e	1671	if(((itflag & SPI_FLAG_OVR) == RESET) &&
EricLew	0:80ee8f3b695e	1672	((itflag & SPI_FLAG_RXNE) != RESET) && ((itsource & SPI_IT_RXNE) != RESET))
EricLew	0:80ee8f3b695e	1673	{
EricLew	0:80ee8f3b695e	1674	hspi->RxISR(hspi);
EricLew	0:80ee8f3b695e	1675	return;
EricLew	0:80ee8f3b695e	1676	}
EricLew	0:80ee8f3b695e	1677
EricLew	0:80ee8f3b695e	1678	/* SPI in mode Transmitter ---------------------------------------------------*/
EricLew	0:80ee8f3b695e	1679	if(((itflag & SPI_FLAG_TXE) != RESET) && ((itsource & SPI_IT_TXE) != RESET))
EricLew	0:80ee8f3b695e	1680	{
EricLew	0:80ee8f3b695e	1681	hspi->TxISR(hspi);
EricLew	0:80ee8f3b695e	1682	return;
EricLew	0:80ee8f3b695e	1683	}
EricLew	0:80ee8f3b695e	1684
EricLew	0:80ee8f3b695e	1685	/* SPI in Error Treatment ---------------------------------------------------*/
EricLew	0:80ee8f3b695e	1686	if((itflag & (SPI_FLAG_MODF \| SPI_FLAG_OVR \| SPI_FLAG_FRE)) != RESET)
EricLew	0:80ee8f3b695e	1687	{
EricLew	0:80ee8f3b695e	1688	/* SPI Overrun error interrupt occurred -------------------------------------*/
EricLew	0:80ee8f3b695e	1689	if((itflag & SPI_FLAG_OVR) != RESET)
EricLew	0:80ee8f3b695e	1690	{
EricLew	0:80ee8f3b695e	1691	if(hspi->State != HAL_SPI_STATE_BUSY_TX)
EricLew	0:80ee8f3b695e	1692	{
EricLew	0:80ee8f3b695e	1693	hspi->ErrorCode \|= HAL_SPI_ERROR_OVR;
EricLew	0:80ee8f3b695e	1694	__HAL_SPI_CLEAR_OVRFLAG(hspi);
EricLew	0:80ee8f3b695e	1695	}
EricLew	0:80ee8f3b695e	1696	else
EricLew	0:80ee8f3b695e	1697	{
EricLew	0:80ee8f3b695e	1698	return;
EricLew	0:80ee8f3b695e	1699	}
EricLew	0:80ee8f3b695e	1700	}
EricLew	0:80ee8f3b695e	1701
EricLew	0:80ee8f3b695e	1702	/* SPI Mode Fault error interrupt occurred -------------------------------------*/
EricLew	0:80ee8f3b695e	1703	if((itflag & SPI_FLAG_MODF) != RESET)
EricLew	0:80ee8f3b695e	1704	{
EricLew	0:80ee8f3b695e	1705	hspi->ErrorCode \|= HAL_SPI_ERROR_MODF;
EricLew	0:80ee8f3b695e	1706	__HAL_SPI_CLEAR_MODFFLAG(hspi);
EricLew	0:80ee8f3b695e	1707	}
EricLew	0:80ee8f3b695e	1708
EricLew	0:80ee8f3b695e	1709	/* SPI Frame error interrupt occurred ----------------------------------------*/
EricLew	0:80ee8f3b695e	1710	if((itflag & SPI_FLAG_FRE) != RESET)
EricLew	0:80ee8f3b695e	1711	{
EricLew	0:80ee8f3b695e	1712	hspi->ErrorCode \|= HAL_SPI_ERROR_FRE;
EricLew	0:80ee8f3b695e	1713	__HAL_SPI_CLEAR_FREFLAG(hspi);
EricLew	0:80ee8f3b695e	1714	}
EricLew	0:80ee8f3b695e	1715
EricLew	0:80ee8f3b695e	1716	__HAL_SPI_DISABLE_IT(hspi, SPI_IT_RXNE \| SPI_IT_TXE \| SPI_IT_ERR);
EricLew	0:80ee8f3b695e	1717	hspi->State = HAL_SPI_STATE_READY;
EricLew	0:80ee8f3b695e	1718	HAL_SPI_ErrorCallback(hspi);
EricLew	0:80ee8f3b695e	1719	return;
EricLew	0:80ee8f3b695e	1720	}
EricLew	0:80ee8f3b695e	1721	}
EricLew	0:80ee8f3b695e	1722
EricLew	0:80ee8f3b695e	1723	/**
EricLew	0:80ee8f3b695e	1724	* @brief Tx Transfer completed callback.
EricLew	0:80ee8f3b695e	1725	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
EricLew	0:80ee8f3b695e	1726	* the configuration information for SPI module.
EricLew	0:80ee8f3b695e	1727	* @retval None
EricLew	0:80ee8f3b695e	1728	*/
EricLew	0:80ee8f3b695e	1729	__weak void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi)
EricLew	0:80ee8f3b695e	1730	{
EricLew	0:80ee8f3b695e	1731	/* NOTE : This function should not be modified, when the callback is needed,
EricLew	0:80ee8f3b695e	1732	the HAL_SPI_TxCpltCallback should be implemented in the user file
EricLew	0:80ee8f3b695e	1733	*/
EricLew	0:80ee8f3b695e	1734	}
EricLew	0:80ee8f3b695e	1735
EricLew	0:80ee8f3b695e	1736	/**
EricLew	0:80ee8f3b695e	1737	* @brief Rx Transfer completed callback.
EricLew	0:80ee8f3b695e	1738	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
EricLew	0:80ee8f3b695e	1739	* the configuration information for SPI module.
EricLew	0:80ee8f3b695e	1740	* @retval None
EricLew	0:80ee8f3b695e	1741	*/
EricLew	0:80ee8f3b695e	1742	__weak void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi)
EricLew	0:80ee8f3b695e	1743	{
EricLew	0:80ee8f3b695e	1744	/* NOTE : This function should not be modified, when the callback is needed,
EricLew	0:80ee8f3b695e	1745	the HAL_SPI_RxCpltCallback should be implemented in the user file
EricLew	0:80ee8f3b695e	1746	*/
EricLew	0:80ee8f3b695e	1747	}
EricLew	0:80ee8f3b695e	1748
EricLew	0:80ee8f3b695e	1749	/**
EricLew	0:80ee8f3b695e	1750	* @brief Tx and Rx Transfer completed callback.
EricLew	0:80ee8f3b695e	1751	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
EricLew	0:80ee8f3b695e	1752	* the configuration information for SPI module.
EricLew	0:80ee8f3b695e	1753	* @retval None
EricLew	0:80ee8f3b695e	1754	*/
EricLew	0:80ee8f3b695e	1755	__weak void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi)
EricLew	0:80ee8f3b695e	1756	{
EricLew	0:80ee8f3b695e	1757	/* NOTE : This function should not be modified, when the callback is needed,
EricLew	0:80ee8f3b695e	1758	the HAL_SPI_TxRxCpltCallback should be implemented in the user file
EricLew	0:80ee8f3b695e	1759	*/
EricLew	0:80ee8f3b695e	1760	}
EricLew	0:80ee8f3b695e	1761
EricLew	0:80ee8f3b695e	1762	/**
EricLew	0:80ee8f3b695e	1763	* @brief Tx Half Transfer completed callback.
EricLew	0:80ee8f3b695e	1764	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
EricLew	0:80ee8f3b695e	1765	* the configuration information for SPI module.
EricLew	0:80ee8f3b695e	1766	* @retval None
EricLew	0:80ee8f3b695e	1767	*/
EricLew	0:80ee8f3b695e	1768	__weak void HAL_SPI_TxHalfCpltCallback(SPI_HandleTypeDef *hspi)
EricLew	0:80ee8f3b695e	1769	{
EricLew	0:80ee8f3b695e	1770	/* NOTE : This function should not be modified, when the callback is needed,
EricLew	0:80ee8f3b695e	1771	the HAL_SPI_TxHalfCpltCallback should be implemented in the user file
EricLew	0:80ee8f3b695e	1772	*/
EricLew	0:80ee8f3b695e	1773	}
EricLew	0:80ee8f3b695e	1774
EricLew	0:80ee8f3b695e	1775	/**
EricLew	0:80ee8f3b695e	1776	* @brief Rx Half Transfer completed callback.
EricLew	0:80ee8f3b695e	1777	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
EricLew	0:80ee8f3b695e	1778	* the configuration information for SPI module.
EricLew	0:80ee8f3b695e	1779	* @retval None
EricLew	0:80ee8f3b695e	1780	*/
EricLew	0:80ee8f3b695e	1781	__weak void HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *hspi)
EricLew	0:80ee8f3b695e	1782	{
EricLew	0:80ee8f3b695e	1783	/* NOTE : This function should not be modified, when the callback is needed,
EricLew	0:80ee8f3b695e	1784	the HAL_SPI_RxHalfCpltCallback() should be implemented in the user file
EricLew	0:80ee8f3b695e	1785	*/
EricLew	0:80ee8f3b695e	1786	}
EricLew	0:80ee8f3b695e	1787
EricLew	0:80ee8f3b695e	1788	/**
EricLew	0:80ee8f3b695e	1789	* @brief Tx and Rx Half Transfer callback.
EricLew	0:80ee8f3b695e	1790	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
EricLew	0:80ee8f3b695e	1791	* the configuration information for SPI module.
EricLew	0:80ee8f3b695e	1792	* @retval None
EricLew	0:80ee8f3b695e	1793	*/
EricLew	0:80ee8f3b695e	1794	__weak void HAL_SPI_TxRxHalfCpltCallback(SPI_HandleTypeDef *hspi)
EricLew	0:80ee8f3b695e	1795	{
EricLew	0:80ee8f3b695e	1796	/* NOTE : This function should not be modified, when the callback is needed,
EricLew	0:80ee8f3b695e	1797	the HAL_SPI_TxRxHalfCpltCallback() should be implemented in the user file
EricLew	0:80ee8f3b695e	1798	*/
EricLew	0:80ee8f3b695e	1799	}
EricLew	0:80ee8f3b695e	1800
EricLew	0:80ee8f3b695e	1801	/**
EricLew	0:80ee8f3b695e	1802	* @brief SPI error callback.
EricLew	0:80ee8f3b695e	1803	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
EricLew	0:80ee8f3b695e	1804	* the configuration information for SPI module.
EricLew	0:80ee8f3b695e	1805	* @retval None
EricLew	0:80ee8f3b695e	1806	*/
EricLew	0:80ee8f3b695e	1807	__weak void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi)
EricLew	0:80ee8f3b695e	1808	{
EricLew	0:80ee8f3b695e	1809	/* NOTE : This function should not be modified, when the callback is needed,
EricLew	0:80ee8f3b695e	1810	the HAL_SPI_ErrorCallback should be implemented in the user file
EricLew	0:80ee8f3b695e	1811	*/
EricLew	0:80ee8f3b695e	1812	/* NOTE : The ErrorCode parameter in the hspi handle is updated by the SPI processes
EricLew	0:80ee8f3b695e	1813	and user can use HAL_SPI_GetError() API to check the latest error occurred
EricLew	0:80ee8f3b695e	1814	*/
EricLew	0:80ee8f3b695e	1815	}
EricLew	0:80ee8f3b695e	1816
EricLew	0:80ee8f3b695e	1817	/**
EricLew	0:80ee8f3b695e	1818	* @}
EricLew	0:80ee8f3b695e	1819	*/
EricLew	0:80ee8f3b695e	1820
EricLew	0:80ee8f3b695e	1821	/** @defgroup SPI_Exported_Functions_Group3 Peripheral State and Errors functions
EricLew	0:80ee8f3b695e	1822	* @brief SPI control functions
EricLew	0:80ee8f3b695e	1823	*
EricLew	0:80ee8f3b695e	1824	@verbatim
EricLew	0:80ee8f3b695e	1825	===============================================================================
EricLew	0:80ee8f3b695e	1826	##### Peripheral State and Errors functions #####
EricLew	0:80ee8f3b695e	1827	===============================================================================
EricLew	0:80ee8f3b695e	1828	[..]
EricLew	0:80ee8f3b695e	1829	This subsection provides a set of functions allowing to control the SPI.
EricLew	0:80ee8f3b695e	1830	(+) HAL_SPI_GetState() API can be helpful to check in run-time the state of the SPI peripheral
EricLew	0:80ee8f3b695e	1831	(+) HAL_SPI_GetError() check in run-time Errors occurring during communication
EricLew	0:80ee8f3b695e	1832	@endverbatim
EricLew	0:80ee8f3b695e	1833	* @{
EricLew	0:80ee8f3b695e	1834	*/
EricLew	0:80ee8f3b695e	1835
EricLew	0:80ee8f3b695e	1836	/**
EricLew	0:80ee8f3b695e	1837	* @brief Return the SPI handle state.
EricLew	0:80ee8f3b695e	1838	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
EricLew	0:80ee8f3b695e	1839	* the configuration information for SPI module.
EricLew	0:80ee8f3b695e	1840	* @retval SPI state
EricLew	0:80ee8f3b695e	1841	*/
EricLew	0:80ee8f3b695e	1842	HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi)
EricLew	0:80ee8f3b695e	1843	{
EricLew	0:80ee8f3b695e	1844	/* Return SPI handle state */
EricLew	0:80ee8f3b695e	1845	return hspi->State;
EricLew	0:80ee8f3b695e	1846	}
EricLew	0:80ee8f3b695e	1847
EricLew	0:80ee8f3b695e	1848	/**
EricLew	0:80ee8f3b695e	1849	* @brief Return the SPI error code.
EricLew	0:80ee8f3b695e	1850	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
EricLew	0:80ee8f3b695e	1851	* the configuration information for SPI module.
EricLew	0:80ee8f3b695e	1852	* @retval SPI error code in bitmap format
EricLew	0:80ee8f3b695e	1853	*/
EricLew	0:80ee8f3b695e	1854	uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi)
EricLew	0:80ee8f3b695e	1855	{
EricLew	0:80ee8f3b695e	1856	return hspi->ErrorCode;
EricLew	0:80ee8f3b695e	1857	}
EricLew	0:80ee8f3b695e	1858
EricLew	0:80ee8f3b695e	1859	/**
EricLew	0:80ee8f3b695e	1860	* @}
EricLew	0:80ee8f3b695e	1861	*/
EricLew	0:80ee8f3b695e	1862
EricLew	0:80ee8f3b695e	1863
EricLew	0:80ee8f3b695e	1864	/**
EricLew	0:80ee8f3b695e	1865	* @}
EricLew	0:80ee8f3b695e	1866	*/
EricLew	0:80ee8f3b695e	1867
EricLew	0:80ee8f3b695e	1868	/** @addtogroup SPI_Private_Functions
EricLew	0:80ee8f3b695e	1869	* @brief Private functions
EricLew	0:80ee8f3b695e	1870	* @{
EricLew	0:80ee8f3b695e	1871	*/
EricLew	0:80ee8f3b695e	1872
EricLew	0:80ee8f3b695e	1873	/**
EricLew	0:80ee8f3b695e	1874	* @brief DMA SPI transmit process complete callback.
EricLew	0:80ee8f3b695e	1875	* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
EricLew	0:80ee8f3b695e	1876	* the configuration information for the specified DMA module.
EricLew	0:80ee8f3b695e	1877	* @retval None
EricLew	0:80ee8f3b695e	1878	*/
EricLew	0:80ee8f3b695e	1879	static void SPI_DMATransmitCplt(DMA_HandleTypeDef *hdma)
EricLew	0:80ee8f3b695e	1880	{
EricLew	0:80ee8f3b695e	1881	SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
EricLew	0:80ee8f3b695e	1882
EricLew	0:80ee8f3b695e	1883	if((hdma->Instance->CCR & DMA_CCR_CIRC) != DMA_CCR_CIRC)
EricLew	0:80ee8f3b695e	1884	{
EricLew	0:80ee8f3b695e	1885	/* Disable Tx DMA Request */
EricLew	0:80ee8f3b695e	1886	CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
EricLew	0:80ee8f3b695e	1887
EricLew	0:80ee8f3b695e	1888	/* Check the end of the transaction */
EricLew	0:80ee8f3b695e	1889	if(SPI_EndRxTxTransaction(hspi,SPI_DEFAULT_TIMEOUT) != HAL_OK)
EricLew	0:80ee8f3b695e	1890	{
EricLew	0:80ee8f3b695e	1891	hspi->ErrorCode = HAL_SPI_ERROR_FLAG;
EricLew	0:80ee8f3b695e	1892	}
EricLew	0:80ee8f3b695e	1893
EricLew	0:80ee8f3b695e	1894	/* Clear overrun flag in 2 Lines communication mode because received data is not read */
EricLew	0:80ee8f3b695e	1895	if(hspi->Init.Direction == SPI_DIRECTION_2LINES)
EricLew	0:80ee8f3b695e	1896	{
EricLew	0:80ee8f3b695e	1897	__HAL_SPI_CLEAR_OVRFLAG(hspi);
EricLew	0:80ee8f3b695e	1898	}
EricLew	0:80ee8f3b695e	1899
EricLew	0:80ee8f3b695e	1900	hspi->TxXferCount = 0;
EricLew	0:80ee8f3b695e	1901	hspi->State = HAL_SPI_STATE_READY;
EricLew	0:80ee8f3b695e	1902
EricLew	0:80ee8f3b695e	1903	if(hspi->ErrorCode != HAL_SPI_ERROR_NONE)
EricLew	0:80ee8f3b695e	1904	{
EricLew	0:80ee8f3b695e	1905	HAL_SPI_ErrorCallback(hspi);
EricLew	0:80ee8f3b695e	1906	return;
EricLew	0:80ee8f3b695e	1907	}
EricLew	0:80ee8f3b695e	1908	}
EricLew	0:80ee8f3b695e	1909	HAL_SPI_TxCpltCallback(hspi);
EricLew	0:80ee8f3b695e	1910	}
EricLew	0:80ee8f3b695e	1911
EricLew	0:80ee8f3b695e	1912	/**
EricLew	0:80ee8f3b695e	1913	* @brief DMA SPI receive process complete callback.
EricLew	0:80ee8f3b695e	1914	* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
EricLew	0:80ee8f3b695e	1915	* the configuration information for the specified DMA module.
EricLew	0:80ee8f3b695e	1916	* @retval None
EricLew	0:80ee8f3b695e	1917	*/
EricLew	0:80ee8f3b695e	1918	static void SPI_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
EricLew	0:80ee8f3b695e	1919	{
EricLew	0:80ee8f3b695e	1920	SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
EricLew	0:80ee8f3b695e	1921
EricLew	0:80ee8f3b695e	1922	if((hdma->Instance->CCR & DMA_CCR_CIRC) != DMA_CCR_CIRC)
EricLew	0:80ee8f3b695e	1923	{
EricLew	0:80ee8f3b695e	1924	__IO uint16_t tmpreg;
EricLew	0:80ee8f3b695e	1925
EricLew	0:80ee8f3b695e	1926	/* CRC handling */
EricLew	0:80ee8f3b695e	1927	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
EricLew	0:80ee8f3b695e	1928	{
EricLew	0:80ee8f3b695e	1929	/* Wait until TXE flag */
EricLew	0:80ee8f3b695e	1930	if(SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SPI_FLAG_RXNE, SPI_DEFAULT_TIMEOUT) != HAL_OK)
EricLew	0:80ee8f3b695e	1931	{
EricLew	0:80ee8f3b695e	1932	/* Error on the CRC reception */
EricLew	0:80ee8f3b695e	1933	hspi->ErrorCode\|= HAL_SPI_ERROR_CRC;
EricLew	0:80ee8f3b695e	1934	}
EricLew	0:80ee8f3b695e	1935	if(hspi->Init.DataSize > SPI_DATASIZE_8BIT)
EricLew	0:80ee8f3b695e	1936	{
EricLew	0:80ee8f3b695e	1937	tmpreg = hspi->Instance->DR;
EricLew	0:80ee8f3b695e	1938	UNUSED(tmpreg); /* To avoid GCC warning */
EricLew	0:80ee8f3b695e	1939	}
EricLew	0:80ee8f3b695e	1940	else
EricLew	0:80ee8f3b695e	1941	{
EricLew	0:80ee8f3b695e	1942	tmpreg = (__IO uint8_t )&hspi->Instance->DR;
EricLew	0:80ee8f3b695e	1943	UNUSED(tmpreg); /* To avoid GCC warning */
EricLew	0:80ee8f3b695e	1944
EricLew	0:80ee8f3b695e	1945	if(hspi->Init.CRCLength == SPI_CRC_LENGTH_16BIT)
EricLew	0:80ee8f3b695e	1946	{
EricLew	0:80ee8f3b695e	1947	if(SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SPI_FLAG_RXNE, SPI_DEFAULT_TIMEOUT) != HAL_OK)
EricLew	0:80ee8f3b695e	1948	{
EricLew	0:80ee8f3b695e	1949	/* Error on the CRC reception */
EricLew	0:80ee8f3b695e	1950	hspi->ErrorCode\|= HAL_SPI_ERROR_CRC;
EricLew	0:80ee8f3b695e	1951	}
EricLew	0:80ee8f3b695e	1952	tmpreg = (__IO uint8_t )&hspi->Instance->DR;
EricLew	0:80ee8f3b695e	1953	UNUSED(tmpreg); /* To avoid GCC warning */
EricLew	0:80ee8f3b695e	1954	}
EricLew	0:80ee8f3b695e	1955	}
EricLew	0:80ee8f3b695e	1956	}
EricLew	0:80ee8f3b695e	1957
EricLew	0:80ee8f3b695e	1958	/* Disable Rx/Tx DMA Request (done by default to handle the case master rx direction 2 lines) */
EricLew	0:80ee8f3b695e	1959	CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN \| SPI_CR2_RXDMAEN);
EricLew	0:80ee8f3b695e	1960
EricLew	0:80ee8f3b695e	1961	/* Check the end of the transaction */
EricLew	0:80ee8f3b695e	1962	if(SPI_EndRxTransaction(hspi,SPI_DEFAULT_TIMEOUT)!=HAL_OK)
EricLew	0:80ee8f3b695e	1963	{
EricLew	0:80ee8f3b695e	1964	hspi->ErrorCode\|= HAL_SPI_ERROR_FLAG;
EricLew	0:80ee8f3b695e	1965	}
EricLew	0:80ee8f3b695e	1966
EricLew	0:80ee8f3b695e	1967	hspi->RxXferCount = 0;
EricLew	0:80ee8f3b695e	1968	hspi->State = HAL_SPI_STATE_READY;
EricLew	0:80ee8f3b695e	1969
EricLew	0:80ee8f3b695e	1970	/* Check if CRC error occurred */
EricLew	0:80ee8f3b695e	1971	if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
EricLew	0:80ee8f3b695e	1972	{
EricLew	0:80ee8f3b695e	1973	hspi->ErrorCode\|= HAL_SPI_ERROR_CRC;
EricLew	0:80ee8f3b695e	1974	__HAL_SPI_CLEAR_CRCERRFLAG(hspi);
EricLew	0:80ee8f3b695e	1975	}
EricLew	0:80ee8f3b695e	1976
EricLew	0:80ee8f3b695e	1977	if(hspi->ErrorCode != HAL_SPI_ERROR_NONE)
EricLew	0:80ee8f3b695e	1978	{
EricLew	0:80ee8f3b695e	1979	HAL_SPI_ErrorCallback(hspi);
EricLew	0:80ee8f3b695e	1980	return;
EricLew	0:80ee8f3b695e	1981	}
EricLew	0:80ee8f3b695e	1982	}
EricLew	0:80ee8f3b695e	1983	HAL_SPI_RxCpltCallback(hspi);
EricLew	0:80ee8f3b695e	1984	}
EricLew	0:80ee8f3b695e	1985
EricLew	0:80ee8f3b695e	1986	/**
EricLew	0:80ee8f3b695e	1987	* @brief DMA SPI transmit receive process complete callback.
EricLew	0:80ee8f3b695e	1988	* @param hdma : pointer to a DMA_HandleTypeDef structure that contains
EricLew	0:80ee8f3b695e	1989	* the configuration information for the specified DMA module.
EricLew	0:80ee8f3b695e	1990	* @retval None
EricLew	0:80ee8f3b695e	1991	*/
EricLew	0:80ee8f3b695e	1992	static void SPI_DMATransmitReceiveCplt(DMA_HandleTypeDef *hdma)
EricLew	0:80ee8f3b695e	1993	{
EricLew	0:80ee8f3b695e	1994	SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
EricLew	0:80ee8f3b695e	1995
EricLew	0:80ee8f3b695e	1996	if((hdma->Instance->CCR & DMA_CCR_CIRC) != DMA_CCR_CIRC)
EricLew	0:80ee8f3b695e	1997	{
EricLew	0:80ee8f3b695e	1998	__IO int16_t tmpreg;
EricLew	0:80ee8f3b695e	1999	/* CRC handling */
EricLew	0:80ee8f3b695e	2000	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
EricLew	0:80ee8f3b695e	2001	{
EricLew	0:80ee8f3b695e	2002	if((hspi->Init.DataSize == SPI_DATASIZE_8BIT) && (hspi->Init.CRCLength == SPI_CRC_LENGTH_8BIT))
EricLew	0:80ee8f3b695e	2003	{
EricLew	0:80ee8f3b695e	2004	if(SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_QUARTER_FULL, SPI_DEFAULT_TIMEOUT) != HAL_OK)
EricLew	0:80ee8f3b695e	2005	{
EricLew	0:80ee8f3b695e	2006	/* Error on the CRC reception */
EricLew	0:80ee8f3b695e	2007	hspi->ErrorCode\|= HAL_SPI_ERROR_CRC;
EricLew	0:80ee8f3b695e	2008	}
EricLew	0:80ee8f3b695e	2009	tmpreg = (__IO uint8_t )&hspi->Instance->DR;
EricLew	0:80ee8f3b695e	2010	UNUSED(tmpreg); /* To avoid GCC warning */
EricLew	0:80ee8f3b695e	2011	}
EricLew	0:80ee8f3b695e	2012	else
EricLew	0:80ee8f3b695e	2013	{
EricLew	0:80ee8f3b695e	2014	if(SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_HALF_FULL, SPI_DEFAULT_TIMEOUT) != HAL_OK)
EricLew	0:80ee8f3b695e	2015	{
EricLew	0:80ee8f3b695e	2016	/* Error on the CRC reception */
EricLew	0:80ee8f3b695e	2017	hspi->ErrorCode\|= HAL_SPI_ERROR_CRC;
EricLew	0:80ee8f3b695e	2018	}
EricLew	0:80ee8f3b695e	2019	tmpreg = hspi->Instance->DR;
EricLew	0:80ee8f3b695e	2020	UNUSED(tmpreg); /* To avoid GCC warning */
EricLew	0:80ee8f3b695e	2021	}
EricLew	0:80ee8f3b695e	2022	}
EricLew	0:80ee8f3b695e	2023
EricLew	0:80ee8f3b695e	2024	/* Check the end of the transaction */
EricLew	0:80ee8f3b695e	2025	if(SPI_EndRxTxTransaction(hspi,SPI_DEFAULT_TIMEOUT) != HAL_OK)
EricLew	0:80ee8f3b695e	2026	{
EricLew	0:80ee8f3b695e	2027	hspi->ErrorCode = HAL_SPI_ERROR_FLAG;
EricLew	0:80ee8f3b695e	2028	}
EricLew	0:80ee8f3b695e	2029
EricLew	0:80ee8f3b695e	2030	/* Disable Rx/Tx DMA Request */
EricLew	0:80ee8f3b695e	2031	CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN \| SPI_CR2_RXDMAEN);
EricLew	0:80ee8f3b695e	2032
EricLew	0:80ee8f3b695e	2033	hspi->TxXferCount = 0;
EricLew	0:80ee8f3b695e	2034	hspi->RxXferCount = 0;
EricLew	0:80ee8f3b695e	2035	hspi->State = HAL_SPI_STATE_READY;
EricLew	0:80ee8f3b695e	2036
EricLew	0:80ee8f3b695e	2037	/* Check if CRC error occurred */
EricLew	0:80ee8f3b695e	2038	if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
EricLew	0:80ee8f3b695e	2039	{
EricLew	0:80ee8f3b695e	2040	hspi->ErrorCode\|= HAL_SPI_ERROR_CRC;
EricLew	0:80ee8f3b695e	2041	__HAL_SPI_CLEAR_CRCERRFLAG(hspi);
EricLew	0:80ee8f3b695e	2042	}
EricLew	0:80ee8f3b695e	2043
EricLew	0:80ee8f3b695e	2044	if(hspi->ErrorCode != HAL_SPI_ERROR_NONE)
EricLew	0:80ee8f3b695e	2045	{
EricLew	0:80ee8f3b695e	2046	HAL_SPI_ErrorCallback(hspi);
EricLew	0:80ee8f3b695e	2047	return;
EricLew	0:80ee8f3b695e	2048	}
EricLew	0:80ee8f3b695e	2049	}
EricLew	0:80ee8f3b695e	2050	HAL_SPI_TxRxCpltCallback(hspi);
EricLew	0:80ee8f3b695e	2051	}
EricLew	0:80ee8f3b695e	2052
EricLew	0:80ee8f3b695e	2053	/**
EricLew	0:80ee8f3b695e	2054	* @brief DMA SPI half transmit process complete callback.
EricLew	0:80ee8f3b695e	2055	* @param hdma : pointer to a DMA_HandleTypeDef structure that contains
EricLew	0:80ee8f3b695e	2056	* the configuration information for the specified DMA module.
EricLew	0:80ee8f3b695e	2057	* @retval None
EricLew	0:80ee8f3b695e	2058	*/
EricLew	0:80ee8f3b695e	2059	static void SPI_DMAHalfTransmitCplt(DMA_HandleTypeDef *hdma)
EricLew	0:80ee8f3b695e	2060	{
EricLew	0:80ee8f3b695e	2061	SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
EricLew	0:80ee8f3b695e	2062
EricLew	0:80ee8f3b695e	2063	HAL_SPI_TxHalfCpltCallback(hspi);
EricLew	0:80ee8f3b695e	2064	}
EricLew	0:80ee8f3b695e	2065
EricLew	0:80ee8f3b695e	2066	/**
EricLew	0:80ee8f3b695e	2067	* @brief DMA SPI half receive process complete callback.
EricLew	0:80ee8f3b695e	2068	* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
EricLew	0:80ee8f3b695e	2069	* the configuration information for the specified DMA module.
EricLew	0:80ee8f3b695e	2070	* @retval None
EricLew	0:80ee8f3b695e	2071	*/
EricLew	0:80ee8f3b695e	2072	static void SPI_DMAHalfReceiveCplt(DMA_HandleTypeDef *hdma)
EricLew	0:80ee8f3b695e	2073	{
EricLew	0:80ee8f3b695e	2074	SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
EricLew	0:80ee8f3b695e	2075
EricLew	0:80ee8f3b695e	2076	HAL_SPI_RxHalfCpltCallback(hspi);
EricLew	0:80ee8f3b695e	2077	}
EricLew	0:80ee8f3b695e	2078
EricLew	0:80ee8f3b695e	2079	/**
EricLew	0:80ee8f3b695e	2080	* @brief DMA SPI half transmit receive process complete callback.
EricLew	0:80ee8f3b695e	2081	* @param hdma : pointer to a DMA_HandleTypeDef structure that contains
EricLew	0:80ee8f3b695e	2082	* the configuration information for the specified DMA module.
EricLew	0:80ee8f3b695e	2083	* @retval None
EricLew	0:80ee8f3b695e	2084	*/
EricLew	0:80ee8f3b695e	2085	static void SPI_DMAHalfTransmitReceiveCplt(DMA_HandleTypeDef *hdma)
EricLew	0:80ee8f3b695e	2086	{
EricLew	0:80ee8f3b695e	2087	SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
EricLew	0:80ee8f3b695e	2088
EricLew	0:80ee8f3b695e	2089	HAL_SPI_TxRxHalfCpltCallback(hspi);
EricLew	0:80ee8f3b695e	2090	}
EricLew	0:80ee8f3b695e	2091
EricLew	0:80ee8f3b695e	2092	/**
EricLew	0:80ee8f3b695e	2093	* @brief DMA SPI communication error callback.
EricLew	0:80ee8f3b695e	2094	* @param hdma : pointer to a DMA_HandleTypeDef structure that contains
EricLew	0:80ee8f3b695e	2095	* the configuration information for the specified DMA module.
EricLew	0:80ee8f3b695e	2096	* @retval None
EricLew	0:80ee8f3b695e	2097	*/
EricLew	0:80ee8f3b695e	2098	static void SPI_DMAError(DMA_HandleTypeDef *hdma)
EricLew	0:80ee8f3b695e	2099	{
EricLew	0:80ee8f3b695e	2100	SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
EricLew	0:80ee8f3b695e	2101
EricLew	0:80ee8f3b695e	2102	/* Stop the disable DMA transfer on SPI side */
EricLew	0:80ee8f3b695e	2103	CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN \| SPI_CR2_RXDMAEN);
EricLew	0:80ee8f3b695e	2104
EricLew	0:80ee8f3b695e	2105	hspi->ErrorCode\|= HAL_SPI_ERROR_DMA;
EricLew	0:80ee8f3b695e	2106	hspi->State = HAL_SPI_STATE_READY;
EricLew	0:80ee8f3b695e	2107	HAL_SPI_ErrorCallback(hspi);
EricLew	0:80ee8f3b695e	2108	}
EricLew	0:80ee8f3b695e	2109
EricLew	0:80ee8f3b695e	2110	/**
EricLew	0:80ee8f3b695e	2111	* @brief Rx 8-bit handler for Transmit and Receive in Interrupt mode.
EricLew	0:80ee8f3b695e	2112	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
EricLew	0:80ee8f3b695e	2113	* the configuration information for SPI module.
EricLew	0:80ee8f3b695e	2114	* @retval None
EricLew	0:80ee8f3b695e	2115	*/
EricLew	0:80ee8f3b695e	2116	static void SPI_2linesRxISR_8BIT(struct __SPI_HandleTypeDef *hspi)
EricLew	0:80ee8f3b695e	2117	{
EricLew	0:80ee8f3b695e	2118	/* Receive data in packing mode */
EricLew	0:80ee8f3b695e	2119	if(hspi->RxXferCount > 1)
EricLew	0:80ee8f3b695e	2120	{
EricLew	0:80ee8f3b695e	2121	((uint16_t)hspi->pRxBuffPtr) = hspi->Instance->DR;
EricLew	0:80ee8f3b695e	2122	hspi->pRxBuffPtr += sizeof(uint16_t);
EricLew	0:80ee8f3b695e	2123	hspi->RxXferCount -= 2;
EricLew	0:80ee8f3b695e	2124	if(hspi->RxXferCount == 1)
EricLew	0:80ee8f3b695e	2125	{
EricLew	0:80ee8f3b695e	2126	/* set fiforxthresold according the reception data length: 8bit */
EricLew	0:80ee8f3b695e	2127	SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
EricLew	0:80ee8f3b695e	2128	}
EricLew	0:80ee8f3b695e	2129	}
EricLew	0:80ee8f3b695e	2130	/* Receive data in 8 Bit mode */
EricLew	0:80ee8f3b695e	2131	else
EricLew	0:80ee8f3b695e	2132	{
EricLew	0:80ee8f3b695e	2133	hspi->pRxBuffPtr++ = ((__IO uint8_t *)&hspi->Instance->DR);
EricLew	0:80ee8f3b695e	2134	hspi->RxXferCount--;
EricLew	0:80ee8f3b695e	2135	}
EricLew	0:80ee8f3b695e	2136
EricLew	0:80ee8f3b695e	2137	/* check end of the reception */
EricLew	0:80ee8f3b695e	2138	if(hspi->RxXferCount == 0)
EricLew	0:80ee8f3b695e	2139	{
EricLew	0:80ee8f3b695e	2140	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
EricLew	0:80ee8f3b695e	2141	{
EricLew	0:80ee8f3b695e	2142	SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
EricLew	0:80ee8f3b695e	2143	hspi->RxISR = SPI_2linesRxISR_8BITCRC;
EricLew	0:80ee8f3b695e	2144	return;
EricLew	0:80ee8f3b695e	2145	}
EricLew	0:80ee8f3b695e	2146
EricLew	0:80ee8f3b695e	2147	/* Disable RXNE interrupt */
EricLew	0:80ee8f3b695e	2148	__HAL_SPI_DISABLE_IT(hspi, SPI_IT_RXNE);
EricLew	0:80ee8f3b695e	2149
EricLew	0:80ee8f3b695e	2150	if(hspi->TxXferCount == 0)
EricLew	0:80ee8f3b695e	2151	{
EricLew	0:80ee8f3b695e	2152	SPI_CloseRxTx_ISR(hspi);
EricLew	0:80ee8f3b695e	2153	}
EricLew	0:80ee8f3b695e	2154	}
EricLew	0:80ee8f3b695e	2155	}
EricLew	0:80ee8f3b695e	2156
EricLew	0:80ee8f3b695e	2157	/**
EricLew	0:80ee8f3b695e	2158	* @brief Rx 8-bit handler for Transmit and Receive in Interrupt mode.
EricLew	0:80ee8f3b695e	2159	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
EricLew	0:80ee8f3b695e	2160	* the configuration information for SPI module.
EricLew	0:80ee8f3b695e	2161	* @retval None
EricLew	0:80ee8f3b695e	2162	*/
EricLew	0:80ee8f3b695e	2163	static void SPI_2linesRxISR_8BITCRC(struct __SPI_HandleTypeDef *hspi)
EricLew	0:80ee8f3b695e	2164	{
EricLew	0:80ee8f3b695e	2165	__IO uint8_t tmpreg = ((__IO uint8_t )&hspi->Instance->DR);
EricLew	0:80ee8f3b695e	2166	UNUSED(tmpreg); /* To avoid GCC warning */
EricLew	0:80ee8f3b695e	2167
EricLew	0:80ee8f3b695e	2168	hspi->CRCSize--;
EricLew	0:80ee8f3b695e	2169
EricLew	0:80ee8f3b695e	2170	/* check end of the reception */
EricLew	0:80ee8f3b695e	2171	if(hspi->CRCSize == 0)
EricLew	0:80ee8f3b695e	2172	{
EricLew	0:80ee8f3b695e	2173	/* Disable RXNE interrupt */
EricLew	0:80ee8f3b695e	2174	__HAL_SPI_DISABLE_IT(hspi, SPI_IT_RXNE);
EricLew	0:80ee8f3b695e	2175
EricLew	0:80ee8f3b695e	2176	if(hspi->TxXferCount == 0)
EricLew	0:80ee8f3b695e	2177	{
EricLew	0:80ee8f3b695e	2178	SPI_CloseRxTx_ISR(hspi);
EricLew	0:80ee8f3b695e	2179	}
EricLew	0:80ee8f3b695e	2180	}
EricLew	0:80ee8f3b695e	2181	}
EricLew	0:80ee8f3b695e	2182
EricLew	0:80ee8f3b695e	2183	/**
EricLew	0:80ee8f3b695e	2184	* @brief Tx 8-bit handler for Transmit and Receive in Interrupt mode.
EricLew	0:80ee8f3b695e	2185	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
EricLew	0:80ee8f3b695e	2186	* the configuration information for SPI module.
EricLew	0:80ee8f3b695e	2187	* @retval None
EricLew	0:80ee8f3b695e	2188	*/
EricLew	0:80ee8f3b695e	2189	static void SPI_2linesTxISR_8BIT(struct __SPI_HandleTypeDef *hspi)
EricLew	0:80ee8f3b695e	2190	{
EricLew	0:80ee8f3b695e	2191	/* Transmit data in packing Bit mode */
EricLew	0:80ee8f3b695e	2192	if(hspi->TxXferCount >= 2)
EricLew	0:80ee8f3b695e	2193	{
EricLew	0:80ee8f3b695e	2194	hspi->Instance->DR = ((uint16_t )hspi->pTxBuffPtr);
EricLew	0:80ee8f3b695e	2195	hspi->pTxBuffPtr += sizeof(uint16_t);
EricLew	0:80ee8f3b695e	2196	hspi->TxXferCount -= 2;
EricLew	0:80ee8f3b695e	2197	}
EricLew	0:80ee8f3b695e	2198	/* Transmit data in 8 Bit mode */
EricLew	0:80ee8f3b695e	2199	else
EricLew	0:80ee8f3b695e	2200	{
EricLew	0:80ee8f3b695e	2201	(__IO uint8_t )&hspi->Instance->DR = (*hspi->pTxBuffPtr++);
EricLew	0:80ee8f3b695e	2202	hspi->TxXferCount--;
EricLew	0:80ee8f3b695e	2203	}
EricLew	0:80ee8f3b695e	2204
EricLew	0:80ee8f3b695e	2205	/* check the end of the transmission */
EricLew	0:80ee8f3b695e	2206	if(hspi->TxXferCount == 0)
EricLew	0:80ee8f3b695e	2207	{
EricLew	0:80ee8f3b695e	2208	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
EricLew	0:80ee8f3b695e	2209	{
EricLew	0:80ee8f3b695e	2210	hspi->Instance->CR1 \|= SPI_CR1_CRCNEXT;
EricLew	0:80ee8f3b695e	2211	}
EricLew	0:80ee8f3b695e	2212	/* Disable TXE interrupt */
EricLew	0:80ee8f3b695e	2213	__HAL_SPI_DISABLE_IT(hspi, SPI_IT_TXE);
EricLew	0:80ee8f3b695e	2214
EricLew	0:80ee8f3b695e	2215	if(hspi->RxXferCount == 0)
EricLew	0:80ee8f3b695e	2216	{
EricLew	0:80ee8f3b695e	2217	SPI_CloseRxTx_ISR(hspi);
EricLew	0:80ee8f3b695e	2218	}
EricLew	0:80ee8f3b695e	2219	}
EricLew	0:80ee8f3b695e	2220	}
EricLew	0:80ee8f3b695e	2221
EricLew	0:80ee8f3b695e	2222	/**
EricLew	0:80ee8f3b695e	2223	* @brief Rx 16-bit handler for Transmit and Receive in Interrupt mode.
EricLew	0:80ee8f3b695e	2224	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
EricLew	0:80ee8f3b695e	2225	* the configuration information for SPI module.
EricLew	0:80ee8f3b695e	2226	* @retval None
EricLew	0:80ee8f3b695e	2227	*/
EricLew	0:80ee8f3b695e	2228	static void SPI_2linesRxISR_16BIT(struct __SPI_HandleTypeDef *hspi)
EricLew	0:80ee8f3b695e	2229	{
EricLew	0:80ee8f3b695e	2230	/* Receive data in 16 Bit mode */
EricLew	0:80ee8f3b695e	2231	((uint16_t)hspi->pRxBuffPtr) = hspi->Instance->DR;
EricLew	0:80ee8f3b695e	2232	hspi->pRxBuffPtr += sizeof(uint16_t);
EricLew	0:80ee8f3b695e	2233	hspi->RxXferCount--;
EricLew	0:80ee8f3b695e	2234
EricLew	0:80ee8f3b695e	2235	if(hspi->RxXferCount == 0)
EricLew	0:80ee8f3b695e	2236	{
EricLew	0:80ee8f3b695e	2237	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
EricLew	0:80ee8f3b695e	2238	{
EricLew	0:80ee8f3b695e	2239	hspi->RxISR = SPI_2linesRxISR_16BITCRC;
EricLew	0:80ee8f3b695e	2240	return;
EricLew	0:80ee8f3b695e	2241	}
EricLew	0:80ee8f3b695e	2242
EricLew	0:80ee8f3b695e	2243	/* Disable RXNE interrupt */
EricLew	0:80ee8f3b695e	2244	__HAL_SPI_DISABLE_IT(hspi, SPI_IT_RXNE);
EricLew	0:80ee8f3b695e	2245
EricLew	0:80ee8f3b695e	2246	if(hspi->TxXferCount == 0)
EricLew	0:80ee8f3b695e	2247	{
EricLew	0:80ee8f3b695e	2248	SPI_CloseRxTx_ISR(hspi);
EricLew	0:80ee8f3b695e	2249	}
EricLew	0:80ee8f3b695e	2250	}
EricLew	0:80ee8f3b695e	2251	}
EricLew	0:80ee8f3b695e	2252
EricLew	0:80ee8f3b695e	2253	/**
EricLew	0:80ee8f3b695e	2254	* @brief Manage the CRC 16-bit receive for Transmit and Receive in Interrupt mode.
EricLew	0:80ee8f3b695e	2255	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
EricLew	0:80ee8f3b695e	2256	* the configuration information for SPI module.
EricLew	0:80ee8f3b695e	2257	* @retval None
EricLew	0:80ee8f3b695e	2258	*/
EricLew	0:80ee8f3b695e	2259	static void SPI_2linesRxISR_16BITCRC(struct __SPI_HandleTypeDef *hspi)
EricLew	0:80ee8f3b695e	2260	{
EricLew	0:80ee8f3b695e	2261	/* Receive data in 16 Bit mode */
EricLew	0:80ee8f3b695e	2262	__IO uint16_t tmpreg = hspi->Instance->DR;
EricLew	0:80ee8f3b695e	2263	UNUSED(tmpreg); /* To avoid GCC warning */
EricLew	0:80ee8f3b695e	2264
EricLew	0:80ee8f3b695e	2265	/* Disable RXNE interrupt */
EricLew	0:80ee8f3b695e	2266	__HAL_SPI_DISABLE_IT(hspi, SPI_IT_RXNE);
EricLew	0:80ee8f3b695e	2267
EricLew	0:80ee8f3b695e	2268	SPI_CloseRxTx_ISR(hspi);
EricLew	0:80ee8f3b695e	2269	}
EricLew	0:80ee8f3b695e	2270
EricLew	0:80ee8f3b695e	2271	/**
EricLew	0:80ee8f3b695e	2272	* @brief Tx 16-bit handler for Transmit and Receive in Interrupt mode.
EricLew	0:80ee8f3b695e	2273	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
EricLew	0:80ee8f3b695e	2274	* the configuration information for SPI module.
EricLew	0:80ee8f3b695e	2275	* @retval None
EricLew	0:80ee8f3b695e	2276	*/
EricLew	0:80ee8f3b695e	2277	static void SPI_2linesTxISR_16BIT(struct __SPI_HandleTypeDef *hspi)
EricLew	0:80ee8f3b695e	2278	{
EricLew	0:80ee8f3b695e	2279	/* Transmit data in 16 Bit mode */
EricLew	0:80ee8f3b695e	2280	hspi->Instance->DR = ((uint16_t )hspi->pTxBuffPtr);
EricLew	0:80ee8f3b695e	2281	hspi->pTxBuffPtr += sizeof(uint16_t);
EricLew	0:80ee8f3b695e	2282	hspi->TxXferCount--;
EricLew	0:80ee8f3b695e	2283
EricLew	0:80ee8f3b695e	2284	/* Enable CRC Transmission */
EricLew	0:80ee8f3b695e	2285	if(hspi->TxXferCount == 0)
EricLew	0:80ee8f3b695e	2286	{
EricLew	0:80ee8f3b695e	2287	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
EricLew	0:80ee8f3b695e	2288	{
EricLew	0:80ee8f3b695e	2289	hspi->Instance->CR1 \|= SPI_CR1_CRCNEXT;
EricLew	0:80ee8f3b695e	2290	}
EricLew	0:80ee8f3b695e	2291	/* Disable TXE interrupt */
EricLew	0:80ee8f3b695e	2292	__HAL_SPI_DISABLE_IT(hspi, SPI_IT_TXE);
EricLew	0:80ee8f3b695e	2293
EricLew	0:80ee8f3b695e	2294	if(hspi->RxXferCount == 0)
EricLew	0:80ee8f3b695e	2295	{
EricLew	0:80ee8f3b695e	2296	SPI_CloseRxTx_ISR(hspi);
EricLew	0:80ee8f3b695e	2297	}
EricLew	0:80ee8f3b695e	2298	}
EricLew	0:80ee8f3b695e	2299	}
EricLew	0:80ee8f3b695e	2300
EricLew	0:80ee8f3b695e	2301	/**
EricLew	0:80ee8f3b695e	2302	* @brief Manage the CRC 8-bit receive in Interrupt context.
EricLew	0:80ee8f3b695e	2303	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
EricLew	0:80ee8f3b695e	2304	* the configuration information for SPI module.
EricLew	0:80ee8f3b695e	2305	* @retval None
EricLew	0:80ee8f3b695e	2306	*/
EricLew	0:80ee8f3b695e	2307	static void SPI_RxISR_8BITCRC(struct __SPI_HandleTypeDef *hspi)
EricLew	0:80ee8f3b695e	2308	{
EricLew	0:80ee8f3b695e	2309	__IO uint8_t tmpreg = ((uint8_t)&hspi->Instance->DR);
EricLew	0:80ee8f3b695e	2310	UNUSED(tmpreg); /* To avoid GCC warning */
EricLew	0:80ee8f3b695e	2311
EricLew	0:80ee8f3b695e	2312	hspi->CRCSize--;
EricLew	0:80ee8f3b695e	2313
EricLew	0:80ee8f3b695e	2314	if(hspi->CRCSize == 0)
EricLew	0:80ee8f3b695e	2315	{
EricLew	0:80ee8f3b695e	2316	SPI_CloseRx_ISR(hspi);
EricLew	0:80ee8f3b695e	2317	}
EricLew	0:80ee8f3b695e	2318	}
EricLew	0:80ee8f3b695e	2319
EricLew	0:80ee8f3b695e	2320	/**
EricLew	0:80ee8f3b695e	2321	* @brief Manage the receive 8-bit in Interrupt context.
EricLew	0:80ee8f3b695e	2322	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
EricLew	0:80ee8f3b695e	2323	* the configuration information for SPI module.
EricLew	0:80ee8f3b695e	2324	* @retval None
EricLew	0:80ee8f3b695e	2325	*/
EricLew	0:80ee8f3b695e	2326	static void SPI_RxISR_8BIT(struct __SPI_HandleTypeDef *hspi)
EricLew	0:80ee8f3b695e	2327	{
EricLew	0:80ee8f3b695e	2328	hspi->pRxBuffPtr++ = ((__IO uint8_t *)&hspi->Instance->DR);
EricLew	0:80ee8f3b695e	2329	hspi->RxXferCount--;
EricLew	0:80ee8f3b695e	2330
EricLew	0:80ee8f3b695e	2331	/* Enable CRC Transmission */
EricLew	0:80ee8f3b695e	2332	if((hspi->RxXferCount == 1) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE))
EricLew	0:80ee8f3b695e	2333	{
EricLew	0:80ee8f3b695e	2334	hspi->Instance->CR1 \|= SPI_CR1_CRCNEXT;
EricLew	0:80ee8f3b695e	2335	}
EricLew	0:80ee8f3b695e	2336
EricLew	0:80ee8f3b695e	2337	if(hspi->RxXferCount == 0)
EricLew	0:80ee8f3b695e	2338	{
EricLew	0:80ee8f3b695e	2339	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
EricLew	0:80ee8f3b695e	2340	{
EricLew	0:80ee8f3b695e	2341	hspi->RxISR = SPI_RxISR_8BITCRC;
EricLew	0:80ee8f3b695e	2342	return;
EricLew	0:80ee8f3b695e	2343	}
EricLew	0:80ee8f3b695e	2344	SPI_CloseRx_ISR(hspi);
EricLew	0:80ee8f3b695e	2345	}
EricLew	0:80ee8f3b695e	2346	}
EricLew	0:80ee8f3b695e	2347
EricLew	0:80ee8f3b695e	2348	/**
EricLew	0:80ee8f3b695e	2349	* @brief Manage the CRC 16-bit receive in Interrupt context.
EricLew	0:80ee8f3b695e	2350	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
EricLew	0:80ee8f3b695e	2351	* the configuration information for SPI module.
EricLew	0:80ee8f3b695e	2352	* @retval None
EricLew	0:80ee8f3b695e	2353	*/
EricLew	0:80ee8f3b695e	2354	static void SPI_RxISR_16BITCRC(struct __SPI_HandleTypeDef *hspi)
EricLew	0:80ee8f3b695e	2355	{
EricLew	0:80ee8f3b695e	2356	__IO uint16_t tmpreg;
EricLew	0:80ee8f3b695e	2357
EricLew	0:80ee8f3b695e	2358	tmpreg = hspi->Instance->DR;
EricLew	0:80ee8f3b695e	2359	UNUSED(tmpreg); /* To avoid GCC warning */
EricLew	0:80ee8f3b695e	2360
EricLew	0:80ee8f3b695e	2361	/* Disable RXNE and ERR interrupt */
EricLew	0:80ee8f3b695e	2362	__HAL_SPI_DISABLE_IT(hspi, (SPI_IT_RXNE \| SPI_IT_ERR));
EricLew	0:80ee8f3b695e	2363
EricLew	0:80ee8f3b695e	2364	SPI_CloseRx_ISR(hspi);
EricLew	0:80ee8f3b695e	2365	}
EricLew	0:80ee8f3b695e	2366
EricLew	0:80ee8f3b695e	2367	/**
EricLew	0:80ee8f3b695e	2368	* @brief Manage the 16-bit receive in Interrupt context.
EricLew	0:80ee8f3b695e	2369	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
EricLew	0:80ee8f3b695e	2370	* the configuration information for SPI module.
EricLew	0:80ee8f3b695e	2371	* @retval None
EricLew	0:80ee8f3b695e	2372	*/
EricLew	0:80ee8f3b695e	2373	static void SPI_RxISR_16BIT(struct __SPI_HandleTypeDef *hspi)
EricLew	0:80ee8f3b695e	2374	{
EricLew	0:80ee8f3b695e	2375	((uint16_t )hspi->pRxBuffPtr) = hspi->Instance->DR;
EricLew	0:80ee8f3b695e	2376	hspi->pRxBuffPtr += sizeof(uint16_t);
EricLew	0:80ee8f3b695e	2377	hspi->RxXferCount--;
EricLew	0:80ee8f3b695e	2378
EricLew	0:80ee8f3b695e	2379	/* Enable CRC Transmission */
EricLew	0:80ee8f3b695e	2380	if((hspi->RxXferCount == 1) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE))
EricLew	0:80ee8f3b695e	2381	{
EricLew	0:80ee8f3b695e	2382	hspi->Instance->CR1 \|= SPI_CR1_CRCNEXT;
EricLew	0:80ee8f3b695e	2383	}
EricLew	0:80ee8f3b695e	2384
EricLew	0:80ee8f3b695e	2385	if(hspi->RxXferCount == 0)
EricLew	0:80ee8f3b695e	2386	{
EricLew	0:80ee8f3b695e	2387	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
EricLew	0:80ee8f3b695e	2388	{
EricLew	0:80ee8f3b695e	2389	hspi->RxISR = SPI_RxISR_16BITCRC;
EricLew	0:80ee8f3b695e	2390	return;
EricLew	0:80ee8f3b695e	2391	}
EricLew	0:80ee8f3b695e	2392	SPI_CloseRx_ISR(hspi);
EricLew	0:80ee8f3b695e	2393	}
EricLew	0:80ee8f3b695e	2394	}
EricLew	0:80ee8f3b695e	2395
EricLew	0:80ee8f3b695e	2396	/**
EricLew	0:80ee8f3b695e	2397	* @brief Handle the data 8-bit transmit in Interrupt mode.
EricLew	0:80ee8f3b695e	2398	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
EricLew	0:80ee8f3b695e	2399	* the configuration information for SPI module.
EricLew	0:80ee8f3b695e	2400	* @retval None
EricLew	0:80ee8f3b695e	2401	*/
EricLew	0:80ee8f3b695e	2402	static void SPI_TxISR_8BIT(struct __SPI_HandleTypeDef *hspi)
EricLew	0:80ee8f3b695e	2403	{
EricLew	0:80ee8f3b695e	2404	(__IO uint8_t )&hspi->Instance->DR = (*hspi->pTxBuffPtr++);
EricLew	0:80ee8f3b695e	2405	hspi->TxXferCount--;
EricLew	0:80ee8f3b695e	2406
EricLew	0:80ee8f3b695e	2407	if(hspi->TxXferCount == 0)
EricLew	0:80ee8f3b695e	2408	{
EricLew	0:80ee8f3b695e	2409	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
EricLew	0:80ee8f3b695e	2410	{
EricLew	0:80ee8f3b695e	2411	/* Enable CRC Transmission */
EricLew	0:80ee8f3b695e	2412	hspi->Instance->CR1 \|= SPI_CR1_CRCNEXT;
EricLew	0:80ee8f3b695e	2413	}
EricLew	0:80ee8f3b695e	2414
EricLew	0:80ee8f3b695e	2415	SPI_CloseTx_ISR(hspi);
EricLew	0:80ee8f3b695e	2416	}
EricLew	0:80ee8f3b695e	2417	}
EricLew	0:80ee8f3b695e	2418
EricLew	0:80ee8f3b695e	2419	/**
EricLew	0:80ee8f3b695e	2420	* @brief Handle the data 16-bit transmit in Interrupt mode.
EricLew	0:80ee8f3b695e	2421	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
EricLew	0:80ee8f3b695e	2422	* the configuration information for SPI module.
EricLew	0:80ee8f3b695e	2423	* @retval None
EricLew	0:80ee8f3b695e	2424	*/
EricLew	0:80ee8f3b695e	2425	static void SPI_TxISR_16BIT(struct __SPI_HandleTypeDef *hspi)
EricLew	0:80ee8f3b695e	2426	{
EricLew	0:80ee8f3b695e	2427	/* Transmit data in 16 Bit mode */
EricLew	0:80ee8f3b695e	2428	hspi->Instance->DR = ((uint16_t )hspi->pTxBuffPtr);
EricLew	0:80ee8f3b695e	2429	hspi->pTxBuffPtr += sizeof(uint16_t);
EricLew	0:80ee8f3b695e	2430	hspi->TxXferCount--;
EricLew	0:80ee8f3b695e	2431
EricLew	0:80ee8f3b695e	2432	if(hspi->TxXferCount == 0)
EricLew	0:80ee8f3b695e	2433	{
EricLew	0:80ee8f3b695e	2434	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
EricLew	0:80ee8f3b695e	2435	{
EricLew	0:80ee8f3b695e	2436	/* Enable CRC Transmission */
EricLew	0:80ee8f3b695e	2437	hspi->Instance->CR1 \|= SPI_CR1_CRCNEXT;
EricLew	0:80ee8f3b695e	2438	}
EricLew	0:80ee8f3b695e	2439	SPI_CloseTx_ISR(hspi);
EricLew	0:80ee8f3b695e	2440	}
EricLew	0:80ee8f3b695e	2441	}
EricLew	0:80ee8f3b695e	2442
EricLew	0:80ee8f3b695e	2443	/**
EricLew	0:80ee8f3b695e	2444	* @brief Handle SPI Communication Timeout.
EricLew	0:80ee8f3b695e	2445	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
EricLew	0:80ee8f3b695e	2446	* the configuration information for SPI module.
EricLew	0:80ee8f3b695e	2447	* @param Flag : SPI flag to check
EricLew	0:80ee8f3b695e	2448	* @param State : flag state to check
EricLew	0:80ee8f3b695e	2449	* @param Timeout : Timeout duration
EricLew	0:80ee8f3b695e	2450	* @retval HAL status
EricLew	0:80ee8f3b695e	2451	*/
EricLew	0:80ee8f3b695e	2452	static HAL_StatusTypeDef SPI_WaitFlagStateUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Flag, uint32_t State, uint32_t Timeout)
EricLew	0:80ee8f3b695e	2453	{
EricLew	0:80ee8f3b695e	2454	uint32_t tickstart = HAL_GetTick();
EricLew	0:80ee8f3b695e	2455
EricLew	0:80ee8f3b695e	2456	while((hspi->Instance->SR & Flag) != State)
EricLew	0:80ee8f3b695e	2457	{
EricLew	0:80ee8f3b695e	2458	if(Timeout != HAL_MAX_DELAY)
EricLew	0:80ee8f3b695e	2459	{
EricLew	0:80ee8f3b695e	2460	if((Timeout == 0) \|\| ((HAL_GetTick()-tickstart) >= Timeout))
EricLew	0:80ee8f3b695e	2461	{
EricLew	0:80ee8f3b695e	2462	/* Disable the SPI and reset the CRC: the CRC value should be cleared
EricLew	0:80ee8f3b695e	2463	on both master and slave sides in order to resynchronize the master
EricLew	0:80ee8f3b695e	2464	and slave for their respective CRC calculation */
EricLew	0:80ee8f3b695e	2465
EricLew	0:80ee8f3b695e	2466	/* Disable TXE, RXNE and ERR interrupts for the interrupt process */
EricLew	0:80ee8f3b695e	2467	__HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE \| SPI_IT_RXNE \| SPI_IT_ERR));
EricLew	0:80ee8f3b695e	2468
EricLew	0:80ee8f3b695e	2469	if((hspi->Init.Mode == SPI_MODE_MASTER)&&((hspi->Init.Direction == SPI_DIRECTION_1LINE)\|\|(hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
EricLew	0:80ee8f3b695e	2470	{
EricLew	0:80ee8f3b695e	2471	/* Disable SPI peripheral */
EricLew	0:80ee8f3b695e	2472	__HAL_SPI_DISABLE(hspi);
EricLew	0:80ee8f3b695e	2473	}
EricLew	0:80ee8f3b695e	2474
EricLew	0:80ee8f3b695e	2475	/* Reset CRC Calculation */
EricLew	0:80ee8f3b695e	2476	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
EricLew	0:80ee8f3b695e	2477	{
EricLew	0:80ee8f3b695e	2478	SPI_RESET_CRC(hspi);
EricLew	0:80ee8f3b695e	2479	}
EricLew	0:80ee8f3b695e	2480
EricLew	0:80ee8f3b695e	2481	hspi->State= HAL_SPI_STATE_READY;
EricLew	0:80ee8f3b695e	2482
EricLew	0:80ee8f3b695e	2483	/* Process Unlocked */
EricLew	0:80ee8f3b695e	2484	__HAL_UNLOCK(hspi);
EricLew	0:80ee8f3b695e	2485
EricLew	0:80ee8f3b695e	2486	return HAL_TIMEOUT;
EricLew	0:80ee8f3b695e	2487	}
EricLew	0:80ee8f3b695e	2488	}
EricLew	0:80ee8f3b695e	2489	}
EricLew	0:80ee8f3b695e	2490
EricLew	0:80ee8f3b695e	2491	return HAL_OK;
EricLew	0:80ee8f3b695e	2492	}
EricLew	0:80ee8f3b695e	2493
EricLew	0:80ee8f3b695e	2494	/**
EricLew	0:80ee8f3b695e	2495	* @brief Handle SPI FIFO Communication Timeout.
EricLew	0:80ee8f3b695e	2496	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
EricLew	0:80ee8f3b695e	2497	* the configuration information for SPI module.
EricLew	0:80ee8f3b695e	2498	* @param Fifo : Fifo to check
EricLew	0:80ee8f3b695e	2499	* @param State : Fifo state to check
EricLew	0:80ee8f3b695e	2500	* @param Timeout : Timeout duration
EricLew	0:80ee8f3b695e	2501	* @retval HAL status
EricLew	0:80ee8f3b695e	2502	*/
EricLew	0:80ee8f3b695e	2503	static HAL_StatusTypeDef SPI_WaitFifoStateUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Fifo, uint32_t State, uint32_t Timeout)
EricLew	0:80ee8f3b695e	2504	{
EricLew	0:80ee8f3b695e	2505	__IO uint8_t tmpreg;
EricLew	0:80ee8f3b695e	2506	uint32_t tickstart = HAL_GetTick();
EricLew	0:80ee8f3b695e	2507
EricLew	0:80ee8f3b695e	2508	while((hspi->Instance->SR & Fifo) != State)
EricLew	0:80ee8f3b695e	2509	{
EricLew	0:80ee8f3b695e	2510	if((Fifo == SPI_SR_FRLVL) && (State == SPI_FRLVL_EMPTY))
EricLew	0:80ee8f3b695e	2511	{
EricLew	0:80ee8f3b695e	2512	tmpreg = ((__IO uint8_t)&hspi->Instance->DR);
EricLew	0:80ee8f3b695e	2513	UNUSED(tmpreg); /* To avoid GCC warning */
EricLew	0:80ee8f3b695e	2514	}
EricLew	0:80ee8f3b695e	2515
EricLew	0:80ee8f3b695e	2516	if(Timeout != HAL_MAX_DELAY)
EricLew	0:80ee8f3b695e	2517	{
EricLew	0:80ee8f3b695e	2518	if((Timeout == 0) \|\| ((HAL_GetTick()-tickstart) >= Timeout))
EricLew	0:80ee8f3b695e	2519	{
EricLew	0:80ee8f3b695e	2520	/* Disable the SPI and reset the CRC: the CRC value should be cleared
EricLew	0:80ee8f3b695e	2521	on both master and slave sides in order to resynchronize the master
EricLew	0:80ee8f3b695e	2522	and slave for their respective CRC calculation */
EricLew	0:80ee8f3b695e	2523
EricLew	0:80ee8f3b695e	2524	/* Disable TXE, RXNE and ERR interrupts for the interrupt process */
EricLew	0:80ee8f3b695e	2525	__HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE \| SPI_IT_RXNE \| SPI_IT_ERR));
EricLew	0:80ee8f3b695e	2526
EricLew	0:80ee8f3b695e	2527	if((hspi->Init.Mode == SPI_MODE_MASTER)&&((hspi->Init.Direction == SPI_DIRECTION_1LINE)\|\|(hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
EricLew	0:80ee8f3b695e	2528	{
EricLew	0:80ee8f3b695e	2529	/* Disable SPI peripheral */
EricLew	0:80ee8f3b695e	2530	__HAL_SPI_DISABLE(hspi);
EricLew	0:80ee8f3b695e	2531	}
EricLew	0:80ee8f3b695e	2532
EricLew	0:80ee8f3b695e	2533	/* Reset CRC Calculation */
EricLew	0:80ee8f3b695e	2534	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
EricLew	0:80ee8f3b695e	2535	{
EricLew	0:80ee8f3b695e	2536	SPI_RESET_CRC(hspi);
EricLew	0:80ee8f3b695e	2537	}
EricLew	0:80ee8f3b695e	2538
EricLew	0:80ee8f3b695e	2539	hspi->State = HAL_SPI_STATE_READY;
EricLew	0:80ee8f3b695e	2540
EricLew	0:80ee8f3b695e	2541	/* Process Unlocked */
EricLew	0:80ee8f3b695e	2542	__HAL_UNLOCK(hspi);
EricLew	0:80ee8f3b695e	2543
EricLew	0:80ee8f3b695e	2544	return HAL_TIMEOUT;
EricLew	0:80ee8f3b695e	2545	}
EricLew	0:80ee8f3b695e	2546	}
EricLew	0:80ee8f3b695e	2547	}
EricLew	0:80ee8f3b695e	2548
EricLew	0:80ee8f3b695e	2549	return HAL_OK;
EricLew	0:80ee8f3b695e	2550	}
EricLew	0:80ee8f3b695e	2551
EricLew	0:80ee8f3b695e	2552	/**
EricLew	0:80ee8f3b695e	2553	* @brief Handle the check of the RX transaction complete.
EricLew	0:80ee8f3b695e	2554	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
EricLew	0:80ee8f3b695e	2555	* the configuration information for SPI module.
EricLew	0:80ee8f3b695e	2556	* @param Timeout : Timeout duration
EricLew	0:80ee8f3b695e	2557	* @retval None
EricLew	0:80ee8f3b695e	2558	*/
EricLew	0:80ee8f3b695e	2559	static HAL_StatusTypeDef SPI_EndRxTransaction(SPI_HandleTypeDef *hspi, uint32_t Timeout)
EricLew	0:80ee8f3b695e	2560	{
EricLew	0:80ee8f3b695e	2561	if((hspi->Init.Mode == SPI_MODE_MASTER)&&((hspi->Init.Direction == SPI_DIRECTION_1LINE)\|\|(hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
EricLew	0:80ee8f3b695e	2562	{
EricLew	0:80ee8f3b695e	2563	/* Disable SPI peripheral */
EricLew	0:80ee8f3b695e	2564	__HAL_SPI_DISABLE(hspi);
EricLew	0:80ee8f3b695e	2565	}
EricLew	0:80ee8f3b695e	2566
EricLew	0:80ee8f3b695e	2567	/* Control the BSY flag */
EricLew	0:80ee8f3b695e	2568	if(SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_BSY, RESET, Timeout) != HAL_OK)
EricLew	0:80ee8f3b695e	2569	{
EricLew	0:80ee8f3b695e	2570	hspi->ErrorCode \|= HAL_SPI_ERROR_FLAG;
EricLew	0:80ee8f3b695e	2571	return HAL_TIMEOUT;
EricLew	0:80ee8f3b695e	2572	}
EricLew	0:80ee8f3b695e	2573
EricLew	0:80ee8f3b695e	2574	if((hspi->Init.Mode == SPI_MODE_MASTER)&&((hspi->Init.Direction == SPI_DIRECTION_1LINE)\|\|(hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
EricLew	0:80ee8f3b695e	2575	{
EricLew	0:80ee8f3b695e	2576	/* Empty the FRLVL fifo */
EricLew	0:80ee8f3b695e	2577	if(SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_EMPTY, Timeout) != HAL_OK)
EricLew	0:80ee8f3b695e	2578	{
EricLew	0:80ee8f3b695e	2579	hspi->ErrorCode \|= HAL_SPI_ERROR_FLAG;
EricLew	0:80ee8f3b695e	2580	return HAL_TIMEOUT;
EricLew	0:80ee8f3b695e	2581	}
EricLew	0:80ee8f3b695e	2582	}
EricLew	0:80ee8f3b695e	2583	return HAL_OK;
EricLew	0:80ee8f3b695e	2584	}
EricLew	0:80ee8f3b695e	2585
EricLew	0:80ee8f3b695e	2586	/**
EricLew	0:80ee8f3b695e	2587	* @brief Handle the check of the RXTX or TX transaction complete.
EricLew	0:80ee8f3b695e	2588	* @param hspi: SPI handle
EricLew	0:80ee8f3b695e	2589	* @param Timeout : Timeout duration
EricLew	0:80ee8f3b695e	2590	*/
EricLew	0:80ee8f3b695e	2591	static HAL_StatusTypeDef SPI_EndRxTxTransaction(SPI_HandleTypeDef *hspi, uint32_t Timeout)
EricLew	0:80ee8f3b695e	2592	{
EricLew	0:80ee8f3b695e	2593	/* Control if the TX fifo is empty */
EricLew	0:80ee8f3b695e	2594	if(SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FTLVL, SPI_FTLVL_EMPTY, Timeout) != HAL_OK)
EricLew	0:80ee8f3b695e	2595	{
EricLew	0:80ee8f3b695e	2596	hspi->ErrorCode \|= HAL_SPI_ERROR_FLAG;
EricLew	0:80ee8f3b695e	2597	return HAL_TIMEOUT;
EricLew	0:80ee8f3b695e	2598	}
EricLew	0:80ee8f3b695e	2599	/* Control the BSY flag */
EricLew	0:80ee8f3b695e	2600	if(SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_BSY, RESET, Timeout) != HAL_OK)
EricLew	0:80ee8f3b695e	2601	{
EricLew	0:80ee8f3b695e	2602	hspi->ErrorCode \|= HAL_SPI_ERROR_FLAG;
EricLew	0:80ee8f3b695e	2603	return HAL_TIMEOUT;
EricLew	0:80ee8f3b695e	2604	}
EricLew	0:80ee8f3b695e	2605	return HAL_OK;
EricLew	0:80ee8f3b695e	2606	}
EricLew	0:80ee8f3b695e	2607
EricLew	0:80ee8f3b695e	2608	/**
EricLew	0:80ee8f3b695e	2609	* @brief Handle the end of the RXTX transaction.
EricLew	0:80ee8f3b695e	2610	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
EricLew	0:80ee8f3b695e	2611	* the configuration information for SPI module.
EricLew	0:80ee8f3b695e	2612	* @retval None
EricLew	0:80ee8f3b695e	2613	*/
EricLew	0:80ee8f3b695e	2614	static void SPI_CloseRxTx_ISR(SPI_HandleTypeDef *hspi)
EricLew	0:80ee8f3b695e	2615	{
EricLew	0:80ee8f3b695e	2616	/* Disable ERR interrupt */
EricLew	0:80ee8f3b695e	2617	__HAL_SPI_DISABLE_IT(hspi, SPI_IT_ERR);
EricLew	0:80ee8f3b695e	2618
EricLew	0:80ee8f3b695e	2619	/* Check the end of the transaction */
EricLew	0:80ee8f3b695e	2620	if(SPI_EndRxTxTransaction(hspi,SPI_DEFAULT_TIMEOUT)!=HAL_OK)
EricLew	0:80ee8f3b695e	2621	{
EricLew	0:80ee8f3b695e	2622	hspi->ErrorCode\|= HAL_SPI_ERROR_FLAG;
EricLew	0:80ee8f3b695e	2623	}
EricLew	0:80ee8f3b695e	2624
EricLew	0:80ee8f3b695e	2625	/* Check if CRC error occurred */
EricLew	0:80ee8f3b695e	2626	if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
EricLew	0:80ee8f3b695e	2627	{
EricLew	0:80ee8f3b695e	2628	hspi->State = HAL_SPI_STATE_READY;
EricLew	0:80ee8f3b695e	2629	hspi->ErrorCode\|= HAL_SPI_ERROR_CRC;
EricLew	0:80ee8f3b695e	2630	__HAL_SPI_CLEAR_CRCERRFLAG(hspi);
EricLew	0:80ee8f3b695e	2631	HAL_SPI_ErrorCallback(hspi);
EricLew	0:80ee8f3b695e	2632	}
EricLew	0:80ee8f3b695e	2633	else
EricLew	0:80ee8f3b695e	2634	{
EricLew	0:80ee8f3b695e	2635	if(hspi->ErrorCode == HAL_SPI_ERROR_NONE)
EricLew	0:80ee8f3b695e	2636	{
EricLew	0:80ee8f3b695e	2637	if(hspi->State == HAL_SPI_STATE_BUSY_RX)
EricLew	0:80ee8f3b695e	2638	{
EricLew	0:80ee8f3b695e	2639	hspi->State = HAL_SPI_STATE_READY;
EricLew	0:80ee8f3b695e	2640	HAL_SPI_RxCpltCallback(hspi);
EricLew	0:80ee8f3b695e	2641	}
EricLew	0:80ee8f3b695e	2642	else
EricLew	0:80ee8f3b695e	2643	{
EricLew	0:80ee8f3b695e	2644	hspi->State = HAL_SPI_STATE_READY;
EricLew	0:80ee8f3b695e	2645	HAL_SPI_TxRxCpltCallback(hspi);
EricLew	0:80ee8f3b695e	2646	}
EricLew	0:80ee8f3b695e	2647	}
EricLew	0:80ee8f3b695e	2648	else
EricLew	0:80ee8f3b695e	2649	{
EricLew	0:80ee8f3b695e	2650	hspi->State = HAL_SPI_STATE_READY;
EricLew	0:80ee8f3b695e	2651	HAL_SPI_ErrorCallback(hspi);
EricLew	0:80ee8f3b695e	2652	}
EricLew	0:80ee8f3b695e	2653	}
EricLew	0:80ee8f3b695e	2654	}
EricLew	0:80ee8f3b695e	2655
EricLew	0:80ee8f3b695e	2656	/**
EricLew	0:80ee8f3b695e	2657	* @brief Handle the end of the RX transaction.
EricLew	0:80ee8f3b695e	2658	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
EricLew	0:80ee8f3b695e	2659	* the configuration information for SPI module.
EricLew	0:80ee8f3b695e	2660	* @retval None
EricLew	0:80ee8f3b695e	2661	*/
EricLew	0:80ee8f3b695e	2662	static void SPI_CloseRx_ISR(SPI_HandleTypeDef *hspi)
EricLew	0:80ee8f3b695e	2663	{
EricLew	0:80ee8f3b695e	2664	/* Disable RXNE and ERR interrupt */
EricLew	0:80ee8f3b695e	2665	__HAL_SPI_DISABLE_IT(hspi, (SPI_IT_RXNE \| SPI_IT_ERR));
EricLew	0:80ee8f3b695e	2666
EricLew	0:80ee8f3b695e	2667	/* Check the end of the transaction */
EricLew	0:80ee8f3b695e	2668	if(SPI_EndRxTransaction(hspi,SPI_DEFAULT_TIMEOUT)!=HAL_OK)
EricLew	0:80ee8f3b695e	2669	{
EricLew	0:80ee8f3b695e	2670	hspi->ErrorCode\|= HAL_SPI_ERROR_FLAG;
EricLew	0:80ee8f3b695e	2671	}
EricLew	0:80ee8f3b695e	2672	hspi->State = HAL_SPI_STATE_READY;
EricLew	0:80ee8f3b695e	2673
EricLew	0:80ee8f3b695e	2674	/* Check if CRC error occurred */
EricLew	0:80ee8f3b695e	2675	if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
EricLew	0:80ee8f3b695e	2676	{
EricLew	0:80ee8f3b695e	2677	hspi->ErrorCode\|= HAL_SPI_ERROR_CRC;
EricLew	0:80ee8f3b695e	2678	__HAL_SPI_CLEAR_CRCERRFLAG(hspi);
EricLew	0:80ee8f3b695e	2679	HAL_SPI_ErrorCallback(hspi);
EricLew	0:80ee8f3b695e	2680	}
EricLew	0:80ee8f3b695e	2681	else
EricLew	0:80ee8f3b695e	2682	{
EricLew	0:80ee8f3b695e	2683	if(hspi->ErrorCode == HAL_SPI_ERROR_NONE)
EricLew	0:80ee8f3b695e	2684	{
EricLew	0:80ee8f3b695e	2685	HAL_SPI_RxCpltCallback(hspi);
EricLew	0:80ee8f3b695e	2686	}
EricLew	0:80ee8f3b695e	2687	else
EricLew	0:80ee8f3b695e	2688	{
EricLew	0:80ee8f3b695e	2689	HAL_SPI_ErrorCallback(hspi);
EricLew	0:80ee8f3b695e	2690	}
EricLew	0:80ee8f3b695e	2691	}
EricLew	0:80ee8f3b695e	2692	}
EricLew	0:80ee8f3b695e	2693
EricLew	0:80ee8f3b695e	2694	/**
EricLew	0:80ee8f3b695e	2695	* @brief Handle the end of the TX transaction.
EricLew	0:80ee8f3b695e	2696	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
EricLew	0:80ee8f3b695e	2697	* the configuration information for SPI module.
EricLew	0:80ee8f3b695e	2698	* @retval None
EricLew	0:80ee8f3b695e	2699	*/
EricLew	0:80ee8f3b695e	2700	static void SPI_CloseTx_ISR(SPI_HandleTypeDef *hspi)
EricLew	0:80ee8f3b695e	2701	{
EricLew	0:80ee8f3b695e	2702	/* Disable TXE and ERR interrupt */
EricLew	0:80ee8f3b695e	2703	__HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE \| SPI_IT_ERR));
EricLew	0:80ee8f3b695e	2704
EricLew	0:80ee8f3b695e	2705	/* Check the end of the transaction */
EricLew	0:80ee8f3b695e	2706	if(SPI_EndRxTxTransaction(hspi,SPI_DEFAULT_TIMEOUT)!=HAL_OK)
EricLew	0:80ee8f3b695e	2707	{
EricLew	0:80ee8f3b695e	2708	hspi->ErrorCode\|= HAL_SPI_ERROR_FLAG;
EricLew	0:80ee8f3b695e	2709	}
EricLew	0:80ee8f3b695e	2710
EricLew	0:80ee8f3b695e	2711	/* Clear overrun flag in 2 Lines communication mode because received is not read */
EricLew	0:80ee8f3b695e	2712	if(hspi->Init.Direction == SPI_DIRECTION_2LINES)
EricLew	0:80ee8f3b695e	2713	{
EricLew	0:80ee8f3b695e	2714	__HAL_SPI_CLEAR_OVRFLAG(hspi);
EricLew	0:80ee8f3b695e	2715	}
EricLew	0:80ee8f3b695e	2716
EricLew	0:80ee8f3b695e	2717	hspi->State = HAL_SPI_STATE_READY;
EricLew	0:80ee8f3b695e	2718	if(hspi->ErrorCode != HAL_SPI_ERROR_NONE)
EricLew	0:80ee8f3b695e	2719	{
EricLew	0:80ee8f3b695e	2720	HAL_SPI_ErrorCallback(hspi);
EricLew	0:80ee8f3b695e	2721	}
EricLew	0:80ee8f3b695e	2722	else
EricLew	0:80ee8f3b695e	2723	{
EricLew	0:80ee8f3b695e	2724	HAL_SPI_TxCpltCallback(hspi);
EricLew	0:80ee8f3b695e	2725	}
EricLew	0:80ee8f3b695e	2726	}
EricLew	0:80ee8f3b695e	2727
EricLew	0:80ee8f3b695e	2728	/**
EricLew	0:80ee8f3b695e	2729	* @}
EricLew	0:80ee8f3b695e	2730	*/
EricLew	0:80ee8f3b695e	2731
EricLew	0:80ee8f3b695e	2732	#endif /* HAL_SPI_MODULE_ENABLED */
EricLew	0:80ee8f3b695e	2733
EricLew	0:80ee8f3b695e	2734	/**
EricLew	0:80ee8f3b695e	2735	* @}
EricLew	0:80ee8f3b695e	2736	*/
EricLew	0:80ee8f3b695e	2737
EricLew	0:80ee8f3b695e	2738	/**
EricLew	0:80ee8f3b695e	2739	* @}
EricLew	0:80ee8f3b695e	2740	*/
EricLew	0:80ee8f3b695e	2741
EricLew	0:80ee8f3b695e	2742	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/
EricLew	0:80ee8f3b695e	2743

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Type:	Library
Created:	02 Nov 2015
Imports:	1072
Forks:	1
Commits:	1
Dependents:	0
Dependencies:	0
Followers:	42

Src/stm32l4xx_hal_spi.c@0:80ee8f3b695e, 2015-11-02 (annotated)

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