Senior Design: Sound Monitor / STM32L4xx_HAL_Driver

L4 HAL Drivers

Src/stm32l4xx_hal_cortex.c@0:80ee8f3b695e, 2015-11-02 (annotated)

Committer:
EricLew
Date:
Mon Nov 02 19:37:23 2015 +0000
Revision:
0:80ee8f3b695e
Errors are with definitions of LCD and QSPI functions. I believe all .h and .c files are  uploaded, but there may need to be certain functions called.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
EricLew 0:80ee8f3b695e 1 /**
EricLew 0:80ee8f3b695e 2 ******************************************************************************
EricLew 0:80ee8f3b695e 3 * @file stm32l4xx_hal_cortex.c
EricLew 0:80ee8f3b695e 4 * @author MCD Application Team
EricLew 0:80ee8f3b695e 5 * @version V1.1.0
EricLew 0:80ee8f3b695e 6 * @date 16-September-2015
EricLew 0:80ee8f3b695e 7 * @brief CORTEX HAL module driver.
EricLew 0:80ee8f3b695e 8 * This file provides firmware functions to manage the following
EricLew 0:80ee8f3b695e 9 * functionalities of the CORTEX:
EricLew 0:80ee8f3b695e 10 * + Initialization and Configuration functions
EricLew 0:80ee8f3b695e 11 * + Peripheral Control functions
EricLew 0:80ee8f3b695e 12 *
EricLew 0:80ee8f3b695e 13 @verbatim
EricLew 0:80ee8f3b695e 14 ==============================================================================
EricLew 0:80ee8f3b695e 15 ##### How to use this driver #####
EricLew 0:80ee8f3b695e 16 ==============================================================================
EricLew 0:80ee8f3b695e 17
EricLew 0:80ee8f3b695e 18 [..]
EricLew 0:80ee8f3b695e 19 *** How to configure Interrupts using CORTEX HAL driver ***
EricLew 0:80ee8f3b695e 20 ===========================================================
EricLew 0:80ee8f3b695e 21 [..]
EricLew 0:80ee8f3b695e 22 This section provides functions allowing to configure the NVIC interrupts (IRQ).
EricLew 0:80ee8f3b695e 23 The Cortex-M4 exceptions are managed by CMSIS functions.
EricLew 0:80ee8f3b695e 24
EricLew 0:80ee8f3b695e 25 (#) Configure the NVIC Priority Grouping using HAL_NVIC_SetPriorityGrouping()
EricLew 0:80ee8f3b695e 26 function according to the following table.
EricLew 0:80ee8f3b695e 27 The table below gives the allowed values of the pre-emption priority and subpriority according
EricLew 0:80ee8f3b695e 28 to the Priority Grouping configuration performed by HAL_NVIC_SetPriorityGrouping() function.
EricLew 0:80ee8f3b695e 29 ==========================================================================================================================
EricLew 0:80ee8f3b695e 30 NVIC_PriorityGroup | NVIC_IRQChannelPreemptionPriority | NVIC_IRQChannelSubPriority | Description
EricLew 0:80ee8f3b695e 31 ==========================================================================================================================
EricLew 0:80ee8f3b695e 32 NVIC_PRIORITYGROUP_0 | 0 | 0-15 | 0 bit for pre-emption priority
EricLew 0:80ee8f3b695e 33 | | | 4 bits for subpriority
EricLew 0:80ee8f3b695e 34 --------------------------------------------------------------------------------------------------------------------------
EricLew 0:80ee8f3b695e 35 NVIC_PRIORITYGROUP_1 | 0-1 | 0-7 | 1 bit for pre-emption priority
EricLew 0:80ee8f3b695e 36 | | | 3 bits for subpriority
EricLew 0:80ee8f3b695e 37 --------------------------------------------------------------------------------------------------------------------------
EricLew 0:80ee8f3b695e 38 NVIC_PRIORITYGROUP_2 | 0-3 | 0-3 | 2 bits for pre-emption priority
EricLew 0:80ee8f3b695e 39 | | | 2 bits for subpriority
EricLew 0:80ee8f3b695e 40 --------------------------------------------------------------------------------------------------------------------------
EricLew 0:80ee8f3b695e 41 NVIC_PRIORITYGROUP_3 | 0-7 | 0-1 | 3 bits for pre-emption priority
EricLew 0:80ee8f3b695e 42 | | | 1 bit for subpriority
EricLew 0:80ee8f3b695e 43 --------------------------------------------------------------------------------------------------------------------------
EricLew 0:80ee8f3b695e 44 NVIC_PRIORITYGROUP_4 | 0-15 | 0 | 4 bits for pre-emption priority
EricLew 0:80ee8f3b695e 45 | | | 0 bit for subpriority
EricLew 0:80ee8f3b695e 46 ==========================================================================================================================
EricLew 0:80ee8f3b695e 47 (#) Configure the priority of the selected IRQ Channels using HAL_NVIC_SetPriority().
EricLew 0:80ee8f3b695e 48 (#) Enable the selected IRQ Channels using HAL_NVIC_EnableIRQ().
EricLew 0:80ee8f3b695e 49
EricLew 0:80ee8f3b695e 50 -@- When the NVIC_PRIORITYGROUP_0 is selected, IRQ pre-emption is no more possible.
EricLew 0:80ee8f3b695e 51 The pending IRQ priority will be managed only by the sub priority.
EricLew 0:80ee8f3b695e 52
EricLew 0:80ee8f3b695e 53 -@- IRQ priority order (sorted by highest to lowest priority):
EricLew 0:80ee8f3b695e 54 (+@) Lowest pre-emption priority
EricLew 0:80ee8f3b695e 55 (+@) Lowest sub priority
EricLew 0:80ee8f3b695e 56 (+@) Lowest hardware priority (IRQ number)
EricLew 0:80ee8f3b695e 57
EricLew 0:80ee8f3b695e 58 [..]
EricLew 0:80ee8f3b695e 59 *** How to configure SysTick using CORTEX HAL driver ***
EricLew 0:80ee8f3b695e 60 ========================================================
EricLew 0:80ee8f3b695e 61 [..]
EricLew 0:80ee8f3b695e 62 Setup SysTick Timer for time base.
EricLew 0:80ee8f3b695e 63
EricLew 0:80ee8f3b695e 64 (+) The HAL_SYSTICK_Config() function calls the SysTick_Config() function which
EricLew 0:80ee8f3b695e 65 is a CMSIS function that:
EricLew 0:80ee8f3b695e 66 (++) Configures the SysTick Reload register with value passed as function parameter.
EricLew 0:80ee8f3b695e 67 (++) Configures the SysTick IRQ priority to the lowest value (0x0F).
EricLew 0:80ee8f3b695e 68 (++) Resets the SysTick Counter register.
EricLew 0:80ee8f3b695e 69 (++) Configures the SysTick Counter clock source to be Core Clock Source (HCLK).
EricLew 0:80ee8f3b695e 70 (++) Enables the SysTick Interrupt.
EricLew 0:80ee8f3b695e 71 (++) Starts the SysTick Counter.
EricLew 0:80ee8f3b695e 72
EricLew 0:80ee8f3b695e 73 (+) You can change the SysTick Clock source to be HCLK_Div8 by calling the macro
EricLew 0:80ee8f3b695e 74 __HAL_CORTEX_SYSTICKCLK_CONFIG(SYSTICK_CLKSOURCE_HCLK_DIV8) just after the
EricLew 0:80ee8f3b695e 75 HAL_SYSTICK_Config() function call. The __HAL_CORTEX_SYSTICKCLK_CONFIG() macro is defined
EricLew 0:80ee8f3b695e 76 inside the stm32l4xx_hal_cortex.h file.
EricLew 0:80ee8f3b695e 77
EricLew 0:80ee8f3b695e 78 (+) You can change the SysTick IRQ priority by calling the
EricLew 0:80ee8f3b695e 79 HAL_NVIC_SetPriority(SysTick_IRQn,...) function just after the HAL_SYSTICK_Config() function
EricLew 0:80ee8f3b695e 80 call. The HAL_NVIC_SetPriority() call the NVIC_SetPriority() function which is a CMSIS function.
EricLew 0:80ee8f3b695e 81
EricLew 0:80ee8f3b695e 82 (+) To adjust the SysTick time base, use the following formula:
EricLew 0:80ee8f3b695e 83
EricLew 0:80ee8f3b695e 84 Reload Value = SysTick Counter Clock (Hz) x Desired Time base (s)
EricLew 0:80ee8f3b695e 85 (++) Reload Value is the parameter to be passed for HAL_SYSTICK_Config() function
EricLew 0:80ee8f3b695e 86 (++) Reload Value should not exceed 0xFFFFFF
EricLew 0:80ee8f3b695e 87
EricLew 0:80ee8f3b695e 88 @endverbatim
EricLew 0:80ee8f3b695e 89 ******************************************************************************
EricLew 0:80ee8f3b695e 90 * @attention
EricLew 0:80ee8f3b695e 91 *
EricLew 0:80ee8f3b695e 92 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
EricLew 0:80ee8f3b695e 93 *
EricLew 0:80ee8f3b695e 94 * Redistribution and use in source and binary forms, with or without modification,
EricLew 0:80ee8f3b695e 95 * are permitted provided that the following conditions are met:
EricLew 0:80ee8f3b695e 96 * 1. Redistributions of source code must retain the above copyright notice,
EricLew 0:80ee8f3b695e 97 * this list of conditions and the following disclaimer.
EricLew 0:80ee8f3b695e 98 * 2. Redistributions in binary form must reproduce the above copyright notice,
EricLew 0:80ee8f3b695e 99 * this list of conditions and the following disclaimer in the documentation
EricLew 0:80ee8f3b695e 100 * and/or other materials provided with the distribution.
EricLew 0:80ee8f3b695e 101 * 3. Neither the name of STMicroelectronics nor the names of its contributors
EricLew 0:80ee8f3b695e 102 * may be used to endorse or promote products derived from this software
EricLew 0:80ee8f3b695e 103 * without specific prior written permission.
EricLew 0:80ee8f3b695e 104 *
EricLew 0:80ee8f3b695e 105 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
EricLew 0:80ee8f3b695e 106 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
EricLew 0:80ee8f3b695e 107 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
EricLew 0:80ee8f3b695e 108 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
EricLew 0:80ee8f3b695e 109 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
EricLew 0:80ee8f3b695e 110 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
EricLew 0:80ee8f3b695e 111 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
EricLew 0:80ee8f3b695e 112 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
EricLew 0:80ee8f3b695e 113 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
EricLew 0:80ee8f3b695e 114 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
EricLew 0:80ee8f3b695e 115 *
EricLew 0:80ee8f3b695e 116 ******************************************************************************
EricLew 0:80ee8f3b695e 117 */
EricLew 0:80ee8f3b695e 118
EricLew 0:80ee8f3b695e 119 /* Includes ------------------------------------------------------------------*/
EricLew 0:80ee8f3b695e 120 #include "stm32l4xx_hal.h"
EricLew 0:80ee8f3b695e 121
EricLew 0:80ee8f3b695e 122 /** @addtogroup STM32L4xx_HAL_Driver
EricLew 0:80ee8f3b695e 123 * @{
EricLew 0:80ee8f3b695e 124 */
EricLew 0:80ee8f3b695e 125
EricLew 0:80ee8f3b695e 126 /** @addtogroup CORTEX
EricLew 0:80ee8f3b695e 127 * @{
EricLew 0:80ee8f3b695e 128 */
EricLew 0:80ee8f3b695e 129
EricLew 0:80ee8f3b695e 130 #ifdef HAL_CORTEX_MODULE_ENABLED
EricLew 0:80ee8f3b695e 131
EricLew 0:80ee8f3b695e 132 /* Private types -------------------------------------------------------------*/
EricLew 0:80ee8f3b695e 133 /* Private variables ---------------------------------------------------------*/
EricLew 0:80ee8f3b695e 134 /* Private constants ---------------------------------------------------------*/
EricLew 0:80ee8f3b695e 135 /* Private macros ------------------------------------------------------------*/
EricLew 0:80ee8f3b695e 136 /* Private functions ---------------------------------------------------------*/
EricLew 0:80ee8f3b695e 137 /* Exported functions --------------------------------------------------------*/
EricLew 0:80ee8f3b695e 138
EricLew 0:80ee8f3b695e 139 /** @addtogroup CORTEX_Exported_Functions
EricLew 0:80ee8f3b695e 140 * @{
EricLew 0:80ee8f3b695e 141 */
EricLew 0:80ee8f3b695e 142
EricLew 0:80ee8f3b695e 143
EricLew 0:80ee8f3b695e 144 /** @addtogroup CORTEX_Exported_Functions_Group1
EricLew 0:80ee8f3b695e 145 * @brief Initialization and Configuration functions
EricLew 0:80ee8f3b695e 146 *
EricLew 0:80ee8f3b695e 147 @verbatim
EricLew 0:80ee8f3b695e 148 ==============================================================================
EricLew 0:80ee8f3b695e 149 ##### Initialization and Configuration functions #####
EricLew 0:80ee8f3b695e 150 ==============================================================================
EricLew 0:80ee8f3b695e 151 [..]
EricLew 0:80ee8f3b695e 152 This section provides the CORTEX HAL driver functions allowing to configure Interrupts
EricLew 0:80ee8f3b695e 153 SysTick functionalities
EricLew 0:80ee8f3b695e 154
EricLew 0:80ee8f3b695e 155 @endverbatim
EricLew 0:80ee8f3b695e 156 * @{
EricLew 0:80ee8f3b695e 157 */
EricLew 0:80ee8f3b695e 158
EricLew 0:80ee8f3b695e 159
EricLew 0:80ee8f3b695e 160 /**
EricLew 0:80ee8f3b695e 161 * @brief Set the priority grouping field (pre-emption priority and subpriority)
EricLew 0:80ee8f3b695e 162 * using the required unlock sequence.
EricLew 0:80ee8f3b695e 163 * @param PriorityGroup: The priority grouping bits length.
EricLew 0:80ee8f3b695e 164 * This parameter can be one of the following values:
EricLew 0:80ee8f3b695e 165 * @arg NVIC_PRIORITYGROUP_0: 0 bit for pre-emption priority,
EricLew 0:80ee8f3b695e 166 * 4 bits for subpriority
EricLew 0:80ee8f3b695e 167 * @arg NVIC_PRIORITYGROUP_1: 1 bit for pre-emption priority,
EricLew 0:80ee8f3b695e 168 * 3 bits for subpriority
EricLew 0:80ee8f3b695e 169 * @arg NVIC_PRIORITYGROUP_2: 2 bits for pre-emption priority,
EricLew 0:80ee8f3b695e 170 * 2 bits for subpriority
EricLew 0:80ee8f3b695e 171 * @arg NVIC_PRIORITYGROUP_3: 3 bits for pre-emption priority,
EricLew 0:80ee8f3b695e 172 * 1 bit for subpriority
EricLew 0:80ee8f3b695e 173 * @arg NVIC_PRIORITYGROUP_4: 4 bits for pre-emption priority,
EricLew 0:80ee8f3b695e 174 * 0 bit for subpriority
EricLew 0:80ee8f3b695e 175 * @note When the NVIC_PriorityGroup_0 is selected, IRQ pre-emption is no more possible.
EricLew 0:80ee8f3b695e 176 * The pending IRQ priority will be managed only by the subpriority.
EricLew 0:80ee8f3b695e 177 * @retval None
EricLew 0:80ee8f3b695e 178 */
EricLew 0:80ee8f3b695e 179 void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
EricLew 0:80ee8f3b695e 180 {
EricLew 0:80ee8f3b695e 181 /* Check the parameters */
EricLew 0:80ee8f3b695e 182 assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));
EricLew 0:80ee8f3b695e 183
EricLew 0:80ee8f3b695e 184 /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */
EricLew 0:80ee8f3b695e 185 NVIC_SetPriorityGrouping(PriorityGroup);
EricLew 0:80ee8f3b695e 186 }
EricLew 0:80ee8f3b695e 187
EricLew 0:80ee8f3b695e 188 /**
EricLew 0:80ee8f3b695e 189 * @brief Set the priority of an interrupt.
EricLew 0:80ee8f3b695e 190 * @param IRQn: External interrupt number.
EricLew 0:80ee8f3b695e 191 * This parameter can be an enumerator of IRQn_Type enumeration
EricLew 0:80ee8f3b695e 192 * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32l4xxxx.h))
EricLew 0:80ee8f3b695e 193 * @param PreemptPriority: The pre-emption priority for the IRQn channel.
EricLew 0:80ee8f3b695e 194 * This parameter can be a value between 0 and 15
EricLew 0:80ee8f3b695e 195 * A lower priority value indicates a higher priority
EricLew 0:80ee8f3b695e 196 * @param SubPriority: the subpriority level for the IRQ channel.
EricLew 0:80ee8f3b695e 197 * This parameter can be a value between 0 and 15
EricLew 0:80ee8f3b695e 198 * A lower priority value indicates a higher priority.
EricLew 0:80ee8f3b695e 199 * @retval None
EricLew 0:80ee8f3b695e 200 */
EricLew 0:80ee8f3b695e 201 void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
EricLew 0:80ee8f3b695e 202 {
EricLew 0:80ee8f3b695e 203 uint32_t prioritygroup = 0x00;
EricLew 0:80ee8f3b695e 204
EricLew 0:80ee8f3b695e 205 /* Check the parameters */
EricLew 0:80ee8f3b695e 206 assert_param(IS_NVIC_SUB_PRIORITY(SubPriority));
EricLew 0:80ee8f3b695e 207 assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));
EricLew 0:80ee8f3b695e 208
EricLew 0:80ee8f3b695e 209 prioritygroup = NVIC_GetPriorityGrouping();
EricLew 0:80ee8f3b695e 210
EricLew 0:80ee8f3b695e 211 NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority));
EricLew 0:80ee8f3b695e 212 }
EricLew 0:80ee8f3b695e 213
EricLew 0:80ee8f3b695e 214 /**
EricLew 0:80ee8f3b695e 215 * @brief Enable a device specific interrupt in the NVIC interrupt controller.
EricLew 0:80ee8f3b695e 216 * @note To configure interrupts priority correctly, the NVIC_PriorityGroupConfig()
EricLew 0:80ee8f3b695e 217 * function should be called before.
EricLew 0:80ee8f3b695e 218 * @param IRQn External interrupt number.
EricLew 0:80ee8f3b695e 219 * This parameter can be an enumerator of IRQn_Type enumeration
EricLew 0:80ee8f3b695e 220 * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32l4xxxx.h))
EricLew 0:80ee8f3b695e 221 * @retval None
EricLew 0:80ee8f3b695e 222 */
EricLew 0:80ee8f3b695e 223 void HAL_NVIC_EnableIRQ(IRQn_Type IRQn)
EricLew 0:80ee8f3b695e 224 {
EricLew 0:80ee8f3b695e 225 /* Check the parameters */
EricLew 0:80ee8f3b695e 226 assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
EricLew 0:80ee8f3b695e 227
EricLew 0:80ee8f3b695e 228 /* Enable interrupt */
EricLew 0:80ee8f3b695e 229 NVIC_EnableIRQ(IRQn);
EricLew 0:80ee8f3b695e 230 }
EricLew 0:80ee8f3b695e 231
EricLew 0:80ee8f3b695e 232 /**
EricLew 0:80ee8f3b695e 233 * @brief Disable a device specific interrupt in the NVIC interrupt controller.
EricLew 0:80ee8f3b695e 234 * @param IRQn External interrupt number.
EricLew 0:80ee8f3b695e 235 * This parameter can be an enumerator of IRQn_Type enumeration
EricLew 0:80ee8f3b695e 236 * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32l4xxxx.h))
EricLew 0:80ee8f3b695e 237 * @retval None
EricLew 0:80ee8f3b695e 238 */
EricLew 0:80ee8f3b695e 239 void HAL_NVIC_DisableIRQ(IRQn_Type IRQn)
EricLew 0:80ee8f3b695e 240 {
EricLew 0:80ee8f3b695e 241 /* Check the parameters */
EricLew 0:80ee8f3b695e 242 assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
EricLew 0:80ee8f3b695e 243
EricLew 0:80ee8f3b695e 244 /* Disable interrupt */
EricLew 0:80ee8f3b695e 245 NVIC_DisableIRQ(IRQn);
EricLew 0:80ee8f3b695e 246 }
EricLew 0:80ee8f3b695e 247
EricLew 0:80ee8f3b695e 248 /**
EricLew 0:80ee8f3b695e 249 * @brief Initiate a system reset request to reset the MCU.
EricLew 0:80ee8f3b695e 250 * @retval None
EricLew 0:80ee8f3b695e 251 */
EricLew 0:80ee8f3b695e 252 void HAL_NVIC_SystemReset(void)
EricLew 0:80ee8f3b695e 253 {
EricLew 0:80ee8f3b695e 254 /* System Reset */
EricLew 0:80ee8f3b695e 255 NVIC_SystemReset();
EricLew 0:80ee8f3b695e 256 }
EricLew 0:80ee8f3b695e 257
EricLew 0:80ee8f3b695e 258 /**
EricLew 0:80ee8f3b695e 259 * @brief Initialize the System Timer with interrupt enabled and start the System Tick Timer (SysTick):
EricLew 0:80ee8f3b695e 260 * Counter is in free running mode to generate periodic interrupts.
EricLew 0:80ee8f3b695e 261 * @param TicksNumb: Specifies the ticks Number of ticks between two interrupts.
EricLew 0:80ee8f3b695e 262 * @retval status: - 0 Function succeeded.
EricLew 0:80ee8f3b695e 263 * - 1 Function failed.
EricLew 0:80ee8f3b695e 264 */
EricLew 0:80ee8f3b695e 265 uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
EricLew 0:80ee8f3b695e 266 {
EricLew 0:80ee8f3b695e 267 return SysTick_Config(TicksNumb);
EricLew 0:80ee8f3b695e 268 }
EricLew 0:80ee8f3b695e 269 /**
EricLew 0:80ee8f3b695e 270 * @}
EricLew 0:80ee8f3b695e 271 */
EricLew 0:80ee8f3b695e 272
EricLew 0:80ee8f3b695e 273 /** @addtogroup CORTEX_Exported_Functions_Group2
EricLew 0:80ee8f3b695e 274 * @brief Cortex control functions
EricLew 0:80ee8f3b695e 275 *
EricLew 0:80ee8f3b695e 276 @verbatim
EricLew 0:80ee8f3b695e 277 ==============================================================================
EricLew 0:80ee8f3b695e 278 ##### Peripheral Control functions #####
EricLew 0:80ee8f3b695e 279 ==============================================================================
EricLew 0:80ee8f3b695e 280 [..]
EricLew 0:80ee8f3b695e 281 This subsection provides a set of functions allowing to control the CORTEX
EricLew 0:80ee8f3b695e 282 (NVIC, SYSTICK, MPU) functionalities.
EricLew 0:80ee8f3b695e 283
EricLew 0:80ee8f3b695e 284
EricLew 0:80ee8f3b695e 285 @endverbatim
EricLew 0:80ee8f3b695e 286 * @{
EricLew 0:80ee8f3b695e 287 */
EricLew 0:80ee8f3b695e 288
EricLew 0:80ee8f3b695e 289 /**
EricLew 0:80ee8f3b695e 290 * @brief Get the priority grouping field from the NVIC Interrupt Controller.
EricLew 0:80ee8f3b695e 291 * @retval Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field)
EricLew 0:80ee8f3b695e 292 */
EricLew 0:80ee8f3b695e 293 uint32_t HAL_NVIC_GetPriorityGrouping(void)
EricLew 0:80ee8f3b695e 294 {
EricLew 0:80ee8f3b695e 295 /* Get the PRIGROUP[10:8] field value */
EricLew 0:80ee8f3b695e 296 return NVIC_GetPriorityGrouping();
EricLew 0:80ee8f3b695e 297 }
EricLew 0:80ee8f3b695e 298
EricLew 0:80ee8f3b695e 299 /**
EricLew 0:80ee8f3b695e 300 * @brief Get the priority of an interrupt.
EricLew 0:80ee8f3b695e 301 * @param IRQn: External interrupt number.
EricLew 0:80ee8f3b695e 302 * This parameter can be an enumerator of IRQn_Type enumeration
EricLew 0:80ee8f3b695e 303 * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32l4xxxx.h))
EricLew 0:80ee8f3b695e 304 * @param PriorityGroup: the priority grouping bits length.
EricLew 0:80ee8f3b695e 305 * This parameter can be one of the following values:
EricLew 0:80ee8f3b695e 306 * @arg NVIC_PRIORITYGROUP_0: 0 bit for pre-emption priority,
EricLew 0:80ee8f3b695e 307 * 4 bits for subpriority
EricLew 0:80ee8f3b695e 308 * @arg NVIC_PRIORITYGROUP_1: 1 bit for pre-emption priority,
EricLew 0:80ee8f3b695e 309 * 3 bits for subpriority
EricLew 0:80ee8f3b695e 310 * @arg NVIC_PRIORITYGROUP_2: 2 bits for pre-emption priority,
EricLew 0:80ee8f3b695e 311 * 2 bits for subpriority
EricLew 0:80ee8f3b695e 312 * @arg NVIC_PRIORITYGROUP_3: 3 bits for pre-emption priority,
EricLew 0:80ee8f3b695e 313 * 1 bit for subpriority
EricLew 0:80ee8f3b695e 314 * @arg NVIC_PRIORITYGROUP_4: 4 bits for pre-emption priority,
EricLew 0:80ee8f3b695e 315 * 0 bit for subpriority
EricLew 0:80ee8f3b695e 316 * @param pPreemptPriority: Pointer on the Preemptive priority value (starting from 0).
EricLew 0:80ee8f3b695e 317 * @param pSubPriority: Pointer on the Subpriority value (starting from 0).
EricLew 0:80ee8f3b695e 318 * @retval None
EricLew 0:80ee8f3b695e 319 */
EricLew 0:80ee8f3b695e 320 void HAL_NVIC_GetPriority(IRQn_Type IRQn, uint32_t PriorityGroup, uint32_t *pPreemptPriority, uint32_t *pSubPriority)
EricLew 0:80ee8f3b695e 321 {
EricLew 0:80ee8f3b695e 322 /* Check the parameters */
EricLew 0:80ee8f3b695e 323 assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));
EricLew 0:80ee8f3b695e 324 /* Get priority for Cortex-M system or device specific interrupts */
EricLew 0:80ee8f3b695e 325 NVIC_DecodePriority(NVIC_GetPriority(IRQn), PriorityGroup, pPreemptPriority, pSubPriority);
EricLew 0:80ee8f3b695e 326 }
EricLew 0:80ee8f3b695e 327
EricLew 0:80ee8f3b695e 328 /**
EricLew 0:80ee8f3b695e 329 * @brief Set Pending bit of an external interrupt.
EricLew 0:80ee8f3b695e 330 * @param IRQn External interrupt number
EricLew 0:80ee8f3b695e 331 * This parameter can be an enumerator of IRQn_Type enumeration
EricLew 0:80ee8f3b695e 332 * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32l4xxxx.h))
EricLew 0:80ee8f3b695e 333 * @retval None
EricLew 0:80ee8f3b695e 334 */
EricLew 0:80ee8f3b695e 335 void HAL_NVIC_SetPendingIRQ(IRQn_Type IRQn)
EricLew 0:80ee8f3b695e 336 {
EricLew 0:80ee8f3b695e 337 /* Set interrupt pending */
EricLew 0:80ee8f3b695e 338 NVIC_SetPendingIRQ(IRQn);
EricLew 0:80ee8f3b695e 339 }
EricLew 0:80ee8f3b695e 340
EricLew 0:80ee8f3b695e 341 /**
EricLew 0:80ee8f3b695e 342 * @brief Get Pending Interrupt (read the pending register in the NVIC
EricLew 0:80ee8f3b695e 343 * and return the pending bit for the specified interrupt).
EricLew 0:80ee8f3b695e 344 * @param IRQn External interrupt number.
EricLew 0:80ee8f3b695e 345 * This parameter can be an enumerator of IRQn_Type enumeration
EricLew 0:80ee8f3b695e 346 * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32l4xxxx.h))
EricLew 0:80ee8f3b695e 347 * @retval status: - 0 Interrupt status is not pending.
EricLew 0:80ee8f3b695e 348 * - 1 Interrupt status is pending.
EricLew 0:80ee8f3b695e 349 */
EricLew 0:80ee8f3b695e 350 uint32_t HAL_NVIC_GetPendingIRQ(IRQn_Type IRQn)
EricLew 0:80ee8f3b695e 351 {
EricLew 0:80ee8f3b695e 352 /* Return 1 if pending else 0 */
EricLew 0:80ee8f3b695e 353 return NVIC_GetPendingIRQ(IRQn);
EricLew 0:80ee8f3b695e 354 }
EricLew 0:80ee8f3b695e 355
EricLew 0:80ee8f3b695e 356 /**
EricLew 0:80ee8f3b695e 357 * @brief Clear the pending bit of an external interrupt.
EricLew 0:80ee8f3b695e 358 * @param IRQn External interrupt number.
EricLew 0:80ee8f3b695e 359 * This parameter can be an enumerator of IRQn_Type enumeration
EricLew 0:80ee8f3b695e 360 * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32l4xxxx.h))
EricLew 0:80ee8f3b695e 361 * @retval None
EricLew 0:80ee8f3b695e 362 */
EricLew 0:80ee8f3b695e 363 void HAL_NVIC_ClearPendingIRQ(IRQn_Type IRQn)
EricLew 0:80ee8f3b695e 364 {
EricLew 0:80ee8f3b695e 365 /* Clear pending interrupt */
EricLew 0:80ee8f3b695e 366 NVIC_ClearPendingIRQ(IRQn);
EricLew 0:80ee8f3b695e 367 }
EricLew 0:80ee8f3b695e 368
EricLew 0:80ee8f3b695e 369 /**
EricLew 0:80ee8f3b695e 370 * @brief Get active interrupt (read the active register in NVIC and return the active bit).
EricLew 0:80ee8f3b695e 371 * @param IRQn External interrupt number
EricLew 0:80ee8f3b695e 372 * This parameter can be an enumerator of IRQn_Type enumeration
EricLew 0:80ee8f3b695e 373 * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32l4xxxx.h))
EricLew 0:80ee8f3b695e 374 * @retval status: - 0 Interrupt status is not pending.
EricLew 0:80ee8f3b695e 375 * - 1 Interrupt status is pending.
EricLew 0:80ee8f3b695e 376 */
EricLew 0:80ee8f3b695e 377 uint32_t HAL_NVIC_GetActive(IRQn_Type IRQn)
EricLew 0:80ee8f3b695e 378 {
EricLew 0:80ee8f3b695e 379 /* Return 1 if active else 0 */
EricLew 0:80ee8f3b695e 380 return NVIC_GetActive(IRQn);
EricLew 0:80ee8f3b695e 381 }
EricLew 0:80ee8f3b695e 382
EricLew 0:80ee8f3b695e 383 /**
EricLew 0:80ee8f3b695e 384 * @brief Configure the SysTick clock source.
EricLew 0:80ee8f3b695e 385 * @param CLKSource: specifies the SysTick clock source.
EricLew 0:80ee8f3b695e 386 * This parameter can be one of the following values:
EricLew 0:80ee8f3b695e 387 * @arg SYSTICK_CLKSOURCE_HCLK_DIV8: AHB clock divided by 8 selected as SysTick clock source.
EricLew 0:80ee8f3b695e 388 * @arg SYSTICK_CLKSOURCE_HCLK: AHB clock selected as SysTick clock source.
EricLew 0:80ee8f3b695e 389 * @retval None
EricLew 0:80ee8f3b695e 390 */
EricLew 0:80ee8f3b695e 391 void HAL_SYSTICK_CLKSourceConfig(uint32_t CLKSource)
EricLew 0:80ee8f3b695e 392 {
EricLew 0:80ee8f3b695e 393 /* Check the parameters */
EricLew 0:80ee8f3b695e 394 assert_param(IS_SYSTICK_CLK_SOURCE(CLKSource));
EricLew 0:80ee8f3b695e 395 if (CLKSource == SYSTICK_CLKSOURCE_HCLK)
EricLew 0:80ee8f3b695e 396 {
EricLew 0:80ee8f3b695e 397 SysTick->CTRL |= SYSTICK_CLKSOURCE_HCLK;
EricLew 0:80ee8f3b695e 398 }
EricLew 0:80ee8f3b695e 399 else
EricLew 0:80ee8f3b695e 400 {
EricLew 0:80ee8f3b695e 401 SysTick->CTRL &= ~SYSTICK_CLKSOURCE_HCLK;
EricLew 0:80ee8f3b695e 402 }
EricLew 0:80ee8f3b695e 403 }
EricLew 0:80ee8f3b695e 404
EricLew 0:80ee8f3b695e 405 /**
EricLew 0:80ee8f3b695e 406 * @brief Handle SYSTICK interrupt request.
EricLew 0:80ee8f3b695e 407 * @retval None
EricLew 0:80ee8f3b695e 408 */
EricLew 0:80ee8f3b695e 409 void HAL_SYSTICK_IRQHandler(void)
EricLew 0:80ee8f3b695e 410 {
EricLew 0:80ee8f3b695e 411 HAL_SYSTICK_Callback();
EricLew 0:80ee8f3b695e 412 }
EricLew 0:80ee8f3b695e 413
EricLew 0:80ee8f3b695e 414 /**
EricLew 0:80ee8f3b695e 415 * @brief SYSTICK callback.
EricLew 0:80ee8f3b695e 416 * @retval None
EricLew 0:80ee8f3b695e 417 */
EricLew 0:80ee8f3b695e 418 __weak void HAL_SYSTICK_Callback(void)
EricLew 0:80ee8f3b695e 419 {
EricLew 0:80ee8f3b695e 420 /* NOTE : This function should not be modified, when the callback is needed,
EricLew 0:80ee8f3b695e 421 the HAL_SYSTICK_Callback could be implemented in the user file
EricLew 0:80ee8f3b695e 422 */
EricLew 0:80ee8f3b695e 423 }
EricLew 0:80ee8f3b695e 424
EricLew 0:80ee8f3b695e 425 #if (__MPU_PRESENT == 1)
EricLew 0:80ee8f3b695e 426 /**
EricLew 0:80ee8f3b695e 427 * @brief Initialize and configure the Region and the memory to be protected.
EricLew 0:80ee8f3b695e 428 * @param MPU_Init: Pointer to a MPU_Region_InitTypeDef structure that contains
EricLew 0:80ee8f3b695e 429 * the initialization and configuration information.
EricLew 0:80ee8f3b695e 430 * @retval None
EricLew 0:80ee8f3b695e 431 */
EricLew 0:80ee8f3b695e 432 void HAL_MPU_ConfigRegion(MPU_Region_InitTypeDef *MPU_Init)
EricLew 0:80ee8f3b695e 433 {
EricLew 0:80ee8f3b695e 434 /* Check the parameters */
EricLew 0:80ee8f3b695e 435 assert_param(IS_MPU_REGION_NUMBER(MPU_Init->Number));
EricLew 0:80ee8f3b695e 436 assert_param(IS_MPU_REGION_ENABLE(MPU_Init->Enable));
EricLew 0:80ee8f3b695e 437
EricLew 0:80ee8f3b695e 438 /* Set the Region number */
EricLew 0:80ee8f3b695e 439 MPU->RNR = MPU_Init->Number;
EricLew 0:80ee8f3b695e 440
EricLew 0:80ee8f3b695e 441 if ((MPU_Init->Enable) != RESET)
EricLew 0:80ee8f3b695e 442 {
EricLew 0:80ee8f3b695e 443 /* Check the parameters */
EricLew 0:80ee8f3b695e 444 assert_param(IS_MPU_INSTRUCTION_ACCESS(MPU_Init->DisableExec));
EricLew 0:80ee8f3b695e 445 assert_param(IS_MPU_REGION_PERMISSION_ATTRIBUTE(MPU_Init->AccessPermission));
EricLew 0:80ee8f3b695e 446 assert_param(IS_MPU_TEX_LEVEL(MPU_Init->TypeExtField));
EricLew 0:80ee8f3b695e 447 assert_param(IS_MPU_ACCESS_SHAREABLE(MPU_Init->IsShareable));
EricLew 0:80ee8f3b695e 448 assert_param(IS_MPU_ACCESS_CACHEABLE(MPU_Init->IsCacheable));
EricLew 0:80ee8f3b695e 449 assert_param(IS_MPU_ACCESS_BUFFERABLE(MPU_Init->IsBufferable));
EricLew 0:80ee8f3b695e 450 assert_param(IS_MPU_SUB_REGION_DISABLE(MPU_Init->SubRegionDisable));
EricLew 0:80ee8f3b695e 451 assert_param(IS_MPU_REGION_SIZE(MPU_Init->Size));
EricLew 0:80ee8f3b695e 452
EricLew 0:80ee8f3b695e 453 MPU->RBAR = MPU_Init->BaseAddress;
EricLew 0:80ee8f3b695e 454 MPU->RASR = ((uint32_t)MPU_Init->DisableExec << MPU_RASR_XN_Pos) |
EricLew 0:80ee8f3b695e 455 ((uint32_t)MPU_Init->AccessPermission << MPU_RASR_AP_Pos) |
EricLew 0:80ee8f3b695e 456 ((uint32_t)MPU_Init->TypeExtField << MPU_RASR_TEX_Pos) |
EricLew 0:80ee8f3b695e 457 ((uint32_t)MPU_Init->IsShareable << MPU_RASR_S_Pos) |
EricLew 0:80ee8f3b695e 458 ((uint32_t)MPU_Init->IsCacheable << MPU_RASR_C_Pos) |
EricLew 0:80ee8f3b695e 459 ((uint32_t)MPU_Init->IsBufferable << MPU_RASR_B_Pos) |
EricLew 0:80ee8f3b695e 460 ((uint32_t)MPU_Init->SubRegionDisable << MPU_RASR_SRD_Pos) |
EricLew 0:80ee8f3b695e 461 ((uint32_t)MPU_Init->Size << MPU_RASR_SIZE_Pos) |
EricLew 0:80ee8f3b695e 462 ((uint32_t)MPU_Init->Enable << MPU_RASR_ENABLE_Pos);
EricLew 0:80ee8f3b695e 463 }
EricLew 0:80ee8f3b695e 464 else
EricLew 0:80ee8f3b695e 465 {
EricLew 0:80ee8f3b695e 466 MPU->RBAR = 0x00;
EricLew 0:80ee8f3b695e 467 MPU->RASR = 0x00;
EricLew 0:80ee8f3b695e 468 }
EricLew 0:80ee8f3b695e 469 }
EricLew 0:80ee8f3b695e 470 #endif /* __MPU_PRESENT */
EricLew 0:80ee8f3b695e 471
EricLew 0:80ee8f3b695e 472 /**
EricLew 0:80ee8f3b695e 473 * @}
EricLew 0:80ee8f3b695e 474 */
EricLew 0:80ee8f3b695e 475
EricLew 0:80ee8f3b695e 476 /**
EricLew 0:80ee8f3b695e 477 * @}
EricLew 0:80ee8f3b695e 478 */
EricLew 0:80ee8f3b695e 479
EricLew 0:80ee8f3b695e 480 #endif /* HAL_CORTEX_MODULE_ENABLED */
EricLew 0:80ee8f3b695e 481 /**
EricLew 0:80ee8f3b695e 482 * @}
EricLew 0:80ee8f3b695e 483 */
EricLew 0:80ee8f3b695e 484
EricLew 0:80ee8f3b695e 485 /**
EricLew 0:80ee8f3b695e 486 * @}
EricLew 0:80ee8f3b695e 487 */
EricLew 0:80ee8f3b695e 488
EricLew 0:80ee8f3b695e 489 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
EricLew 0:80ee8f3b695e 490