STM32L4xx_HAL_Driver - L4 HAL Drivers

Senior Design: Sound Monitor » Code » STM32L4xx_HAL_Driver

Senior Design: Sound Monitor / STM32L4xx_HAL_Driver

L4 HAL Drivers

Src/stm32l4xx_hal_adc_ex.c@0:80ee8f3b695e, 2015-11-02 (annotated)

Committer:: EricLew
Date:: Mon Nov 02 19:37:23 2015 +0000
Revision:: 0:80ee8f3b695e

Errors are with definitions of LCD and QSPI functions. I believe all .h and .c files are  uploaded, but there may need to be certain functions called.

Who changed what in which revision?

User	Revision	Line number	New contents of line
EricLew	0:80ee8f3b695e	1	/**
EricLew	0:80ee8f3b695e	2	******************************************************************************
EricLew	0:80ee8f3b695e	3	* @file stm32l4xx_hal_adc_ex.c
EricLew	0:80ee8f3b695e	4	* @author MCD Application Team
EricLew	0:80ee8f3b695e	5	* @version V1.1.0
EricLew	0:80ee8f3b695e	6	* @date 16-September-2015
EricLew	0:80ee8f3b695e	7	* @brief This file provides firmware functions to manage the following
EricLew	0:80ee8f3b695e	8	* functionalities of the Analog to Digital Convertor (ADC)
EricLew	0:80ee8f3b695e	9	* peripheral:
EricLew	0:80ee8f3b695e	10	* + Calibration functions
EricLew	0:80ee8f3b695e	11	* ++ Calibration start-up
EricLew	0:80ee8f3b695e	12	* ++ Calibration value reading or setting
EricLew	0:80ee8f3b695e	13	* + Operation functions
EricLew	0:80ee8f3b695e	14	* ++ Start, stop, get result of conversions of injected
EricLew	0:80ee8f3b695e	15	* groups, using 3 possible modes: polling or interruption.
EricLew	0:80ee8f3b695e	16	* ++ Multimode feature when available
EricLew	0:80ee8f3b695e	17	* + Control functions
EricLew	0:80ee8f3b695e	18	* ++ Configure channels on injected group
EricLew	0:80ee8f3b695e	19	* + State functions
EricLew	0:80ee8f3b695e	20	* ++ Injected group queues management
EricLew	0:80ee8f3b695e	21	*
EricLew	0:80ee8f3b695e	22	@verbatim
EricLew	0:80ee8f3b695e	23	==============================================================================
EricLew	0:80ee8f3b695e	24	##### ADC specific features #####
EricLew	0:80ee8f3b695e	25	==============================================================================
EricLew	0:80ee8f3b695e	26	[..]
EricLew	0:80ee8f3b695e	27	(#) Interrupt generation at the end of injected conversion and in case of
EricLew	0:80ee8f3b695e	28	injected queues overflow.
EricLew	0:80ee8f3b695e	29
EricLew	0:80ee8f3b695e	30	(#) External trigger (timer or EXTI) with configurable polarity for
EricLew	0:80ee8f3b695e	31	injected groups.
EricLew	0:80ee8f3b695e	32
EricLew	0:80ee8f3b695e	33	(#) Multimode Dual mode when multimode feature is available.
EricLew	0:80ee8f3b695e	34
EricLew	0:80ee8f3b695e	35	(#) Configurable DMA data storage in Multimode Dual mode.
EricLew	0:80ee8f3b695e	36
EricLew	0:80ee8f3b695e	37	(#) Configurable delay between conversions in Dual interleaved mode.
EricLew	0:80ee8f3b695e	38
EricLew	0:80ee8f3b695e	39	(#) ADC calibration.
EricLew	0:80ee8f3b695e	40
EricLew	0:80ee8f3b695e	41	(#) ADC channels selectable single/differential input.
EricLew	0:80ee8f3b695e	42
EricLew	0:80ee8f3b695e	43	(#) ADC Injected sequencer&channels configuration context queue.
EricLew	0:80ee8f3b695e	44
EricLew	0:80ee8f3b695e	45	(#) ADC offset on injected groups.
EricLew	0:80ee8f3b695e	46
EricLew	0:80ee8f3b695e	47	(#) ADC oversampling.
EricLew	0:80ee8f3b695e	48
EricLew	0:80ee8f3b695e	49
EricLew	0:80ee8f3b695e	50	##### How to use this driver #####
EricLew	0:80ee8f3b695e	51	==============================================================================
EricLew	0:80ee8f3b695e	52	[..]
EricLew	0:80ee8f3b695e	53
EricLew	0:80ee8f3b695e	54	(#) Configure the ADC parameters (conversion resolution, data alignment,
EricLew	0:80ee8f3b695e	55	continuous mode, ...) using the HAL_ADC_Init() function.
EricLew	0:80ee8f3b695e	56
EricLew	0:80ee8f3b695e	57	(#) Activate the ADC peripheral using one of the start functions:
EricLew	0:80ee8f3b695e	58	HAL_ADCEx_InjectedStart(), HAL_ADCEx_InjectedStart_IT() for injected conversions
EricLew	0:80ee8f3b695e	59	or
EricLew	0:80ee8f3b695e	60	HAL_ADC_MultiModeStart_DMA() for multimode conversions when multimode
EricLew	0:80ee8f3b695e	61	feature is available.
EricLew	0:80ee8f3b695e	62
EricLew	0:80ee8f3b695e	63
EricLew	0:80ee8f3b695e	64	* Channels to injected group configuration *
EricLew	0:80ee8f3b695e	65	=============================================
EricLew	0:80ee8f3b695e	66	[..]
EricLew	0:80ee8f3b695e	67	(+) To configure the ADC Injected channels group features, use
EricLew	0:80ee8f3b695e	68	HAL_ADCEx_InjectedConfigChannel() functions.
EricLew	0:80ee8f3b695e	69	(+) To read the ADC converted values, use the HAL_ADCEx_InjectedGetValue()
EricLew	0:80ee8f3b695e	70	function.
EricLew	0:80ee8f3b695e	71
EricLew	0:80ee8f3b695e	72
EricLew	0:80ee8f3b695e	73	* Multimode ADCs configuration (when multimode feature is available) *
EricLew	0:80ee8f3b695e	74	========================================================================
EricLew	0:80ee8f3b695e	75	[..]
EricLew	0:80ee8f3b695e	76	(+) Multimode feature is available and applicable to Master and
EricLew	0:80ee8f3b695e	77	Slave ADCs.
EricLew	0:80ee8f3b695e	78	(+) Refer to "Channels to regular group configuration" description to
EricLew	0:80ee8f3b695e	79	configure the Master and Slave regular groups.
EricLew	0:80ee8f3b695e	80	(+) Select the Multi mode ADC features (dual mode
EricLew	0:80ee8f3b695e	81	simultaneous, interleaved, ...) and configure the DMA mode using
EricLew	0:80ee8f3b695e	82	HAL_ADCEx_MultiModeConfigChannel() functions.
EricLew	0:80ee8f3b695e	83	(+) Read the ADCs converted values using the HAL_ADCEx_MultiModeGetValue()
EricLew	0:80ee8f3b695e	84	function.
EricLew	0:80ee8f3b695e	85
EricLew	0:80ee8f3b695e	86
EricLew	0:80ee8f3b695e	87	@endverbatim
EricLew	0:80ee8f3b695e	88	******************************************************************************
EricLew	0:80ee8f3b695e	89	* @attention
EricLew	0:80ee8f3b695e	90	*
EricLew	0:80ee8f3b695e	91	* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
EricLew	0:80ee8f3b695e	92	*
EricLew	0:80ee8f3b695e	93	* Redistribution and use in source and binary forms, with or without modification,
EricLew	0:80ee8f3b695e	94	* are permitted provided that the following conditions are met:
EricLew	0:80ee8f3b695e	95	* 1. Redistributions of source code must retain the above copyright notice,
EricLew	0:80ee8f3b695e	96	* this list of conditions and the following disclaimer.
EricLew	0:80ee8f3b695e	97	* 2. Redistributions in binary form must reproduce the above copyright notice,
EricLew	0:80ee8f3b695e	98	* this list of conditions and the following disclaimer in the documentation
EricLew	0:80ee8f3b695e	99	* and/or other materials provided with the distribution.
EricLew	0:80ee8f3b695e	100	* 3. Neither the name of STMicroelectronics nor the names of its contributors
EricLew	0:80ee8f3b695e	101	* may be used to endorse or promote products derived from this software
EricLew	0:80ee8f3b695e	102	* without specific prior written permission.
EricLew	0:80ee8f3b695e	103	*
EricLew	0:80ee8f3b695e	104	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
EricLew	0:80ee8f3b695e	105	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
EricLew	0:80ee8f3b695e	106	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
EricLew	0:80ee8f3b695e	107	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
EricLew	0:80ee8f3b695e	108	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
EricLew	0:80ee8f3b695e	109	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
EricLew	0:80ee8f3b695e	110	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
EricLew	0:80ee8f3b695e	111	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
EricLew	0:80ee8f3b695e	112	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
EricLew	0:80ee8f3b695e	113	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
EricLew	0:80ee8f3b695e	114	*
EricLew	0:80ee8f3b695e	115	******************************************************************************
EricLew	0:80ee8f3b695e	116	*/
EricLew	0:80ee8f3b695e	117
EricLew	0:80ee8f3b695e	118	/* Includes ------------------------------------------------------------------*/
EricLew	0:80ee8f3b695e	119	#include "stm32l4xx_hal.h"
EricLew	0:80ee8f3b695e	120
EricLew	0:80ee8f3b695e	121	/** @addtogroup STM32L4xx_HAL_Driver
EricLew	0:80ee8f3b695e	122	* @{
EricLew	0:80ee8f3b695e	123	*/
EricLew	0:80ee8f3b695e	124
EricLew	0:80ee8f3b695e	125	/** @defgroup ADCEx ADCEx
EricLew	0:80ee8f3b695e	126	* @brief ADC Extended HAL module driver
EricLew	0:80ee8f3b695e	127	* @{
EricLew	0:80ee8f3b695e	128	*/
EricLew	0:80ee8f3b695e	129
EricLew	0:80ee8f3b695e	130	#ifdef HAL_ADC_MODULE_ENABLED
EricLew	0:80ee8f3b695e	131
EricLew	0:80ee8f3b695e	132	/* Private typedef -----------------------------------------------------------*/
EricLew	0:80ee8f3b695e	133	/* Private define ------------------------------------------------------------*/
EricLew	0:80ee8f3b695e	134
EricLew	0:80ee8f3b695e	135	/** @defgroup ADCEx_Private_Constants ADC Extended Private Constants
EricLew	0:80ee8f3b695e	136	* @{
EricLew	0:80ee8f3b695e	137	*/
EricLew	0:80ee8f3b695e	138
EricLew	0:80ee8f3b695e	139	#define ADC_JSQR_FIELDS ((uint32_t)(ADC_JSQR_JL \| ADC_JSQR_JEXTSEL \| ADC_JSQR_JEXTEN \|\
EricLew	0:80ee8f3b695e	140	ADC_JSQR_JSQ1 \| ADC_JSQR_JSQ2 \|\
EricLew	0:80ee8f3b695e	141	ADC_JSQR_JSQ3 \| ADC_JSQR_JSQ4 )) /*!< ADC_JSQR fields of parameters that can be updated anytime
EricLew	0:80ee8f3b695e	142	once the ADC is enabled */
EricLew	0:80ee8f3b695e	143
EricLew	0:80ee8f3b695e	144	#define ADC_CFGR2_INJ_FIELDS ((uint32_t)(ADC_CFGR2_JOVSE \| ADC_CFGR2_OVSR \|\
EricLew	0:80ee8f3b695e	145	ADC_CFGR2_OVSS )) /*!< ADC_CFGR2 injected oversampling parameters that can be updated
EricLew	0:80ee8f3b695e	146	when no conversion is on-going (neither regular nor injected) */
EricLew	0:80ee8f3b695e	147
EricLew	0:80ee8f3b695e	148	/* Fixed timeout value for ADC calibration. */
EricLew	0:80ee8f3b695e	149	/* Values defined to be higher than worst cases: low clock frequency, */
EricLew	0:80ee8f3b695e	150	/* maximum prescalers. */
EricLew	0:80ee8f3b695e	151	/* Ex of profile low frequency : f_ADC at 0.14 MHz (minimum value */
EricLew	0:80ee8f3b695e	152	/* according to Data sheet), calibration_time MAX = 112 / f_ADC */
EricLew	0:80ee8f3b695e	153	/* 112 / 140,000 = 0.8 ms */
EricLew	0:80ee8f3b695e	154	/* At maximum CPU speed (80 MHz), this means */
EricLew	0:80ee8f3b695e	155	/* 0.8 ms * 80 MHz = 64000 CPU cycles */
EricLew	0:80ee8f3b695e	156	#define ADC_CALIBRATION_TIMEOUT ((uint32_t) 64000) /!< ADC calibration time-out value /
EricLew	0:80ee8f3b695e	157
EricLew	0:80ee8f3b695e	158	/**
EricLew	0:80ee8f3b695e	159	* @}
EricLew	0:80ee8f3b695e	160	*/
EricLew	0:80ee8f3b695e	161
EricLew	0:80ee8f3b695e	162	/* Private macro -------------------------------------------------------------*/
EricLew	0:80ee8f3b695e	163	/* Private variables ---------------------------------------------------------*/
EricLew	0:80ee8f3b695e	164	/* Private function prototypes -----------------------------------------------*/
EricLew	0:80ee8f3b695e	165	/* Exported functions --------------------------------------------------------*/
EricLew	0:80ee8f3b695e	166
EricLew	0:80ee8f3b695e	167	/** @defgroup ADCEx_Exported_Functions ADC Extended Exported Functions
EricLew	0:80ee8f3b695e	168	* @{
EricLew	0:80ee8f3b695e	169	*/
EricLew	0:80ee8f3b695e	170
EricLew	0:80ee8f3b695e	171
EricLew	0:80ee8f3b695e	172
EricLew	0:80ee8f3b695e	173	/** @defgroup ADCEx_Exported_Functions_Group1 Extended Input and Output operation functions
EricLew	0:80ee8f3b695e	174	* @brief Extended IO operation functions
EricLew	0:80ee8f3b695e	175	*
EricLew	0:80ee8f3b695e	176	@verbatim
EricLew	0:80ee8f3b695e	177	===============================================================================
EricLew	0:80ee8f3b695e	178	##### IO operation functions #####
EricLew	0:80ee8f3b695e	179	===============================================================================
EricLew	0:80ee8f3b695e	180	[..] This section provides functions allowing to:
EricLew	0:80ee8f3b695e	181
EricLew	0:80ee8f3b695e	182	(+) Perform the ADC self-calibration for single or differential ending.
EricLew	0:80ee8f3b695e	183	(+) Get calibration factors for single or differential ending.
EricLew	0:80ee8f3b695e	184	(+) Set calibration factors for single or differential ending.
EricLew	0:80ee8f3b695e	185
EricLew	0:80ee8f3b695e	186	(+) Start conversion of injected group.
EricLew	0:80ee8f3b695e	187	(+) Stop conversion of injected group.
EricLew	0:80ee8f3b695e	188	(+) Poll for conversion complete on injected group.
EricLew	0:80ee8f3b695e	189	(+) Get result of injected channel conversion.
EricLew	0:80ee8f3b695e	190	(+) Start conversion of injected group and enable interruptions.
EricLew	0:80ee8f3b695e	191	(+) Stop conversion of injected group and disable interruptions.
EricLew	0:80ee8f3b695e	192
EricLew	0:80ee8f3b695e	193	(+) When multimode feature is available, start multimode and enable DMA transfer.
EricLew	0:80ee8f3b695e	194	(+) Stop multimode and disable ADC DMA transfer.
EricLew	0:80ee8f3b695e	195	(+) Get result of multimode conversion.
EricLew	0:80ee8f3b695e	196
EricLew	0:80ee8f3b695e	197
EricLew	0:80ee8f3b695e	198
EricLew	0:80ee8f3b695e	199	@endverbatim
EricLew	0:80ee8f3b695e	200	* @{
EricLew	0:80ee8f3b695e	201	*/
EricLew	0:80ee8f3b695e	202
EricLew	0:80ee8f3b695e	203
EricLew	0:80ee8f3b695e	204
EricLew	0:80ee8f3b695e	205	/**
EricLew	0:80ee8f3b695e	206	* @brief Perform an ADC automatic self-calibration
EricLew	0:80ee8f3b695e	207	* Calibration prerequisite: ADC must be disabled (execute this
EricLew	0:80ee8f3b695e	208	* function before HAL_ADC_Start() or after HAL_ADC_Stop() ).
EricLew	0:80ee8f3b695e	209	* @param hadc: ADC handle.
EricLew	0:80ee8f3b695e	210	* @param SingleDiff: Selection of single-ended or differential input
EricLew	0:80ee8f3b695e	211	* This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	212	* @arg ADC_SINGLE_ENDED: Channel in mode input single ended
EricLew	0:80ee8f3b695e	213	* @arg ADC_DIFFERENTIAL_ENDED: Channel in mode input differential ended
EricLew	0:80ee8f3b695e	214	* @retval HAL status
EricLew	0:80ee8f3b695e	215	*/
EricLew	0:80ee8f3b695e	216	HAL_StatusTypeDef HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef* hadc, uint32_t SingleDiff)
EricLew	0:80ee8f3b695e	217	{
EricLew	0:80ee8f3b695e	218	HAL_StatusTypeDef tmp_status = HAL_OK;
EricLew	0:80ee8f3b695e	219	uint32_t WaitLoopIndex = 0;
EricLew	0:80ee8f3b695e	220
EricLew	0:80ee8f3b695e	221	/* Check the parameters */
EricLew	0:80ee8f3b695e	222	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
EricLew	0:80ee8f3b695e	223	assert_param(IS_ADC_SINGLE_DIFFERENTIAL(SingleDiff));
EricLew	0:80ee8f3b695e	224
EricLew	0:80ee8f3b695e	225	/* Process locked */
EricLew	0:80ee8f3b695e	226	__HAL_LOCK(hadc);
EricLew	0:80ee8f3b695e	227
EricLew	0:80ee8f3b695e	228	/* Calibration prerequisite: ADC must be disabled. */
EricLew	0:80ee8f3b695e	229
EricLew	0:80ee8f3b695e	230	/* Disable the ADC (if not already disabled) */
EricLew	0:80ee8f3b695e	231	tmp_status = ADC_Disable(hadc);
EricLew	0:80ee8f3b695e	232
EricLew	0:80ee8f3b695e	233	/* Check if ADC is effectively disabled */
EricLew	0:80ee8f3b695e	234	if (tmp_status == HAL_OK)
EricLew	0:80ee8f3b695e	235	{
EricLew	0:80ee8f3b695e	236	/* Change ADC state */
EricLew	0:80ee8f3b695e	237	/* Clear HAL_ADC_STATE_REG_BUSY and HAL_ADC_STATE_INJ_BUSY bits, set HAL_ADC_STATE_BUSY_INTERNAL bit */
EricLew	0:80ee8f3b695e	238	ADC_STATE_CLR_SET(hadc->State, (HAL_ADC_STATE_REG_BUSY\|HAL_ADC_STATE_INJ_BUSY), HAL_ADC_STATE_BUSY_INTERNAL);
EricLew	0:80ee8f3b695e	239
EricLew	0:80ee8f3b695e	240	/* Select calibration mode single ended or differential ended */
EricLew	0:80ee8f3b695e	241	MODIFY_REG(hadc->Instance->CR, ADC_CR_ADCALDIF, SingleDiff);
EricLew	0:80ee8f3b695e	242
EricLew	0:80ee8f3b695e	243	/* Start ADC calibration */
EricLew	0:80ee8f3b695e	244	SET_BIT(hadc->Instance->CR, ADC_CR_ADCAL);
EricLew	0:80ee8f3b695e	245
EricLew	0:80ee8f3b695e	246
EricLew	0:80ee8f3b695e	247	/* Wait for calibration completion */
EricLew	0:80ee8f3b695e	248	while(HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADCAL))
EricLew	0:80ee8f3b695e	249	{
EricLew	0:80ee8f3b695e	250	WaitLoopIndex++;
EricLew	0:80ee8f3b695e	251	if (WaitLoopIndex >= ADC_CALIBRATION_TIMEOUT)
EricLew	0:80ee8f3b695e	252	{
EricLew	0:80ee8f3b695e	253	/* Update ADC state machine to error */
EricLew	0:80ee8f3b695e	254	/* Clear HAL_ADC_STATE_BUSY_INTERNAL bit, set HAL_ADC_STATE_ERROR_INTERNAL bit */
EricLew	0:80ee8f3b695e	255	ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_BUSY_INTERNAL, HAL_ADC_STATE_ERROR_INTERNAL);
EricLew	0:80ee8f3b695e	256
EricLew	0:80ee8f3b695e	257	/* Process unlocked */
EricLew	0:80ee8f3b695e	258	__HAL_UNLOCK(hadc);
EricLew	0:80ee8f3b695e	259
EricLew	0:80ee8f3b695e	260	return HAL_ERROR;
EricLew	0:80ee8f3b695e	261	}
EricLew	0:80ee8f3b695e	262	}
EricLew	0:80ee8f3b695e	263
EricLew	0:80ee8f3b695e	264	/* Clear HAL_ADC_STATE_BUSY_INTERNAL bit, set HAL_ADC_STATE_READY bit */
EricLew	0:80ee8f3b695e	265	ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_BUSY_INTERNAL, HAL_ADC_STATE_READY);
EricLew	0:80ee8f3b695e	266	}
EricLew	0:80ee8f3b695e	267	else
EricLew	0:80ee8f3b695e	268	{
EricLew	0:80ee8f3b695e	269	SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
EricLew	0:80ee8f3b695e	270
EricLew	0:80ee8f3b695e	271	/* Update ADC state machine to error */
EricLew	0:80ee8f3b695e	272	tmp_status = HAL_ERROR;
EricLew	0:80ee8f3b695e	273	}
EricLew	0:80ee8f3b695e	274
EricLew	0:80ee8f3b695e	275
EricLew	0:80ee8f3b695e	276	/* Process unlocked */
EricLew	0:80ee8f3b695e	277	__HAL_UNLOCK(hadc);
EricLew	0:80ee8f3b695e	278
EricLew	0:80ee8f3b695e	279	/* Return function status */
EricLew	0:80ee8f3b695e	280	return tmp_status;
EricLew	0:80ee8f3b695e	281	}
EricLew	0:80ee8f3b695e	282
EricLew	0:80ee8f3b695e	283
EricLew	0:80ee8f3b695e	284
EricLew	0:80ee8f3b695e	285
EricLew	0:80ee8f3b695e	286	/**
EricLew	0:80ee8f3b695e	287	* @brief Get the calibration factor from automatic conversion result.
EricLew	0:80ee8f3b695e	288	* @param hadc: ADC handle.
EricLew	0:80ee8f3b695e	289	* @param SingleDiff: Selection of single-ended or differential input
EricLew	0:80ee8f3b695e	290	* This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	291	* @arg ADC_SINGLE_ENDED: Channel in mode input single ended
EricLew	0:80ee8f3b695e	292	* @arg ADC_DIFFERENTIAL_ENDED: Channel in mode input differential ended
EricLew	0:80ee8f3b695e	293	* @retval Converted value
EricLew	0:80ee8f3b695e	294	*/
EricLew	0:80ee8f3b695e	295	uint32_t HAL_ADCEx_Calibration_GetValue(ADC_HandleTypeDef* hadc, uint32_t SingleDiff)
EricLew	0:80ee8f3b695e	296	{
EricLew	0:80ee8f3b695e	297	/* Check the parameters */
EricLew	0:80ee8f3b695e	298	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
EricLew	0:80ee8f3b695e	299	assert_param(IS_ADC_SINGLE_DIFFERENTIAL(SingleDiff));
EricLew	0:80ee8f3b695e	300
EricLew	0:80ee8f3b695e	301	/* Return the selected ADC calibration value */
EricLew	0:80ee8f3b695e	302	if (SingleDiff == ADC_DIFFERENTIAL_ENDED)
EricLew	0:80ee8f3b695e	303	{
EricLew	0:80ee8f3b695e	304	return ADC_CALFACT_DIFF_GET(hadc->Instance->CALFACT);
EricLew	0:80ee8f3b695e	305	}
EricLew	0:80ee8f3b695e	306	else
EricLew	0:80ee8f3b695e	307	{
EricLew	0:80ee8f3b695e	308	return ((hadc->Instance->CALFACT) & ADC_CALFACT_CALFACT_S);
EricLew	0:80ee8f3b695e	309	}
EricLew	0:80ee8f3b695e	310	}
EricLew	0:80ee8f3b695e	311
EricLew	0:80ee8f3b695e	312
EricLew	0:80ee8f3b695e	313
EricLew	0:80ee8f3b695e	314	/**
EricLew	0:80ee8f3b695e	315	* @brief Set the calibration factor to overwrite automatic conversion result. ADC must be enabled and no conversion on going.
EricLew	0:80ee8f3b695e	316	* @param hadc: ADC handle.
EricLew	0:80ee8f3b695e	317	* @param SingleDiff: Selection of single-ended or differential input.
EricLew	0:80ee8f3b695e	318	* This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	319	* @arg ADC_SINGLE_ENDED: Channel in mode input single ended
EricLew	0:80ee8f3b695e	320	* @arg ADC_DIFFERENTIAL_ENDED: Channel in mode input differential ended
EricLew	0:80ee8f3b695e	321	* @param CalibrationFactor: Calibration factor (coded on 7 bits maximum)
EricLew	0:80ee8f3b695e	322	* @retval HAL state
EricLew	0:80ee8f3b695e	323	*/
EricLew	0:80ee8f3b695e	324	HAL_StatusTypeDef HAL_ADCEx_Calibration_SetValue(ADC_HandleTypeDef* hadc, uint32_t SingleDiff, uint32_t CalibrationFactor)
EricLew	0:80ee8f3b695e	325	{
EricLew	0:80ee8f3b695e	326	HAL_StatusTypeDef tmp_status = HAL_OK;
EricLew	0:80ee8f3b695e	327
EricLew	0:80ee8f3b695e	328	/* Check the parameters */
EricLew	0:80ee8f3b695e	329	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
EricLew	0:80ee8f3b695e	330	assert_param(IS_ADC_SINGLE_DIFFERENTIAL(SingleDiff));
EricLew	0:80ee8f3b695e	331	assert_param(IS_ADC_CALFACT(CalibrationFactor));
EricLew	0:80ee8f3b695e	332
EricLew	0:80ee8f3b695e	333	/* Process locked */
EricLew	0:80ee8f3b695e	334	__HAL_LOCK(hadc);
EricLew	0:80ee8f3b695e	335
EricLew	0:80ee8f3b695e	336	/* Verification of hardware constraints before modifying the calibration */
EricLew	0:80ee8f3b695e	337	/* factors register: ADC must be enabled, no conversion on going. */
EricLew	0:80ee8f3b695e	338	if ( (ADC_IS_ENABLE(hadc) != RESET) &&
EricLew	0:80ee8f3b695e	339	(ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED(hadc) == RESET) )
EricLew	0:80ee8f3b695e	340	{
EricLew	0:80ee8f3b695e	341	/* Set the selected ADC calibration value */
EricLew	0:80ee8f3b695e	342	if (SingleDiff == ADC_DIFFERENTIAL_ENDED)
EricLew	0:80ee8f3b695e	343	{
EricLew	0:80ee8f3b695e	344	MODIFY_REG(hadc->Instance->CALFACT, ADC_CALFACT_CALFACT_D, ADC_CALFACT_DIFF_SET(CalibrationFactor));
EricLew	0:80ee8f3b695e	345	}
EricLew	0:80ee8f3b695e	346	else
EricLew	0:80ee8f3b695e	347	{
EricLew	0:80ee8f3b695e	348	MODIFY_REG(hadc->Instance->CALFACT, ADC_CALFACT_CALFACT_S, CalibrationFactor);
EricLew	0:80ee8f3b695e	349	}
EricLew	0:80ee8f3b695e	350	}
EricLew	0:80ee8f3b695e	351	else
EricLew	0:80ee8f3b695e	352	{
EricLew	0:80ee8f3b695e	353	/* Update ADC state machine */
EricLew	0:80ee8f3b695e	354	SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
EricLew	0:80ee8f3b695e	355
EricLew	0:80ee8f3b695e	356	/* Update ADC state machine to error */
EricLew	0:80ee8f3b695e	357	tmp_status = HAL_ERROR;
EricLew	0:80ee8f3b695e	358	}
EricLew	0:80ee8f3b695e	359
EricLew	0:80ee8f3b695e	360	/* Process unlocked */
EricLew	0:80ee8f3b695e	361	__HAL_UNLOCK(hadc);
EricLew	0:80ee8f3b695e	362
EricLew	0:80ee8f3b695e	363	/* Return function status */
EricLew	0:80ee8f3b695e	364	return tmp_status;
EricLew	0:80ee8f3b695e	365	}
EricLew	0:80ee8f3b695e	366
EricLew	0:80ee8f3b695e	367
EricLew	0:80ee8f3b695e	368
EricLew	0:80ee8f3b695e	369	/**
EricLew	0:80ee8f3b695e	370	* @brief Enable ADC, start conversion of injected group.
EricLew	0:80ee8f3b695e	371	* @note Interruptions enabled in this function: None.
EricLew	0:80ee8f3b695e	372	* @note Case of multimode enabled when multimode feature is available:
EricLew	0:80ee8f3b695e	373	* HAL_ADCEx_InjectedStart() API must be called for ADC slave first,
EricLew	0:80ee8f3b695e	374	* then for ADC master.
EricLew	0:80ee8f3b695e	375	* For ADC slave, ADC is enabled only (conversion is not started).
EricLew	0:80ee8f3b695e	376	* For ADC master, ADC is enabled and multimode conversion is started.
EricLew	0:80ee8f3b695e	377	* @param hadc: ADC handle.
EricLew	0:80ee8f3b695e	378	* @retval HAL status
EricLew	0:80ee8f3b695e	379	*/
EricLew	0:80ee8f3b695e	380	HAL_StatusTypeDef HAL_ADCEx_InjectedStart(ADC_HandleTypeDef* hadc)
EricLew	0:80ee8f3b695e	381	{
EricLew	0:80ee8f3b695e	382	HAL_StatusTypeDef tmp_status = HAL_OK;
EricLew	0:80ee8f3b695e	383
EricLew	0:80ee8f3b695e	384	/* Check the parameters */
EricLew	0:80ee8f3b695e	385	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
EricLew	0:80ee8f3b695e	386
EricLew	0:80ee8f3b695e	387	if (ADC_IS_CONVERSION_ONGOING_INJECTED(hadc))
EricLew	0:80ee8f3b695e	388	{
EricLew	0:80ee8f3b695e	389	return HAL_BUSY;
EricLew	0:80ee8f3b695e	390	}
EricLew	0:80ee8f3b695e	391	else
EricLew	0:80ee8f3b695e	392	{
EricLew	0:80ee8f3b695e	393
EricLew	0:80ee8f3b695e	394	/* In case of software trigger detection enabled, JQDIS must be set
EricLew	0:80ee8f3b695e	395	(which can be done only if ADSTART and JADSTART are both cleared).
EricLew	0:80ee8f3b695e	396	If JQDIS is not set at that point, returns an error
EricLew	0:80ee8f3b695e	397	- since software trigger detection is disabled. User needs to
EricLew	0:80ee8f3b695e	398	resort to HAL_ADCEx_DisableInjectedQueue() API to set JQDIS.
EricLew	0:80ee8f3b695e	399	- or (if JQDIS is intentionally reset) since JEXTEN = 0 which means
EricLew	0:80ee8f3b695e	400	the queue is empty */
EricLew	0:80ee8f3b695e	401	if ((READ_BIT(hadc->Instance->JSQR, ADC_JSQR_JEXTEN) == RESET)
EricLew	0:80ee8f3b695e	402	&& (READ_BIT(hadc->Instance->CFGR, ADC_CFGR_JQDIS) == RESET))
EricLew	0:80ee8f3b695e	403	{
EricLew	0:80ee8f3b695e	404	SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
EricLew	0:80ee8f3b695e	405	return HAL_ERROR;
EricLew	0:80ee8f3b695e	406	}
EricLew	0:80ee8f3b695e	407
EricLew	0:80ee8f3b695e	408
EricLew	0:80ee8f3b695e	409	/* Process locked */
EricLew	0:80ee8f3b695e	410	__HAL_LOCK(hadc);
EricLew	0:80ee8f3b695e	411
EricLew	0:80ee8f3b695e	412	/* Enable the ADC peripheral */
EricLew	0:80ee8f3b695e	413	tmp_status = ADC_Enable(hadc);
EricLew	0:80ee8f3b695e	414
EricLew	0:80ee8f3b695e	415	/* Start conversion if ADC is effectively enabled */
EricLew	0:80ee8f3b695e	416	if (tmp_status == HAL_OK)
EricLew	0:80ee8f3b695e	417	{
EricLew	0:80ee8f3b695e	418	/* Check if a regular conversion is ongoing */
EricLew	0:80ee8f3b695e	419	if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_REG_BUSY))
EricLew	0:80ee8f3b695e	420	{
EricLew	0:80ee8f3b695e	421	/* Reset ADC error code field related to injected conversions only */
EricLew	0:80ee8f3b695e	422	CLEAR_BIT(hadc->ErrorCode, HAL_ADC_ERROR_JQOVF);
EricLew	0:80ee8f3b695e	423	}
EricLew	0:80ee8f3b695e	424	else
EricLew	0:80ee8f3b695e	425	{
EricLew	0:80ee8f3b695e	426	/* Set ADC error code to none */
EricLew	0:80ee8f3b695e	427	ADC_CLEAR_ERRORCODE(hadc);
EricLew	0:80ee8f3b695e	428	}
EricLew	0:80ee8f3b695e	429	/* Update ADC state */
EricLew	0:80ee8f3b695e	430	/* Clear HAL_ADC_STATE_READY and HAL_ADC_STATE_INJ_EOC bits, set HAL_ADC_STATE_INJ_BUSY bit */
EricLew	0:80ee8f3b695e	431	ADC_STATE_CLR_SET(hadc->State, (HAL_ADC_STATE_READY\|HAL_ADC_STATE_INJ_EOC), HAL_ADC_STATE_INJ_BUSY);
EricLew	0:80ee8f3b695e	432
EricLew	0:80ee8f3b695e	433	/* Reset HAL_ADC_STATE_MULTIMODE_SLAVE bit
EricLew	0:80ee8f3b695e	434	- by default if ADC is Master or Independent or if multimode feature is not available
EricLew	0:80ee8f3b695e	435	- if multimode setting is set to independent mode (no dual regular or injected conversions are configured) */
EricLew	0:80ee8f3b695e	436	if (ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc))
EricLew	0:80ee8f3b695e	437	{
EricLew	0:80ee8f3b695e	438	CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
EricLew	0:80ee8f3b695e	439	}
EricLew	0:80ee8f3b695e	440
EricLew	0:80ee8f3b695e	441
EricLew	0:80ee8f3b695e	442	/* Clear injected group conversion flag */
EricLew	0:80ee8f3b695e	443	/* (To ensure of no unknown state from potential previous ADC operations) */
EricLew	0:80ee8f3b695e	444	__HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_JEOC \| ADC_FLAG_JEOS));
EricLew	0:80ee8f3b695e	445
EricLew	0:80ee8f3b695e	446	/* Enable conversion of injected group, if automatic injected conversion */
EricLew	0:80ee8f3b695e	447	/* is disabled. */
EricLew	0:80ee8f3b695e	448	/* If software start has been selected, conversion starts immediately. */
EricLew	0:80ee8f3b695e	449	/* If external trigger has been selected, conversion will start at next */
EricLew	0:80ee8f3b695e	450	/* trigger event. */
EricLew	0:80ee8f3b695e	451	/* Case of multimode enabled (when multimode feature is available): */
EricLew	0:80ee8f3b695e	452	/* if ADC is slave, */
EricLew	0:80ee8f3b695e	453	/* - ADC is enabled only (conversion is not started). */
EricLew	0:80ee8f3b695e	454	/* - if multimode only concerns regular conversion, ADC is enabled */
EricLew	0:80ee8f3b695e	455	/* and conversion is started. */
EricLew	0:80ee8f3b695e	456	/* If ADC is master or independent, */
EricLew	0:80ee8f3b695e	457	/* - ADC is enabled and conversion is started. */
EricLew	0:80ee8f3b695e	458
EricLew	0:80ee8f3b695e	459	/* Are injected conversions that of a dual Slave ? */
EricLew	0:80ee8f3b695e	460	if (ADC_INDEPENDENT_OR_NONMULTIMODEINJECTED_SLAVE(hadc))
EricLew	0:80ee8f3b695e	461	{
EricLew	0:80ee8f3b695e	462	/* hadc is not the handle of a Slave ADC with dual injected conversions enabled:
EricLew	0:80ee8f3b695e	463	set ADSTART only if JAUTO is cleared */
EricLew	0:80ee8f3b695e	464	/* Process unlocked */
EricLew	0:80ee8f3b695e	465	__HAL_UNLOCK(hadc);
EricLew	0:80ee8f3b695e	466	if (HAL_IS_BIT_CLR(hadc->Instance->CFGR, ADC_CFGR_JAUTO))
EricLew	0:80ee8f3b695e	467	{
EricLew	0:80ee8f3b695e	468	SET_BIT(hadc->Instance->CR, ADC_CR_JADSTART) ;
EricLew	0:80ee8f3b695e	469	}
EricLew	0:80ee8f3b695e	470	}
EricLew	0:80ee8f3b695e	471	else
EricLew	0:80ee8f3b695e	472	{
EricLew	0:80ee8f3b695e	473	/* hadc is the handle of a Slave ADC with dual injected conversions enabled:
EricLew	0:80ee8f3b695e	474	ADSTART is not set */
EricLew	0:80ee8f3b695e	475	SET_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
EricLew	0:80ee8f3b695e	476	/* Process unlocked */
EricLew	0:80ee8f3b695e	477	__HAL_UNLOCK(hadc);
EricLew	0:80ee8f3b695e	478	}
EricLew	0:80ee8f3b695e	479	}
EricLew	0:80ee8f3b695e	480	else
EricLew	0:80ee8f3b695e	481	{
EricLew	0:80ee8f3b695e	482	/* Process unlocked */
EricLew	0:80ee8f3b695e	483	__HAL_UNLOCK(hadc);
EricLew	0:80ee8f3b695e	484	} /* if (tmp_status == HAL_OK) */
EricLew	0:80ee8f3b695e	485
EricLew	0:80ee8f3b695e	486
EricLew	0:80ee8f3b695e	487	/* Return function status */
EricLew	0:80ee8f3b695e	488	return tmp_status;
EricLew	0:80ee8f3b695e	489	} /* if (ADC_IS_CONVERSION_ONGOING_INJECTED(hadc)) */
EricLew	0:80ee8f3b695e	490	}
EricLew	0:80ee8f3b695e	491
EricLew	0:80ee8f3b695e	492
EricLew	0:80ee8f3b695e	493
EricLew	0:80ee8f3b695e	494	/**
EricLew	0:80ee8f3b695e	495	* @brief Stop conversion of injected channels, disable ADC peripheral if no regular conversion is on going.
EricLew	0:80ee8f3b695e	496	* @note If ADC must be disabled and if regular conversion
EricLew	0:80ee8f3b695e	497	* is on going, function HAL_ADC_Stop() must be used.
EricLew	0:80ee8f3b695e	498	* @note In case of auto-injection mode, HAL_ADC_Stop() must be used.
EricLew	0:80ee8f3b695e	499	* @note In case of multimode enabled (when multimode feature is available),
EricLew	0:80ee8f3b695e	500	* HAL_ADCEx_InjectedStop() must be called for ADC master first, then for ADC slave.
EricLew	0:80ee8f3b695e	501	* For ADC master, conversion is stopped and ADC is disabled.
EricLew	0:80ee8f3b695e	502	* For ADC slave, ADC is disabled only (conversion stop of ADC master
EricLew	0:80ee8f3b695e	503	* has already stopped conversion of ADC slave).
EricLew	0:80ee8f3b695e	504	* @param hadc: ADC handle.
EricLew	0:80ee8f3b695e	505	* @retval None
EricLew	0:80ee8f3b695e	506	*/
EricLew	0:80ee8f3b695e	507	HAL_StatusTypeDef HAL_ADCEx_InjectedStop(ADC_HandleTypeDef* hadc)
EricLew	0:80ee8f3b695e	508	{
EricLew	0:80ee8f3b695e	509	HAL_StatusTypeDef tmp_status = HAL_OK;
EricLew	0:80ee8f3b695e	510
EricLew	0:80ee8f3b695e	511	/* Check the parameters */
EricLew	0:80ee8f3b695e	512	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
EricLew	0:80ee8f3b695e	513
EricLew	0:80ee8f3b695e	514	/* Process locked */
EricLew	0:80ee8f3b695e	515	__HAL_LOCK(hadc);
EricLew	0:80ee8f3b695e	516
EricLew	0:80ee8f3b695e	517	/* 1. Stop potential conversion on going on injected group only. */
EricLew	0:80ee8f3b695e	518	tmp_status = ADC_ConversionStop(hadc, ADC_INJECTED_GROUP);
EricLew	0:80ee8f3b695e	519
EricLew	0:80ee8f3b695e	520	/* Disable ADC peripheral if injected conversions are effectively stopped */
EricLew	0:80ee8f3b695e	521	/* and if no conversion on regular group is on-going */
EricLew	0:80ee8f3b695e	522	if (tmp_status == HAL_OK)
EricLew	0:80ee8f3b695e	523	{
EricLew	0:80ee8f3b695e	524	if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
EricLew	0:80ee8f3b695e	525	{
EricLew	0:80ee8f3b695e	526	/* 2. Disable the ADC peripheral */
EricLew	0:80ee8f3b695e	527	tmp_status = ADC_Disable(hadc);
EricLew	0:80ee8f3b695e	528
EricLew	0:80ee8f3b695e	529	/* Check if ADC is effectively disabled */
EricLew	0:80ee8f3b695e	530	if (tmp_status == HAL_OK)
EricLew	0:80ee8f3b695e	531	{
EricLew	0:80ee8f3b695e	532	/* Change ADC state */
EricLew	0:80ee8f3b695e	533	/* Clear HAL_ADC_STATE_REG_BUSY and HAL_ADC_STATE_INJ_BUSY bits, set HAL_ADC_STATE_READY bit */
EricLew	0:80ee8f3b695e	534	ADC_STATE_CLR_SET(hadc->State, (HAL_ADC_STATE_REG_BUSY\|HAL_ADC_STATE_INJ_BUSY), HAL_ADC_STATE_READY);
EricLew	0:80ee8f3b695e	535	}
EricLew	0:80ee8f3b695e	536	}
EricLew	0:80ee8f3b695e	537	/* Conversion on injected group is stopped, but ADC not disabled since */
EricLew	0:80ee8f3b695e	538	/* conversion on regular group is still running. */
EricLew	0:80ee8f3b695e	539	else
EricLew	0:80ee8f3b695e	540	{
EricLew	0:80ee8f3b695e	541	/* Clear HAL_ADC_STATE_INJ_BUSY bit */
EricLew	0:80ee8f3b695e	542	CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY);
EricLew	0:80ee8f3b695e	543	}
EricLew	0:80ee8f3b695e	544	}
EricLew	0:80ee8f3b695e	545
EricLew	0:80ee8f3b695e	546	/* Process unlocked */
EricLew	0:80ee8f3b695e	547	__HAL_UNLOCK(hadc);
EricLew	0:80ee8f3b695e	548
EricLew	0:80ee8f3b695e	549	/* Return function status */
EricLew	0:80ee8f3b695e	550	return tmp_status;
EricLew	0:80ee8f3b695e	551	}
EricLew	0:80ee8f3b695e	552
EricLew	0:80ee8f3b695e	553
EricLew	0:80ee8f3b695e	554
EricLew	0:80ee8f3b695e	555	/**
EricLew	0:80ee8f3b695e	556	* @brief Wait for injected group conversion to be completed.
EricLew	0:80ee8f3b695e	557	* @param hadc: ADC handle
EricLew	0:80ee8f3b695e	558	* @param Timeout: Timeout value in millisecond.
EricLew	0:80ee8f3b695e	559	* @note Depending on hadc->Init.EOCSelection, JEOS or JEOC is
EricLew	0:80ee8f3b695e	560	* checked and cleared depending on AUTDLY bit status.
EricLew	0:80ee8f3b695e	561	* @retval HAL status
EricLew	0:80ee8f3b695e	562	*/
EricLew	0:80ee8f3b695e	563	HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout)
EricLew	0:80ee8f3b695e	564	{
EricLew	0:80ee8f3b695e	565	uint32_t tickstart;
EricLew	0:80ee8f3b695e	566	uint32_t tmp_Flag_End = 0x00;
EricLew	0:80ee8f3b695e	567	ADC_TypeDef *tmpADC_Master;
EricLew	0:80ee8f3b695e	568	uint32_t tmp_cfgr = 0x00;
EricLew	0:80ee8f3b695e	569	uint32_t tmp_cfgr_jqm_autdly = 0x00;
EricLew	0:80ee8f3b695e	570	uint32_t tmp_jeos_raised = 0x01; /* by default, assume that JEOS is set,
EricLew	0:80ee8f3b695e	571	tmp_jeos_raised will be corrected
EricLew	0:80ee8f3b695e	572	accordingly during API execution */
EricLew	0:80ee8f3b695e	573
EricLew	0:80ee8f3b695e	574	/* Check the parameters */
EricLew	0:80ee8f3b695e	575	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
EricLew	0:80ee8f3b695e	576
EricLew	0:80ee8f3b695e	577	/* If end of sequence selected */
EricLew	0:80ee8f3b695e	578	if (hadc->Init.EOCSelection == ADC_EOC_SEQ_CONV)
EricLew	0:80ee8f3b695e	579	{
EricLew	0:80ee8f3b695e	580	tmp_Flag_End = ADC_FLAG_JEOS;
EricLew	0:80ee8f3b695e	581	}
EricLew	0:80ee8f3b695e	582	else /* end of conversion selected */
EricLew	0:80ee8f3b695e	583	{
EricLew	0:80ee8f3b695e	584	tmp_Flag_End = ADC_FLAG_JEOC;
EricLew	0:80ee8f3b695e	585	}
EricLew	0:80ee8f3b695e	586
EricLew	0:80ee8f3b695e	587	/* Get timeout */
EricLew	0:80ee8f3b695e	588	tickstart = HAL_GetTick();
EricLew	0:80ee8f3b695e	589
EricLew	0:80ee8f3b695e	590	/* Wait until End of Conversion or Sequence flag is raised */
EricLew	0:80ee8f3b695e	591	while(HAL_IS_BIT_CLR(hadc->Instance->ISR, tmp_Flag_End))
EricLew	0:80ee8f3b695e	592	{
EricLew	0:80ee8f3b695e	593	/* Check if timeout is disabled (set to infinite wait) */
EricLew	0:80ee8f3b695e	594	if(Timeout != HAL_MAX_DELAY)
EricLew	0:80ee8f3b695e	595	{
EricLew	0:80ee8f3b695e	596	if((Timeout == 0) \|\| ((HAL_GetTick()-tickstart) > Timeout))
EricLew	0:80ee8f3b695e	597	{
EricLew	0:80ee8f3b695e	598	/* Update ADC state machine to timeout */
EricLew	0:80ee8f3b695e	599	SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT);
EricLew	0:80ee8f3b695e	600
EricLew	0:80ee8f3b695e	601	/* Process unlocked */
EricLew	0:80ee8f3b695e	602	__HAL_UNLOCK(hadc);
EricLew	0:80ee8f3b695e	603
EricLew	0:80ee8f3b695e	604	return HAL_TIMEOUT;
EricLew	0:80ee8f3b695e	605	}
EricLew	0:80ee8f3b695e	606	}
EricLew	0:80ee8f3b695e	607	}
EricLew	0:80ee8f3b695e	608
EricLew	0:80ee8f3b695e	609	/* Next, to clear the polled flag as well as to update the handle State,
EricLew	0:80ee8f3b695e	610	JEOS is checked and the relevant configuration registers are retrieved.
EricLew	0:80ee8f3b695e	611	JQM, JAUTO and CONT bits will have to be read for the State update,
EricLew	0:80ee8f3b695e	612	AUTDLY for JEOS clearing. */
EricLew	0:80ee8f3b695e	613	/* 1. Check whether or not JEOS is set */
EricLew	0:80ee8f3b695e	614	if (HAL_IS_BIT_CLR(hadc->Instance->ISR, ADC_FLAG_JEOS))
EricLew	0:80ee8f3b695e	615	{
EricLew	0:80ee8f3b695e	616	tmp_jeos_raised = 0;
EricLew	0:80ee8f3b695e	617	}
EricLew	0:80ee8f3b695e	618	/* 2. Check whether or not hadc is the handle of a Slave ADC with dual
EricLew	0:80ee8f3b695e	619	injected conversions enabled. */
EricLew	0:80ee8f3b695e	620	if (ADC_INDEPENDENT_OR_NONMULTIMODEINJECTED_SLAVE(hadc) == RESET)
EricLew	0:80ee8f3b695e	621	{
EricLew	0:80ee8f3b695e	622	/* hadc is not the handle of a Slave ADC with dual injected conversions enabled:
EricLew	0:80ee8f3b695e	623	check JQM and AUTDLY bits directly in ADC CFGR register */
EricLew	0:80ee8f3b695e	624	tmp_cfgr_jqm_autdly = READ_REG(hadc->Instance->CFGR);
EricLew	0:80ee8f3b695e	625	}
EricLew	0:80ee8f3b695e	626	else
EricLew	0:80ee8f3b695e	627	{
EricLew	0:80ee8f3b695e	628	/* hadc is the handle of a Slave ADC with dual injected conversions enabled:
EricLew	0:80ee8f3b695e	629	need to check JQM and AUTDLY bits of Master ADC CFGR register */
EricLew	0:80ee8f3b695e	630	tmpADC_Master = ADC_MASTER_REGISTER(hadc);
EricLew	0:80ee8f3b695e	631	tmp_cfgr_jqm_autdly = READ_REG(tmpADC_Master->CFGR);
EricLew	0:80ee8f3b695e	632	}
EricLew	0:80ee8f3b695e	633	/* 3. Check whether or not hadc is the handle of a Slave ADC with dual
EricLew	0:80ee8f3b695e	634	regular conversions enabled. */
EricLew	0:80ee8f3b695e	635	if (ADC_INDEPENDENT_OR_NONMULTIMODEREGULAR_SLAVE(hadc))
EricLew	0:80ee8f3b695e	636	{
EricLew	0:80ee8f3b695e	637	/* hadc is not the handle of a Slave ADC with dual regular conversions enabled:
EricLew	0:80ee8f3b695e	638	check JAUTO and CONT bits directly in ADC CFGR register */
EricLew	0:80ee8f3b695e	639	tmp_cfgr = READ_REG(hadc->Instance->CFGR);
EricLew	0:80ee8f3b695e	640	}
EricLew	0:80ee8f3b695e	641	else
EricLew	0:80ee8f3b695e	642	{
EricLew	0:80ee8f3b695e	643	/* hadc is not the handle of a Slave ADC with dual regular conversions enabled:
EricLew	0:80ee8f3b695e	644	check JAUTO and CONT bits of Master ADC CFGR register */
EricLew	0:80ee8f3b695e	645	tmpADC_Master = ADC_MASTER_REGISTER(hadc);
EricLew	0:80ee8f3b695e	646	tmp_cfgr = READ_REG(tmpADC_Master->CFGR);
EricLew	0:80ee8f3b695e	647	}
EricLew	0:80ee8f3b695e	648
EricLew	0:80ee8f3b695e	649
EricLew	0:80ee8f3b695e	650
EricLew	0:80ee8f3b695e	651	/* Clear polled flag */
EricLew	0:80ee8f3b695e	652	if (tmp_Flag_End == ADC_FLAG_JEOS)
EricLew	0:80ee8f3b695e	653	{
EricLew	0:80ee8f3b695e	654	/* Clear end of sequence JEOS flag of injected group if low power feature */
EricLew	0:80ee8f3b695e	655	/* "LowPowerAutoWait " is disabled, to not interfere with this feature. */
EricLew	0:80ee8f3b695e	656	/* For injected groups, no new conversion will start before JEOS is */
EricLew	0:80ee8f3b695e	657	/* cleared. */
EricLew	0:80ee8f3b695e	658	/* Note that 1. reading ADCx_JDRy clears JEOC. */
EricLew	0:80ee8f3b695e	659	/* 2. in multimode with dual injected conversions enabled (when */
EricLew	0:80ee8f3b695e	660	/* multimode feature is available), Master AUTDLY bit is */
EricLew	0:80ee8f3b695e	661	/* checked. */
EricLew	0:80ee8f3b695e	662	if (READ_BIT (tmp_cfgr_jqm_autdly, ADC_CFGR_AUTDLY) == RESET)
EricLew	0:80ee8f3b695e	663	{
EricLew	0:80ee8f3b695e	664	__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOC);
EricLew	0:80ee8f3b695e	665	}
EricLew	0:80ee8f3b695e	666	}
EricLew	0:80ee8f3b695e	667	else
EricLew	0:80ee8f3b695e	668	{
EricLew	0:80ee8f3b695e	669	__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JEOC);
EricLew	0:80ee8f3b695e	670	}
EricLew	0:80ee8f3b695e	671
EricLew	0:80ee8f3b695e	672
EricLew	0:80ee8f3b695e	673	/* Update ADC state machine */
EricLew	0:80ee8f3b695e	674	SET_BIT(hadc->State, HAL_ADC_STATE_INJ_EOC);
EricLew	0:80ee8f3b695e	675	/* Are injected conversions over ? This is the case if JEOS is set AND
EricLew	0:80ee8f3b695e	676	- injected conversions are software-triggered when injected queue management is disabled
EricLew	0:80ee8f3b695e	677	OR
EricLew	0:80ee8f3b695e	678	- auto-injection is enabled, continuous mode is disabled,
EricLew	0:80ee8f3b695e	679	and regular conversions are software-triggered */
EricLew	0:80ee8f3b695e	680
EricLew	0:80ee8f3b695e	681	if (tmp_jeos_raised)
EricLew	0:80ee8f3b695e	682	{
EricLew	0:80ee8f3b695e	683	if ((ADC_IS_SOFTWARE_START_INJECTED(hadc) && (READ_BIT(tmp_cfgr_jqm_autdly, ADC_CFGR_JQM) != ADC_CFGR_JQM))
EricLew	0:80ee8f3b695e	684	&& (!((READ_BIT(tmp_cfgr, (ADC_CFGR_JAUTO\|ADC_CFGR_CONT)) == (ADC_CFGR_JAUTO\|ADC_CFGR_CONT)) &&
EricLew	0:80ee8f3b695e	685	(ADC_IS_SOFTWARE_START_REGULAR(hadc))) ))
EricLew	0:80ee8f3b695e	686	{
EricLew	0:80ee8f3b695e	687	/* Clear HAL_ADC_STATE_INJ_BUSY bit */
EricLew	0:80ee8f3b695e	688	CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY);
EricLew	0:80ee8f3b695e	689	/* If no regular conversion on-going, set HAL_ADC_STATE_READY bit */
EricLew	0:80ee8f3b695e	690	if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_REG_BUSY))
EricLew	0:80ee8f3b695e	691	{
EricLew	0:80ee8f3b695e	692	SET_BIT(hadc->State, HAL_ADC_STATE_READY);
EricLew	0:80ee8f3b695e	693	}
EricLew	0:80ee8f3b695e	694	}
EricLew	0:80ee8f3b695e	695	}
EricLew	0:80ee8f3b695e	696
EricLew	0:80ee8f3b695e	697
EricLew	0:80ee8f3b695e	698
EricLew	0:80ee8f3b695e	699	/* Return API HAL status */
EricLew	0:80ee8f3b695e	700	return HAL_OK;
EricLew	0:80ee8f3b695e	701	}
EricLew	0:80ee8f3b695e	702
EricLew	0:80ee8f3b695e	703
EricLew	0:80ee8f3b695e	704
EricLew	0:80ee8f3b695e	705	/**
EricLew	0:80ee8f3b695e	706	* @brief Enable ADC, start conversion of injected group with interruption.
EricLew	0:80ee8f3b695e	707	* @note Interruptions enabled in this function according to initialization
EricLew	0:80ee8f3b695e	708	* setting : JEOC (end of conversion) or JEOS (end of sequence)
EricLew	0:80ee8f3b695e	709	* @note Case of multimode enabled (when multimode feature is enabled):
EricLew	0:80ee8f3b695e	710	* HAL_ADCEx_InjectedStart_IT() API must be called for ADC slave first,
EricLew	0:80ee8f3b695e	711	* then for ADC master.
EricLew	0:80ee8f3b695e	712	* For ADC slave, ADC is enabled only (conversion is not started).
EricLew	0:80ee8f3b695e	713	* For ADC master, ADC is enabled and multimode conversion is started.
EricLew	0:80ee8f3b695e	714	* @param hadc: ADC handle.
EricLew	0:80ee8f3b695e	715	* @retval HAL status.
EricLew	0:80ee8f3b695e	716	*/
EricLew	0:80ee8f3b695e	717	HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef* hadc)
EricLew	0:80ee8f3b695e	718	{
EricLew	0:80ee8f3b695e	719	HAL_StatusTypeDef tmp_status = HAL_OK;
EricLew	0:80ee8f3b695e	720
EricLew	0:80ee8f3b695e	721	/* Check the parameters */
EricLew	0:80ee8f3b695e	722	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
EricLew	0:80ee8f3b695e	723
EricLew	0:80ee8f3b695e	724	if (ADC_IS_CONVERSION_ONGOING_INJECTED(hadc))
EricLew	0:80ee8f3b695e	725	{
EricLew	0:80ee8f3b695e	726	return HAL_BUSY;
EricLew	0:80ee8f3b695e	727	}
EricLew	0:80ee8f3b695e	728	else
EricLew	0:80ee8f3b695e	729	{
EricLew	0:80ee8f3b695e	730
EricLew	0:80ee8f3b695e	731	/* In case of software trigger detection enabled, JQDIS must be set
EricLew	0:80ee8f3b695e	732	(which can be done only if ADSTART and JADSTART are both cleared).
EricLew	0:80ee8f3b695e	733	If JQDIS is not set at that point, returns an error
EricLew	0:80ee8f3b695e	734	- since software trigger detection is disabled. User needs to
EricLew	0:80ee8f3b695e	735	resort to HAL_ADCEx_DisableInjectedQueue() API to set JQDIS.
EricLew	0:80ee8f3b695e	736	- or (if JQDIS is intentionally reset) since JEXTEN = 0 which means
EricLew	0:80ee8f3b695e	737	the queue is empty */
EricLew	0:80ee8f3b695e	738	if ((READ_BIT(hadc->Instance->JSQR, ADC_JSQR_JEXTEN) == RESET)
EricLew	0:80ee8f3b695e	739	&& (READ_BIT(hadc->Instance->CFGR, ADC_CFGR_JQDIS) == RESET))
EricLew	0:80ee8f3b695e	740	{
EricLew	0:80ee8f3b695e	741	SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
EricLew	0:80ee8f3b695e	742	return HAL_ERROR;
EricLew	0:80ee8f3b695e	743	}
EricLew	0:80ee8f3b695e	744
EricLew	0:80ee8f3b695e	745	/* Process locked */
EricLew	0:80ee8f3b695e	746	__HAL_LOCK(hadc);
EricLew	0:80ee8f3b695e	747
EricLew	0:80ee8f3b695e	748	/* Enable the ADC peripheral */
EricLew	0:80ee8f3b695e	749	tmp_status = ADC_Enable(hadc);
EricLew	0:80ee8f3b695e	750
EricLew	0:80ee8f3b695e	751	/* Start conversion if ADC is effectively enabled */
EricLew	0:80ee8f3b695e	752	if (tmp_status == HAL_OK)
EricLew	0:80ee8f3b695e	753	{
EricLew	0:80ee8f3b695e	754	/* Check if a regular conversion is ongoing */
EricLew	0:80ee8f3b695e	755	if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_REG_BUSY))
EricLew	0:80ee8f3b695e	756	{
EricLew	0:80ee8f3b695e	757	/* Reset ADC error code field related to injected conversions only */
EricLew	0:80ee8f3b695e	758	CLEAR_BIT(hadc->ErrorCode, HAL_ADC_ERROR_JQOVF);
EricLew	0:80ee8f3b695e	759	}
EricLew	0:80ee8f3b695e	760	else
EricLew	0:80ee8f3b695e	761	{
EricLew	0:80ee8f3b695e	762	/* Set ADC error code to none */
EricLew	0:80ee8f3b695e	763	ADC_CLEAR_ERRORCODE(hadc);
EricLew	0:80ee8f3b695e	764	}
EricLew	0:80ee8f3b695e	765	/* Clear HAL_ADC_STATE_READY and HAL_ADC_STATE_INJ_EOC bits, set HAL_ADC_STATE_INJ_BUSY bit */
EricLew	0:80ee8f3b695e	766	ADC_STATE_CLR_SET(hadc->State, (HAL_ADC_STATE_READY\|HAL_ADC_STATE_INJ_EOC), HAL_ADC_STATE_INJ_BUSY);
EricLew	0:80ee8f3b695e	767
EricLew	0:80ee8f3b695e	768	/* Reset HAL_ADC_STATE_MULTIMODE_SLAVE bit
EricLew	0:80ee8f3b695e	769	- by default if ADC is Master or Independent or if multimode feature is not available
EricLew	0:80ee8f3b695e	770	- if multimode setting is set to independent mode (no dual regular or injected conversions are configured) */
EricLew	0:80ee8f3b695e	771	if (ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc))
EricLew	0:80ee8f3b695e	772	{
EricLew	0:80ee8f3b695e	773	CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
EricLew	0:80ee8f3b695e	774	}
EricLew	0:80ee8f3b695e	775
EricLew	0:80ee8f3b695e	776	/* Clear injected group conversion flag */
EricLew	0:80ee8f3b695e	777	/* (To ensure of no unknown state from potential previous ADC operations) */
EricLew	0:80ee8f3b695e	778	__HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_JEOC \| ADC_FLAG_JEOS));
EricLew	0:80ee8f3b695e	779
EricLew	0:80ee8f3b695e	780	/* Enable ADC Injected context queue overflow interrupt if this feature */
EricLew	0:80ee8f3b695e	781	/* is enabled. */
EricLew	0:80ee8f3b695e	782	if ((hadc->Instance->CFGR & ADC_CFGR_JQM) != RESET)
EricLew	0:80ee8f3b695e	783	{
EricLew	0:80ee8f3b695e	784	__HAL_ADC_ENABLE_IT(hadc, ADC_FLAG_JQOVF);
EricLew	0:80ee8f3b695e	785	}
EricLew	0:80ee8f3b695e	786
EricLew	0:80ee8f3b695e	787	/* Enable ADC end of conversion interrupt */
EricLew	0:80ee8f3b695e	788	switch(hadc->Init.EOCSelection)
EricLew	0:80ee8f3b695e	789	{
EricLew	0:80ee8f3b695e	790	case ADC_EOC_SEQ_CONV:
EricLew	0:80ee8f3b695e	791	__HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOC);
EricLew	0:80ee8f3b695e	792	__HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOS);
EricLew	0:80ee8f3b695e	793	break;
EricLew	0:80ee8f3b695e	794	/* case ADC_EOC_SINGLE_CONV */
EricLew	0:80ee8f3b695e	795	default:
EricLew	0:80ee8f3b695e	796	__HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOS);
EricLew	0:80ee8f3b695e	797	__HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOC);
EricLew	0:80ee8f3b695e	798	break;
EricLew	0:80ee8f3b695e	799	}
EricLew	0:80ee8f3b695e	800
EricLew	0:80ee8f3b695e	801	/* Enable conversion of injected group, if automatic injected conversion */
EricLew	0:80ee8f3b695e	802	/* is disabled. */
EricLew	0:80ee8f3b695e	803	/* If software start has been selected, conversion starts immediately. */
EricLew	0:80ee8f3b695e	804	/* If external trigger has been selected, conversion will start at next */
EricLew	0:80ee8f3b695e	805	/* trigger event. */
EricLew	0:80ee8f3b695e	806	/* Case of multimode enabled (when multimode feature is available): */
EricLew	0:80ee8f3b695e	807	/* if ADC is slave, */
EricLew	0:80ee8f3b695e	808	/* - ADC is enabled only (conversion is not started), */
EricLew	0:80ee8f3b695e	809	/* - if multimode only concerns regular conversion, ADC is enabled */
EricLew	0:80ee8f3b695e	810	/* and conversion is started. */
EricLew	0:80ee8f3b695e	811	/* If ADC is master or independent, */
EricLew	0:80ee8f3b695e	812	/* - ADC is enabled and conversion is started. */
EricLew	0:80ee8f3b695e	813
EricLew	0:80ee8f3b695e	814	/* Are injected conversions that of a dual Slave ? */
EricLew	0:80ee8f3b695e	815	if (ADC_INDEPENDENT_OR_NONMULTIMODEINJECTED_SLAVE(hadc))
EricLew	0:80ee8f3b695e	816	{
EricLew	0:80ee8f3b695e	817	/* hadc is not the handle of a Slave ADC with dual injected conversions enabled:
EricLew	0:80ee8f3b695e	818	set ADSTART only if JAUTO is cleared */
EricLew	0:80ee8f3b695e	819	/* Process unlocked */
EricLew	0:80ee8f3b695e	820	__HAL_UNLOCK(hadc);
EricLew	0:80ee8f3b695e	821	if (HAL_IS_BIT_CLR(hadc->Instance->CFGR, ADC_CFGR_JAUTO))
EricLew	0:80ee8f3b695e	822	{
EricLew	0:80ee8f3b695e	823	SET_BIT(hadc->Instance->CR, ADC_CR_JADSTART) ;
EricLew	0:80ee8f3b695e	824	}
EricLew	0:80ee8f3b695e	825	}
EricLew	0:80ee8f3b695e	826	else
EricLew	0:80ee8f3b695e	827	{
EricLew	0:80ee8f3b695e	828	/* hadc is the handle of a Slave ADC with dual injected conversions enabled:
EricLew	0:80ee8f3b695e	829	ADSTART is not set */
EricLew	0:80ee8f3b695e	830	SET_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
EricLew	0:80ee8f3b695e	831	/* Process unlocked */
EricLew	0:80ee8f3b695e	832	__HAL_UNLOCK(hadc);
EricLew	0:80ee8f3b695e	833	}
EricLew	0:80ee8f3b695e	834	}
EricLew	0:80ee8f3b695e	835	else
EricLew	0:80ee8f3b695e	836	{
EricLew	0:80ee8f3b695e	837	/* Process unlocked */
EricLew	0:80ee8f3b695e	838	__HAL_UNLOCK(hadc);
EricLew	0:80ee8f3b695e	839	}
EricLew	0:80ee8f3b695e	840
EricLew	0:80ee8f3b695e	841	/* Return function status */
EricLew	0:80ee8f3b695e	842	return tmp_status;
EricLew	0:80ee8f3b695e	843	}
EricLew	0:80ee8f3b695e	844	}
EricLew	0:80ee8f3b695e	845
EricLew	0:80ee8f3b695e	846
EricLew	0:80ee8f3b695e	847
EricLew	0:80ee8f3b695e	848	/**
EricLew	0:80ee8f3b695e	849	* @brief Stop conversion of injected channels, disable interruption of end-of-conversion.
EricLew	0:80ee8f3b695e	850	* @note Disable ADC peripheral if no regular conversion
EricLew	0:80ee8f3b695e	851	* is on going.
EricLew	0:80ee8f3b695e	852	* @note If ADC must be disabled and if regular conversion
EricLew	0:80ee8f3b695e	853	* is on going, function HAL_ADC_Stop must be used first.
EricLew	0:80ee8f3b695e	854	* @note Case of multimode enabled (when multimode feature is available):
EricLew	0:80ee8f3b695e	855	* HAL_ADCEx_InjectedStop_IT() API must be called for ADC master first,
EricLew	0:80ee8f3b695e	856	* then for ADC slave.
EricLew	0:80ee8f3b695e	857	* For ADC master, conversion is stopped and ADC is disabled.
EricLew	0:80ee8f3b695e	858	* For ADC slave, ADC is disabled only (conversion stop of ADC master
EricLew	0:80ee8f3b695e	859	* has already stopped conversion of ADC slave).
EricLew	0:80ee8f3b695e	860	* @note In case of auto-injection mode, HAL_ADC_Stop() must be used.
EricLew	0:80ee8f3b695e	861	* @param hadc: ADC handle
EricLew	0:80ee8f3b695e	862	* @retval None
EricLew	0:80ee8f3b695e	863	*/
EricLew	0:80ee8f3b695e	864	HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef* hadc)
EricLew	0:80ee8f3b695e	865	{
EricLew	0:80ee8f3b695e	866	HAL_StatusTypeDef tmp_status = HAL_OK;
EricLew	0:80ee8f3b695e	867
EricLew	0:80ee8f3b695e	868	/* Check the parameters */
EricLew	0:80ee8f3b695e	869	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
EricLew	0:80ee8f3b695e	870
EricLew	0:80ee8f3b695e	871	/* Process locked */
EricLew	0:80ee8f3b695e	872	__HAL_LOCK(hadc);
EricLew	0:80ee8f3b695e	873
EricLew	0:80ee8f3b695e	874	/* 1. Stop potential conversion on going on injected group only. */
EricLew	0:80ee8f3b695e	875	tmp_status = ADC_ConversionStop(hadc, ADC_INJECTED_GROUP);
EricLew	0:80ee8f3b695e	876
EricLew	0:80ee8f3b695e	877	/* Disable ADC peripheral if injected conversions are effectively stopped */
EricLew	0:80ee8f3b695e	878	/* and if no conversion on the other group (regular group) is intended to */
EricLew	0:80ee8f3b695e	879	/* continue. */
EricLew	0:80ee8f3b695e	880	if (tmp_status == HAL_OK)
EricLew	0:80ee8f3b695e	881	{
EricLew	0:80ee8f3b695e	882	/* Disable ADC end of conversion interrupt for injected channels */
EricLew	0:80ee8f3b695e	883	__HAL_ADC_DISABLE_IT(hadc, (ADC_IT_JEOC \| ADC_IT_JEOS \| ADC_FLAG_JQOVF));
EricLew	0:80ee8f3b695e	884
EricLew	0:80ee8f3b695e	885	if ((ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET))
EricLew	0:80ee8f3b695e	886	{
EricLew	0:80ee8f3b695e	887	/* 2. Disable the ADC peripheral */
EricLew	0:80ee8f3b695e	888	tmp_status = ADC_Disable(hadc);
EricLew	0:80ee8f3b695e	889
EricLew	0:80ee8f3b695e	890	/* Check if ADC is effectively disabled */
EricLew	0:80ee8f3b695e	891	if (tmp_status == HAL_OK)
EricLew	0:80ee8f3b695e	892	{
EricLew	0:80ee8f3b695e	893	/* Change ADC state */
EricLew	0:80ee8f3b695e	894	/* Clear HAL_ADC_STATE_REG_BUSY and HAL_ADC_STATE_INJ_BUSY bits, set HAL_ADC_STATE_READY bit */
EricLew	0:80ee8f3b695e	895	ADC_STATE_CLR_SET(hadc->State, (HAL_ADC_STATE_REG_BUSY\|HAL_ADC_STATE_INJ_BUSY), HAL_ADC_STATE_READY);
EricLew	0:80ee8f3b695e	896	}
EricLew	0:80ee8f3b695e	897	}
EricLew	0:80ee8f3b695e	898	/* Conversion on injected group is stopped, but ADC not disabled since */
EricLew	0:80ee8f3b695e	899	/* conversion on regular group is still running. */
EricLew	0:80ee8f3b695e	900	else
EricLew	0:80ee8f3b695e	901	{
EricLew	0:80ee8f3b695e	902	/* Clear HAL_ADC_STATE_INJ_BUSY bit */
EricLew	0:80ee8f3b695e	903	CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY);
EricLew	0:80ee8f3b695e	904	}
EricLew	0:80ee8f3b695e	905	}
EricLew	0:80ee8f3b695e	906
EricLew	0:80ee8f3b695e	907	/* Process unlocked */
EricLew	0:80ee8f3b695e	908	__HAL_UNLOCK(hadc);
EricLew	0:80ee8f3b695e	909
EricLew	0:80ee8f3b695e	910	/* Return function status */
EricLew	0:80ee8f3b695e	911	return tmp_status;
EricLew	0:80ee8f3b695e	912	}
EricLew	0:80ee8f3b695e	913
EricLew	0:80ee8f3b695e	914
EricLew	0:80ee8f3b695e	915
EricLew	0:80ee8f3b695e	916	/**
EricLew	0:80ee8f3b695e	917	* @brief Enable ADC, start MultiMode conversion and transfer regular results through DMA.
EricLew	0:80ee8f3b695e	918	* @note Multimode must have been previously configured using
EricLew	0:80ee8f3b695e	919	* HAL_ADCEx_MultiModeConfigChannel() function.
EricLew	0:80ee8f3b695e	920	* Interruptions enabled in this function:
EricLew	0:80ee8f3b695e	921	* overrun, DMA half transfer, DMA transfer complete.
EricLew	0:80ee8f3b695e	922	* Each of these interruptions has its dedicated callback function.
EricLew	0:80ee8f3b695e	923	* @note State field of Slave ADC handle is not updated in this configuration:
EricLew	0:80ee8f3b695e	924	* user should not rely on it for information related to Slave regular
EricLew	0:80ee8f3b695e	925	* conversions.
EricLew	0:80ee8f3b695e	926	* @param hadc: ADC handle of ADC master (handle of ADC slave must not be used)
EricLew	0:80ee8f3b695e	927	* @param pData: Destination Buffer address.
EricLew	0:80ee8f3b695e	928	* @param Length: Length of data to be transferred from ADC peripheral to memory (in bytes).
EricLew	0:80ee8f3b695e	929	* @retval None
EricLew	0:80ee8f3b695e	930	*/
EricLew	0:80ee8f3b695e	931	HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length)
EricLew	0:80ee8f3b695e	932	{
EricLew	0:80ee8f3b695e	933	HAL_StatusTypeDef tmp_status = HAL_OK;
EricLew	0:80ee8f3b695e	934	ADC_HandleTypeDef tmphadcSlave;
EricLew	0:80ee8f3b695e	935	ADC_Common_TypeDef *tmpADC_Common;
EricLew	0:80ee8f3b695e	936
EricLew	0:80ee8f3b695e	937	/* Check the parameters */
EricLew	0:80ee8f3b695e	938	assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance));
EricLew	0:80ee8f3b695e	939	assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
EricLew	0:80ee8f3b695e	940	assert_param(IS_ADC_EXTTRIG_EDGE(hadc->Init.ExternalTrigConvEdge));
EricLew	0:80ee8f3b695e	941	assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DMAContinuousRequests));
EricLew	0:80ee8f3b695e	942
EricLew	0:80ee8f3b695e	943	if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc))
EricLew	0:80ee8f3b695e	944	{
EricLew	0:80ee8f3b695e	945	return HAL_BUSY;
EricLew	0:80ee8f3b695e	946	}
EricLew	0:80ee8f3b695e	947	else
EricLew	0:80ee8f3b695e	948	{
EricLew	0:80ee8f3b695e	949	/* Process locked */
EricLew	0:80ee8f3b695e	950	__HAL_LOCK(hadc);
EricLew	0:80ee8f3b695e	951
EricLew	0:80ee8f3b695e	952	/* Set a temporary handle of the ADC slave associated to the ADC master */
EricLew	0:80ee8f3b695e	953	ADC_MULTI_SLAVE(hadc, &tmphadcSlave);
EricLew	0:80ee8f3b695e	954
EricLew	0:80ee8f3b695e	955	if (tmphadcSlave.Instance == NULL)
EricLew	0:80ee8f3b695e	956	{
EricLew	0:80ee8f3b695e	957	/* Update ADC state machine to error */
EricLew	0:80ee8f3b695e	958	SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
EricLew	0:80ee8f3b695e	959
EricLew	0:80ee8f3b695e	960	/* Process unlocked */
EricLew	0:80ee8f3b695e	961	__HAL_UNLOCK(hadc);
EricLew	0:80ee8f3b695e	962
EricLew	0:80ee8f3b695e	963	return HAL_ERROR;
EricLew	0:80ee8f3b695e	964	}
EricLew	0:80ee8f3b695e	965
EricLew	0:80ee8f3b695e	966
EricLew	0:80ee8f3b695e	967	/* Enable the ADC peripherals: master and slave (in case if not already */
EricLew	0:80ee8f3b695e	968	/* enabled previously) */
EricLew	0:80ee8f3b695e	969	tmp_status = ADC_Enable(hadc);
EricLew	0:80ee8f3b695e	970	if (tmp_status == HAL_OK)
EricLew	0:80ee8f3b695e	971	{
EricLew	0:80ee8f3b695e	972	tmp_status = ADC_Enable(&tmphadcSlave);
EricLew	0:80ee8f3b695e	973	}
EricLew	0:80ee8f3b695e	974
EricLew	0:80ee8f3b695e	975	/* Start multimode conversion of ADCs pair */
EricLew	0:80ee8f3b695e	976	if (tmp_status == HAL_OK)
EricLew	0:80ee8f3b695e	977	{
EricLew	0:80ee8f3b695e	978	/* Update Master State */
EricLew	0:80ee8f3b695e	979	/* Clear HAL_ADC_STATE_READY and regular conversion results bits, set HAL_ADC_STATE_REG_BUSY bit */
EricLew	0:80ee8f3b695e	980	ADC_STATE_CLR_SET(hadc->State, (HAL_ADC_STATE_READY\|HAL_ADC_STATE_REG_EOC\|HAL_ADC_STATE_REG_OVR\|HAL_ADC_STATE_REG_EOSMP), HAL_ADC_STATE_REG_BUSY);
EricLew	0:80ee8f3b695e	981
EricLew	0:80ee8f3b695e	982
EricLew	0:80ee8f3b695e	983	/* Set ADC error code to none */
EricLew	0:80ee8f3b695e	984	ADC_CLEAR_ERRORCODE(hadc);
EricLew	0:80ee8f3b695e	985
EricLew	0:80ee8f3b695e	986
EricLew	0:80ee8f3b695e	987	/* Set the DMA transfer complete callback */
EricLew	0:80ee8f3b695e	988	hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt;
EricLew	0:80ee8f3b695e	989
EricLew	0:80ee8f3b695e	990	/* Set the DMA half transfer complete callback */
EricLew	0:80ee8f3b695e	991	hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt;
EricLew	0:80ee8f3b695e	992
EricLew	0:80ee8f3b695e	993	/* Set the DMA error callback */
EricLew	0:80ee8f3b695e	994	hadc->DMA_Handle->XferErrorCallback = ADC_DMAError ;
EricLew	0:80ee8f3b695e	995
EricLew	0:80ee8f3b695e	996	/* Pointer to the common control register */
EricLew	0:80ee8f3b695e	997	tmpADC_Common = ADC_COMMON_REGISTER(hadc);
EricLew	0:80ee8f3b695e	998
EricLew	0:80ee8f3b695e	999
EricLew	0:80ee8f3b695e	1000	/* Manage ADC and DMA start: ADC overrun interruption, DMA start, ADC */
EricLew	0:80ee8f3b695e	1001	/* start (in case of SW start): */
EricLew	0:80ee8f3b695e	1002
EricLew	0:80ee8f3b695e	1003	/* Clear regular group conversion flag and overrun flag */
EricLew	0:80ee8f3b695e	1004	/* (To ensure of no unknown state from potential previous ADC operations) */
EricLew	0:80ee8f3b695e	1005	__HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC \| ADC_FLAG_EOS \| ADC_FLAG_OVR));
EricLew	0:80ee8f3b695e	1006
EricLew	0:80ee8f3b695e	1007	/* Enable ADC overrun interrupt */
EricLew	0:80ee8f3b695e	1008	__HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR);
EricLew	0:80ee8f3b695e	1009
EricLew	0:80ee8f3b695e	1010	/* Start the DMA channel */
EricLew	0:80ee8f3b695e	1011	HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&tmpADC_Common->CDR, (uint32_t)pData, Length);
EricLew	0:80ee8f3b695e	1012
EricLew	0:80ee8f3b695e	1013	/* Enable conversion of regular group. */
EricLew	0:80ee8f3b695e	1014	/* Process unlocked */
EricLew	0:80ee8f3b695e	1015	__HAL_UNLOCK(hadc);
EricLew	0:80ee8f3b695e	1016	/* If software start has been selected, conversion starts immediately. */
EricLew	0:80ee8f3b695e	1017	/* If external trigger has been selected, conversion will start at next */
EricLew	0:80ee8f3b695e	1018	/* trigger event. */
EricLew	0:80ee8f3b695e	1019	SET_BIT(hadc->Instance->CR, ADC_CR_ADSTART);
EricLew	0:80ee8f3b695e	1020
EricLew	0:80ee8f3b695e	1021	}
EricLew	0:80ee8f3b695e	1022	else
EricLew	0:80ee8f3b695e	1023	{
EricLew	0:80ee8f3b695e	1024	/* Process unlocked */
EricLew	0:80ee8f3b695e	1025	__HAL_UNLOCK(hadc);
EricLew	0:80ee8f3b695e	1026	}
EricLew	0:80ee8f3b695e	1027
EricLew	0:80ee8f3b695e	1028	/* Return function status */
EricLew	0:80ee8f3b695e	1029	return tmp_status;
EricLew	0:80ee8f3b695e	1030	}
EricLew	0:80ee8f3b695e	1031	}
EricLew	0:80ee8f3b695e	1032
EricLew	0:80ee8f3b695e	1033	/**
EricLew	0:80ee8f3b695e	1034	* @brief Stop multimode ADC conversion, disable ADC DMA transfer, disable ADC peripheral.
EricLew	0:80ee8f3b695e	1035	* @note Multimode is kept enabled after this function. MultiMode DMA bits
EricLew	0:80ee8f3b695e	1036	* (MDMA and DMACFG bits of common CCR register) are maintained. To disable
EricLew	0:80ee8f3b695e	1037	* Multimode (set with HAL_ADCEx_MultiModeConfigChannel()), ADC must be
EricLew	0:80ee8f3b695e	1038	* reinitialized using HAL_ADC_Init() or HAL_ADC_DeInit(), or the user can
EricLew	0:80ee8f3b695e	1039	* resort to HAL_ADCEx_DisableMultiMode() API.
EricLew	0:80ee8f3b695e	1040	* @note In case of DMA configured in circular mode, function
EricLew	0:80ee8f3b695e	1041	* HAL_ADC_Stop_DMA() must be called after this function with handle of
EricLew	0:80ee8f3b695e	1042	* ADC slave, to properly disable the DMA channel.
EricLew	0:80ee8f3b695e	1043	* @param hadc: ADC handle of ADC master (handle of ADC slave must not be used)
EricLew	0:80ee8f3b695e	1044	* @retval None
EricLew	0:80ee8f3b695e	1045	*/
EricLew	0:80ee8f3b695e	1046	HAL_StatusTypeDef HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef* hadc)
EricLew	0:80ee8f3b695e	1047	{
EricLew	0:80ee8f3b695e	1048	HAL_StatusTypeDef tmp_status = HAL_OK;
EricLew	0:80ee8f3b695e	1049	uint32_t tickstart;
EricLew	0:80ee8f3b695e	1050	ADC_HandleTypeDef tmphadcSlave;
EricLew	0:80ee8f3b695e	1051
EricLew	0:80ee8f3b695e	1052	/* Check the parameters */
EricLew	0:80ee8f3b695e	1053	assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance));
EricLew	0:80ee8f3b695e	1054
EricLew	0:80ee8f3b695e	1055	/* Process locked */
EricLew	0:80ee8f3b695e	1056	__HAL_LOCK(hadc);
EricLew	0:80ee8f3b695e	1057
EricLew	0:80ee8f3b695e	1058
EricLew	0:80ee8f3b695e	1059	/* 1. Stop potential multimode conversion on going, on regular and injected groups */
EricLew	0:80ee8f3b695e	1060	tmp_status = ADC_ConversionStop(hadc, ADC_REGULAR_INJECTED_GROUP);
EricLew	0:80ee8f3b695e	1061
EricLew	0:80ee8f3b695e	1062	/* Disable ADC peripheral if conversions are effectively stopped */
EricLew	0:80ee8f3b695e	1063	if (tmp_status == HAL_OK)
EricLew	0:80ee8f3b695e	1064	{
EricLew	0:80ee8f3b695e	1065	/* Set a temporary handle of the ADC slave associated to the ADC master */
EricLew	0:80ee8f3b695e	1066	ADC_MULTI_SLAVE(hadc, &tmphadcSlave);
EricLew	0:80ee8f3b695e	1067
EricLew	0:80ee8f3b695e	1068	if (tmphadcSlave.Instance == NULL)
EricLew	0:80ee8f3b695e	1069	{
EricLew	0:80ee8f3b695e	1070	/* Update ADC state machine to error */
EricLew	0:80ee8f3b695e	1071	SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
EricLew	0:80ee8f3b695e	1072
EricLew	0:80ee8f3b695e	1073	/* Process unlocked */
EricLew	0:80ee8f3b695e	1074	__HAL_UNLOCK(hadc);
EricLew	0:80ee8f3b695e	1075
EricLew	0:80ee8f3b695e	1076	return HAL_ERROR;
EricLew	0:80ee8f3b695e	1077	}
EricLew	0:80ee8f3b695e	1078
EricLew	0:80ee8f3b695e	1079	/* Procedure to disable the ADC peripheral: wait for conversions */
EricLew	0:80ee8f3b695e	1080	/* effectively stopped (ADC master and ADC slave), then disable ADC */
EricLew	0:80ee8f3b695e	1081
EricLew	0:80ee8f3b695e	1082	/* 1. Wait until ADSTP=0 for ADC master and ADC slave*/
EricLew	0:80ee8f3b695e	1083	tickstart = HAL_GetTick();
EricLew	0:80ee8f3b695e	1084
EricLew	0:80ee8f3b695e	1085	while(ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) \|\|
EricLew	0:80ee8f3b695e	1086	ADC_IS_CONVERSION_ONGOING_REGULAR(&tmphadcSlave) )
EricLew	0:80ee8f3b695e	1087	{
EricLew	0:80ee8f3b695e	1088	if((HAL_GetTick()-tickstart) > ADC_STOP_CONVERSION_TIMEOUT)
EricLew	0:80ee8f3b695e	1089	{
EricLew	0:80ee8f3b695e	1090	/* Update ADC state machine to error */
EricLew	0:80ee8f3b695e	1091	SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
EricLew	0:80ee8f3b695e	1092
EricLew	0:80ee8f3b695e	1093	/* Process unlocked */
EricLew	0:80ee8f3b695e	1094	__HAL_UNLOCK(hadc);
EricLew	0:80ee8f3b695e	1095
EricLew	0:80ee8f3b695e	1096	return HAL_ERROR;
EricLew	0:80ee8f3b695e	1097	}
EricLew	0:80ee8f3b695e	1098	}
EricLew	0:80ee8f3b695e	1099
EricLew	0:80ee8f3b695e	1100	/* Disable the DMA channel (in case of DMA in circular mode or stop */
EricLew	0:80ee8f3b695e	1101	/* while DMA transfer is on going) */
EricLew	0:80ee8f3b695e	1102	/* Note: DMA channel of ADC slave should be stopped after this function */
EricLew	0:80ee8f3b695e	1103	/* with HAL_ADC_Stop_DMA() API. */
EricLew	0:80ee8f3b695e	1104	tmp_status = HAL_DMA_Abort(hadc->DMA_Handle);
EricLew	0:80ee8f3b695e	1105
EricLew	0:80ee8f3b695e	1106	/* Check if DMA channel effectively disabled */
EricLew	0:80ee8f3b695e	1107	if (tmp_status == HAL_ERROR)
EricLew	0:80ee8f3b695e	1108	{
EricLew	0:80ee8f3b695e	1109	/* Update ADC state machine to error */
EricLew	0:80ee8f3b695e	1110	SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA);
EricLew	0:80ee8f3b695e	1111	}
EricLew	0:80ee8f3b695e	1112
EricLew	0:80ee8f3b695e	1113	/* Disable ADC overrun interrupt */
EricLew	0:80ee8f3b695e	1114	__HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR);
EricLew	0:80ee8f3b695e	1115
EricLew	0:80ee8f3b695e	1116
EricLew	0:80ee8f3b695e	1117
EricLew	0:80ee8f3b695e	1118	/* 2. Disable the ADC peripherals: master and slave */
EricLew	0:80ee8f3b695e	1119	/* Update "tmp_status" only if DMA channel disabling passed, to keep in */
EricLew	0:80ee8f3b695e	1120	/* memory a potential failing status. */
EricLew	0:80ee8f3b695e	1121	if (tmp_status == HAL_OK)
EricLew	0:80ee8f3b695e	1122	{
EricLew	0:80ee8f3b695e	1123	/* Check if ADC are effectively disabled */
EricLew	0:80ee8f3b695e	1124	if ((ADC_Disable(hadc) == HAL_OK) &&
EricLew	0:80ee8f3b695e	1125	(ADC_Disable(&tmphadcSlave) == HAL_OK) )
EricLew	0:80ee8f3b695e	1126	{
EricLew	0:80ee8f3b695e	1127	tmp_status = HAL_OK;
EricLew	0:80ee8f3b695e	1128	}
EricLew	0:80ee8f3b695e	1129	}
EricLew	0:80ee8f3b695e	1130	else
EricLew	0:80ee8f3b695e	1131	{
EricLew	0:80ee8f3b695e	1132	ADC_Disable(hadc);
EricLew	0:80ee8f3b695e	1133	ADC_Disable(&tmphadcSlave);
EricLew	0:80ee8f3b695e	1134	}
EricLew	0:80ee8f3b695e	1135	/* Change ADC state (ADC master) */
EricLew	0:80ee8f3b695e	1136	/* Clear HAL_ADC_STATE_REG_BUSY and HAL_ADC_STATE_INJ_BUSY bits, set HAL_ADC_STATE_READY bit */
EricLew	0:80ee8f3b695e	1137	ADC_STATE_CLR_SET(hadc->State, (HAL_ADC_STATE_REG_BUSY\|HAL_ADC_STATE_INJ_BUSY), HAL_ADC_STATE_READY);
EricLew	0:80ee8f3b695e	1138
EricLew	0:80ee8f3b695e	1139	}
EricLew	0:80ee8f3b695e	1140
EricLew	0:80ee8f3b695e	1141	/* Process unlocked */
EricLew	0:80ee8f3b695e	1142	__HAL_UNLOCK(hadc);
EricLew	0:80ee8f3b695e	1143
EricLew	0:80ee8f3b695e	1144	/* Return function status */
EricLew	0:80ee8f3b695e	1145	return tmp_status;
EricLew	0:80ee8f3b695e	1146	}
EricLew	0:80ee8f3b695e	1147
EricLew	0:80ee8f3b695e	1148
EricLew	0:80ee8f3b695e	1149	/**
EricLew	0:80ee8f3b695e	1150	* @brief Return the last ADC Master and Slave regular conversions results when in multimode configuration.
EricLew	0:80ee8f3b695e	1151	* @param hadc: ADC handle of ADC Master (handle of ADC Slave must not be used)
EricLew	0:80ee8f3b695e	1152	* @retval The converted data values.
EricLew	0:80ee8f3b695e	1153	*/
EricLew	0:80ee8f3b695e	1154	uint32_t HAL_ADCEx_MultiModeGetValue(ADC_HandleTypeDef* hadc)
EricLew	0:80ee8f3b695e	1155	{
EricLew	0:80ee8f3b695e	1156	ADC_Common_TypeDef *tmpADC_Common;
EricLew	0:80ee8f3b695e	1157
EricLew	0:80ee8f3b695e	1158	/* Check the parameters */
EricLew	0:80ee8f3b695e	1159	assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance));
EricLew	0:80ee8f3b695e	1160
EricLew	0:80ee8f3b695e	1161	/* Pointer to the common control register */
EricLew	0:80ee8f3b695e	1162	tmpADC_Common = ADC_COMMON_REGISTER(hadc);
EricLew	0:80ee8f3b695e	1163
EricLew	0:80ee8f3b695e	1164	/* Return the multi mode conversion value */
EricLew	0:80ee8f3b695e	1165	return tmpADC_Common->CDR;
EricLew	0:80ee8f3b695e	1166	}
EricLew	0:80ee8f3b695e	1167
EricLew	0:80ee8f3b695e	1168
EricLew	0:80ee8f3b695e	1169	/**
EricLew	0:80ee8f3b695e	1170	* @brief Get ADC injected group conversion result.
EricLew	0:80ee8f3b695e	1171	* @param hadc: ADC handle
EricLew	0:80ee8f3b695e	1172	* @param InjectedRank: the converted ADC injected rank.
EricLew	0:80ee8f3b695e	1173	* This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	1174	* @arg ADC_INJECTED_RANK_1: Injected Channel1 selected
EricLew	0:80ee8f3b695e	1175	* @arg ADC_INJECTED_RANK_2: Injected Channel2 selected
EricLew	0:80ee8f3b695e	1176	* @arg ADC_INJECTED_RANK_3: Injected Channel3 selected
EricLew	0:80ee8f3b695e	1177	* @arg ADC_INJECTED_RANK_4: Injected Channel4 selected
EricLew	0:80ee8f3b695e	1178	* @note Reading JDRy register automatically clears JEOC flag. To reset JEOS
EricLew	0:80ee8f3b695e	1179	* flag the user must resort to the macro
EricLew	0:80ee8f3b695e	1180	* __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JEOS).
EricLew	0:80ee8f3b695e	1181	* @retval None
EricLew	0:80ee8f3b695e	1182	*/
EricLew	0:80ee8f3b695e	1183	uint32_t HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef* hadc, uint32_t InjectedRank)
EricLew	0:80ee8f3b695e	1184	{
EricLew	0:80ee8f3b695e	1185	uint32_t tmp_jdr = 0;
EricLew	0:80ee8f3b695e	1186
EricLew	0:80ee8f3b695e	1187	/* Check the parameters */
EricLew	0:80ee8f3b695e	1188	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
EricLew	0:80ee8f3b695e	1189	assert_param(IS_ADC_INJECTED_RANK(InjectedRank));
EricLew	0:80ee8f3b695e	1190
EricLew	0:80ee8f3b695e	1191
EricLew	0:80ee8f3b695e	1192	/* Get ADC converted value */
EricLew	0:80ee8f3b695e	1193	switch(InjectedRank)
EricLew	0:80ee8f3b695e	1194	{
EricLew	0:80ee8f3b695e	1195	case ADC_INJECTED_RANK_4:
EricLew	0:80ee8f3b695e	1196	tmp_jdr = hadc->Instance->JDR4;
EricLew	0:80ee8f3b695e	1197	break;
EricLew	0:80ee8f3b695e	1198	case ADC_INJECTED_RANK_3:
EricLew	0:80ee8f3b695e	1199	tmp_jdr = hadc->Instance->JDR3;
EricLew	0:80ee8f3b695e	1200	break;
EricLew	0:80ee8f3b695e	1201	case ADC_INJECTED_RANK_2:
EricLew	0:80ee8f3b695e	1202	tmp_jdr = hadc->Instance->JDR2;
EricLew	0:80ee8f3b695e	1203	break;
EricLew	0:80ee8f3b695e	1204	case ADC_INJECTED_RANK_1:
EricLew	0:80ee8f3b695e	1205	default:
EricLew	0:80ee8f3b695e	1206	tmp_jdr = hadc->Instance->JDR1;
EricLew	0:80ee8f3b695e	1207	break;
EricLew	0:80ee8f3b695e	1208	}
EricLew	0:80ee8f3b695e	1209
EricLew	0:80ee8f3b695e	1210	/* Return ADC converted value */
EricLew	0:80ee8f3b695e	1211	return tmp_jdr;
EricLew	0:80ee8f3b695e	1212	}
EricLew	0:80ee8f3b695e	1213
EricLew	0:80ee8f3b695e	1214	/**
EricLew	0:80ee8f3b695e	1215	* @brief Injected conversion complete callback in non-blocking mode.
EricLew	0:80ee8f3b695e	1216	* @param hadc: ADC handle
EricLew	0:80ee8f3b695e	1217	* @retval None
EricLew	0:80ee8f3b695e	1218	*/
EricLew	0:80ee8f3b695e	1219	__weak void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc)
EricLew	0:80ee8f3b695e	1220	{
EricLew	0:80ee8f3b695e	1221	/* NOTE : This function should not be modified. When the callback is needed,
EricLew	0:80ee8f3b695e	1222	function HAL_ADCEx_InjectedConvCpltCallback must be implemented in the user file.
EricLew	0:80ee8f3b695e	1223	*/
EricLew	0:80ee8f3b695e	1224	}
EricLew	0:80ee8f3b695e	1225
EricLew	0:80ee8f3b695e	1226
EricLew	0:80ee8f3b695e	1227	/**
EricLew	0:80ee8f3b695e	1228	* @brief Injected context queue overflow callback.
EricLew	0:80ee8f3b695e	1229	* @note This callback is called if injected context queue is enabled
EricLew	0:80ee8f3b695e	1230	(parameter "QueueInjectedContext" in injected channel configuration)
EricLew	0:80ee8f3b695e	1231	and if a new injected context is set when queue is full (maximum 2
EricLew	0:80ee8f3b695e	1232	contexts).
EricLew	0:80ee8f3b695e	1233	* @param hadc: ADC handle
EricLew	0:80ee8f3b695e	1234	* @retval None
EricLew	0:80ee8f3b695e	1235	*/
EricLew	0:80ee8f3b695e	1236	__weak void HAL_ADCEx_InjectedQueueOverflowCallback(ADC_HandleTypeDef* hadc)
EricLew	0:80ee8f3b695e	1237	{
EricLew	0:80ee8f3b695e	1238	/* NOTE : This function should not be modified. When the callback is needed,
EricLew	0:80ee8f3b695e	1239	function HAL_ADCEx_InjectedQueueOverflowCallback must be implemented in the user file.
EricLew	0:80ee8f3b695e	1240	*/
EricLew	0:80ee8f3b695e	1241	}
EricLew	0:80ee8f3b695e	1242
EricLew	0:80ee8f3b695e	1243	/**
EricLew	0:80ee8f3b695e	1244	* @brief Analog watchdog 2 callback in non-blocking mode.
EricLew	0:80ee8f3b695e	1245	* @param hadc: ADC handle
EricLew	0:80ee8f3b695e	1246	* @retval None
EricLew	0:80ee8f3b695e	1247	*/
EricLew	0:80ee8f3b695e	1248	__weak void HAL_ADCEx_LevelOutOfWindow2Callback(ADC_HandleTypeDef* hadc)
EricLew	0:80ee8f3b695e	1249	{
EricLew	0:80ee8f3b695e	1250	/* NOTE : This function should not be modified. When the callback is needed,
EricLew	0:80ee8f3b695e	1251	function HAL_ADCEx_LevelOutOfWindow2Callback must be implemented in the user file.
EricLew	0:80ee8f3b695e	1252	*/
EricLew	0:80ee8f3b695e	1253	}
EricLew	0:80ee8f3b695e	1254
EricLew	0:80ee8f3b695e	1255	/**
EricLew	0:80ee8f3b695e	1256	* @brief Analog watchdog 3 callback in non-blocking mode.
EricLew	0:80ee8f3b695e	1257	* @param hadc: ADC handle
EricLew	0:80ee8f3b695e	1258	* @retval None
EricLew	0:80ee8f3b695e	1259	*/
EricLew	0:80ee8f3b695e	1260	__weak void HAL_ADCEx_LevelOutOfWindow3Callback(ADC_HandleTypeDef* hadc)
EricLew	0:80ee8f3b695e	1261	{
EricLew	0:80ee8f3b695e	1262	/* NOTE : This function should not be modified. When the callback is needed,
EricLew	0:80ee8f3b695e	1263	function HAL_ADCEx_LevelOutOfWindow3Callback must be implemented in the user file.
EricLew	0:80ee8f3b695e	1264	*/
EricLew	0:80ee8f3b695e	1265	}
EricLew	0:80ee8f3b695e	1266
EricLew	0:80ee8f3b695e	1267
EricLew	0:80ee8f3b695e	1268	/**
EricLew	0:80ee8f3b695e	1269	* @brief End Of Sampling callback in non-blocking mode.
EricLew	0:80ee8f3b695e	1270	* @param hadc: ADC handle
EricLew	0:80ee8f3b695e	1271	* @retval None
EricLew	0:80ee8f3b695e	1272	*/
EricLew	0:80ee8f3b695e	1273	__weak void HAL_ADCEx_EndOfSamplingCallback(ADC_HandleTypeDef* hadc)
EricLew	0:80ee8f3b695e	1274	{
EricLew	0:80ee8f3b695e	1275	/* NOTE : This function should not be modified. When the callback is needed,
EricLew	0:80ee8f3b695e	1276	function HAL_ADCEx_EndOfSamplingCallback must be implemented in the user file.
EricLew	0:80ee8f3b695e	1277	*/
EricLew	0:80ee8f3b695e	1278	}
EricLew	0:80ee8f3b695e	1279
EricLew	0:80ee8f3b695e	1280
EricLew	0:80ee8f3b695e	1281
EricLew	0:80ee8f3b695e	1282	/**
EricLew	0:80ee8f3b695e	1283	* @brief Stop ADC conversion of regular groups, disable ADC peripheral if no injected conversion is on-going.
EricLew	0:80ee8f3b695e	1284	* @param hadc: ADC handle
EricLew	0:80ee8f3b695e	1285	* @retval HAL status.
EricLew	0:80ee8f3b695e	1286	*/
EricLew	0:80ee8f3b695e	1287	HAL_StatusTypeDef HAL_ADCEx_RegularStop(ADC_HandleTypeDef* hadc)
EricLew	0:80ee8f3b695e	1288	{
EricLew	0:80ee8f3b695e	1289	HAL_StatusTypeDef tmp_status = HAL_OK;
EricLew	0:80ee8f3b695e	1290
EricLew	0:80ee8f3b695e	1291	/* Check the parameters */
EricLew	0:80ee8f3b695e	1292	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
EricLew	0:80ee8f3b695e	1293
EricLew	0:80ee8f3b695e	1294	/* Process locked */
EricLew	0:80ee8f3b695e	1295	__HAL_LOCK(hadc);
EricLew	0:80ee8f3b695e	1296
EricLew	0:80ee8f3b695e	1297	/* 1. Stop potential regular conversion on going */
EricLew	0:80ee8f3b695e	1298	tmp_status = ADC_ConversionStop(hadc, ADC_REGULAR_GROUP);
EricLew	0:80ee8f3b695e	1299
EricLew	0:80ee8f3b695e	1300	/* Disable ADC peripheral if regular conversions are effectively stopped
EricLew	0:80ee8f3b695e	1301	and if no injected conversions are on-going */
EricLew	0:80ee8f3b695e	1302	if (tmp_status == HAL_OK)
EricLew	0:80ee8f3b695e	1303	{
EricLew	0:80ee8f3b695e	1304	/* Clear HAL_ADC_STATE_REG_BUSY bit */
EricLew	0:80ee8f3b695e	1305	CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY);
EricLew	0:80ee8f3b695e	1306
EricLew	0:80ee8f3b695e	1307	if (ADC_IS_CONVERSION_ONGOING_INJECTED(hadc) == RESET)
EricLew	0:80ee8f3b695e	1308	{
EricLew	0:80ee8f3b695e	1309	/* 2. Disable the ADC peripheral */
EricLew	0:80ee8f3b695e	1310	tmp_status = ADC_Disable(hadc);
EricLew	0:80ee8f3b695e	1311
EricLew	0:80ee8f3b695e	1312	/* Check if ADC is effectively disabled */
EricLew	0:80ee8f3b695e	1313	if (tmp_status == HAL_OK)
EricLew	0:80ee8f3b695e	1314	{
EricLew	0:80ee8f3b695e	1315	/* Change ADC state */
EricLew	0:80ee8f3b695e	1316	/* Clear HAL_ADC_STATE_INJ_BUSY bit, set HAL_ADC_STATE_READY bit */
EricLew	0:80ee8f3b695e	1317	ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY, HAL_ADC_STATE_READY);
EricLew	0:80ee8f3b695e	1318	}
EricLew	0:80ee8f3b695e	1319	}
EricLew	0:80ee8f3b695e	1320	/* Conversion on injected group is stopped, but ADC not disabled since */
EricLew	0:80ee8f3b695e	1321	/* conversion on regular group is still running. */
EricLew	0:80ee8f3b695e	1322	else
EricLew	0:80ee8f3b695e	1323	{
EricLew	0:80ee8f3b695e	1324	SET_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY);
EricLew	0:80ee8f3b695e	1325	}
EricLew	0:80ee8f3b695e	1326	}
EricLew	0:80ee8f3b695e	1327
EricLew	0:80ee8f3b695e	1328	/* Process unlocked */
EricLew	0:80ee8f3b695e	1329	__HAL_UNLOCK(hadc);
EricLew	0:80ee8f3b695e	1330
EricLew	0:80ee8f3b695e	1331	/* Return function status */
EricLew	0:80ee8f3b695e	1332	return tmp_status;
EricLew	0:80ee8f3b695e	1333	}
EricLew	0:80ee8f3b695e	1334
EricLew	0:80ee8f3b695e	1335
EricLew	0:80ee8f3b695e	1336	/**
EricLew	0:80ee8f3b695e	1337	* @brief Stop ADC conversion of regular groups when interruptions are enabled, disable ADC peripheral if no injected conversion is on-going.
EricLew	0:80ee8f3b695e	1338	* @param hadc: ADC handle
EricLew	0:80ee8f3b695e	1339	* @retval HAL status.
EricLew	0:80ee8f3b695e	1340	*/
EricLew	0:80ee8f3b695e	1341	HAL_StatusTypeDef HAL_ADCEx_RegularStop_IT(ADC_HandleTypeDef* hadc)
EricLew	0:80ee8f3b695e	1342	{
EricLew	0:80ee8f3b695e	1343	HAL_StatusTypeDef tmp_status = HAL_OK;
EricLew	0:80ee8f3b695e	1344
EricLew	0:80ee8f3b695e	1345	/* Check the parameters */
EricLew	0:80ee8f3b695e	1346	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
EricLew	0:80ee8f3b695e	1347
EricLew	0:80ee8f3b695e	1348	/* Process locked */
EricLew	0:80ee8f3b695e	1349	__HAL_LOCK(hadc);
EricLew	0:80ee8f3b695e	1350
EricLew	0:80ee8f3b695e	1351	/* 1. Stop potential regular conversion on going */
EricLew	0:80ee8f3b695e	1352	tmp_status = ADC_ConversionStop(hadc, ADC_REGULAR_GROUP);
EricLew	0:80ee8f3b695e	1353
EricLew	0:80ee8f3b695e	1354	/* Disable ADC peripheral if conversions are effectively stopped
EricLew	0:80ee8f3b695e	1355	and if no injected conversion is on-going */
EricLew	0:80ee8f3b695e	1356	if (tmp_status == HAL_OK)
EricLew	0:80ee8f3b695e	1357	{
EricLew	0:80ee8f3b695e	1358	/* Clear HAL_ADC_STATE_REG_BUSY bit */
EricLew	0:80ee8f3b695e	1359	CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY);
EricLew	0:80ee8f3b695e	1360
EricLew	0:80ee8f3b695e	1361	/* Disable all regular-related interrupts */
EricLew	0:80ee8f3b695e	1362	__HAL_ADC_DISABLE_IT(hadc, (ADC_IT_EOC \| ADC_IT_EOS \| ADC_IT_OVR));
EricLew	0:80ee8f3b695e	1363
EricLew	0:80ee8f3b695e	1364	/* 2. Disable ADC peripheral if no injected conversions are on-going */
EricLew	0:80ee8f3b695e	1365	if (ADC_IS_CONVERSION_ONGOING_INJECTED(hadc) == RESET)
EricLew	0:80ee8f3b695e	1366	{
EricLew	0:80ee8f3b695e	1367	tmp_status = ADC_Disable(hadc);
EricLew	0:80ee8f3b695e	1368	/* if no issue reported */
EricLew	0:80ee8f3b695e	1369	if (tmp_status == HAL_OK)
EricLew	0:80ee8f3b695e	1370	{
EricLew	0:80ee8f3b695e	1371	/* Change ADC state */
EricLew	0:80ee8f3b695e	1372	/* Clear HAL_ADC_STATE_INJ_BUSY bit, set HAL_ADC_STATE_READY bit */
EricLew	0:80ee8f3b695e	1373	ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY, HAL_ADC_STATE_READY);
EricLew	0:80ee8f3b695e	1374	}
EricLew	0:80ee8f3b695e	1375	}
EricLew	0:80ee8f3b695e	1376	else
EricLew	0:80ee8f3b695e	1377	{
EricLew	0:80ee8f3b695e	1378	SET_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY);
EricLew	0:80ee8f3b695e	1379	}
EricLew	0:80ee8f3b695e	1380	}
EricLew	0:80ee8f3b695e	1381
EricLew	0:80ee8f3b695e	1382	/* Process unlocked */
EricLew	0:80ee8f3b695e	1383	__HAL_UNLOCK(hadc);
EricLew	0:80ee8f3b695e	1384
EricLew	0:80ee8f3b695e	1385	/* Return function status */
EricLew	0:80ee8f3b695e	1386	return tmp_status;
EricLew	0:80ee8f3b695e	1387	}
EricLew	0:80ee8f3b695e	1388
EricLew	0:80ee8f3b695e	1389
EricLew	0:80ee8f3b695e	1390	/**
EricLew	0:80ee8f3b695e	1391	* @brief Stop ADC conversion of regular groups and disable ADC DMA transfer, disable ADC peripheral if no injected conversion is on-going.
EricLew	0:80ee8f3b695e	1392	* @note HAL_ADCEx_RegularStop_DMA() function is dedicated to single-ADC mode only.
EricLew	0:80ee8f3b695e	1393	* For multimode (when multimode feature is available),
EricLew	0:80ee8f3b695e	1394	* HAL_ADCEx_RegularMultiModeStop_DMA() API must be used.
EricLew	0:80ee8f3b695e	1395	* @param hadc: ADC handle
EricLew	0:80ee8f3b695e	1396	* @retval HAL status.
EricLew	0:80ee8f3b695e	1397	*/
EricLew	0:80ee8f3b695e	1398	HAL_StatusTypeDef HAL_ADCEx_RegularStop_DMA(ADC_HandleTypeDef* hadc)
EricLew	0:80ee8f3b695e	1399	{
EricLew	0:80ee8f3b695e	1400	HAL_StatusTypeDef tmp_status = HAL_OK;
EricLew	0:80ee8f3b695e	1401
EricLew	0:80ee8f3b695e	1402	/* Check the parameters */
EricLew	0:80ee8f3b695e	1403	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
EricLew	0:80ee8f3b695e	1404
EricLew	0:80ee8f3b695e	1405	/* Process locked */
EricLew	0:80ee8f3b695e	1406	__HAL_LOCK(hadc);
EricLew	0:80ee8f3b695e	1407
EricLew	0:80ee8f3b695e	1408	/* 1. Stop potential regular conversion on going */
EricLew	0:80ee8f3b695e	1409	tmp_status = ADC_ConversionStop(hadc, ADC_REGULAR_GROUP);
EricLew	0:80ee8f3b695e	1410
EricLew	0:80ee8f3b695e	1411	/* Disable ADC peripheral if conversions are effectively stopped
EricLew	0:80ee8f3b695e	1412	and if no injected conversion is on-going */
EricLew	0:80ee8f3b695e	1413	if (tmp_status == HAL_OK)
EricLew	0:80ee8f3b695e	1414	{
EricLew	0:80ee8f3b695e	1415	/* Clear HAL_ADC_STATE_REG_BUSY bit */
EricLew	0:80ee8f3b695e	1416	CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY);
EricLew	0:80ee8f3b695e	1417
EricLew	0:80ee8f3b695e	1418	/* Disable ADC DMA (ADC DMA configuration ADC_CFGR_DMACFG is kept) */
EricLew	0:80ee8f3b695e	1419	CLEAR_BIT(hadc->Instance->CFGR, ADC_CFGR_DMAEN);
EricLew	0:80ee8f3b695e	1420
EricLew	0:80ee8f3b695e	1421	/* Disable the DMA channel (in case of DMA in circular mode or stop while */
EricLew	0:80ee8f3b695e	1422	/* while DMA transfer is on going) */
EricLew	0:80ee8f3b695e	1423	tmp_status = HAL_DMA_Abort(hadc->DMA_Handle);
EricLew	0:80ee8f3b695e	1424
EricLew	0:80ee8f3b695e	1425	/* Check if DMA channel effectively disabled */
EricLew	0:80ee8f3b695e	1426	if (tmp_status != HAL_OK)
EricLew	0:80ee8f3b695e	1427	{
EricLew	0:80ee8f3b695e	1428	/* Update ADC state machine to error */
EricLew	0:80ee8f3b695e	1429	SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA);
EricLew	0:80ee8f3b695e	1430	}
EricLew	0:80ee8f3b695e	1431
EricLew	0:80ee8f3b695e	1432	/* Disable ADC overrun interrupt */
EricLew	0:80ee8f3b695e	1433	__HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR);
EricLew	0:80ee8f3b695e	1434
EricLew	0:80ee8f3b695e	1435	/* 2. Disable the ADC peripheral */
EricLew	0:80ee8f3b695e	1436	/* Update "tmp_status" only if DMA channel disabling passed, to keep in */
EricLew	0:80ee8f3b695e	1437	/* memory a potential failing status. */
EricLew	0:80ee8f3b695e	1438	if (ADC_IS_CONVERSION_ONGOING_INJECTED(hadc) == RESET)
EricLew	0:80ee8f3b695e	1439	{
EricLew	0:80ee8f3b695e	1440	if (tmp_status == HAL_OK)
EricLew	0:80ee8f3b695e	1441	{
EricLew	0:80ee8f3b695e	1442	tmp_status = ADC_Disable(hadc);
EricLew	0:80ee8f3b695e	1443	}
EricLew	0:80ee8f3b695e	1444	else
EricLew	0:80ee8f3b695e	1445	{
EricLew	0:80ee8f3b695e	1446	ADC_Disable(hadc);
EricLew	0:80ee8f3b695e	1447	}
EricLew	0:80ee8f3b695e	1448
EricLew	0:80ee8f3b695e	1449	/* Check if ADC is effectively disabled */
EricLew	0:80ee8f3b695e	1450	if (tmp_status == HAL_OK)
EricLew	0:80ee8f3b695e	1451	{
EricLew	0:80ee8f3b695e	1452	/* Change ADC state */
EricLew	0:80ee8f3b695e	1453	/* Clear HAL_ADC_STATE_INJ_BUSY bit, set HAL_ADC_STATE_READY bit */
EricLew	0:80ee8f3b695e	1454	ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY, HAL_ADC_STATE_READY);
EricLew	0:80ee8f3b695e	1455	}
EricLew	0:80ee8f3b695e	1456	}
EricLew	0:80ee8f3b695e	1457	else
EricLew	0:80ee8f3b695e	1458	{
EricLew	0:80ee8f3b695e	1459	SET_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY);
EricLew	0:80ee8f3b695e	1460	}
EricLew	0:80ee8f3b695e	1461	}
EricLew	0:80ee8f3b695e	1462
EricLew	0:80ee8f3b695e	1463	/* Process unlocked */
EricLew	0:80ee8f3b695e	1464	__HAL_UNLOCK(hadc);
EricLew	0:80ee8f3b695e	1465
EricLew	0:80ee8f3b695e	1466	/* Return function status */
EricLew	0:80ee8f3b695e	1467	return tmp_status;
EricLew	0:80ee8f3b695e	1468	}
EricLew	0:80ee8f3b695e	1469
EricLew	0:80ee8f3b695e	1470
EricLew	0:80ee8f3b695e	1471
EricLew	0:80ee8f3b695e	1472	/**
EricLew	0:80ee8f3b695e	1473	* @brief Stop DMA-based multimode ADC conversion, disable ADC DMA transfer, disable ADC peripheral if no injected conversion is on-going.
EricLew	0:80ee8f3b695e	1474	* @note Multimode is kept enabled after this function. Multimode DMA bits
EricLew	0:80ee8f3b695e	1475	* (MDMA and DMACFG bits of common CCR register) are maintained. To disable
EricLew	0:80ee8f3b695e	1476	* multimode (set with HAL_ADCEx_MultiModeConfigChannel()), ADC must be
EricLew	0:80ee8f3b695e	1477	* reinitialized using HAL_ADC_Init() or HAL_ADC_DeInit(), or the user can
EricLew	0:80ee8f3b695e	1478	* resort to HAL_ADCEx_DisableMultiMode() API.
EricLew	0:80ee8f3b695e	1479	* @note In case of DMA configured in circular mode, function
EricLew	0:80ee8f3b695e	1480	* HAL_ADCEx_RegularStop_DMA() must be called after this function with handle of
EricLew	0:80ee8f3b695e	1481	* ADC slave, to properly disable the DMA channel.
EricLew	0:80ee8f3b695e	1482	* @param hadc: ADC handle of ADC master (handle of ADC slave must not be used)
EricLew	0:80ee8f3b695e	1483	* @retval None
EricLew	0:80ee8f3b695e	1484	*/
EricLew	0:80ee8f3b695e	1485	HAL_StatusTypeDef HAL_ADCEx_RegularMultiModeStop_DMA(ADC_HandleTypeDef* hadc)
EricLew	0:80ee8f3b695e	1486	{
EricLew	0:80ee8f3b695e	1487	HAL_StatusTypeDef tmp_status = HAL_OK;
EricLew	0:80ee8f3b695e	1488	uint32_t tickstart;
EricLew	0:80ee8f3b695e	1489	ADC_HandleTypeDef tmphadcSlave;
EricLew	0:80ee8f3b695e	1490
EricLew	0:80ee8f3b695e	1491	/* Check the parameters */
EricLew	0:80ee8f3b695e	1492	assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance));
EricLew	0:80ee8f3b695e	1493
EricLew	0:80ee8f3b695e	1494	/* Process locked */
EricLew	0:80ee8f3b695e	1495	__HAL_LOCK(hadc);
EricLew	0:80ee8f3b695e	1496
EricLew	0:80ee8f3b695e	1497
EricLew	0:80ee8f3b695e	1498	/* 1. Stop potential multimode conversion on going, on regular groups */
EricLew	0:80ee8f3b695e	1499	tmp_status = ADC_ConversionStop(hadc, ADC_REGULAR_GROUP);
EricLew	0:80ee8f3b695e	1500
EricLew	0:80ee8f3b695e	1501	/* Disable ADC peripheral if conversions are effectively stopped */
EricLew	0:80ee8f3b695e	1502	if (tmp_status == HAL_OK)
EricLew	0:80ee8f3b695e	1503	{
EricLew	0:80ee8f3b695e	1504	/* Clear HAL_ADC_STATE_REG_BUSY bit */
EricLew	0:80ee8f3b695e	1505	CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY);
EricLew	0:80ee8f3b695e	1506
EricLew	0:80ee8f3b695e	1507	/* Set a temporary handle of the ADC slave associated to the ADC master */
EricLew	0:80ee8f3b695e	1508	ADC_MULTI_SLAVE(hadc, &tmphadcSlave);
EricLew	0:80ee8f3b695e	1509
EricLew	0:80ee8f3b695e	1510	if (tmphadcSlave.Instance == NULL)
EricLew	0:80ee8f3b695e	1511	{
EricLew	0:80ee8f3b695e	1512	/* Update ADC state machine to error */
EricLew	0:80ee8f3b695e	1513	SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
EricLew	0:80ee8f3b695e	1514
EricLew	0:80ee8f3b695e	1515	/* Process unlocked */
EricLew	0:80ee8f3b695e	1516	__HAL_UNLOCK(hadc);
EricLew	0:80ee8f3b695e	1517
EricLew	0:80ee8f3b695e	1518	return HAL_ERROR;
EricLew	0:80ee8f3b695e	1519	}
EricLew	0:80ee8f3b695e	1520
EricLew	0:80ee8f3b695e	1521	/* Procedure to disable the ADC peripheral: wait for conversions */
EricLew	0:80ee8f3b695e	1522	/* effectively stopped (ADC master and ADC slave), then disable ADC */
EricLew	0:80ee8f3b695e	1523
EricLew	0:80ee8f3b695e	1524	/* 1. Wait until ADSTP=0 for ADC master and ADC slave*/
EricLew	0:80ee8f3b695e	1525	tickstart = HAL_GetTick();
EricLew	0:80ee8f3b695e	1526
EricLew	0:80ee8f3b695e	1527	while(ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) \|\|
EricLew	0:80ee8f3b695e	1528	ADC_IS_CONVERSION_ONGOING_REGULAR(&tmphadcSlave) )
EricLew	0:80ee8f3b695e	1529	{
EricLew	0:80ee8f3b695e	1530	if((HAL_GetTick()-tickstart) > ADC_STOP_CONVERSION_TIMEOUT)
EricLew	0:80ee8f3b695e	1531	{
EricLew	0:80ee8f3b695e	1532	/* Update ADC state machine to error */
EricLew	0:80ee8f3b695e	1533	SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
EricLew	0:80ee8f3b695e	1534
EricLew	0:80ee8f3b695e	1535	/* Process unlocked */
EricLew	0:80ee8f3b695e	1536	__HAL_UNLOCK(hadc);
EricLew	0:80ee8f3b695e	1537
EricLew	0:80ee8f3b695e	1538	return HAL_ERROR;
EricLew	0:80ee8f3b695e	1539	}
EricLew	0:80ee8f3b695e	1540	}
EricLew	0:80ee8f3b695e	1541
EricLew	0:80ee8f3b695e	1542	/* Disable the DMA channel (in case of DMA in circular mode or stop */
EricLew	0:80ee8f3b695e	1543	/* while DMA transfer is on going) */
EricLew	0:80ee8f3b695e	1544	/* Note: DMA channel of ADC slave should be stopped after this function */
EricLew	0:80ee8f3b695e	1545	/* with HAL_ADCEx_RegularStop_DMA() API. */
EricLew	0:80ee8f3b695e	1546	tmp_status = HAL_DMA_Abort(hadc->DMA_Handle);
EricLew	0:80ee8f3b695e	1547
EricLew	0:80ee8f3b695e	1548	/* Check if DMA channel effectively disabled */
EricLew	0:80ee8f3b695e	1549	if (tmp_status != HAL_OK)
EricLew	0:80ee8f3b695e	1550	{
EricLew	0:80ee8f3b695e	1551	/* Update ADC state machine to error */
EricLew	0:80ee8f3b695e	1552	SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA);
EricLew	0:80ee8f3b695e	1553	}
EricLew	0:80ee8f3b695e	1554
EricLew	0:80ee8f3b695e	1555	/* Disable ADC overrun interrupt */
EricLew	0:80ee8f3b695e	1556	__HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR);
EricLew	0:80ee8f3b695e	1557
EricLew	0:80ee8f3b695e	1558
EricLew	0:80ee8f3b695e	1559
EricLew	0:80ee8f3b695e	1560	/* 2. Disable the ADC peripherals: master and slave if no injected */
EricLew	0:80ee8f3b695e	1561	/* conversion is on-going. */
EricLew	0:80ee8f3b695e	1562	/* Update "tmp_status" only if DMA channel disabling passed, to keep in */
EricLew	0:80ee8f3b695e	1563	/* memory a potential failing status. */
EricLew	0:80ee8f3b695e	1564	if (tmp_status == HAL_OK)
EricLew	0:80ee8f3b695e	1565	{
EricLew	0:80ee8f3b695e	1566	if (ADC_IS_CONVERSION_ONGOING_INJECTED(hadc) == RESET)
EricLew	0:80ee8f3b695e	1567	{
EricLew	0:80ee8f3b695e	1568	tmp_status = ADC_Disable(hadc);
EricLew	0:80ee8f3b695e	1569	if (tmp_status == HAL_OK)
EricLew	0:80ee8f3b695e	1570	{
EricLew	0:80ee8f3b695e	1571	if (ADC_IS_CONVERSION_ONGOING_INJECTED(&tmphadcSlave) == RESET)
EricLew	0:80ee8f3b695e	1572	{
EricLew	0:80ee8f3b695e	1573	tmp_status = ADC_Disable(&tmphadcSlave);
EricLew	0:80ee8f3b695e	1574	}
EricLew	0:80ee8f3b695e	1575	}
EricLew	0:80ee8f3b695e	1576	}
EricLew	0:80ee8f3b695e	1577
EricLew	0:80ee8f3b695e	1578	if (tmp_status == HAL_OK)
EricLew	0:80ee8f3b695e	1579	{
EricLew	0:80ee8f3b695e	1580	/* Both Master and Slave ADC's could be disabled. Update Master State */
EricLew	0:80ee8f3b695e	1581	/* Clear HAL_ADC_STATE_INJ_BUSY bit, set HAL_ADC_STATE_READY bit */
EricLew	0:80ee8f3b695e	1582	ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY, HAL_ADC_STATE_READY);
EricLew	0:80ee8f3b695e	1583	}
EricLew	0:80ee8f3b695e	1584	else
EricLew	0:80ee8f3b695e	1585	{
EricLew	0:80ee8f3b695e	1586	/* injected (Master or Slave) conversions are still on-going,
EricLew	0:80ee8f3b695e	1587	no Master State change */
EricLew	0:80ee8f3b695e	1588	}
EricLew	0:80ee8f3b695e	1589
EricLew	0:80ee8f3b695e	1590
EricLew	0:80ee8f3b695e	1591	}
EricLew	0:80ee8f3b695e	1592
EricLew	0:80ee8f3b695e	1593
EricLew	0:80ee8f3b695e	1594	}
EricLew	0:80ee8f3b695e	1595
EricLew	0:80ee8f3b695e	1596	/* Process unlocked */
EricLew	0:80ee8f3b695e	1597	__HAL_UNLOCK(hadc);
EricLew	0:80ee8f3b695e	1598
EricLew	0:80ee8f3b695e	1599	/* Return function status */
EricLew	0:80ee8f3b695e	1600	return tmp_status;
EricLew	0:80ee8f3b695e	1601	}
EricLew	0:80ee8f3b695e	1602
EricLew	0:80ee8f3b695e	1603	/**
EricLew	0:80ee8f3b695e	1604	* @}
EricLew	0:80ee8f3b695e	1605	*/
EricLew	0:80ee8f3b695e	1606
EricLew	0:80ee8f3b695e	1607	/** @defgroup ADCEx_Exported_Functions_Group2 Extended Peripheral Control functions
EricLew	0:80ee8f3b695e	1608	* @brief Extended Peripheral Control functions
EricLew	0:80ee8f3b695e	1609	*
EricLew	0:80ee8f3b695e	1610	@verbatim
EricLew	0:80ee8f3b695e	1611	===============================================================================
EricLew	0:80ee8f3b695e	1612	##### Peripheral Control functions #####
EricLew	0:80ee8f3b695e	1613	===============================================================================
EricLew	0:80ee8f3b695e	1614	[..] This section provides functions allowing to:
EricLew	0:80ee8f3b695e	1615	(+) Configure channels on injected group
EricLew	0:80ee8f3b695e	1616	(+) Configure multimode when multimode feature is available
EricLew	0:80ee8f3b695e	1617	(+) Enable or Disable Injected Queue
EricLew	0:80ee8f3b695e	1618	(+) Disable ADC voltage regulator
EricLew	0:80ee8f3b695e	1619	(+) Enter ADC deep-power-down mode
EricLew	0:80ee8f3b695e	1620
EricLew	0:80ee8f3b695e	1621
EricLew	0:80ee8f3b695e	1622	@endverbatim
EricLew	0:80ee8f3b695e	1623	* @{
EricLew	0:80ee8f3b695e	1624	*/
EricLew	0:80ee8f3b695e	1625
EricLew	0:80ee8f3b695e	1626	/**
EricLew	0:80ee8f3b695e	1627	* @brief Configure the ADC injected group and the selected channel to be linked to the injected group.
EricLew	0:80ee8f3b695e	1628	* @note Possibility to update parameters on the fly:
EricLew	0:80ee8f3b695e	1629	* This function initializes injected group, consecutive calls to this
EricLew	0:80ee8f3b695e	1630	* function can be used to reconfigure some parameters of structure
EricLew	0:80ee8f3b695e	1631	* "ADC_InjectionConfTypeDef" on the fly, without resetting the ADC.
EricLew	0:80ee8f3b695e	1632	* The setting of these parameters is conditioned to ADC state.
EricLew	0:80ee8f3b695e	1633	* For parameters constraints, see comments of structure
EricLew	0:80ee8f3b695e	1634	* "ADC_InjectionConfTypeDef".
EricLew	0:80ee8f3b695e	1635	* @note In case of usage of internal measurement channels (Vbat/VrefInt/TempSensor),
EricLew	0:80ee8f3b695e	1636	* The internal paths can be disabled using function HAL_ADC_DeInit().
EricLew	0:80ee8f3b695e	1637	* @note To reset injected sequencer, function HAL_ADCEx_InjectedStop() can
EricLew	0:80ee8f3b695e	1638	* be used.
EricLew	0:80ee8f3b695e	1639	* @note Caution: For Injected Context Queue use, a context must be fully
EricLew	0:80ee8f3b695e	1640	* defined before start of injected conversion. All channels are configured
EricLew	0:80ee8f3b695e	1641	* consecutively for the same ADC instance. Therefore, the number of calls to
EricLew	0:80ee8f3b695e	1642	* HAL_ADCEx_InjectedConfigChannel() must be equal to the value of parameter
EricLew	0:80ee8f3b695e	1643	* InjectedNbrOfConversion for each context.
EricLew	0:80ee8f3b695e	1644	* - Example 1: If 1 context is intended to be used (or if there is no use of the
EricLew	0:80ee8f3b695e	1645	* Injected Queue Context feature) and if the context contains 3 injected ranks
EricLew	0:80ee8f3b695e	1646	* (InjectedNbrOfConversion = 3), HAL_ADCEx_InjectedConfigChannel() must be
EricLew	0:80ee8f3b695e	1647	* called once for each channel (i.e. 3 times) before starting a conversion.
EricLew	0:80ee8f3b695e	1648	* This function must not be called to configure a 4th injected channel:
EricLew	0:80ee8f3b695e	1649	* it would start a new context into context queue.
EricLew	0:80ee8f3b695e	1650	* - Example 2: If 2 contexts are intended to be used and each of them contains
EricLew	0:80ee8f3b695e	1651	* 3 injected ranks (InjectedNbrOfConversion = 3),
EricLew	0:80ee8f3b695e	1652	* HAL_ADCEx_InjectedConfigChannel() must be called once for each channel and
EricLew	0:80ee8f3b695e	1653	* for each context (3 channels x 2 contexts = 6 calls). Conversion can
EricLew	0:80ee8f3b695e	1654	* start once the 1st context is set, that is after the first three
EricLew	0:80ee8f3b695e	1655	* HAL_ADCEx_InjectedConfigChannel() calls. The 2nd context can be set on the fly.
EricLew	0:80ee8f3b695e	1656	* @param hadc: ADC handle
EricLew	0:80ee8f3b695e	1657	* @param sConfigInjected: Structure of ADC injected group and ADC channel for
EricLew	0:80ee8f3b695e	1658	* injected group.
EricLew	0:80ee8f3b695e	1659	* @retval None
EricLew	0:80ee8f3b695e	1660	*/
EricLew	0:80ee8f3b695e	1661	HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc, ADC_InjectionConfTypeDef* sConfigInjected)
EricLew	0:80ee8f3b695e	1662	{
EricLew	0:80ee8f3b695e	1663	HAL_StatusTypeDef tmp_status = HAL_OK;
EricLew	0:80ee8f3b695e	1664	ADC_Common_TypeDef *tmpADC_Common;
EricLew	0:80ee8f3b695e	1665	uint32_t tmpOffsetShifted;
EricLew	0:80ee8f3b695e	1666	uint32_t wait_loop_index = 0;
EricLew	0:80ee8f3b695e	1667
EricLew	0:80ee8f3b695e	1668
EricLew	0:80ee8f3b695e	1669	uint32_t tmp_JSQR_ContextQueueBeingBuilt = 0;
EricLew	0:80ee8f3b695e	1670
EricLew	0:80ee8f3b695e	1671	/* Check the parameters */
EricLew	0:80ee8f3b695e	1672	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
EricLew	0:80ee8f3b695e	1673	assert_param(IS_ADC_SAMPLE_TIME(sConfigInjected->InjectedSamplingTime));
EricLew	0:80ee8f3b695e	1674	assert_param(IS_ADC_SINGLE_DIFFERENTIAL(sConfigInjected->InjectedSingleDiff));
EricLew	0:80ee8f3b695e	1675	assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->AutoInjectedConv));
EricLew	0:80ee8f3b695e	1676	assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->QueueInjectedContext));
EricLew	0:80ee8f3b695e	1677	assert_param(IS_ADC_EXTTRIGINJEC_EDGE(sConfigInjected->ExternalTrigInjecConvEdge));
EricLew	0:80ee8f3b695e	1678	assert_param(IS_ADC_EXTTRIGINJEC(sConfigInjected->ExternalTrigInjecConv));
EricLew	0:80ee8f3b695e	1679	assert_param(IS_ADC_OFFSET_NUMBER(sConfigInjected->InjectedOffsetNumber));
EricLew	0:80ee8f3b695e	1680	assert_param(IS_ADC_RANGE(ADC_GET_RESOLUTION(hadc), sConfigInjected->InjectedOffset));
EricLew	0:80ee8f3b695e	1681	assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->InjecOversamplingMode));
EricLew	0:80ee8f3b695e	1682
EricLew	0:80ee8f3b695e	1683	if(hadc->Init.ScanConvMode != ADC_SCAN_DISABLE)
EricLew	0:80ee8f3b695e	1684	{
EricLew	0:80ee8f3b695e	1685	assert_param(IS_ADC_INJECTED_RANK(sConfigInjected->InjectedRank));
EricLew	0:80ee8f3b695e	1686	assert_param(IS_ADC_INJECTED_NB_CONV(sConfigInjected->InjectedNbrOfConversion));
EricLew	0:80ee8f3b695e	1687	assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->InjectedDiscontinuousConvMode));
EricLew	0:80ee8f3b695e	1688	}
EricLew	0:80ee8f3b695e	1689
EricLew	0:80ee8f3b695e	1690
EricLew	0:80ee8f3b695e	1691	/* if JOVSE is set, the value of the OFFSETy_EN bit in ADCx_OFRy register is
EricLew	0:80ee8f3b695e	1692	ignored (considered as reset) */
EricLew	0:80ee8f3b695e	1693	assert_param(!((sConfigInjected->InjectedOffsetNumber != ADC_OFFSET_NONE) && (sConfigInjected->InjecOversamplingMode == ENABLE)));
EricLew	0:80ee8f3b695e	1694
EricLew	0:80ee8f3b695e	1695	/* JDISCEN and JAUTO bits can't be set at the same time */
EricLew	0:80ee8f3b695e	1696	assert_param(!((sConfigInjected->InjectedDiscontinuousConvMode == ENABLE) && (sConfigInjected->AutoInjectedConv == ENABLE)));
EricLew	0:80ee8f3b695e	1697
EricLew	0:80ee8f3b695e	1698	/* DISCEN and JAUTO bits can't be set at the same time */
EricLew	0:80ee8f3b695e	1699	assert_param(!((hadc->Init.DiscontinuousConvMode == ENABLE) && (sConfigInjected->AutoInjectedConv == ENABLE)));
EricLew	0:80ee8f3b695e	1700
EricLew	0:80ee8f3b695e	1701	/* Verification of channel number */
EricLew	0:80ee8f3b695e	1702	if (sConfigInjected->InjectedSingleDiff != ADC_DIFFERENTIAL_ENDED)
EricLew	0:80ee8f3b695e	1703	{
EricLew	0:80ee8f3b695e	1704	assert_param(IS_ADC_CHANNEL(hadc, sConfigInjected->InjectedChannel));
EricLew	0:80ee8f3b695e	1705	}
EricLew	0:80ee8f3b695e	1706	else
EricLew	0:80ee8f3b695e	1707	{
EricLew	0:80ee8f3b695e	1708	assert_param(IS_ADC_DIFF_CHANNEL(hadc, sConfigInjected->InjectedChannel));
EricLew	0:80ee8f3b695e	1709	}
EricLew	0:80ee8f3b695e	1710
EricLew	0:80ee8f3b695e	1711
EricLew	0:80ee8f3b695e	1712	/* Process locked */
EricLew	0:80ee8f3b695e	1713	__HAL_LOCK(hadc);
EricLew	0:80ee8f3b695e	1714
EricLew	0:80ee8f3b695e	1715
EricLew	0:80ee8f3b695e	1716
EricLew	0:80ee8f3b695e	1717	/* Configuration of Injected group sequencer. */
EricLew	0:80ee8f3b695e	1718	/* Hardware constraint: Must fully define injected context register JSQR */
EricLew	0:80ee8f3b695e	1719	/* before make it entering into injected sequencer queue. */
EricLew	0:80ee8f3b695e	1720	/* */
EricLew	0:80ee8f3b695e	1721	/* - if scan mode is disabled: */
EricLew	0:80ee8f3b695e	1722	/* * Injected channels sequence length is set to 0x00: 1 channel */
EricLew	0:80ee8f3b695e	1723	/* converted (channel on injected rank 1) */
EricLew	0:80ee8f3b695e	1724	/* Parameter "InjectedNbrOfConversion" is discarded. */
EricLew	0:80ee8f3b695e	1725	/* * Injected context register JSQR setting is simple: register is fully */
EricLew	0:80ee8f3b695e	1726	/* defined on one call of this function (for injected rank 1) and can */
EricLew	0:80ee8f3b695e	1727	/* be entered into queue directly. */
EricLew	0:80ee8f3b695e	1728	/* - if scan mode is enabled: */
EricLew	0:80ee8f3b695e	1729	/* * Injected channels sequence length is set to parameter */
EricLew	0:80ee8f3b695e	1730	/* "InjectedNbrOfConversion". */
EricLew	0:80ee8f3b695e	1731	/* * Injected context register JSQR setting more complex: register is */
EricLew	0:80ee8f3b695e	1732	/* fully defined over successive calls of this function, for each */
EricLew	0:80ee8f3b695e	1733	/* injected channel rank. It is entered into queue only when all */
EricLew	0:80ee8f3b695e	1734	/* injected ranks have been set. */
EricLew	0:80ee8f3b695e	1735	/* Note: Scan mode is not present by hardware on this device, but used */
EricLew	0:80ee8f3b695e	1736	/* by software for alignment over all STM32 devices. */
EricLew	0:80ee8f3b695e	1737
EricLew	0:80ee8f3b695e	1738	if ((hadc->Init.ScanConvMode == ADC_SCAN_DISABLE) \|\|
EricLew	0:80ee8f3b695e	1739	(sConfigInjected->InjectedNbrOfConversion == 1) )
EricLew	0:80ee8f3b695e	1740	{
EricLew	0:80ee8f3b695e	1741	/* Configuration of context register JSQR: */
EricLew	0:80ee8f3b695e	1742	/* - number of ranks in injected group sequencer: fixed to 1st rank */
EricLew	0:80ee8f3b695e	1743	/* (scan mode disabled, only rank 1 used) */
EricLew	0:80ee8f3b695e	1744	/* - external trigger to start conversion */
EricLew	0:80ee8f3b695e	1745	/* - external trigger polarity */
EricLew	0:80ee8f3b695e	1746	/* - channel set to rank 1 (scan mode disabled, only rank 1 can be used) */
EricLew	0:80ee8f3b695e	1747
EricLew	0:80ee8f3b695e	1748	if (sConfigInjected->InjectedRank == ADC_INJECTED_RANK_1)
EricLew	0:80ee8f3b695e	1749	{
EricLew	0:80ee8f3b695e	1750	/* Enable external trigger if trigger selection is different of */
EricLew	0:80ee8f3b695e	1751	/* software start. */
EricLew	0:80ee8f3b695e	1752	/* Note: This configuration keeps the hardware feature of parameter */
EricLew	0:80ee8f3b695e	1753	/* ExternalTrigInjecConvEdge "trigger edge none" equivalent to */
EricLew	0:80ee8f3b695e	1754	/* software start. */
EricLew	0:80ee8f3b695e	1755	if ((sConfigInjected->ExternalTrigInjecConv != ADC_INJECTED_SOFTWARE_START)
EricLew	0:80ee8f3b695e	1756	&& (sConfigInjected->ExternalTrigInjecConvEdge != ADC_EXTERNALTRIGINJECCONV_EDGE_NONE))
EricLew	0:80ee8f3b695e	1757	{
EricLew	0:80ee8f3b695e	1758	tmp_JSQR_ContextQueueBeingBuilt = ( ADC_JSQR_RK(sConfigInjected->InjectedChannel, ADC_INJECTED_RANK_1) \|
EricLew	0:80ee8f3b695e	1759	sConfigInjected->ExternalTrigInjecConv \|
EricLew	0:80ee8f3b695e	1760	sConfigInjected->ExternalTrigInjecConvEdge );
EricLew	0:80ee8f3b695e	1761	}
EricLew	0:80ee8f3b695e	1762	else
EricLew	0:80ee8f3b695e	1763	{
EricLew	0:80ee8f3b695e	1764	tmp_JSQR_ContextQueueBeingBuilt = ( ADC_JSQR_RK(sConfigInjected->InjectedChannel, ADC_INJECTED_RANK_1) );
EricLew	0:80ee8f3b695e	1765	}
EricLew	0:80ee8f3b695e	1766
EricLew	0:80ee8f3b695e	1767
EricLew	0:80ee8f3b695e	1768	MODIFY_REG(hadc->Instance->JSQR, ADC_JSQR_FIELDS, tmp_JSQR_ContextQueueBeingBuilt);
EricLew	0:80ee8f3b695e	1769	/* For debug and informative reasons, hadc handle saves JSQR setting */
EricLew	0:80ee8f3b695e	1770	hadc->InjectionConfig.ContextQueue = tmp_JSQR_ContextQueueBeingBuilt;
EricLew	0:80ee8f3b695e	1771
EricLew	0:80ee8f3b695e	1772	}
EricLew	0:80ee8f3b695e	1773	}
EricLew	0:80ee8f3b695e	1774	else
EricLew	0:80ee8f3b695e	1775	{
EricLew	0:80ee8f3b695e	1776	/* Case of scan mode enabled, several channels to set into injected group */
EricLew	0:80ee8f3b695e	1777	/* sequencer. */
EricLew	0:80ee8f3b695e	1778	/* */
EricLew	0:80ee8f3b695e	1779	/* Procedure to define injected context register JSQR over successive */
EricLew	0:80ee8f3b695e	1780	/* calls of this function, for each injected channel rank: */
EricLew	0:80ee8f3b695e	1781	/* 1. Start new context and set parameters related to all injected */
EricLew	0:80ee8f3b695e	1782	/* channels: injected sequence length and trigger. */
EricLew	0:80ee8f3b695e	1783
EricLew	0:80ee8f3b695e	1784	/* if hadc->InjectionConfig.ChannelCount is equal to 0, this is the first */
EricLew	0:80ee8f3b695e	1785	/* call of the context under setting */
EricLew	0:80ee8f3b695e	1786	if (hadc->InjectionConfig.ChannelCount == 0)
EricLew	0:80ee8f3b695e	1787	{
EricLew	0:80ee8f3b695e	1788	/* Initialize number of channels that will be configured on the context */
EricLew	0:80ee8f3b695e	1789	/* being built */
EricLew	0:80ee8f3b695e	1790	hadc->InjectionConfig.ChannelCount = sConfigInjected->InjectedNbrOfConversion;
EricLew	0:80ee8f3b695e	1791	/* Handle hadc saves the context under build up over each HAL_ADCEx_InjectedConfigChannel()
EricLew	0:80ee8f3b695e	1792	call, this context will be written in JSQR register at the last call.
EricLew	0:80ee8f3b695e	1793	At this point, the context is merely reset */
EricLew	0:80ee8f3b695e	1794	hadc->InjectionConfig.ContextQueue = (uint32_t)0x00000000;
EricLew	0:80ee8f3b695e	1795
EricLew	0:80ee8f3b695e	1796	/* Configuration of context register JSQR: */
EricLew	0:80ee8f3b695e	1797	/* - number of ranks in injected group sequencer */
EricLew	0:80ee8f3b695e	1798	/* - external trigger to start conversion */
EricLew	0:80ee8f3b695e	1799	/* - external trigger polarity */
EricLew	0:80ee8f3b695e	1800
EricLew	0:80ee8f3b695e	1801	/* Enable external trigger if trigger selection is different of */
EricLew	0:80ee8f3b695e	1802	/* software start. */
EricLew	0:80ee8f3b695e	1803	/* Note: This configuration keeps the hardware feature of parameter */
EricLew	0:80ee8f3b695e	1804	/* ExternalTrigInjecConvEdge "trigger edge none" equivalent to */
EricLew	0:80ee8f3b695e	1805	/* software start. */
EricLew	0:80ee8f3b695e	1806	if ((sConfigInjected->ExternalTrigInjecConv != ADC_INJECTED_SOFTWARE_START)
EricLew	0:80ee8f3b695e	1807	&& (sConfigInjected->ExternalTrigInjecConvEdge != ADC_EXTERNALTRIGINJECCONV_EDGE_NONE))
EricLew	0:80ee8f3b695e	1808	{
EricLew	0:80ee8f3b695e	1809	tmp_JSQR_ContextQueueBeingBuilt = ((sConfigInjected->InjectedNbrOfConversion - (uint32_t)1) \|
EricLew	0:80ee8f3b695e	1810	sConfigInjected->ExternalTrigInjecConv \|
EricLew	0:80ee8f3b695e	1811	sConfigInjected->ExternalTrigInjecConvEdge );
EricLew	0:80ee8f3b695e	1812	}
EricLew	0:80ee8f3b695e	1813	else
EricLew	0:80ee8f3b695e	1814	{
EricLew	0:80ee8f3b695e	1815	tmp_JSQR_ContextQueueBeingBuilt = ((sConfigInjected->InjectedNbrOfConversion - (uint32_t)1) );
EricLew	0:80ee8f3b695e	1816	}
EricLew	0:80ee8f3b695e	1817
EricLew	0:80ee8f3b695e	1818
EricLew	0:80ee8f3b695e	1819	} /* if (hadc->InjectionConfig.ChannelCount == 0) */
EricLew	0:80ee8f3b695e	1820
EricLew	0:80ee8f3b695e	1821
EricLew	0:80ee8f3b695e	1822	/* 2. Continue setting of context under definition with parameter */
EricLew	0:80ee8f3b695e	1823	/* related to each channel: channel rank sequence */
EricLew	0:80ee8f3b695e	1824	/* Clear the old JSQx bits for the selected rank */
EricLew	0:80ee8f3b695e	1825	tmp_JSQR_ContextQueueBeingBuilt &= ~ADC_JSQR_RK(ADC_SQR3_SQ10, sConfigInjected->InjectedRank);
EricLew	0:80ee8f3b695e	1826
EricLew	0:80ee8f3b695e	1827	/* Set the JSQx bits for the selected rank */
EricLew	0:80ee8f3b695e	1828	tmp_JSQR_ContextQueueBeingBuilt \|= ADC_JSQR_RK(sConfigInjected->InjectedChannel, sConfigInjected->InjectedRank);
EricLew	0:80ee8f3b695e	1829
EricLew	0:80ee8f3b695e	1830	/* Decrease channel count */
EricLew	0:80ee8f3b695e	1831	hadc->InjectionConfig.ChannelCount--;
EricLew	0:80ee8f3b695e	1832
EricLew	0:80ee8f3b695e	1833
EricLew	0:80ee8f3b695e	1834	/* 3. tmp_JSQR_ContextQueueBeingBuilt is fully built for this HAL_ADCEx_InjectedConfigChannel()
EricLew	0:80ee8f3b695e	1835	call, aggregate the setting to those already built during the previous
EricLew	0:80ee8f3b695e	1836	HAL_ADCEx_InjectedConfigChannel() calls (for the same context of course) */
EricLew	0:80ee8f3b695e	1837	hadc->InjectionConfig.ContextQueue \|= tmp_JSQR_ContextQueueBeingBuilt;
EricLew	0:80ee8f3b695e	1838
EricLew	0:80ee8f3b695e	1839	/* 4. End of context setting: if this is the last channel set, then write context
EricLew	0:80ee8f3b695e	1840	into register JSQR and make it enter into queue */
EricLew	0:80ee8f3b695e	1841	if (hadc->InjectionConfig.ChannelCount == 0)
EricLew	0:80ee8f3b695e	1842	{
EricLew	0:80ee8f3b695e	1843	MODIFY_REG(hadc->Instance->JSQR, ADC_JSQR_FIELDS, hadc->InjectionConfig.ContextQueue);
EricLew	0:80ee8f3b695e	1844	}
EricLew	0:80ee8f3b695e	1845
EricLew	0:80ee8f3b695e	1846
EricLew	0:80ee8f3b695e	1847	}
EricLew	0:80ee8f3b695e	1848
EricLew	0:80ee8f3b695e	1849	/* Parameters update conditioned to ADC state: */
EricLew	0:80ee8f3b695e	1850	/* Parameters that can be updated when ADC is disabled or enabled without */
EricLew	0:80ee8f3b695e	1851	/* conversion on going on injected group: */
EricLew	0:80ee8f3b695e	1852	/* - Injected context queue: Queue disable (active context is kept) or */
EricLew	0:80ee8f3b695e	1853	/* enable (context decremented, up to 2 contexts queued) */
EricLew	0:80ee8f3b695e	1854	/* - Injected discontinuous mode: can be enabled only if auto-injected */
EricLew	0:80ee8f3b695e	1855	/* mode is disabled. */
EricLew	0:80ee8f3b695e	1856	if (ADC_IS_CONVERSION_ONGOING_INJECTED(hadc) == RESET)
EricLew	0:80ee8f3b695e	1857	{
EricLew	0:80ee8f3b695e	1858
EricLew	0:80ee8f3b695e	1859	/* If auto-injected mode is disabled: no constraint */
EricLew	0:80ee8f3b695e	1860	if (sConfigInjected->AutoInjectedConv == DISABLE)
EricLew	0:80ee8f3b695e	1861	{
EricLew	0:80ee8f3b695e	1862	MODIFY_REG(hadc->Instance->CFGR, ADC_CFGR_JQM \| ADC_CFGR_JDISCEN,
EricLew	0:80ee8f3b695e	1863	ADC_CFGR_INJECT_CONTEXT_QUEUE(sConfigInjected->QueueInjectedContext) \|
EricLew	0:80ee8f3b695e	1864	ADC_CFGR_INJECT_DISCCONTINUOUS(sConfigInjected->InjectedDiscontinuousConvMode) );
EricLew	0:80ee8f3b695e	1865	}
EricLew	0:80ee8f3b695e	1866	/* If auto-injected mode is enabled: Injected discontinuous setting is */
EricLew	0:80ee8f3b695e	1867	/* discarded. */
EricLew	0:80ee8f3b695e	1868	else
EricLew	0:80ee8f3b695e	1869	{
EricLew	0:80ee8f3b695e	1870	MODIFY_REG(hadc->Instance->CFGR, ADC_CFGR_JQM \| ADC_CFGR_JDISCEN,
EricLew	0:80ee8f3b695e	1871	ADC_CFGR_INJECT_CONTEXT_QUEUE(sConfigInjected->QueueInjectedContext) );
EricLew	0:80ee8f3b695e	1872	}
EricLew	0:80ee8f3b695e	1873
EricLew	0:80ee8f3b695e	1874	}
EricLew	0:80ee8f3b695e	1875
EricLew	0:80ee8f3b695e	1876
EricLew	0:80ee8f3b695e	1877	/* Parameters update conditioned to ADC state: */
EricLew	0:80ee8f3b695e	1878	/* Parameters that can be updated when ADC is disabled or enabled without */
EricLew	0:80ee8f3b695e	1879	/* conversion on going on regular and injected groups: */
EricLew	0:80ee8f3b695e	1880	/* - Automatic injected conversion: can be enabled if injected group */
EricLew	0:80ee8f3b695e	1881	/* external triggers are disabled. */
EricLew	0:80ee8f3b695e	1882	/* - Channel sampling time */
EricLew	0:80ee8f3b695e	1883	/* - Channel offset */
EricLew	0:80ee8f3b695e	1884	if (ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED(hadc) == RESET)
EricLew	0:80ee8f3b695e	1885	{
EricLew	0:80ee8f3b695e	1886	/* If injected group external triggers are disabled (set to injected */
EricLew	0:80ee8f3b695e	1887	/* software start): no constraint */
EricLew	0:80ee8f3b695e	1888	if ((sConfigInjected->ExternalTrigInjecConv == ADC_INJECTED_SOFTWARE_START)
EricLew	0:80ee8f3b695e	1889	\|\| (sConfigInjected->ExternalTrigInjecConvEdge == ADC_EXTERNALTRIGINJECCONV_EDGE_NONE))
EricLew	0:80ee8f3b695e	1890	{
EricLew	0:80ee8f3b695e	1891	if (sConfigInjected->AutoInjectedConv == ENABLE)
EricLew	0:80ee8f3b695e	1892	{
EricLew	0:80ee8f3b695e	1893	SET_BIT(hadc->Instance->CFGR, ADC_CFGR_JAUTO);
EricLew	0:80ee8f3b695e	1894	}
EricLew	0:80ee8f3b695e	1895	else
EricLew	0:80ee8f3b695e	1896	{
EricLew	0:80ee8f3b695e	1897	CLEAR_BIT(hadc->Instance->CFGR, ADC_CFGR_JAUTO);
EricLew	0:80ee8f3b695e	1898	}
EricLew	0:80ee8f3b695e	1899	}
EricLew	0:80ee8f3b695e	1900	/* If Automatic injected conversion was intended to be set and could not */
EricLew	0:80ee8f3b695e	1901	/* due to injected group external triggers enabled, error is reported. */
EricLew	0:80ee8f3b695e	1902	else
EricLew	0:80ee8f3b695e	1903	{
EricLew	0:80ee8f3b695e	1904	if (sConfigInjected->AutoInjectedConv == ENABLE)
EricLew	0:80ee8f3b695e	1905	{
EricLew	0:80ee8f3b695e	1906	/* Update ADC state machine to error */
EricLew	0:80ee8f3b695e	1907	SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
EricLew	0:80ee8f3b695e	1908
EricLew	0:80ee8f3b695e	1909	tmp_status = HAL_ERROR;
EricLew	0:80ee8f3b695e	1910	}
EricLew	0:80ee8f3b695e	1911	else
EricLew	0:80ee8f3b695e	1912	{
EricLew	0:80ee8f3b695e	1913	CLEAR_BIT(hadc->Instance->CFGR, ADC_CFGR_JAUTO);
EricLew	0:80ee8f3b695e	1914	}
EricLew	0:80ee8f3b695e	1915	}
EricLew	0:80ee8f3b695e	1916
EricLew	0:80ee8f3b695e	1917
EricLew	0:80ee8f3b695e	1918
EricLew	0:80ee8f3b695e	1919	if (sConfigInjected->InjecOversamplingMode == ENABLE)
EricLew	0:80ee8f3b695e	1920	{
EricLew	0:80ee8f3b695e	1921	assert_param(IS_ADC_OVERSAMPLING_RATIO(sConfigInjected->InjecOversampling.Ratio));
EricLew	0:80ee8f3b695e	1922	assert_param(IS_ADC_RIGHT_BIT_SHIFT(sConfigInjected->InjecOversampling.RightBitShift));
EricLew	0:80ee8f3b695e	1923
EricLew	0:80ee8f3b695e	1924	/* JOVSE must be reset in case of triggered regular mode */
EricLew	0:80ee8f3b695e	1925	assert_param(!(READ_BIT(hadc->Instance->CFGR2, ADC_CFGR2_ROVSE\|ADC_CFGR2_TROVS) == (ADC_CFGR2_ROVSE\|ADC_CFGR2_TROVS)));
EricLew	0:80ee8f3b695e	1926
EricLew	0:80ee8f3b695e	1927	/* Configuration of Injected Oversampler: */
EricLew	0:80ee8f3b695e	1928	/* - Oversampling Ratio */
EricLew	0:80ee8f3b695e	1929	/* - Right bit shift */
EricLew	0:80ee8f3b695e	1930
EricLew	0:80ee8f3b695e	1931	/* Enable OverSampling mode */
EricLew	0:80ee8f3b695e	1932
EricLew	0:80ee8f3b695e	1933	MODIFY_REG(hadc->Instance->CFGR2, ADC_CFGR2_INJ_FIELDS,
EricLew	0:80ee8f3b695e	1934	ADC_CFGR2_JOVSE \|
EricLew	0:80ee8f3b695e	1935	sConfigInjected->InjecOversampling.Ratio \|
EricLew	0:80ee8f3b695e	1936	sConfigInjected->InjecOversampling.RightBitShift );
EricLew	0:80ee8f3b695e	1937	}
EricLew	0:80ee8f3b695e	1938	else
EricLew	0:80ee8f3b695e	1939	{
EricLew	0:80ee8f3b695e	1940	/* Disable Regular OverSampling */
EricLew	0:80ee8f3b695e	1941	CLEAR_BIT( hadc->Instance->CFGR2, ADC_CFGR2_JOVSE);
EricLew	0:80ee8f3b695e	1942	}
EricLew	0:80ee8f3b695e	1943
EricLew	0:80ee8f3b695e	1944
EricLew	0:80ee8f3b695e	1945	/* Sampling time configuration of the selected channel */
EricLew	0:80ee8f3b695e	1946	/* if ADC_Channel_10 ... ADC_Channel_18 is selected */
EricLew	0:80ee8f3b695e	1947	if (sConfigInjected->InjectedChannel >= ADC_CHANNEL_10)
EricLew	0:80ee8f3b695e	1948	{
EricLew	0:80ee8f3b695e	1949	/* Clear the old sample time and set the new one */
EricLew	0:80ee8f3b695e	1950	MODIFY_REG(hadc->Instance->SMPR2,
EricLew	0:80ee8f3b695e	1951	ADC_SMPR2(ADC_SMPR2_SMP10, sConfigInjected->InjectedChannel),
EricLew	0:80ee8f3b695e	1952	ADC_SMPR2(sConfigInjected->InjectedSamplingTime, sConfigInjected->InjectedChannel));
EricLew	0:80ee8f3b695e	1953	}
EricLew	0:80ee8f3b695e	1954	else /* if ADC_Channel_0 ... ADC_Channel_9 is selected */
EricLew	0:80ee8f3b695e	1955	{
EricLew	0:80ee8f3b695e	1956	/* Clear the old sample time and set the new one */
EricLew	0:80ee8f3b695e	1957	MODIFY_REG(hadc->Instance->SMPR1,
EricLew	0:80ee8f3b695e	1958	ADC_SMPR1(ADC_SMPR1_SMP0, sConfigInjected->InjectedChannel),
EricLew	0:80ee8f3b695e	1959	ADC_SMPR1(sConfigInjected->InjectedSamplingTime, sConfigInjected->InjectedChannel));
EricLew	0:80ee8f3b695e	1960	}
EricLew	0:80ee8f3b695e	1961
EricLew	0:80ee8f3b695e	1962
EricLew	0:80ee8f3b695e	1963	/* Configure the offset: offset enable/disable, channel, offset value */
EricLew	0:80ee8f3b695e	1964
EricLew	0:80ee8f3b695e	1965	/* Shift the offset with respect to the selected ADC resolution. */
EricLew	0:80ee8f3b695e	1966	/* Offset has to be left-aligned on bit 11, the LSB (right bits) are set to 0 */
EricLew	0:80ee8f3b695e	1967	tmpOffsetShifted = ADC_OFFSET_SHIFT_RESOLUTION(hadc, sConfigInjected->InjectedOffset);
EricLew	0:80ee8f3b695e	1968
EricLew	0:80ee8f3b695e	1969	switch (sConfigInjected->InjectedOffsetNumber)
EricLew	0:80ee8f3b695e	1970	{
EricLew	0:80ee8f3b695e	1971	case ADC_OFFSET_1:
EricLew	0:80ee8f3b695e	1972	/* Configure offset register 1: */
EricLew	0:80ee8f3b695e	1973	/* - Enable offset */
EricLew	0:80ee8f3b695e	1974	/* - Set channel number */
EricLew	0:80ee8f3b695e	1975	/* - Set offset value */
EricLew	0:80ee8f3b695e	1976	MODIFY_REG(hadc->Instance->OFR1,
EricLew	0:80ee8f3b695e	1977	ADC_OFR1_OFFSET1 \| ADC_OFR1_OFFSET1_CH \| ADC_OFR1_OFFSET1_EN,
EricLew	0:80ee8f3b695e	1978	ADC_OFR1_OFFSET1_EN \| ADC_OFR_CHANNEL(sConfigInjected->InjectedChannel) \| tmpOffsetShifted);
EricLew	0:80ee8f3b695e	1979	break;
EricLew	0:80ee8f3b695e	1980
EricLew	0:80ee8f3b695e	1981	case ADC_OFFSET_2:
EricLew	0:80ee8f3b695e	1982	/* Configure offset register 2: */
EricLew	0:80ee8f3b695e	1983	/* - Enable offset */
EricLew	0:80ee8f3b695e	1984	/* - Set channel number */
EricLew	0:80ee8f3b695e	1985	/* - Set offset value */
EricLew	0:80ee8f3b695e	1986	MODIFY_REG(hadc->Instance->OFR2,
EricLew	0:80ee8f3b695e	1987	ADC_OFR2_OFFSET2 \| ADC_OFR2_OFFSET2_CH \| ADC_OFR2_OFFSET2_EN,
EricLew	0:80ee8f3b695e	1988	ADC_OFR2_OFFSET2_EN \| ADC_OFR_CHANNEL(sConfigInjected->InjectedChannel) \| tmpOffsetShifted);
EricLew	0:80ee8f3b695e	1989	break;
EricLew	0:80ee8f3b695e	1990
EricLew	0:80ee8f3b695e	1991	case ADC_OFFSET_3:
EricLew	0:80ee8f3b695e	1992	/* Configure offset register 3: */
EricLew	0:80ee8f3b695e	1993	/* - Enable offset */
EricLew	0:80ee8f3b695e	1994	/* - Set channel number */
EricLew	0:80ee8f3b695e	1995	/* - Set offset value */
EricLew	0:80ee8f3b695e	1996	MODIFY_REG(hadc->Instance->OFR3,
EricLew	0:80ee8f3b695e	1997	ADC_OFR3_OFFSET3 \| ADC_OFR3_OFFSET3_CH \| ADC_OFR3_OFFSET3_EN,
EricLew	0:80ee8f3b695e	1998	ADC_OFR3_OFFSET3_EN \| ADC_OFR_CHANNEL(sConfigInjected->InjectedChannel) \| tmpOffsetShifted);
EricLew	0:80ee8f3b695e	1999	break;
EricLew	0:80ee8f3b695e	2000
EricLew	0:80ee8f3b695e	2001	case ADC_OFFSET_4:
EricLew	0:80ee8f3b695e	2002	/* Configure offset register 1: */
EricLew	0:80ee8f3b695e	2003	/* - Enable offset */
EricLew	0:80ee8f3b695e	2004	/* - Set channel number */
EricLew	0:80ee8f3b695e	2005	/* - Set offset value */
EricLew	0:80ee8f3b695e	2006	MODIFY_REG(hadc->Instance->OFR4,
EricLew	0:80ee8f3b695e	2007	ADC_OFR4_OFFSET4 \| ADC_OFR4_OFFSET4_CH \| ADC_OFR4_OFFSET4_EN,
EricLew	0:80ee8f3b695e	2008	ADC_OFR4_OFFSET4_EN \| ADC_OFR_CHANNEL(sConfigInjected->InjectedChannel) \| tmpOffsetShifted);
EricLew	0:80ee8f3b695e	2009	break;
EricLew	0:80ee8f3b695e	2010
EricLew	0:80ee8f3b695e	2011	/* Case ADC_OFFSET_NONE */
EricLew	0:80ee8f3b695e	2012	default :
EricLew	0:80ee8f3b695e	2013	/* Scan OFR1, OFR2, OFR3, OFR4 to check if the selected channel is enabled. If this is the case, offset OFRx is disabled. */
EricLew	0:80ee8f3b695e	2014	if (((hadc->Instance->OFR1) & ADC_OFR1_OFFSET1_CH) == ADC_OFR_CHANNEL(sConfigInjected->InjectedChannel))
EricLew	0:80ee8f3b695e	2015	{
EricLew	0:80ee8f3b695e	2016	/* Disable offset OFR1*/
EricLew	0:80ee8f3b695e	2017	CLEAR_BIT(hadc->Instance->OFR1, ADC_OFR1_OFFSET1_EN);
EricLew	0:80ee8f3b695e	2018	}
EricLew	0:80ee8f3b695e	2019	if (((hadc->Instance->OFR2) & ADC_OFR2_OFFSET2_CH) == ADC_OFR_CHANNEL(sConfigInjected->InjectedChannel))
EricLew	0:80ee8f3b695e	2020	{
EricLew	0:80ee8f3b695e	2021	/* Disable offset OFR2*/
EricLew	0:80ee8f3b695e	2022	CLEAR_BIT(hadc->Instance->OFR2, ADC_OFR2_OFFSET2_EN);
EricLew	0:80ee8f3b695e	2023	}
EricLew	0:80ee8f3b695e	2024	if (((hadc->Instance->OFR3) & ADC_OFR3_OFFSET3_CH) == ADC_OFR_CHANNEL(sConfigInjected->InjectedChannel))
EricLew	0:80ee8f3b695e	2025	{
EricLew	0:80ee8f3b695e	2026	/* Disable offset OFR3*/
EricLew	0:80ee8f3b695e	2027	CLEAR_BIT(hadc->Instance->OFR3, ADC_OFR3_OFFSET3_EN);
EricLew	0:80ee8f3b695e	2028	}
EricLew	0:80ee8f3b695e	2029	if (((hadc->Instance->OFR4) & ADC_OFR4_OFFSET4_CH) == ADC_OFR_CHANNEL(sConfigInjected->InjectedChannel))
EricLew	0:80ee8f3b695e	2030	{
EricLew	0:80ee8f3b695e	2031	/* Disable offset OFR4*/
EricLew	0:80ee8f3b695e	2032	CLEAR_BIT(hadc->Instance->OFR4, ADC_OFR4_OFFSET4_EN);
EricLew	0:80ee8f3b695e	2033	}
EricLew	0:80ee8f3b695e	2034	break;
EricLew	0:80ee8f3b695e	2035	}
EricLew	0:80ee8f3b695e	2036
EricLew	0:80ee8f3b695e	2037	} /* if (ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED(hadc) == RESET) */
EricLew	0:80ee8f3b695e	2038
EricLew	0:80ee8f3b695e	2039
EricLew	0:80ee8f3b695e	2040	/* Parameters update conditioned to ADC state: */
EricLew	0:80ee8f3b695e	2041	/* Parameters that can be updated only when ADC is disabled: */
EricLew	0:80ee8f3b695e	2042	/* - Single or differential mode */
EricLew	0:80ee8f3b695e	2043	/* - Internal measurement channels: Vbat/VrefInt/TempSensor */
EricLew	0:80ee8f3b695e	2044	if (ADC_IS_ENABLE(hadc) == RESET)
EricLew	0:80ee8f3b695e	2045	{
EricLew	0:80ee8f3b695e	2046	/* Configuration of differential mode */
EricLew	0:80ee8f3b695e	2047	if (sConfigInjected->InjectedSingleDiff != ADC_DIFFERENTIAL_ENDED)
EricLew	0:80ee8f3b695e	2048	{
EricLew	0:80ee8f3b695e	2049	/* Disable differential mode (default mode: single-ended) */
EricLew	0:80ee8f3b695e	2050	CLEAR_BIT(hadc->Instance->DIFSEL, ADC_DIFSEL_CHANNEL(sConfigInjected->InjectedChannel));
EricLew	0:80ee8f3b695e	2051	}
EricLew	0:80ee8f3b695e	2052	else
EricLew	0:80ee8f3b695e	2053	{
EricLew	0:80ee8f3b695e	2054	/* Enable differential mode */
EricLew	0:80ee8f3b695e	2055	SET_BIT(hadc->Instance->DIFSEL, ADC_DIFSEL_CHANNEL(sConfigInjected->InjectedChannel));
EricLew	0:80ee8f3b695e	2056
EricLew	0:80ee8f3b695e	2057	/* Sampling time configuration of channel ADC_IN+1 (negative input).
EricLew	0:80ee8f3b695e	2058	Starting from channel 9, SMPR2 register must be configured. */
EricLew	0:80ee8f3b695e	2059	if (sConfigInjected->InjectedChannel >= ADC_CHANNEL_9)
EricLew	0:80ee8f3b695e	2060	{
EricLew	0:80ee8f3b695e	2061	/* Clear the old sample time and set the new one */
EricLew	0:80ee8f3b695e	2062	MODIFY_REG(hadc->Instance->SMPR2,
EricLew	0:80ee8f3b695e	2063	ADC_SMPR2(ADC_SMPR2_SMP10, sConfigInjected->InjectedChannel +1),
EricLew	0:80ee8f3b695e	2064	ADC_SMPR2(sConfigInjected->InjectedSamplingTime, sConfigInjected->InjectedChannel +1));
EricLew	0:80ee8f3b695e	2065	}
EricLew	0:80ee8f3b695e	2066	else /* For channels 0 to 8 */
EricLew	0:80ee8f3b695e	2067	{
EricLew	0:80ee8f3b695e	2068	/* Clear the old sample time and set the new one */
EricLew	0:80ee8f3b695e	2069	MODIFY_REG(hadc->Instance->SMPR1,
EricLew	0:80ee8f3b695e	2070	ADC_SMPR1(ADC_SMPR1_SMP0, sConfigInjected->InjectedChannel +1),
EricLew	0:80ee8f3b695e	2071	ADC_SMPR1(sConfigInjected->InjectedSamplingTime, sConfigInjected->InjectedChannel +1));
EricLew	0:80ee8f3b695e	2072	}
EricLew	0:80ee8f3b695e	2073	}
EricLew	0:80ee8f3b695e	2074
EricLew	0:80ee8f3b695e	2075
EricLew	0:80ee8f3b695e	2076	/* Management of internal measurement channels: Vbat/VrefInt/TempSensor */
EricLew	0:80ee8f3b695e	2077	/* internal measurement paths enable: If internal channel selected, */
EricLew	0:80ee8f3b695e	2078	/* enable dedicated internal buffers and path. */
EricLew	0:80ee8f3b695e	2079	/* Note: these internal measurement paths can be disabled using */
EricLew	0:80ee8f3b695e	2080	/* HAL_ADC_DeInit(). */
EricLew	0:80ee8f3b695e	2081
EricLew	0:80ee8f3b695e	2082	/* Configuration of common ADC parameters */
EricLew	0:80ee8f3b695e	2083
EricLew	0:80ee8f3b695e	2084	tmpADC_Common = ADC_COMMON_REGISTER(hadc);
EricLew	0:80ee8f3b695e	2085
EricLew	0:80ee8f3b695e	2086	/* If the requested internal measurement path has already been enabled, */
EricLew	0:80ee8f3b695e	2087	/* bypass the configuration processing. */
EricLew	0:80ee8f3b695e	2088	if (( (sConfigInjected->InjectedChannel == ADC_CHANNEL_TEMPSENSOR) &&
EricLew	0:80ee8f3b695e	2089	(HAL_IS_BIT_CLR(tmpADC_Common->CCR, ADC_CCR_TSEN)) ) \|\|
EricLew	0:80ee8f3b695e	2090	( (sConfigInjected->InjectedChannel == ADC_CHANNEL_VBAT) &&
EricLew	0:80ee8f3b695e	2091	(HAL_IS_BIT_CLR(tmpADC_Common->CCR, ADC_CCR_VBATEN)) ) \|\|
EricLew	0:80ee8f3b695e	2092	( (sConfigInjected->InjectedChannel == ADC_CHANNEL_VREFINT) &&
EricLew	0:80ee8f3b695e	2093	(HAL_IS_BIT_CLR(tmpADC_Common->CCR, ADC_CCR_VREFEN)))
EricLew	0:80ee8f3b695e	2094	)
EricLew	0:80ee8f3b695e	2095	{
EricLew	0:80ee8f3b695e	2096	/* Configuration of common ADC parameters (continuation) */
EricLew	0:80ee8f3b695e	2097	/* Software is allowed to change common parameters only when all ADCs */
EricLew	0:80ee8f3b695e	2098	/* of the common group are disabled. */
EricLew	0:80ee8f3b695e	2099	if ((ADC_IS_ENABLE(hadc) == RESET) &&
EricLew	0:80ee8f3b695e	2100	(ADC_ANY_OTHER_ENABLED(hadc) == RESET) )
EricLew	0:80ee8f3b695e	2101	{
EricLew	0:80ee8f3b695e	2102	if (sConfigInjected->InjectedChannel == ADC_CHANNEL_TEMPSENSOR)
EricLew	0:80ee8f3b695e	2103	{
EricLew	0:80ee8f3b695e	2104	if (ADC_TEMPERATURE_SENSOR_INSTANCE(hadc))
EricLew	0:80ee8f3b695e	2105	{
EricLew	0:80ee8f3b695e	2106	SET_BIT(tmpADC_Common->CCR, ADC_CCR_TSEN);
EricLew	0:80ee8f3b695e	2107
EricLew	0:80ee8f3b695e	2108	/* Delay for temperature sensor stabilization time */
EricLew	0:80ee8f3b695e	2109	/* Compute number of CPU cycles to wait for */
EricLew	0:80ee8f3b695e	2110	wait_loop_index = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000));
EricLew	0:80ee8f3b695e	2111	while(wait_loop_index != 0)
EricLew	0:80ee8f3b695e	2112	{
EricLew	0:80ee8f3b695e	2113	wait_loop_index--;
EricLew	0:80ee8f3b695e	2114	}
EricLew	0:80ee8f3b695e	2115	}
EricLew	0:80ee8f3b695e	2116	}
EricLew	0:80ee8f3b695e	2117	else if (sConfigInjected->InjectedChannel == ADC_CHANNEL_VBAT)
EricLew	0:80ee8f3b695e	2118	{
EricLew	0:80ee8f3b695e	2119	if (ADC_BATTERY_VOLTAGE_INSTANCE(hadc))
EricLew	0:80ee8f3b695e	2120	{
EricLew	0:80ee8f3b695e	2121	SET_BIT(tmpADC_Common->CCR, ADC_CCR_VBATEN);
EricLew	0:80ee8f3b695e	2122	}
EricLew	0:80ee8f3b695e	2123	}
EricLew	0:80ee8f3b695e	2124	else if (sConfigInjected->InjectedChannel == ADC_CHANNEL_VREFINT)
EricLew	0:80ee8f3b695e	2125	{
EricLew	0:80ee8f3b695e	2126	if (ADC_VREFINT_INSTANCE(hadc))
EricLew	0:80ee8f3b695e	2127	{
EricLew	0:80ee8f3b695e	2128	SET_BIT(tmpADC_Common->CCR, ADC_CCR_VREFEN);
EricLew	0:80ee8f3b695e	2129	}
EricLew	0:80ee8f3b695e	2130	}
EricLew	0:80ee8f3b695e	2131	}
EricLew	0:80ee8f3b695e	2132	/* If the requested internal measurement path has already been enabled */
EricLew	0:80ee8f3b695e	2133	/* and other ADC of the common group are enabled, internal */
EricLew	0:80ee8f3b695e	2134	/* measurement paths cannot be enabled. */
EricLew	0:80ee8f3b695e	2135	else
EricLew	0:80ee8f3b695e	2136	{
EricLew	0:80ee8f3b695e	2137	/* Update ADC state machine to error */
EricLew	0:80ee8f3b695e	2138	SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
EricLew	0:80ee8f3b695e	2139
EricLew	0:80ee8f3b695e	2140	tmp_status = HAL_ERROR;
EricLew	0:80ee8f3b695e	2141	}
EricLew	0:80ee8f3b695e	2142	}
EricLew	0:80ee8f3b695e	2143
EricLew	0:80ee8f3b695e	2144	} /* if (ADC_IS_ENABLE(hadc) == RESET) */
EricLew	0:80ee8f3b695e	2145
EricLew	0:80ee8f3b695e	2146	/* Process unlocked */
EricLew	0:80ee8f3b695e	2147	__HAL_UNLOCK(hadc);
EricLew	0:80ee8f3b695e	2148
EricLew	0:80ee8f3b695e	2149	/* Return function status */
EricLew	0:80ee8f3b695e	2150	return tmp_status;
EricLew	0:80ee8f3b695e	2151	}
EricLew	0:80ee8f3b695e	2152
EricLew	0:80ee8f3b695e	2153
EricLew	0:80ee8f3b695e	2154
EricLew	0:80ee8f3b695e	2155
EricLew	0:80ee8f3b695e	2156
EricLew	0:80ee8f3b695e	2157	/**
EricLew	0:80ee8f3b695e	2158	* @brief Enable ADC multimode and configure multimode parameters
EricLew	0:80ee8f3b695e	2159	* @note Possibility to update parameters on the fly:
EricLew	0:80ee8f3b695e	2160	* This function initializes multimode parameters, following
EricLew	0:80ee8f3b695e	2161	* calls to this function can be used to reconfigure some parameters
EricLew	0:80ee8f3b695e	2162	* of structure "ADC_MultiModeTypeDef" on the fly, without resetting
EricLew	0:80ee8f3b695e	2163	* the ADCs.
EricLew	0:80ee8f3b695e	2164	* The setting of these parameters is conditioned to ADC state.
EricLew	0:80ee8f3b695e	2165	* For parameters constraints, see comments of structure
EricLew	0:80ee8f3b695e	2166	* "ADC_MultiModeTypeDef".
EricLew	0:80ee8f3b695e	2167	* @note To move back configuration from multimode to single mode, ADC must
EricLew	0:80ee8f3b695e	2168	* be reset (using function HAL_ADC_Init() ).
EricLew	0:80ee8f3b695e	2169	* @param hadc: Master ADC handle
EricLew	0:80ee8f3b695e	2170	* @param multimode : Structure of ADC multimode configuration
EricLew	0:80ee8f3b695e	2171	* @retval HAL status
EricLew	0:80ee8f3b695e	2172	*/
EricLew	0:80ee8f3b695e	2173	HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef* hadc, ADC_MultiModeTypeDef* multimode)
EricLew	0:80ee8f3b695e	2174	{
EricLew	0:80ee8f3b695e	2175	HAL_StatusTypeDef tmp_status = HAL_OK;
EricLew	0:80ee8f3b695e	2176	ADC_Common_TypeDef *tmpADC_Common;
EricLew	0:80ee8f3b695e	2177	ADC_HandleTypeDef tmphadcSlave;
EricLew	0:80ee8f3b695e	2178
EricLew	0:80ee8f3b695e	2179	/* Check the parameters */
EricLew	0:80ee8f3b695e	2180	assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance));
EricLew	0:80ee8f3b695e	2181	assert_param(IS_ADC_MULTIMODE(multimode->Mode));
EricLew	0:80ee8f3b695e	2182	assert_param(IS_ADC_DMA_ACCESS_MULTIMODE(multimode->DMAAccessMode));
EricLew	0:80ee8f3b695e	2183	assert_param(IS_ADC_SAMPLING_DELAY(multimode->TwoSamplingDelay));
EricLew	0:80ee8f3b695e	2184
EricLew	0:80ee8f3b695e	2185	/* Process locked */
EricLew	0:80ee8f3b695e	2186	__HAL_LOCK(hadc);
EricLew	0:80ee8f3b695e	2187
EricLew	0:80ee8f3b695e	2188	ADC_MULTI_SLAVE(hadc, &tmphadcSlave);
EricLew	0:80ee8f3b695e	2189
EricLew	0:80ee8f3b695e	2190	/* Parameters update conditioned to ADC state: */
EricLew	0:80ee8f3b695e	2191	/* Parameters that can be updated when ADC is disabled or enabled without */
EricLew	0:80ee8f3b695e	2192	/* conversion on going on regular group: */
EricLew	0:80ee8f3b695e	2193	/* - Multimode DMA configuration */
EricLew	0:80ee8f3b695e	2194	/* - Multimode DMA mode */
EricLew	0:80ee8f3b695e	2195	if ( (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
EricLew	0:80ee8f3b695e	2196	&& (ADC_IS_CONVERSION_ONGOING_REGULAR(&tmphadcSlave) == RESET) )
EricLew	0:80ee8f3b695e	2197	{
EricLew	0:80ee8f3b695e	2198
EricLew	0:80ee8f3b695e	2199	/* Pointer to the common control register */
EricLew	0:80ee8f3b695e	2200	tmpADC_Common = ADC_COMMON_REGISTER(hadc);
EricLew	0:80ee8f3b695e	2201
EricLew	0:80ee8f3b695e	2202	MODIFY_REG(tmpADC_Common->CCR, ADC_CCR_MDMA \| ADC_CCR_DMACFG,
EricLew	0:80ee8f3b695e	2203	multimode->DMAAccessMode \|
EricLew	0:80ee8f3b695e	2204	ADC_CCR_MULTI_DMACONTREQ(hadc->Init.DMAContinuousRequests));
EricLew	0:80ee8f3b695e	2205
EricLew	0:80ee8f3b695e	2206	/* Parameters that can be updated only when ADC is disabled: */
EricLew	0:80ee8f3b695e	2207	/* - Multimode mode selection */
EricLew	0:80ee8f3b695e	2208	/* - Multimode delay */
EricLew	0:80ee8f3b695e	2209	if ((ADC_IS_ENABLE(hadc) == RESET) &&
EricLew	0:80ee8f3b695e	2210	(ADC_IS_ENABLE(&tmphadcSlave) == RESET) )
EricLew	0:80ee8f3b695e	2211	{
EricLew	0:80ee8f3b695e	2212	/* Configuration of ADC common group ADC1&ADC2 */
EricLew	0:80ee8f3b695e	2213	/* - set the selected multimode */
EricLew	0:80ee8f3b695e	2214	/* - Set delay between two sampling phases */
EricLew	0:80ee8f3b695e	2215	/* Note: Delay range depends on selected resolution: */
EricLew	0:80ee8f3b695e	2216	/* from 1 to 12 clock cycles for 12 bits */
EricLew	0:80ee8f3b695e	2217	/* from 1 to 10 clock cycles for 10 bits, */
EricLew	0:80ee8f3b695e	2218	/* from 1 to 8 clock cycles for 8 bits */
EricLew	0:80ee8f3b695e	2219	/* from 1 to 6 clock cycles for 6 bits */
EricLew	0:80ee8f3b695e	2220	/* If a higher delay is selected, it will be clipped to maximum delay */
EricLew	0:80ee8f3b695e	2221	/* range */
EricLew	0:80ee8f3b695e	2222
EricLew	0:80ee8f3b695e	2223	MODIFY_REG(tmpADC_Common->CCR, ADC_CCR_DUAL \| ADC_CCR_DELAY,
EricLew	0:80ee8f3b695e	2224	multimode->Mode \| multimode->TwoSamplingDelay );
EricLew	0:80ee8f3b695e	2225	}
EricLew	0:80ee8f3b695e	2226
EricLew	0:80ee8f3b695e	2227
EricLew	0:80ee8f3b695e	2228	}
EricLew	0:80ee8f3b695e	2229	/* If one of the ADC sharing the same common group is enabled, no update */
EricLew	0:80ee8f3b695e	2230	/* could be done on neither of the multimode structure parameters. */
EricLew	0:80ee8f3b695e	2231	else
EricLew	0:80ee8f3b695e	2232	{
EricLew	0:80ee8f3b695e	2233	/* Update ADC state machine to error */
EricLew	0:80ee8f3b695e	2234	SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
EricLew	0:80ee8f3b695e	2235
EricLew	0:80ee8f3b695e	2236	tmp_status = HAL_ERROR;
EricLew	0:80ee8f3b695e	2237	}
EricLew	0:80ee8f3b695e	2238
EricLew	0:80ee8f3b695e	2239
EricLew	0:80ee8f3b695e	2240	/* Process unlocked */
EricLew	0:80ee8f3b695e	2241	__HAL_UNLOCK(hadc);
EricLew	0:80ee8f3b695e	2242
EricLew	0:80ee8f3b695e	2243	/* Return function status */
EricLew	0:80ee8f3b695e	2244	return tmp_status;
EricLew	0:80ee8f3b695e	2245	}
EricLew	0:80ee8f3b695e	2246
EricLew	0:80ee8f3b695e	2247
EricLew	0:80ee8f3b695e	2248
EricLew	0:80ee8f3b695e	2249	/**
EricLew	0:80ee8f3b695e	2250	* @brief Enable Injected Queue
EricLew	0:80ee8f3b695e	2251	* @note This function resets CFGR register JQDIS bit in order to enable the
EricLew	0:80ee8f3b695e	2252	* Injected Queue. JQDIS can be written only when ADSTART and JDSTART
EricLew	0:80ee8f3b695e	2253	* are both equal to 0 to ensure that no regular nor injected
EricLew	0:80ee8f3b695e	2254	* conversion is ongoing.
EricLew	0:80ee8f3b695e	2255	* @param hadc: ADC handle
EricLew	0:80ee8f3b695e	2256	* @retval HAL status
EricLew	0:80ee8f3b695e	2257	*/
EricLew	0:80ee8f3b695e	2258	HAL_StatusTypeDef HAL_ADCEx_EnableInjectedQueue(ADC_HandleTypeDef* hadc)
EricLew	0:80ee8f3b695e	2259	{
EricLew	0:80ee8f3b695e	2260
EricLew	0:80ee8f3b695e	2261	/* Parameter can be set only if no conversion is on-going */
EricLew	0:80ee8f3b695e	2262	if (ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED(hadc) == RESET)
EricLew	0:80ee8f3b695e	2263	{
EricLew	0:80ee8f3b695e	2264	CLEAR_BIT(hadc->Instance->CFGR, ADC_CFGR_JQDIS);
EricLew	0:80ee8f3b695e	2265
EricLew	0:80ee8f3b695e	2266	/* Update state, clear previous result related to injected queue overflow */
EricLew	0:80ee8f3b695e	2267	CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_JQOVF);
EricLew	0:80ee8f3b695e	2268
EricLew	0:80ee8f3b695e	2269	return HAL_OK;
EricLew	0:80ee8f3b695e	2270	}
EricLew	0:80ee8f3b695e	2271	else
EricLew	0:80ee8f3b695e	2272	{
EricLew	0:80ee8f3b695e	2273	return HAL_ERROR;
EricLew	0:80ee8f3b695e	2274	}
EricLew	0:80ee8f3b695e	2275
EricLew	0:80ee8f3b695e	2276	}
EricLew	0:80ee8f3b695e	2277
EricLew	0:80ee8f3b695e	2278	/**
EricLew	0:80ee8f3b695e	2279	* @brief Disable Injected Queue
EricLew	0:80ee8f3b695e	2280	* @note This function sets CFGR register JQDIS bit in order to disable the
EricLew	0:80ee8f3b695e	2281	* Injected Queue. JQDIS can be written only when ADSTART and JDSTART
EricLew	0:80ee8f3b695e	2282	* are both equal to 0 to ensure that no regular nor injected
EricLew	0:80ee8f3b695e	2283	* conversion is ongoing.
EricLew	0:80ee8f3b695e	2284	* @param hadc: ADC handle
EricLew	0:80ee8f3b695e	2285	* @retval HAL status
EricLew	0:80ee8f3b695e	2286	*/
EricLew	0:80ee8f3b695e	2287	HAL_StatusTypeDef HAL_ADCEx_DisableInjectedQueue(ADC_HandleTypeDef* hadc)
EricLew	0:80ee8f3b695e	2288	{
EricLew	0:80ee8f3b695e	2289
EricLew	0:80ee8f3b695e	2290	/* Parameter can be set only if no conversion is on-going */
EricLew	0:80ee8f3b695e	2291	if (ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED(hadc) == RESET)
EricLew	0:80ee8f3b695e	2292	{
EricLew	0:80ee8f3b695e	2293	SET_BIT(hadc->Instance->CFGR, ADC_CFGR_JQDIS);
EricLew	0:80ee8f3b695e	2294	return HAL_OK;
EricLew	0:80ee8f3b695e	2295	}
EricLew	0:80ee8f3b695e	2296	else
EricLew	0:80ee8f3b695e	2297	{
EricLew	0:80ee8f3b695e	2298	return HAL_ERROR;
EricLew	0:80ee8f3b695e	2299	}
EricLew	0:80ee8f3b695e	2300
EricLew	0:80ee8f3b695e	2301	}
EricLew	0:80ee8f3b695e	2302
EricLew	0:80ee8f3b695e	2303
EricLew	0:80ee8f3b695e	2304	/**
EricLew	0:80ee8f3b695e	2305	* @brief Disable ADC voltage regulator.
EricLew	0:80ee8f3b695e	2306	* @note Disabling voltage regulator allows to save power. This operation can
EricLew	0:80ee8f3b695e	2307	* be carried out only when ADC is disabled.
EricLew	0:80ee8f3b695e	2308	* @note To enable again the voltage regulator, the user is expected to
EricLew	0:80ee8f3b695e	2309	* resort to HAL_ADC_Init() API.
EricLew	0:80ee8f3b695e	2310	* @param hadc: ADC handle
EricLew	0:80ee8f3b695e	2311	* @retval HAL status
EricLew	0:80ee8f3b695e	2312	*/
EricLew	0:80ee8f3b695e	2313	HAL_StatusTypeDef HAL_ADCEx_DisableVoltageRegulator(ADC_HandleTypeDef* hadc)
EricLew	0:80ee8f3b695e	2314	{
EricLew	0:80ee8f3b695e	2315
EricLew	0:80ee8f3b695e	2316	/* ADVREGEN can be written only when the ADC is disabled */
EricLew	0:80ee8f3b695e	2317	if (ADC_IS_ENABLE(hadc) == RESET)
EricLew	0:80ee8f3b695e	2318	{
EricLew	0:80ee8f3b695e	2319	CLEAR_BIT(hadc->Instance->CR, ADC_CR_ADVREGEN);
EricLew	0:80ee8f3b695e	2320	return HAL_OK;
EricLew	0:80ee8f3b695e	2321	}
EricLew	0:80ee8f3b695e	2322	else
EricLew	0:80ee8f3b695e	2323	{
EricLew	0:80ee8f3b695e	2324	return HAL_ERROR;
EricLew	0:80ee8f3b695e	2325	}
EricLew	0:80ee8f3b695e	2326	}
EricLew	0:80ee8f3b695e	2327
EricLew	0:80ee8f3b695e	2328	/**
EricLew	0:80ee8f3b695e	2329	* @brief Enter ADC deep-power-down mode
EricLew	0:80ee8f3b695e	2330	* @note This mode is achieved in setting DEEPPWD bit and allows to save power
EricLew	0:80ee8f3b695e	2331	* in reducing leakage currents. It is particularly interesting before
EricLew	0:80ee8f3b695e	2332	* entering STOP1 or STOP2 modes.
EricLew	0:80ee8f3b695e	2333	* @note Setting DEEPPWD automatically clears ADVREGEN bit and disables the
EricLew	0:80ee8f3b695e	2334	* ADC voltage regulator. This means that this API encompasses
EricLew	0:80ee8f3b695e	2335	* HAL_ADCEx_DisableVoltageRegulator(). Additionally, the internal
EricLew	0:80ee8f3b695e	2336	* calibration is lost.
EricLew	0:80ee8f3b695e	2337	* @note To exit the ADC deep-power-down mode, the user is expected to
EricLew	0:80ee8f3b695e	2338	* resort to HAL_ADC_Init() API as well as to relaunch a calibration
EricLew	0:80ee8f3b695e	2339	* with HAL_ADCEx_Calibration_Start() API or to re-apply a previously
EricLew	0:80ee8f3b695e	2340	* saved calibration factor.
EricLew	0:80ee8f3b695e	2341	* @param hadc: ADC handle
EricLew	0:80ee8f3b695e	2342	* @retval HAL status
EricLew	0:80ee8f3b695e	2343	*/
EricLew	0:80ee8f3b695e	2344	HAL_StatusTypeDef HAL_ADCEx_EnterADCDeepPowerDownMode(ADC_HandleTypeDef* hadc)
EricLew	0:80ee8f3b695e	2345	{
EricLew	0:80ee8f3b695e	2346
EricLew	0:80ee8f3b695e	2347	/* DEEPPWD can be written only when the ADC is disabled */
EricLew	0:80ee8f3b695e	2348	if (ADC_IS_ENABLE(hadc) == RESET)
EricLew	0:80ee8f3b695e	2349	{
EricLew	0:80ee8f3b695e	2350	SET_BIT(hadc->Instance->CR, ADC_CR_DEEPPWD);
EricLew	0:80ee8f3b695e	2351	return HAL_OK;
EricLew	0:80ee8f3b695e	2352	}
EricLew	0:80ee8f3b695e	2353	else
EricLew	0:80ee8f3b695e	2354	{
EricLew	0:80ee8f3b695e	2355	return HAL_ERROR;
EricLew	0:80ee8f3b695e	2356	}
EricLew	0:80ee8f3b695e	2357	}
EricLew	0:80ee8f3b695e	2358
EricLew	0:80ee8f3b695e	2359	/**
EricLew	0:80ee8f3b695e	2360	* @}
EricLew	0:80ee8f3b695e	2361	*/
EricLew	0:80ee8f3b695e	2362
EricLew	0:80ee8f3b695e	2363	/**
EricLew	0:80ee8f3b695e	2364	* @}
EricLew	0:80ee8f3b695e	2365	*/
EricLew	0:80ee8f3b695e	2366
EricLew	0:80ee8f3b695e	2367
EricLew	0:80ee8f3b695e	2368
EricLew	0:80ee8f3b695e	2369	#endif /* HAL_ADC_MODULE_ENABLED */
EricLew	0:80ee8f3b695e	2370	/**
EricLew	0:80ee8f3b695e	2371	* @}
EricLew	0:80ee8f3b695e	2372	*/
EricLew	0:80ee8f3b695e	2373
EricLew	0:80ee8f3b695e	2374	/**
EricLew	0:80ee8f3b695e	2375	* @}
EricLew	0:80ee8f3b695e	2376	*/
EricLew	0:80ee8f3b695e	2377
EricLew	0:80ee8f3b695e	2378	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/
EricLew	0:80ee8f3b695e	2379

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Type:	Library
Created:	02 Nov 2015
Imports:	1072
Forks:	1
Commits:	1
Dependents:	0
Dependencies:	0
Followers:	42

Src/stm32l4xx_hal_adc_ex.c@0:80ee8f3b695e, 2015-11-02 (annotated)

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