Senior Design: Sound Monitor / AudioDemo

Audio Demo with DISCO Board, takes control samples, waits for user input, samples regularly.

Dependencies:   CMSIS_DSP_401 STM32L4xx_HAL_Driver mbed-src_DISO_AUDIO_DEMO

core_cmInstr.h@0:3eee9435dd17, 2015-12-13 (annotated)

Committer:
EricLew
Date:
Sun Dec 13 19:12:11 2015 +0000
Revision:
0:3eee9435dd17
Audio Demo using DISCO Board

Who changed what in which revision?

UserRevisionLine numberNew contents of line
EricLew 0:3eee9435dd17 1 /**************************************************************************//**
EricLew 0:3eee9435dd17 2 * @file core_cmInstr.h
EricLew 0:3eee9435dd17 3 * @brief CMSIS Cortex-M Core Instruction Access Header File
EricLew 0:3eee9435dd17 4 * @version V4.10
EricLew 0:3eee9435dd17 5 * @date 18. March 2015
EricLew 0:3eee9435dd17 6 *
EricLew 0:3eee9435dd17 7 * @note
EricLew 0:3eee9435dd17 8 *
EricLew 0:3eee9435dd17 9 ******************************************************************************/
EricLew 0:3eee9435dd17 10 /* Copyright (c) 2009 - 2014 ARM LIMITED
EricLew 0:3eee9435dd17 11
EricLew 0:3eee9435dd17 12 All rights reserved.
EricLew 0:3eee9435dd17 13 Redistribution and use in source and binary forms, with or without
EricLew 0:3eee9435dd17 14 modification, are permitted provided that the following conditions are met:
EricLew 0:3eee9435dd17 15 - Redistributions of source code must retain the above copyright
EricLew 0:3eee9435dd17 16 notice, this list of conditions and the following disclaimer.
EricLew 0:3eee9435dd17 17 - Redistributions in binary form must reproduce the above copyright
EricLew 0:3eee9435dd17 18 notice, this list of conditions and the following disclaimer in the
EricLew 0:3eee9435dd17 19 documentation and/or other materials provided with the distribution.
EricLew 0:3eee9435dd17 20 - Neither the name of ARM nor the names of its contributors may be used
EricLew 0:3eee9435dd17 21 to endorse or promote products derived from this software without
EricLew 0:3eee9435dd17 22 specific prior written permission.
EricLew 0:3eee9435dd17 23 *
EricLew 0:3eee9435dd17 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
EricLew 0:3eee9435dd17 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
EricLew 0:3eee9435dd17 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
EricLew 0:3eee9435dd17 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
EricLew 0:3eee9435dd17 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
EricLew 0:3eee9435dd17 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
EricLew 0:3eee9435dd17 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
EricLew 0:3eee9435dd17 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
EricLew 0:3eee9435dd17 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
EricLew 0:3eee9435dd17 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
EricLew 0:3eee9435dd17 34 POSSIBILITY OF SUCH DAMAGE.
EricLew 0:3eee9435dd17 35 ---------------------------------------------------------------------------*/
EricLew 0:3eee9435dd17 36
EricLew 0:3eee9435dd17 37
EricLew 0:3eee9435dd17 38 #ifndef __CORE_CMINSTR_H
EricLew 0:3eee9435dd17 39 #define __CORE_CMINSTR_H
EricLew 0:3eee9435dd17 40
EricLew 0:3eee9435dd17 41
EricLew 0:3eee9435dd17 42 /* ########################## Core Instruction Access ######################### */
EricLew 0:3eee9435dd17 43 /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
EricLew 0:3eee9435dd17 44 Access to dedicated instructions
EricLew 0:3eee9435dd17 45 @{
EricLew 0:3eee9435dd17 46 */
EricLew 0:3eee9435dd17 47
EricLew 0:3eee9435dd17 48 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
EricLew 0:3eee9435dd17 49 /* ARM armcc specific functions */
EricLew 0:3eee9435dd17 50
EricLew 0:3eee9435dd17 51 #if (__ARMCC_VERSION < 400677)
EricLew 0:3eee9435dd17 52 #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
EricLew 0:3eee9435dd17 53 #endif
EricLew 0:3eee9435dd17 54
EricLew 0:3eee9435dd17 55
EricLew 0:3eee9435dd17 56 /** \brief No Operation
EricLew 0:3eee9435dd17 57
EricLew 0:3eee9435dd17 58 No Operation does nothing. This instruction can be used for code alignment purposes.
EricLew 0:3eee9435dd17 59 */
EricLew 0:3eee9435dd17 60 #define __NOP __nop
EricLew 0:3eee9435dd17 61
EricLew 0:3eee9435dd17 62
EricLew 0:3eee9435dd17 63 /** \brief Wait For Interrupt
EricLew 0:3eee9435dd17 64
EricLew 0:3eee9435dd17 65 Wait For Interrupt is a hint instruction that suspends execution
EricLew 0:3eee9435dd17 66 until one of a number of events occurs.
EricLew 0:3eee9435dd17 67 */
EricLew 0:3eee9435dd17 68 #define __WFI __wfi
EricLew 0:3eee9435dd17 69
EricLew 0:3eee9435dd17 70
EricLew 0:3eee9435dd17 71 /** \brief Wait For Event
EricLew 0:3eee9435dd17 72
EricLew 0:3eee9435dd17 73 Wait For Event is a hint instruction that permits the processor to enter
EricLew 0:3eee9435dd17 74 a low-power state until one of a number of events occurs.
EricLew 0:3eee9435dd17 75 */
EricLew 0:3eee9435dd17 76 #define __WFE __wfe
EricLew 0:3eee9435dd17 77
EricLew 0:3eee9435dd17 78
EricLew 0:3eee9435dd17 79 /** \brief Send Event
EricLew 0:3eee9435dd17 80
EricLew 0:3eee9435dd17 81 Send Event is a hint instruction. It causes an event to be signaled to the CPU.
EricLew 0:3eee9435dd17 82 */
EricLew 0:3eee9435dd17 83 #define __SEV __sev
EricLew 0:3eee9435dd17 84
EricLew 0:3eee9435dd17 85
EricLew 0:3eee9435dd17 86 /** \brief Instruction Synchronization Barrier
EricLew 0:3eee9435dd17 87
EricLew 0:3eee9435dd17 88 Instruction Synchronization Barrier flushes the pipeline in the processor,
EricLew 0:3eee9435dd17 89 so that all instructions following the ISB are fetched from cache or
EricLew 0:3eee9435dd17 90 memory, after the instruction has been completed.
EricLew 0:3eee9435dd17 91 */
EricLew 0:3eee9435dd17 92 #define __ISB() do {\
EricLew 0:3eee9435dd17 93 __schedule_barrier();\
EricLew 0:3eee9435dd17 94 __isb(0xF);\
EricLew 0:3eee9435dd17 95 __schedule_barrier();\
EricLew 0:3eee9435dd17 96 } while (0)
EricLew 0:3eee9435dd17 97
EricLew 0:3eee9435dd17 98 /** \brief Data Synchronization Barrier
EricLew 0:3eee9435dd17 99
EricLew 0:3eee9435dd17 100 This function acts as a special kind of Data Memory Barrier.
EricLew 0:3eee9435dd17 101 It completes when all explicit memory accesses before this instruction complete.
EricLew 0:3eee9435dd17 102 */
EricLew 0:3eee9435dd17 103 #define __DSB() do {\
EricLew 0:3eee9435dd17 104 __schedule_barrier();\
EricLew 0:3eee9435dd17 105 __dsb(0xF);\
EricLew 0:3eee9435dd17 106 __schedule_barrier();\
EricLew 0:3eee9435dd17 107 } while (0)
EricLew 0:3eee9435dd17 108
EricLew 0:3eee9435dd17 109 /** \brief Data Memory Barrier
EricLew 0:3eee9435dd17 110
EricLew 0:3eee9435dd17 111 This function ensures the apparent order of the explicit memory operations before
EricLew 0:3eee9435dd17 112 and after the instruction, without ensuring their completion.
EricLew 0:3eee9435dd17 113 */
EricLew 0:3eee9435dd17 114 #define __DMB() do {\
EricLew 0:3eee9435dd17 115 __schedule_barrier();\
EricLew 0:3eee9435dd17 116 __dmb(0xF);\
EricLew 0:3eee9435dd17 117 __schedule_barrier();\
EricLew 0:3eee9435dd17 118 } while (0)
EricLew 0:3eee9435dd17 119
EricLew 0:3eee9435dd17 120 /** \brief Reverse byte order (32 bit)
EricLew 0:3eee9435dd17 121
EricLew 0:3eee9435dd17 122 This function reverses the byte order in integer value.
EricLew 0:3eee9435dd17 123
EricLew 0:3eee9435dd17 124 \param [in] value Value to reverse
EricLew 0:3eee9435dd17 125 \return Reversed value
EricLew 0:3eee9435dd17 126 */
EricLew 0:3eee9435dd17 127 #define __REV __rev
EricLew 0:3eee9435dd17 128
EricLew 0:3eee9435dd17 129
EricLew 0:3eee9435dd17 130 /** \brief Reverse byte order (16 bit)
EricLew 0:3eee9435dd17 131
EricLew 0:3eee9435dd17 132 This function reverses the byte order in two unsigned short values.
EricLew 0:3eee9435dd17 133
EricLew 0:3eee9435dd17 134 \param [in] value Value to reverse
EricLew 0:3eee9435dd17 135 \return Reversed value
EricLew 0:3eee9435dd17 136 */
EricLew 0:3eee9435dd17 137 #ifndef __NO_EMBEDDED_ASM
EricLew 0:3eee9435dd17 138 __attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value)
EricLew 0:3eee9435dd17 139 {
EricLew 0:3eee9435dd17 140 rev16 r0, r0
EricLew 0:3eee9435dd17 141 bx lr
EricLew 0:3eee9435dd17 142 }
EricLew 0:3eee9435dd17 143 #endif
EricLew 0:3eee9435dd17 144
EricLew 0:3eee9435dd17 145 /** \brief Reverse byte order in signed short value
EricLew 0:3eee9435dd17 146
EricLew 0:3eee9435dd17 147 This function reverses the byte order in a signed short value with sign extension to integer.
EricLew 0:3eee9435dd17 148
EricLew 0:3eee9435dd17 149 \param [in] value Value to reverse
EricLew 0:3eee9435dd17 150 \return Reversed value
EricLew 0:3eee9435dd17 151 */
EricLew 0:3eee9435dd17 152 #ifndef __NO_EMBEDDED_ASM
EricLew 0:3eee9435dd17 153 __attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int32_t __REVSH(int32_t value)
EricLew 0:3eee9435dd17 154 {
EricLew 0:3eee9435dd17 155 revsh r0, r0
EricLew 0:3eee9435dd17 156 bx lr
EricLew 0:3eee9435dd17 157 }
EricLew 0:3eee9435dd17 158 #endif
EricLew 0:3eee9435dd17 159
EricLew 0:3eee9435dd17 160
EricLew 0:3eee9435dd17 161 /** \brief Rotate Right in unsigned value (32 bit)
EricLew 0:3eee9435dd17 162
EricLew 0:3eee9435dd17 163 This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
EricLew 0:3eee9435dd17 164
EricLew 0:3eee9435dd17 165 \param [in] value Value to rotate
EricLew 0:3eee9435dd17 166 \param [in] value Number of Bits to rotate
EricLew 0:3eee9435dd17 167 \return Rotated value
EricLew 0:3eee9435dd17 168 */
EricLew 0:3eee9435dd17 169 #define __ROR __ror
EricLew 0:3eee9435dd17 170
EricLew 0:3eee9435dd17 171
EricLew 0:3eee9435dd17 172 /** \brief Breakpoint
EricLew 0:3eee9435dd17 173
EricLew 0:3eee9435dd17 174 This function causes the processor to enter Debug state.
EricLew 0:3eee9435dd17 175 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
EricLew 0:3eee9435dd17 176
EricLew 0:3eee9435dd17 177 \param [in] value is ignored by the processor.
EricLew 0:3eee9435dd17 178 If required, a debugger can use it to store additional information about the breakpoint.
EricLew 0:3eee9435dd17 179 */
EricLew 0:3eee9435dd17 180 #define __BKPT(value) __breakpoint(value)
EricLew 0:3eee9435dd17 181
EricLew 0:3eee9435dd17 182
EricLew 0:3eee9435dd17 183 /** \brief Reverse bit order of value
EricLew 0:3eee9435dd17 184
EricLew 0:3eee9435dd17 185 This function reverses the bit order of the given value.
EricLew 0:3eee9435dd17 186
EricLew 0:3eee9435dd17 187 \param [in] value Value to reverse
EricLew 0:3eee9435dd17 188 \return Reversed value
EricLew 0:3eee9435dd17 189 */
EricLew 0:3eee9435dd17 190 #if (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300)
EricLew 0:3eee9435dd17 191 #define __RBIT __rbit
EricLew 0:3eee9435dd17 192 #else
EricLew 0:3eee9435dd17 193 __attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
EricLew 0:3eee9435dd17 194 {
EricLew 0:3eee9435dd17 195 uint32_t result;
EricLew 0:3eee9435dd17 196 int32_t s = 4 /*sizeof(v)*/ * 8 - 1; // extra shift needed at end
EricLew 0:3eee9435dd17 197
EricLew 0:3eee9435dd17 198 result = value; // r will be reversed bits of v; first get LSB of v
EricLew 0:3eee9435dd17 199 for (value >>= 1; value; value >>= 1)
EricLew 0:3eee9435dd17 200 {
EricLew 0:3eee9435dd17 201 result <<= 1;
EricLew 0:3eee9435dd17 202 result |= value & 1;
EricLew 0:3eee9435dd17 203 s--;
EricLew 0:3eee9435dd17 204 }
EricLew 0:3eee9435dd17 205 result <<= s; // shift when v's highest bits are zero
EricLew 0:3eee9435dd17 206 return(result);
EricLew 0:3eee9435dd17 207 }
EricLew 0:3eee9435dd17 208 #endif
EricLew 0:3eee9435dd17 209
EricLew 0:3eee9435dd17 210
EricLew 0:3eee9435dd17 211 /** \brief Count leading zeros
EricLew 0:3eee9435dd17 212
EricLew 0:3eee9435dd17 213 This function counts the number of leading zeros of a data value.
EricLew 0:3eee9435dd17 214
EricLew 0:3eee9435dd17 215 \param [in] value Value to count the leading zeros
EricLew 0:3eee9435dd17 216 \return number of leading zeros in value
EricLew 0:3eee9435dd17 217 */
EricLew 0:3eee9435dd17 218 #define __CLZ __clz
EricLew 0:3eee9435dd17 219
EricLew 0:3eee9435dd17 220
EricLew 0:3eee9435dd17 221 #if (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300)
EricLew 0:3eee9435dd17 222
EricLew 0:3eee9435dd17 223 /** \brief LDR Exclusive (8 bit)
EricLew 0:3eee9435dd17 224
EricLew 0:3eee9435dd17 225 This function executes a exclusive LDR instruction for 8 bit value.
EricLew 0:3eee9435dd17 226
EricLew 0:3eee9435dd17 227 \param [in] ptr Pointer to data
EricLew 0:3eee9435dd17 228 \return value of type uint8_t at (*ptr)
EricLew 0:3eee9435dd17 229 */
EricLew 0:3eee9435dd17 230 #define __LDREXB(ptr) ((uint8_t ) __ldrex(ptr))
EricLew 0:3eee9435dd17 231
EricLew 0:3eee9435dd17 232
EricLew 0:3eee9435dd17 233 /** \brief LDR Exclusive (16 bit)
EricLew 0:3eee9435dd17 234
EricLew 0:3eee9435dd17 235 This function executes a exclusive LDR instruction for 16 bit values.
EricLew 0:3eee9435dd17 236
EricLew 0:3eee9435dd17 237 \param [in] ptr Pointer to data
EricLew 0:3eee9435dd17 238 \return value of type uint16_t at (*ptr)
EricLew 0:3eee9435dd17 239 */
EricLew 0:3eee9435dd17 240 #define __LDREXH(ptr) ((uint16_t) __ldrex(ptr))
EricLew 0:3eee9435dd17 241
EricLew 0:3eee9435dd17 242
EricLew 0:3eee9435dd17 243 /** \brief LDR Exclusive (32 bit)
EricLew 0:3eee9435dd17 244
EricLew 0:3eee9435dd17 245 This function executes a exclusive LDR instruction for 32 bit values.
EricLew 0:3eee9435dd17 246
EricLew 0:3eee9435dd17 247 \param [in] ptr Pointer to data
EricLew 0:3eee9435dd17 248 \return value of type uint32_t at (*ptr)
EricLew 0:3eee9435dd17 249 */
EricLew 0:3eee9435dd17 250 #define __LDREXW(ptr) ((uint32_t ) __ldrex(ptr))
EricLew 0:3eee9435dd17 251
EricLew 0:3eee9435dd17 252
EricLew 0:3eee9435dd17 253 /** \brief STR Exclusive (8 bit)
EricLew 0:3eee9435dd17 254
EricLew 0:3eee9435dd17 255 This function executes a exclusive STR instruction for 8 bit values.
EricLew 0:3eee9435dd17 256
EricLew 0:3eee9435dd17 257 \param [in] value Value to store
EricLew 0:3eee9435dd17 258 \param [in] ptr Pointer to location
EricLew 0:3eee9435dd17 259 \return 0 Function succeeded
EricLew 0:3eee9435dd17 260 \return 1 Function failed
EricLew 0:3eee9435dd17 261 */
EricLew 0:3eee9435dd17 262 #define __STREXB(value, ptr) __strex(value, ptr)
EricLew 0:3eee9435dd17 263
EricLew 0:3eee9435dd17 264
EricLew 0:3eee9435dd17 265 /** \brief STR Exclusive (16 bit)
EricLew 0:3eee9435dd17 266
EricLew 0:3eee9435dd17 267 This function executes a exclusive STR instruction for 16 bit values.
EricLew 0:3eee9435dd17 268
EricLew 0:3eee9435dd17 269 \param [in] value Value to store
EricLew 0:3eee9435dd17 270 \param [in] ptr Pointer to location
EricLew 0:3eee9435dd17 271 \return 0 Function succeeded
EricLew 0:3eee9435dd17 272 \return 1 Function failed
EricLew 0:3eee9435dd17 273 */
EricLew 0:3eee9435dd17 274 #define __STREXH(value, ptr) __strex(value, ptr)
EricLew 0:3eee9435dd17 275
EricLew 0:3eee9435dd17 276
EricLew 0:3eee9435dd17 277 /** \brief STR Exclusive (32 bit)
EricLew 0:3eee9435dd17 278
EricLew 0:3eee9435dd17 279 This function executes a exclusive STR instruction for 32 bit values.
EricLew 0:3eee9435dd17 280
EricLew 0:3eee9435dd17 281 \param [in] value Value to store
EricLew 0:3eee9435dd17 282 \param [in] ptr Pointer to location
EricLew 0:3eee9435dd17 283 \return 0 Function succeeded
EricLew 0:3eee9435dd17 284 \return 1 Function failed
EricLew 0:3eee9435dd17 285 */
EricLew 0:3eee9435dd17 286 #define __STREXW(value, ptr) __strex(value, ptr)
EricLew 0:3eee9435dd17 287
EricLew 0:3eee9435dd17 288
EricLew 0:3eee9435dd17 289 /** \brief Remove the exclusive lock
EricLew 0:3eee9435dd17 290
EricLew 0:3eee9435dd17 291 This function removes the exclusive lock which is created by LDREX.
EricLew 0:3eee9435dd17 292
EricLew 0:3eee9435dd17 293 */
EricLew 0:3eee9435dd17 294 #define __CLREX __clrex
EricLew 0:3eee9435dd17 295
EricLew 0:3eee9435dd17 296
EricLew 0:3eee9435dd17 297 /** \brief Signed Saturate
EricLew 0:3eee9435dd17 298
EricLew 0:3eee9435dd17 299 This function saturates a signed value.
EricLew 0:3eee9435dd17 300
EricLew 0:3eee9435dd17 301 \param [in] value Value to be saturated
EricLew 0:3eee9435dd17 302 \param [in] sat Bit position to saturate to (1..32)
EricLew 0:3eee9435dd17 303 \return Saturated value
EricLew 0:3eee9435dd17 304 */
EricLew 0:3eee9435dd17 305 #define __SSAT __ssat
EricLew 0:3eee9435dd17 306
EricLew 0:3eee9435dd17 307
EricLew 0:3eee9435dd17 308 /** \brief Unsigned Saturate
EricLew 0:3eee9435dd17 309
EricLew 0:3eee9435dd17 310 This function saturates an unsigned value.
EricLew 0:3eee9435dd17 311
EricLew 0:3eee9435dd17 312 \param [in] value Value to be saturated
EricLew 0:3eee9435dd17 313 \param [in] sat Bit position to saturate to (0..31)
EricLew 0:3eee9435dd17 314 \return Saturated value
EricLew 0:3eee9435dd17 315 */
EricLew 0:3eee9435dd17 316 #define __USAT __usat
EricLew 0:3eee9435dd17 317
EricLew 0:3eee9435dd17 318
EricLew 0:3eee9435dd17 319 /** \brief Rotate Right with Extend (32 bit)
EricLew 0:3eee9435dd17 320
EricLew 0:3eee9435dd17 321 This function moves each bit of a bitstring right by one bit.
EricLew 0:3eee9435dd17 322 The carry input is shifted in at the left end of the bitstring.
EricLew 0:3eee9435dd17 323
EricLew 0:3eee9435dd17 324 \param [in] value Value to rotate
EricLew 0:3eee9435dd17 325 \return Rotated value
EricLew 0:3eee9435dd17 326 */
EricLew 0:3eee9435dd17 327 #ifndef __NO_EMBEDDED_ASM
EricLew 0:3eee9435dd17 328 __attribute__((section(".rrx_text"))) __STATIC_INLINE __ASM uint32_t __RRX(uint32_t value)
EricLew 0:3eee9435dd17 329 {
EricLew 0:3eee9435dd17 330 rrx r0, r0
EricLew 0:3eee9435dd17 331 bx lr
EricLew 0:3eee9435dd17 332 }
EricLew 0:3eee9435dd17 333 #endif
EricLew 0:3eee9435dd17 334
EricLew 0:3eee9435dd17 335
EricLew 0:3eee9435dd17 336 /** \brief LDRT Unprivileged (8 bit)
EricLew 0:3eee9435dd17 337
EricLew 0:3eee9435dd17 338 This function executes a Unprivileged LDRT instruction for 8 bit value.
EricLew 0:3eee9435dd17 339
EricLew 0:3eee9435dd17 340 \param [in] ptr Pointer to data
EricLew 0:3eee9435dd17 341 \return value of type uint8_t at (*ptr)
EricLew 0:3eee9435dd17 342 */
EricLew 0:3eee9435dd17 343 #define __LDRBT(ptr) ((uint8_t ) __ldrt(ptr))
EricLew 0:3eee9435dd17 344
EricLew 0:3eee9435dd17 345
EricLew 0:3eee9435dd17 346 /** \brief LDRT Unprivileged (16 bit)
EricLew 0:3eee9435dd17 347
EricLew 0:3eee9435dd17 348 This function executes a Unprivileged LDRT instruction for 16 bit values.
EricLew 0:3eee9435dd17 349
EricLew 0:3eee9435dd17 350 \param [in] ptr Pointer to data
EricLew 0:3eee9435dd17 351 \return value of type uint16_t at (*ptr)
EricLew 0:3eee9435dd17 352 */
EricLew 0:3eee9435dd17 353 #define __LDRHT(ptr) ((uint16_t) __ldrt(ptr))
EricLew 0:3eee9435dd17 354
EricLew 0:3eee9435dd17 355
EricLew 0:3eee9435dd17 356 /** \brief LDRT Unprivileged (32 bit)
EricLew 0:3eee9435dd17 357
EricLew 0:3eee9435dd17 358 This function executes a Unprivileged LDRT instruction for 32 bit values.
EricLew 0:3eee9435dd17 359
EricLew 0:3eee9435dd17 360 \param [in] ptr Pointer to data
EricLew 0:3eee9435dd17 361 \return value of type uint32_t at (*ptr)
EricLew 0:3eee9435dd17 362 */
EricLew 0:3eee9435dd17 363 #define __LDRT(ptr) ((uint32_t ) __ldrt(ptr))
EricLew 0:3eee9435dd17 364
EricLew 0:3eee9435dd17 365
EricLew 0:3eee9435dd17 366 /** \brief STRT Unprivileged (8 bit)
EricLew 0:3eee9435dd17 367
EricLew 0:3eee9435dd17 368 This function executes a Unprivileged STRT instruction for 8 bit values.
EricLew 0:3eee9435dd17 369
EricLew 0:3eee9435dd17 370 \param [in] value Value to store
EricLew 0:3eee9435dd17 371 \param [in] ptr Pointer to location
EricLew 0:3eee9435dd17 372 */
EricLew 0:3eee9435dd17 373 #define __STRBT(value, ptr) __strt(value, ptr)
EricLew 0:3eee9435dd17 374
EricLew 0:3eee9435dd17 375
EricLew 0:3eee9435dd17 376 /** \brief STRT Unprivileged (16 bit)
EricLew 0:3eee9435dd17 377
EricLew 0:3eee9435dd17 378 This function executes a Unprivileged STRT instruction for 16 bit values.
EricLew 0:3eee9435dd17 379
EricLew 0:3eee9435dd17 380 \param [in] value Value to store
EricLew 0:3eee9435dd17 381 \param [in] ptr Pointer to location
EricLew 0:3eee9435dd17 382 */
EricLew 0:3eee9435dd17 383 #define __STRHT(value, ptr) __strt(value, ptr)
EricLew 0:3eee9435dd17 384
EricLew 0:3eee9435dd17 385
EricLew 0:3eee9435dd17 386 /** \brief STRT Unprivileged (32 bit)
EricLew 0:3eee9435dd17 387
EricLew 0:3eee9435dd17 388 This function executes a Unprivileged STRT instruction for 32 bit values.
EricLew 0:3eee9435dd17 389
EricLew 0:3eee9435dd17 390 \param [in] value Value to store
EricLew 0:3eee9435dd17 391 \param [in] ptr Pointer to location
EricLew 0:3eee9435dd17 392 */
EricLew 0:3eee9435dd17 393 #define __STRT(value, ptr) __strt(value, ptr)
EricLew 0:3eee9435dd17 394
EricLew 0:3eee9435dd17 395 #endif /* (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300) */
EricLew 0:3eee9435dd17 396
EricLew 0:3eee9435dd17 397
EricLew 0:3eee9435dd17 398 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
EricLew 0:3eee9435dd17 399 /* GNU gcc specific functions */
EricLew 0:3eee9435dd17 400
EricLew 0:3eee9435dd17 401 /* Define macros for porting to both thumb1 and thumb2.
EricLew 0:3eee9435dd17 402 * For thumb1, use low register (r0-r7), specified by constrant "l"
EricLew 0:3eee9435dd17 403 * Otherwise, use general registers, specified by constrant "r" */
EricLew 0:3eee9435dd17 404 #if defined (__thumb__) && !defined (__thumb2__)
EricLew 0:3eee9435dd17 405 #define __CMSIS_GCC_OUT_REG(r) "=l" (r)
EricLew 0:3eee9435dd17 406 #define __CMSIS_GCC_USE_REG(r) "l" (r)
EricLew 0:3eee9435dd17 407 #else
EricLew 0:3eee9435dd17 408 #define __CMSIS_GCC_OUT_REG(r) "=r" (r)
EricLew 0:3eee9435dd17 409 #define __CMSIS_GCC_USE_REG(r) "r" (r)
EricLew 0:3eee9435dd17 410 #endif
EricLew 0:3eee9435dd17 411
EricLew 0:3eee9435dd17 412 /** \brief No Operation
EricLew 0:3eee9435dd17 413
EricLew 0:3eee9435dd17 414 No Operation does nothing. This instruction can be used for code alignment purposes.
EricLew 0:3eee9435dd17 415 */
EricLew 0:3eee9435dd17 416 __attribute__((always_inline)) __STATIC_INLINE void __NOP(void)
EricLew 0:3eee9435dd17 417 {
EricLew 0:3eee9435dd17 418 __ASM volatile ("nop");
EricLew 0:3eee9435dd17 419 }
EricLew 0:3eee9435dd17 420
EricLew 0:3eee9435dd17 421
EricLew 0:3eee9435dd17 422 /** \brief Wait For Interrupt
EricLew 0:3eee9435dd17 423
EricLew 0:3eee9435dd17 424 Wait For Interrupt is a hint instruction that suspends execution
EricLew 0:3eee9435dd17 425 until one of a number of events occurs.
EricLew 0:3eee9435dd17 426 */
EricLew 0:3eee9435dd17 427 __attribute__((always_inline)) __STATIC_INLINE void __WFI(void)
EricLew 0:3eee9435dd17 428 {
EricLew 0:3eee9435dd17 429 __ASM volatile ("wfi");
EricLew 0:3eee9435dd17 430 }
EricLew 0:3eee9435dd17 431
EricLew 0:3eee9435dd17 432
EricLew 0:3eee9435dd17 433 /** \brief Wait For Event
EricLew 0:3eee9435dd17 434
EricLew 0:3eee9435dd17 435 Wait For Event is a hint instruction that permits the processor to enter
EricLew 0:3eee9435dd17 436 a low-power state until one of a number of events occurs.
EricLew 0:3eee9435dd17 437 */
EricLew 0:3eee9435dd17 438 __attribute__((always_inline)) __STATIC_INLINE void __WFE(void)
EricLew 0:3eee9435dd17 439 {
EricLew 0:3eee9435dd17 440 __ASM volatile ("wfe");
EricLew 0:3eee9435dd17 441 }
EricLew 0:3eee9435dd17 442
EricLew 0:3eee9435dd17 443
EricLew 0:3eee9435dd17 444 /** \brief Send Event
EricLew 0:3eee9435dd17 445
EricLew 0:3eee9435dd17 446 Send Event is a hint instruction. It causes an event to be signaled to the CPU.
EricLew 0:3eee9435dd17 447 */
EricLew 0:3eee9435dd17 448 __attribute__((always_inline)) __STATIC_INLINE void __SEV(void)
EricLew 0:3eee9435dd17 449 {
EricLew 0:3eee9435dd17 450 __ASM volatile ("sev");
EricLew 0:3eee9435dd17 451 }
EricLew 0:3eee9435dd17 452
EricLew 0:3eee9435dd17 453
EricLew 0:3eee9435dd17 454 /** \brief Instruction Synchronization Barrier
EricLew 0:3eee9435dd17 455
EricLew 0:3eee9435dd17 456 Instruction Synchronization Barrier flushes the pipeline in the processor,
EricLew 0:3eee9435dd17 457 so that all instructions following the ISB are fetched from cache or
EricLew 0:3eee9435dd17 458 memory, after the instruction has been completed.
EricLew 0:3eee9435dd17 459 */
EricLew 0:3eee9435dd17 460 __attribute__((always_inline)) __STATIC_INLINE void __ISB(void)
EricLew 0:3eee9435dd17 461 {
EricLew 0:3eee9435dd17 462 __ASM volatile ("isb 0xF":::"memory");
EricLew 0:3eee9435dd17 463 }
EricLew 0:3eee9435dd17 464
EricLew 0:3eee9435dd17 465
EricLew 0:3eee9435dd17 466 /** \brief Data Synchronization Barrier
EricLew 0:3eee9435dd17 467
EricLew 0:3eee9435dd17 468 This function acts as a special kind of Data Memory Barrier.
EricLew 0:3eee9435dd17 469 It completes when all explicit memory accesses before this instruction complete.
EricLew 0:3eee9435dd17 470 */
EricLew 0:3eee9435dd17 471 __attribute__((always_inline)) __STATIC_INLINE void __DSB(void)
EricLew 0:3eee9435dd17 472 {
EricLew 0:3eee9435dd17 473 __ASM volatile ("dsb 0xF":::"memory");
EricLew 0:3eee9435dd17 474 }
EricLew 0:3eee9435dd17 475
EricLew 0:3eee9435dd17 476
EricLew 0:3eee9435dd17 477 /** \brief Data Memory Barrier
EricLew 0:3eee9435dd17 478
EricLew 0:3eee9435dd17 479 This function ensures the apparent order of the explicit memory operations before
EricLew 0:3eee9435dd17 480 and after the instruction, without ensuring their completion.
EricLew 0:3eee9435dd17 481 */
EricLew 0:3eee9435dd17 482 __attribute__((always_inline)) __STATIC_INLINE void __DMB(void)
EricLew 0:3eee9435dd17 483 {
EricLew 0:3eee9435dd17 484 __ASM volatile ("dmb 0xF":::"memory");
EricLew 0:3eee9435dd17 485 }
EricLew 0:3eee9435dd17 486
EricLew 0:3eee9435dd17 487
EricLew 0:3eee9435dd17 488 /** \brief Reverse byte order (32 bit)
EricLew 0:3eee9435dd17 489
EricLew 0:3eee9435dd17 490 This function reverses the byte order in integer value.
EricLew 0:3eee9435dd17 491
EricLew 0:3eee9435dd17 492 \param [in] value Value to reverse
EricLew 0:3eee9435dd17 493 \return Reversed value
EricLew 0:3eee9435dd17 494 */
EricLew 0:3eee9435dd17 495 __attribute__((always_inline)) __STATIC_INLINE uint32_t __REV(uint32_t value)
EricLew 0:3eee9435dd17 496 {
EricLew 0:3eee9435dd17 497 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
EricLew 0:3eee9435dd17 498 return __builtin_bswap32(value);
EricLew 0:3eee9435dd17 499 #else
EricLew 0:3eee9435dd17 500 uint32_t result;
EricLew 0:3eee9435dd17 501
EricLew 0:3eee9435dd17 502 __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
EricLew 0:3eee9435dd17 503 return(result);
EricLew 0:3eee9435dd17 504 #endif
EricLew 0:3eee9435dd17 505 }
EricLew 0:3eee9435dd17 506
EricLew 0:3eee9435dd17 507
EricLew 0:3eee9435dd17 508 /** \brief Reverse byte order (16 bit)
EricLew 0:3eee9435dd17 509
EricLew 0:3eee9435dd17 510 This function reverses the byte order in two unsigned short values.
EricLew 0:3eee9435dd17 511
EricLew 0:3eee9435dd17 512 \param [in] value Value to reverse
EricLew 0:3eee9435dd17 513 \return Reversed value
EricLew 0:3eee9435dd17 514 */
EricLew 0:3eee9435dd17 515 __attribute__((always_inline)) __STATIC_INLINE uint32_t __REV16(uint32_t value)
EricLew 0:3eee9435dd17 516 {
EricLew 0:3eee9435dd17 517 uint32_t result;
EricLew 0:3eee9435dd17 518
EricLew 0:3eee9435dd17 519 __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
EricLew 0:3eee9435dd17 520 return(result);
EricLew 0:3eee9435dd17 521 }
EricLew 0:3eee9435dd17 522
EricLew 0:3eee9435dd17 523
EricLew 0:3eee9435dd17 524 /** \brief Reverse byte order in signed short value
EricLew 0:3eee9435dd17 525
EricLew 0:3eee9435dd17 526 This function reverses the byte order in a signed short value with sign extension to integer.
EricLew 0:3eee9435dd17 527
EricLew 0:3eee9435dd17 528 \param [in] value Value to reverse
EricLew 0:3eee9435dd17 529 \return Reversed value
EricLew 0:3eee9435dd17 530 */
EricLew 0:3eee9435dd17 531 __attribute__((always_inline)) __STATIC_INLINE int32_t __REVSH(int32_t value)
EricLew 0:3eee9435dd17 532 {
EricLew 0:3eee9435dd17 533 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
EricLew 0:3eee9435dd17 534 return (short)__builtin_bswap16(value);
EricLew 0:3eee9435dd17 535 #else
EricLew 0:3eee9435dd17 536 uint32_t result;
EricLew 0:3eee9435dd17 537
EricLew 0:3eee9435dd17 538 __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
EricLew 0:3eee9435dd17 539 return(result);
EricLew 0:3eee9435dd17 540 #endif
EricLew 0:3eee9435dd17 541 }
EricLew 0:3eee9435dd17 542
EricLew 0:3eee9435dd17 543
EricLew 0:3eee9435dd17 544 /** \brief Rotate Right in unsigned value (32 bit)
EricLew 0:3eee9435dd17 545
EricLew 0:3eee9435dd17 546 This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
EricLew 0:3eee9435dd17 547
EricLew 0:3eee9435dd17 548 \param [in] value Value to rotate
EricLew 0:3eee9435dd17 549 \param [in] value Number of Bits to rotate
EricLew 0:3eee9435dd17 550 \return Rotated value
EricLew 0:3eee9435dd17 551 */
EricLew 0:3eee9435dd17 552 __attribute__((always_inline)) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
EricLew 0:3eee9435dd17 553 {
EricLew 0:3eee9435dd17 554 return (op1 >> op2) | (op1 << (32 - op2));
EricLew 0:3eee9435dd17 555 }
EricLew 0:3eee9435dd17 556
EricLew 0:3eee9435dd17 557
EricLew 0:3eee9435dd17 558 /** \brief Breakpoint
EricLew 0:3eee9435dd17 559
EricLew 0:3eee9435dd17 560 This function causes the processor to enter Debug state.
EricLew 0:3eee9435dd17 561 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
EricLew 0:3eee9435dd17 562
EricLew 0:3eee9435dd17 563 \param [in] value is ignored by the processor.
EricLew 0:3eee9435dd17 564 If required, a debugger can use it to store additional information about the breakpoint.
EricLew 0:3eee9435dd17 565 */
EricLew 0:3eee9435dd17 566 #define __BKPT(value) __ASM volatile ("bkpt "#value)
EricLew 0:3eee9435dd17 567
EricLew 0:3eee9435dd17 568
EricLew 0:3eee9435dd17 569 /** \brief Reverse bit order of value
EricLew 0:3eee9435dd17 570
EricLew 0:3eee9435dd17 571 This function reverses the bit order of the given value.
EricLew 0:3eee9435dd17 572
EricLew 0:3eee9435dd17 573 \param [in] value Value to reverse
EricLew 0:3eee9435dd17 574 \return Reversed value
EricLew 0:3eee9435dd17 575 */
EricLew 0:3eee9435dd17 576 __attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
EricLew 0:3eee9435dd17 577 {
EricLew 0:3eee9435dd17 578 uint32_t result;
EricLew 0:3eee9435dd17 579
EricLew 0:3eee9435dd17 580 #if (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300)
EricLew 0:3eee9435dd17 581 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
EricLew 0:3eee9435dd17 582 #else
EricLew 0:3eee9435dd17 583 int32_t s = 4 /*sizeof(v)*/ * 8 - 1; // extra shift needed at end
EricLew 0:3eee9435dd17 584
EricLew 0:3eee9435dd17 585 result = value; // r will be reversed bits of v; first get LSB of v
EricLew 0:3eee9435dd17 586 for (value >>= 1; value; value >>= 1)
EricLew 0:3eee9435dd17 587 {
EricLew 0:3eee9435dd17 588 result <<= 1;
EricLew 0:3eee9435dd17 589 result |= value & 1;
EricLew 0:3eee9435dd17 590 s--;
EricLew 0:3eee9435dd17 591 }
EricLew 0:3eee9435dd17 592 result <<= s; // shift when v's highest bits are zero
EricLew 0:3eee9435dd17 593 #endif
EricLew 0:3eee9435dd17 594 return(result);
EricLew 0:3eee9435dd17 595 }
EricLew 0:3eee9435dd17 596
EricLew 0:3eee9435dd17 597
EricLew 0:3eee9435dd17 598 /** \brief Count leading zeros
EricLew 0:3eee9435dd17 599
EricLew 0:3eee9435dd17 600 This function counts the number of leading zeros of a data value.
EricLew 0:3eee9435dd17 601
EricLew 0:3eee9435dd17 602 \param [in] value Value to count the leading zeros
EricLew 0:3eee9435dd17 603 \return number of leading zeros in value
EricLew 0:3eee9435dd17 604 */
EricLew 0:3eee9435dd17 605 #define __CLZ __builtin_clz
EricLew 0:3eee9435dd17 606
EricLew 0:3eee9435dd17 607
EricLew 0:3eee9435dd17 608 #if (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300)
EricLew 0:3eee9435dd17 609
EricLew 0:3eee9435dd17 610 /** \brief LDR Exclusive (8 bit)
EricLew 0:3eee9435dd17 611
EricLew 0:3eee9435dd17 612 This function executes a exclusive LDR instruction for 8 bit value.
EricLew 0:3eee9435dd17 613
EricLew 0:3eee9435dd17 614 \param [in] ptr Pointer to data
EricLew 0:3eee9435dd17 615 \return value of type uint8_t at (*ptr)
EricLew 0:3eee9435dd17 616 */
EricLew 0:3eee9435dd17 617 __attribute__((always_inline)) __STATIC_INLINE uint8_t __LDREXB(volatile uint8_t *addr)
EricLew 0:3eee9435dd17 618 {
EricLew 0:3eee9435dd17 619 uint32_t result;
EricLew 0:3eee9435dd17 620
EricLew 0:3eee9435dd17 621 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
EricLew 0:3eee9435dd17 622 __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) );
EricLew 0:3eee9435dd17 623 #else
EricLew 0:3eee9435dd17 624 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
EricLew 0:3eee9435dd17 625 accepted by assembler. So has to use following less efficient pattern.
EricLew 0:3eee9435dd17 626 */
EricLew 0:3eee9435dd17 627 __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
EricLew 0:3eee9435dd17 628 #endif
EricLew 0:3eee9435dd17 629 return ((uint8_t) result); /* Add explicit type cast here */
EricLew 0:3eee9435dd17 630 }
EricLew 0:3eee9435dd17 631
EricLew 0:3eee9435dd17 632
EricLew 0:3eee9435dd17 633 /** \brief LDR Exclusive (16 bit)
EricLew 0:3eee9435dd17 634
EricLew 0:3eee9435dd17 635 This function executes a exclusive LDR instruction for 16 bit values.
EricLew 0:3eee9435dd17 636
EricLew 0:3eee9435dd17 637 \param [in] ptr Pointer to data
EricLew 0:3eee9435dd17 638 \return value of type uint16_t at (*ptr)
EricLew 0:3eee9435dd17 639 */
EricLew 0:3eee9435dd17 640 __attribute__((always_inline)) __STATIC_INLINE uint16_t __LDREXH(volatile uint16_t *addr)
EricLew 0:3eee9435dd17 641 {
EricLew 0:3eee9435dd17 642 uint32_t result;
EricLew 0:3eee9435dd17 643
EricLew 0:3eee9435dd17 644 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
EricLew 0:3eee9435dd17 645 __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) );
EricLew 0:3eee9435dd17 646 #else
EricLew 0:3eee9435dd17 647 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
EricLew 0:3eee9435dd17 648 accepted by assembler. So has to use following less efficient pattern.
EricLew 0:3eee9435dd17 649 */
EricLew 0:3eee9435dd17 650 __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
EricLew 0:3eee9435dd17 651 #endif
EricLew 0:3eee9435dd17 652 return ((uint16_t) result); /* Add explicit type cast here */
EricLew 0:3eee9435dd17 653 }
EricLew 0:3eee9435dd17 654
EricLew 0:3eee9435dd17 655
EricLew 0:3eee9435dd17 656 /** \brief LDR Exclusive (32 bit)
EricLew 0:3eee9435dd17 657
EricLew 0:3eee9435dd17 658 This function executes a exclusive LDR instruction for 32 bit values.
EricLew 0:3eee9435dd17 659
EricLew 0:3eee9435dd17 660 \param [in] ptr Pointer to data
EricLew 0:3eee9435dd17 661 \return value of type uint32_t at (*ptr)
EricLew 0:3eee9435dd17 662 */
EricLew 0:3eee9435dd17 663 __attribute__((always_inline)) __STATIC_INLINE uint32_t __LDREXW(volatile uint32_t *addr)
EricLew 0:3eee9435dd17 664 {
EricLew 0:3eee9435dd17 665 uint32_t result;
EricLew 0:3eee9435dd17 666
EricLew 0:3eee9435dd17 667 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
EricLew 0:3eee9435dd17 668 return(result);
EricLew 0:3eee9435dd17 669 }
EricLew 0:3eee9435dd17 670
EricLew 0:3eee9435dd17 671
EricLew 0:3eee9435dd17 672 /** \brief STR Exclusive (8 bit)
EricLew 0:3eee9435dd17 673
EricLew 0:3eee9435dd17 674 This function executes a exclusive STR instruction for 8 bit values.
EricLew 0:3eee9435dd17 675
EricLew 0:3eee9435dd17 676 \param [in] value Value to store
EricLew 0:3eee9435dd17 677 \param [in] ptr Pointer to location
EricLew 0:3eee9435dd17 678 \return 0 Function succeeded
EricLew 0:3eee9435dd17 679 \return 1 Function failed
EricLew 0:3eee9435dd17 680 */
EricLew 0:3eee9435dd17 681 __attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
EricLew 0:3eee9435dd17 682 {
EricLew 0:3eee9435dd17 683 uint32_t result;
EricLew 0:3eee9435dd17 684
EricLew 0:3eee9435dd17 685 __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
EricLew 0:3eee9435dd17 686 return(result);
EricLew 0:3eee9435dd17 687 }
EricLew 0:3eee9435dd17 688
EricLew 0:3eee9435dd17 689
EricLew 0:3eee9435dd17 690 /** \brief STR Exclusive (16 bit)
EricLew 0:3eee9435dd17 691
EricLew 0:3eee9435dd17 692 This function executes a exclusive STR instruction for 16 bit values.
EricLew 0:3eee9435dd17 693
EricLew 0:3eee9435dd17 694 \param [in] value Value to store
EricLew 0:3eee9435dd17 695 \param [in] ptr Pointer to location
EricLew 0:3eee9435dd17 696 \return 0 Function succeeded
EricLew 0:3eee9435dd17 697 \return 1 Function failed
EricLew 0:3eee9435dd17 698 */
EricLew 0:3eee9435dd17 699 __attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
EricLew 0:3eee9435dd17 700 {
EricLew 0:3eee9435dd17 701 uint32_t result;
EricLew 0:3eee9435dd17 702
EricLew 0:3eee9435dd17 703 __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
EricLew 0:3eee9435dd17 704 return(result);
EricLew 0:3eee9435dd17 705 }
EricLew 0:3eee9435dd17 706
EricLew 0:3eee9435dd17 707
EricLew 0:3eee9435dd17 708 /** \brief STR Exclusive (32 bit)
EricLew 0:3eee9435dd17 709
EricLew 0:3eee9435dd17 710 This function executes a exclusive STR instruction for 32 bit values.
EricLew 0:3eee9435dd17 711
EricLew 0:3eee9435dd17 712 \param [in] value Value to store
EricLew 0:3eee9435dd17 713 \param [in] ptr Pointer to location
EricLew 0:3eee9435dd17 714 \return 0 Function succeeded
EricLew 0:3eee9435dd17 715 \return 1 Function failed
EricLew 0:3eee9435dd17 716 */
EricLew 0:3eee9435dd17 717 __attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
EricLew 0:3eee9435dd17 718 {
EricLew 0:3eee9435dd17 719 uint32_t result;
EricLew 0:3eee9435dd17 720
EricLew 0:3eee9435dd17 721 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
EricLew 0:3eee9435dd17 722 return(result);
EricLew 0:3eee9435dd17 723 }
EricLew 0:3eee9435dd17 724
EricLew 0:3eee9435dd17 725
EricLew 0:3eee9435dd17 726 /** \brief Remove the exclusive lock
EricLew 0:3eee9435dd17 727
EricLew 0:3eee9435dd17 728 This function removes the exclusive lock which is created by LDREX.
EricLew 0:3eee9435dd17 729
EricLew 0:3eee9435dd17 730 */
EricLew 0:3eee9435dd17 731 __attribute__((always_inline)) __STATIC_INLINE void __CLREX(void)
EricLew 0:3eee9435dd17 732 {
EricLew 0:3eee9435dd17 733 __ASM volatile ("clrex" ::: "memory");
EricLew 0:3eee9435dd17 734 }
EricLew 0:3eee9435dd17 735
EricLew 0:3eee9435dd17 736
EricLew 0:3eee9435dd17 737 /** \brief Signed Saturate
EricLew 0:3eee9435dd17 738
EricLew 0:3eee9435dd17 739 This function saturates a signed value.
EricLew 0:3eee9435dd17 740
EricLew 0:3eee9435dd17 741 \param [in] value Value to be saturated
EricLew 0:3eee9435dd17 742 \param [in] sat Bit position to saturate to (1..32)
EricLew 0:3eee9435dd17 743 \return Saturated value
EricLew 0:3eee9435dd17 744 */
EricLew 0:3eee9435dd17 745 #define __SSAT(ARG1,ARG2) \
EricLew 0:3eee9435dd17 746 ({ \
EricLew 0:3eee9435dd17 747 uint32_t __RES, __ARG1 = (ARG1); \
EricLew 0:3eee9435dd17 748 __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
EricLew 0:3eee9435dd17 749 __RES; \
EricLew 0:3eee9435dd17 750 })
EricLew 0:3eee9435dd17 751
EricLew 0:3eee9435dd17 752
EricLew 0:3eee9435dd17 753 /** \brief Unsigned Saturate
EricLew 0:3eee9435dd17 754
EricLew 0:3eee9435dd17 755 This function saturates an unsigned value.
EricLew 0:3eee9435dd17 756
EricLew 0:3eee9435dd17 757 \param [in] value Value to be saturated
EricLew 0:3eee9435dd17 758 \param [in] sat Bit position to saturate to (0..31)
EricLew 0:3eee9435dd17 759 \return Saturated value
EricLew 0:3eee9435dd17 760 */
EricLew 0:3eee9435dd17 761 #define __USAT(ARG1,ARG2) \
EricLew 0:3eee9435dd17 762 ({ \
EricLew 0:3eee9435dd17 763 uint32_t __RES, __ARG1 = (ARG1); \
EricLew 0:3eee9435dd17 764 __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
EricLew 0:3eee9435dd17 765 __RES; \
EricLew 0:3eee9435dd17 766 })
EricLew 0:3eee9435dd17 767
EricLew 0:3eee9435dd17 768
EricLew 0:3eee9435dd17 769 /** \brief Rotate Right with Extend (32 bit)
EricLew 0:3eee9435dd17 770
EricLew 0:3eee9435dd17 771 This function moves each bit of a bitstring right by one bit.
EricLew 0:3eee9435dd17 772 The carry input is shifted in at the left end of the bitstring.
EricLew 0:3eee9435dd17 773
EricLew 0:3eee9435dd17 774 \param [in] value Value to rotate
EricLew 0:3eee9435dd17 775 \return Rotated value
EricLew 0:3eee9435dd17 776 */
EricLew 0:3eee9435dd17 777 __attribute__((always_inline)) __STATIC_INLINE uint32_t __RRX(uint32_t value)
EricLew 0:3eee9435dd17 778 {
EricLew 0:3eee9435dd17 779 uint32_t result;
EricLew 0:3eee9435dd17 780
EricLew 0:3eee9435dd17 781 __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
EricLew 0:3eee9435dd17 782 return(result);
EricLew 0:3eee9435dd17 783 }
EricLew 0:3eee9435dd17 784
EricLew 0:3eee9435dd17 785
EricLew 0:3eee9435dd17 786 /** \brief LDRT Unprivileged (8 bit)
EricLew 0:3eee9435dd17 787
EricLew 0:3eee9435dd17 788 This function executes a Unprivileged LDRT instruction for 8 bit value.
EricLew 0:3eee9435dd17 789
EricLew 0:3eee9435dd17 790 \param [in] ptr Pointer to data
EricLew 0:3eee9435dd17 791 \return value of type uint8_t at (*ptr)
EricLew 0:3eee9435dd17 792 */
EricLew 0:3eee9435dd17 793 __attribute__((always_inline)) __STATIC_INLINE uint8_t __LDRBT(volatile uint8_t *addr)
EricLew 0:3eee9435dd17 794 {
EricLew 0:3eee9435dd17 795 uint32_t result;
EricLew 0:3eee9435dd17 796
EricLew 0:3eee9435dd17 797 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
EricLew 0:3eee9435dd17 798 __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*addr) );
EricLew 0:3eee9435dd17 799 #else
EricLew 0:3eee9435dd17 800 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
EricLew 0:3eee9435dd17 801 accepted by assembler. So has to use following less efficient pattern.
EricLew 0:3eee9435dd17 802 */
EricLew 0:3eee9435dd17 803 __ASM volatile ("ldrbt %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
EricLew 0:3eee9435dd17 804 #endif
EricLew 0:3eee9435dd17 805 return ((uint8_t) result); /* Add explicit type cast here */
EricLew 0:3eee9435dd17 806 }
EricLew 0:3eee9435dd17 807
EricLew 0:3eee9435dd17 808
EricLew 0:3eee9435dd17 809 /** \brief LDRT Unprivileged (16 bit)
EricLew 0:3eee9435dd17 810
EricLew 0:3eee9435dd17 811 This function executes a Unprivileged LDRT instruction for 16 bit values.
EricLew 0:3eee9435dd17 812
EricLew 0:3eee9435dd17 813 \param [in] ptr Pointer to data
EricLew 0:3eee9435dd17 814 \return value of type uint16_t at (*ptr)
EricLew 0:3eee9435dd17 815 */
EricLew 0:3eee9435dd17 816 __attribute__((always_inline)) __STATIC_INLINE uint16_t __LDRHT(volatile uint16_t *addr)
EricLew 0:3eee9435dd17 817 {
EricLew 0:3eee9435dd17 818 uint32_t result;
EricLew 0:3eee9435dd17 819
EricLew 0:3eee9435dd17 820 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
EricLew 0:3eee9435dd17 821 __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*addr) );
EricLew 0:3eee9435dd17 822 #else
EricLew 0:3eee9435dd17 823 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
EricLew 0:3eee9435dd17 824 accepted by assembler. So has to use following less efficient pattern.
EricLew 0:3eee9435dd17 825 */
EricLew 0:3eee9435dd17 826 __ASM volatile ("ldrht %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
EricLew 0:3eee9435dd17 827 #endif
EricLew 0:3eee9435dd17 828 return ((uint16_t) result); /* Add explicit type cast here */
EricLew 0:3eee9435dd17 829 }
EricLew 0:3eee9435dd17 830
EricLew 0:3eee9435dd17 831
EricLew 0:3eee9435dd17 832 /** \brief LDRT Unprivileged (32 bit)
EricLew 0:3eee9435dd17 833
EricLew 0:3eee9435dd17 834 This function executes a Unprivileged LDRT instruction for 32 bit values.
EricLew 0:3eee9435dd17 835
EricLew 0:3eee9435dd17 836 \param [in] ptr Pointer to data
EricLew 0:3eee9435dd17 837 \return value of type uint32_t at (*ptr)
EricLew 0:3eee9435dd17 838 */
EricLew 0:3eee9435dd17 839 __attribute__((always_inline)) __STATIC_INLINE uint32_t __LDRT(volatile uint32_t *addr)
EricLew 0:3eee9435dd17 840 {
EricLew 0:3eee9435dd17 841 uint32_t result;
EricLew 0:3eee9435dd17 842
EricLew 0:3eee9435dd17 843 __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*addr) );
EricLew 0:3eee9435dd17 844 return(result);
EricLew 0:3eee9435dd17 845 }
EricLew 0:3eee9435dd17 846
EricLew 0:3eee9435dd17 847
EricLew 0:3eee9435dd17 848 /** \brief STRT Unprivileged (8 bit)
EricLew 0:3eee9435dd17 849
EricLew 0:3eee9435dd17 850 This function executes a Unprivileged STRT instruction for 8 bit values.
EricLew 0:3eee9435dd17 851
EricLew 0:3eee9435dd17 852 \param [in] value Value to store
EricLew 0:3eee9435dd17 853 \param [in] ptr Pointer to location
EricLew 0:3eee9435dd17 854 */
EricLew 0:3eee9435dd17 855 __attribute__((always_inline)) __STATIC_INLINE void __STRBT(uint8_t value, volatile uint8_t *addr)
EricLew 0:3eee9435dd17 856 {
EricLew 0:3eee9435dd17 857 __ASM volatile ("strbt %1, %0" : "=Q" (*addr) : "r" ((uint32_t)value) );
EricLew 0:3eee9435dd17 858 }
EricLew 0:3eee9435dd17 859
EricLew 0:3eee9435dd17 860
EricLew 0:3eee9435dd17 861 /** \brief STRT Unprivileged (16 bit)
EricLew 0:3eee9435dd17 862
EricLew 0:3eee9435dd17 863 This function executes a Unprivileged STRT instruction for 16 bit values.
EricLew 0:3eee9435dd17 864
EricLew 0:3eee9435dd17 865 \param [in] value Value to store
EricLew 0:3eee9435dd17 866 \param [in] ptr Pointer to location
EricLew 0:3eee9435dd17 867 */
EricLew 0:3eee9435dd17 868 __attribute__((always_inline)) __STATIC_INLINE void __STRHT(uint16_t value, volatile uint16_t *addr)
EricLew 0:3eee9435dd17 869 {
EricLew 0:3eee9435dd17 870 __ASM volatile ("strht %1, %0" : "=Q" (*addr) : "r" ((uint32_t)value) );
EricLew 0:3eee9435dd17 871 }
EricLew 0:3eee9435dd17 872
EricLew 0:3eee9435dd17 873
EricLew 0:3eee9435dd17 874 /** \brief STRT Unprivileged (32 bit)
EricLew 0:3eee9435dd17 875
EricLew 0:3eee9435dd17 876 This function executes a Unprivileged STRT instruction for 32 bit values.
EricLew 0:3eee9435dd17 877
EricLew 0:3eee9435dd17 878 \param [in] value Value to store
EricLew 0:3eee9435dd17 879 \param [in] ptr Pointer to location
EricLew 0:3eee9435dd17 880 */
EricLew 0:3eee9435dd17 881 __attribute__((always_inline)) __STATIC_INLINE void __STRT(uint32_t value, volatile uint32_t *addr)
EricLew 0:3eee9435dd17 882 {
EricLew 0:3eee9435dd17 883 __ASM volatile ("strt %1, %0" : "=Q" (*addr) : "r" (value) );
EricLew 0:3eee9435dd17 884 }
EricLew 0:3eee9435dd17 885
EricLew 0:3eee9435dd17 886 #endif /* (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300) */
EricLew 0:3eee9435dd17 887
EricLew 0:3eee9435dd17 888
EricLew 0:3eee9435dd17 889 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
EricLew 0:3eee9435dd17 890 /* IAR iccarm specific functions */
EricLew 0:3eee9435dd17 891 #include <cmsis_iar.h>
EricLew 0:3eee9435dd17 892
EricLew 0:3eee9435dd17 893
EricLew 0:3eee9435dd17 894 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
EricLew 0:3eee9435dd17 895 /* TI CCS specific functions */
EricLew 0:3eee9435dd17 896 #include <cmsis_ccs.h>
EricLew 0:3eee9435dd17 897
EricLew 0:3eee9435dd17 898
EricLew 0:3eee9435dd17 899 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
EricLew 0:3eee9435dd17 900 /* TASKING carm specific functions */
EricLew 0:3eee9435dd17 901 /*
EricLew 0:3eee9435dd17 902 * The CMSIS functions have been implemented as intrinsics in the compiler.
EricLew 0:3eee9435dd17 903 * Please use "carm -?i" to get an up to date list of all intrinsics,
EricLew 0:3eee9435dd17 904 * Including the CMSIS ones.
EricLew 0:3eee9435dd17 905 */
EricLew 0:3eee9435dd17 906
EricLew 0:3eee9435dd17 907
EricLew 0:3eee9435dd17 908 #elif defined ( __CSMC__ ) /*------------------ COSMIC Compiler -------------------*/
EricLew 0:3eee9435dd17 909 /* Cosmic specific functions */
EricLew 0:3eee9435dd17 910 #include <cmsis_csm.h>
EricLew 0:3eee9435dd17 911
EricLew 0:3eee9435dd17 912 #endif
EricLew 0:3eee9435dd17 913
EricLew 0:3eee9435dd17 914 /*@}*/ /* end of group CMSIS_Core_InstructionInterface */
EricLew 0:3eee9435dd17 915
EricLew 0:3eee9435dd17 916 #endif /* __CORE_CMINSTR_H */
EricLew 0:3eee9435dd17 917
EricLew 0:3eee9435dd17 918