iNEMO inertial module: 3D accelerometer and 3D gyroscope.
Dependencies: X_NUCLEO_COMMON ST_INTERFACES
Dependents: X_NUCLEO_IKS01A3 X_NUCLEO_IKS01A3
lsm6dso_reg.h@6:4774b86385e5, 2021-04-15 (annotated)
- Committer:
- cparata
- Date:
- Thu Apr 15 16:12:08 2021 +0000
- Revision:
- 6:4774b86385e5
- Parent:
- 5:b65c1498ae3f
Fix issue on INT2 event
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
cparata | 0:6d69e896ce38 | 1 | /* |
cparata | 0:6d69e896ce38 | 2 | ****************************************************************************** |
cparata | 0:6d69e896ce38 | 3 | * @file lsm6dso_reg.h |
cparata | 4:77faf76e3cd8 | 4 | * @author Sensors Software Solution Team |
cparata | 0:6d69e896ce38 | 5 | * @brief This file contains all the functions prototypes for the |
cparata | 0:6d69e896ce38 | 6 | * lsm6dso_reg.c driver. |
cparata | 0:6d69e896ce38 | 7 | ****************************************************************************** |
cparata | 0:6d69e896ce38 | 8 | * @attention |
cparata | 0:6d69e896ce38 | 9 | * |
cparata | 4:77faf76e3cd8 | 10 | * <h2><center>© Copyright (c) 2020 STMicroelectronics. |
cparata | 4:77faf76e3cd8 | 11 | * All rights reserved.</center></h2> |
cparata | 0:6d69e896ce38 | 12 | * |
cparata | 4:77faf76e3cd8 | 13 | * This software component is licensed by ST under BSD 3-Clause license, |
cparata | 4:77faf76e3cd8 | 14 | * the "License"; You may not use this file except in compliance with the |
cparata | 4:77faf76e3cd8 | 15 | * License. You may obtain a copy of the License at: |
cparata | 4:77faf76e3cd8 | 16 | * opensource.org/licenses/BSD-3-Clause |
cparata | 0:6d69e896ce38 | 17 | * |
cparata | 4:77faf76e3cd8 | 18 | ****************************************************************************** |
cparata | 4:77faf76e3cd8 | 19 | */ |
cparata | 0:6d69e896ce38 | 20 | |
cparata | 0:6d69e896ce38 | 21 | /* Define to prevent recursive inclusion -------------------------------------*/ |
cparata | 4:77faf76e3cd8 | 22 | #ifndef LSM6DSO_REGS_H |
cparata | 4:77faf76e3cd8 | 23 | #define LSM6DSO_REGS_H |
cparata | 0:6d69e896ce38 | 24 | |
cparata | 0:6d69e896ce38 | 25 | #ifdef __cplusplus |
cparata | 4:77faf76e3cd8 | 26 | extern "C" { |
cparata | 0:6d69e896ce38 | 27 | #endif |
cparata | 0:6d69e896ce38 | 28 | |
cparata | 0:6d69e896ce38 | 29 | /* Includes ------------------------------------------------------------------*/ |
cparata | 0:6d69e896ce38 | 30 | #include <stdint.h> |
cparata | 4:77faf76e3cd8 | 31 | #include <stddef.h> |
cparata | 0:6d69e896ce38 | 32 | #include <math.h> |
cparata | 0:6d69e896ce38 | 33 | |
cparata | 0:6d69e896ce38 | 34 | /** @addtogroup LSM6DSO |
cparata | 0:6d69e896ce38 | 35 | * @{ |
cparata | 0:6d69e896ce38 | 36 | * |
cparata | 0:6d69e896ce38 | 37 | */ |
cparata | 0:6d69e896ce38 | 38 | |
cparata | 4:77faf76e3cd8 | 39 | /** @defgroup STMicroelectronics sensors common types |
cparata | 0:6d69e896ce38 | 40 | * @{ |
cparata | 0:6d69e896ce38 | 41 | * |
cparata | 0:6d69e896ce38 | 42 | */ |
cparata | 0:6d69e896ce38 | 43 | |
cparata | 0:6d69e896ce38 | 44 | #ifndef MEMS_SHARED_TYPES |
cparata | 0:6d69e896ce38 | 45 | #define MEMS_SHARED_TYPES |
cparata | 0:6d69e896ce38 | 46 | |
cparata | 0:6d69e896ce38 | 47 | /** |
cparata | 0:6d69e896ce38 | 48 | * @defgroup axisXbitXX_t |
cparata | 0:6d69e896ce38 | 49 | * @brief These unions are useful to represent different sensors data type. |
cparata | 0:6d69e896ce38 | 50 | * These unions are not need by the driver. |
cparata | 0:6d69e896ce38 | 51 | * |
cparata | 0:6d69e896ce38 | 52 | * REMOVING the unions you are compliant with: |
cparata | 0:6d69e896ce38 | 53 | * MISRA-C 2012 [Rule 19.2] -> " Union are not allowed " |
cparata | 0:6d69e896ce38 | 54 | * |
cparata | 0:6d69e896ce38 | 55 | * @{ |
cparata | 0:6d69e896ce38 | 56 | * |
cparata | 0:6d69e896ce38 | 57 | */ |
cparata | 0:6d69e896ce38 | 58 | |
cparata | 3:4274d9103f1d | 59 | typedef union { |
cparata | 3:4274d9103f1d | 60 | int16_t i16bit[3]; |
cparata | 3:4274d9103f1d | 61 | uint8_t u8bit[6]; |
cparata | 0:6d69e896ce38 | 62 | } axis3bit16_t; |
cparata | 0:6d69e896ce38 | 63 | |
cparata | 3:4274d9103f1d | 64 | typedef union { |
cparata | 3:4274d9103f1d | 65 | int16_t i16bit; |
cparata | 3:4274d9103f1d | 66 | uint8_t u8bit[2]; |
cparata | 0:6d69e896ce38 | 67 | } axis1bit16_t; |
cparata | 0:6d69e896ce38 | 68 | |
cparata | 3:4274d9103f1d | 69 | typedef union { |
cparata | 3:4274d9103f1d | 70 | int32_t i32bit[3]; |
cparata | 3:4274d9103f1d | 71 | uint8_t u8bit[12]; |
cparata | 0:6d69e896ce38 | 72 | } axis3bit32_t; |
cparata | 0:6d69e896ce38 | 73 | |
cparata | 3:4274d9103f1d | 74 | typedef union { |
cparata | 3:4274d9103f1d | 75 | int32_t i32bit; |
cparata | 3:4274d9103f1d | 76 | uint8_t u8bit[4]; |
cparata | 0:6d69e896ce38 | 77 | } axis1bit32_t; |
cparata | 0:6d69e896ce38 | 78 | |
cparata | 0:6d69e896ce38 | 79 | /** |
cparata | 0:6d69e896ce38 | 80 | * @} |
cparata | 0:6d69e896ce38 | 81 | * |
cparata | 0:6d69e896ce38 | 82 | */ |
cparata | 0:6d69e896ce38 | 83 | |
cparata | 3:4274d9103f1d | 84 | typedef struct { |
cparata | 3:4274d9103f1d | 85 | uint8_t bit0 : 1; |
cparata | 3:4274d9103f1d | 86 | uint8_t bit1 : 1; |
cparata | 3:4274d9103f1d | 87 | uint8_t bit2 : 1; |
cparata | 3:4274d9103f1d | 88 | uint8_t bit3 : 1; |
cparata | 3:4274d9103f1d | 89 | uint8_t bit4 : 1; |
cparata | 3:4274d9103f1d | 90 | uint8_t bit5 : 1; |
cparata | 3:4274d9103f1d | 91 | uint8_t bit6 : 1; |
cparata | 3:4274d9103f1d | 92 | uint8_t bit7 : 1; |
cparata | 0:6d69e896ce38 | 93 | } bitwise_t; |
cparata | 0:6d69e896ce38 | 94 | |
cparata | 0:6d69e896ce38 | 95 | #define PROPERTY_DISABLE (0U) |
cparata | 0:6d69e896ce38 | 96 | #define PROPERTY_ENABLE (1U) |
cparata | 0:6d69e896ce38 | 97 | |
cparata | 0:6d69e896ce38 | 98 | #endif /* MEMS_SHARED_TYPES */ |
cparata | 0:6d69e896ce38 | 99 | |
cparata | 4:77faf76e3cd8 | 100 | #ifndef MEMS_UCF_SHARED_TYPES |
cparata | 4:77faf76e3cd8 | 101 | #define MEMS_UCF_SHARED_TYPES |
cparata | 4:77faf76e3cd8 | 102 | |
cparata | 4:77faf76e3cd8 | 103 | /** @defgroup Generic address-data structure definition |
cparata | 4:77faf76e3cd8 | 104 | * @brief This structure is useful to load a predefined configuration |
cparata | 4:77faf76e3cd8 | 105 | * of a sensor. |
cparata | 4:77faf76e3cd8 | 106 | * You can create a sensor configuration by your own or using |
cparata | 4:77faf76e3cd8 | 107 | * Unico / Unicleo tools available on STMicroelectronics |
cparata | 4:77faf76e3cd8 | 108 | * web site. |
cparata | 4:77faf76e3cd8 | 109 | * |
cparata | 4:77faf76e3cd8 | 110 | * @{ |
cparata | 4:77faf76e3cd8 | 111 | * |
cparata | 4:77faf76e3cd8 | 112 | */ |
cparata | 4:77faf76e3cd8 | 113 | |
cparata | 4:77faf76e3cd8 | 114 | typedef struct { |
cparata | 4:77faf76e3cd8 | 115 | uint8_t address; |
cparata | 4:77faf76e3cd8 | 116 | uint8_t data; |
cparata | 4:77faf76e3cd8 | 117 | } ucf_line_t; |
cparata | 4:77faf76e3cd8 | 118 | |
cparata | 4:77faf76e3cd8 | 119 | /** |
cparata | 4:77faf76e3cd8 | 120 | * @} |
cparata | 4:77faf76e3cd8 | 121 | * |
cparata | 4:77faf76e3cd8 | 122 | */ |
cparata | 4:77faf76e3cd8 | 123 | |
cparata | 4:77faf76e3cd8 | 124 | #endif /* MEMS_UCF_SHARED_TYPES */ |
cparata | 4:77faf76e3cd8 | 125 | |
cparata | 0:6d69e896ce38 | 126 | /** |
cparata | 0:6d69e896ce38 | 127 | * @} |
cparata | 0:6d69e896ce38 | 128 | * |
cparata | 0:6d69e896ce38 | 129 | */ |
cparata | 0:6d69e896ce38 | 130 | |
cparata | 0:6d69e896ce38 | 131 | /** @addtogroup LSM6DSO_Interfaces_Functions |
cparata | 0:6d69e896ce38 | 132 | * @brief This section provide a set of functions used to read and |
cparata | 0:6d69e896ce38 | 133 | * write a generic register of the device. |
cparata | 0:6d69e896ce38 | 134 | * MANDATORY: return 0 -> no Error. |
cparata | 0:6d69e896ce38 | 135 | * @{ |
cparata | 0:6d69e896ce38 | 136 | * |
cparata | 0:6d69e896ce38 | 137 | */ |
cparata | 0:6d69e896ce38 | 138 | |
cparata | 3:4274d9103f1d | 139 | typedef int32_t (*lsm6dso_write_ptr)(void *, uint8_t, uint8_t *, uint16_t); |
cparata | 3:4274d9103f1d | 140 | typedef int32_t (*lsm6dso_read_ptr)(void *, uint8_t, uint8_t *, uint16_t); |
cparata | 0:6d69e896ce38 | 141 | |
cparata | 0:6d69e896ce38 | 142 | typedef struct { |
cparata | 3:4274d9103f1d | 143 | /** Component mandatory fields **/ |
cparata | 3:4274d9103f1d | 144 | lsm6dso_write_ptr write_reg; |
cparata | 3:4274d9103f1d | 145 | lsm6dso_read_ptr read_reg; |
cparata | 3:4274d9103f1d | 146 | /** Customizable optional pointer **/ |
cparata | 3:4274d9103f1d | 147 | void *handle; |
cparata | 0:6d69e896ce38 | 148 | } lsm6dso_ctx_t; |
cparata | 0:6d69e896ce38 | 149 | |
cparata | 0:6d69e896ce38 | 150 | /** |
cparata | 0:6d69e896ce38 | 151 | * @} |
cparata | 0:6d69e896ce38 | 152 | * |
cparata | 0:6d69e896ce38 | 153 | */ |
cparata | 0:6d69e896ce38 | 154 | |
cparata | 0:6d69e896ce38 | 155 | /** @defgroup LSM6DSO_Infos |
cparata | 0:6d69e896ce38 | 156 | * @{ |
cparata | 0:6d69e896ce38 | 157 | * |
cparata | 0:6d69e896ce38 | 158 | */ |
cparata | 0:6d69e896ce38 | 159 | |
cparata | 0:6d69e896ce38 | 160 | /** I2C Device Address 8 bit format if SA0=0 -> D5 if SA0=1 -> D7 **/ |
cparata | 0:6d69e896ce38 | 161 | #define LSM6DSO_I2C_ADD_L 0xD5 |
cparata | 0:6d69e896ce38 | 162 | #define LSM6DSO_I2C_ADD_H 0xD7 |
cparata | 0:6d69e896ce38 | 163 | |
cparata | 0:6d69e896ce38 | 164 | /** Device Identification (Who am I) **/ |
cparata | 0:6d69e896ce38 | 165 | #define LSM6DSO_ID 0x6C |
cparata | 0:6d69e896ce38 | 166 | |
cparata | 0:6d69e896ce38 | 167 | /** |
cparata | 0:6d69e896ce38 | 168 | * @} |
cparata | 0:6d69e896ce38 | 169 | * |
cparata | 0:6d69e896ce38 | 170 | */ |
cparata | 0:6d69e896ce38 | 171 | |
cparata | 0:6d69e896ce38 | 172 | #define LSM6DSO_FUNC_CFG_ACCESS 0x01U |
cparata | 0:6d69e896ce38 | 173 | typedef struct { |
cparata | 4:77faf76e3cd8 | 174 | uint8_t not_used_01 : 6; |
cparata | 4:77faf76e3cd8 | 175 | uint8_t reg_access : 2; /* shub_reg_access + func_cfg_access */ |
cparata | 0:6d69e896ce38 | 176 | } lsm6dso_func_cfg_access_t; |
cparata | 0:6d69e896ce38 | 177 | |
cparata | 0:6d69e896ce38 | 178 | #define LSM6DSO_PIN_CTRL 0x02U |
cparata | 0:6d69e896ce38 | 179 | typedef struct { |
cparata | 4:77faf76e3cd8 | 180 | uint8_t not_used_01 : 6; |
cparata | 4:77faf76e3cd8 | 181 | uint8_t sdo_pu_en : 1; |
cparata | 4:77faf76e3cd8 | 182 | uint8_t ois_pu_dis : 1; |
cparata | 0:6d69e896ce38 | 183 | } lsm6dso_pin_ctrl_t; |
cparata | 0:6d69e896ce38 | 184 | |
cparata | 0:6d69e896ce38 | 185 | #define LSM6DSO_FIFO_CTRL1 0x07U |
cparata | 0:6d69e896ce38 | 186 | typedef struct { |
cparata | 4:77faf76e3cd8 | 187 | uint8_t wtm : 8; |
cparata | 0:6d69e896ce38 | 188 | } lsm6dso_fifo_ctrl1_t; |
cparata | 0:6d69e896ce38 | 189 | |
cparata | 0:6d69e896ce38 | 190 | #define LSM6DSO_FIFO_CTRL2 0x08U |
cparata | 0:6d69e896ce38 | 191 | typedef struct { |
cparata | 4:77faf76e3cd8 | 192 | uint8_t wtm : 1; |
cparata | 4:77faf76e3cd8 | 193 | uint8_t uncoptr_rate : 2; |
cparata | 4:77faf76e3cd8 | 194 | uint8_t not_used_01 : 1; |
cparata | 4:77faf76e3cd8 | 195 | uint8_t odrchg_en : 1; |
cparata | 4:77faf76e3cd8 | 196 | uint8_t not_used_02 : 1; |
cparata | 4:77faf76e3cd8 | 197 | uint8_t fifo_compr_rt_en : 1; |
cparata | 4:77faf76e3cd8 | 198 | uint8_t stop_on_wtm : 1; |
cparata | 0:6d69e896ce38 | 199 | } lsm6dso_fifo_ctrl2_t; |
cparata | 0:6d69e896ce38 | 200 | |
cparata | 0:6d69e896ce38 | 201 | #define LSM6DSO_FIFO_CTRL3 0x09U |
cparata | 0:6d69e896ce38 | 202 | typedef struct { |
cparata | 4:77faf76e3cd8 | 203 | uint8_t bdr_xl : 4; |
cparata | 4:77faf76e3cd8 | 204 | uint8_t bdr_gy : 4; |
cparata | 0:6d69e896ce38 | 205 | } lsm6dso_fifo_ctrl3_t; |
cparata | 0:6d69e896ce38 | 206 | |
cparata | 0:6d69e896ce38 | 207 | #define LSM6DSO_FIFO_CTRL4 0x0AU |
cparata | 0:6d69e896ce38 | 208 | typedef struct { |
cparata | 4:77faf76e3cd8 | 209 | uint8_t fifo_mode : 3; |
cparata | 4:77faf76e3cd8 | 210 | uint8_t not_used_01 : 1; |
cparata | 4:77faf76e3cd8 | 211 | uint8_t odr_t_batch : 2; |
cparata | 4:77faf76e3cd8 | 212 | uint8_t odr_ts_batch : 2; |
cparata | 0:6d69e896ce38 | 213 | } lsm6dso_fifo_ctrl4_t; |
cparata | 0:6d69e896ce38 | 214 | |
cparata | 0:6d69e896ce38 | 215 | #define LSM6DSO_COUNTER_BDR_REG1 0x0BU |
cparata | 0:6d69e896ce38 | 216 | typedef struct { |
cparata | 4:77faf76e3cd8 | 217 | uint8_t cnt_bdr_th : 3; |
cparata | 4:77faf76e3cd8 | 218 | uint8_t not_used_01 : 2; |
cparata | 4:77faf76e3cd8 | 219 | uint8_t trig_counter_bdr : 1; |
cparata | 4:77faf76e3cd8 | 220 | uint8_t rst_counter_bdr : 1; |
cparata | 4:77faf76e3cd8 | 221 | uint8_t dataready_pulsed : 1; |
cparata | 0:6d69e896ce38 | 222 | } lsm6dso_counter_bdr_reg1_t; |
cparata | 0:6d69e896ce38 | 223 | |
cparata | 0:6d69e896ce38 | 224 | #define LSM6DSO_COUNTER_BDR_REG2 0x0CU |
cparata | 0:6d69e896ce38 | 225 | typedef struct { |
cparata | 4:77faf76e3cd8 | 226 | uint8_t cnt_bdr_th : 8; |
cparata | 0:6d69e896ce38 | 227 | } lsm6dso_counter_bdr_reg2_t; |
cparata | 0:6d69e896ce38 | 228 | |
cparata | 0:6d69e896ce38 | 229 | #define LSM6DSO_INT1_CTRL 0x0D |
cparata | 0:6d69e896ce38 | 230 | typedef struct { |
cparata | 4:77faf76e3cd8 | 231 | uint8_t int1_drdy_xl : 1; |
cparata | 4:77faf76e3cd8 | 232 | uint8_t int1_drdy_g : 1; |
cparata | 4:77faf76e3cd8 | 233 | uint8_t int1_boot : 1; |
cparata | 4:77faf76e3cd8 | 234 | uint8_t int1_fifo_th : 1; |
cparata | 4:77faf76e3cd8 | 235 | uint8_t int1_fifo_ovr : 1; |
cparata | 4:77faf76e3cd8 | 236 | uint8_t int1_fifo_full : 1; |
cparata | 4:77faf76e3cd8 | 237 | uint8_t int1_cnt_bdr : 1; |
cparata | 4:77faf76e3cd8 | 238 | uint8_t den_drdy_flag : 1; |
cparata | 0:6d69e896ce38 | 239 | } lsm6dso_int1_ctrl_t; |
cparata | 0:6d69e896ce38 | 240 | |
cparata | 0:6d69e896ce38 | 241 | #define LSM6DSO_INT2_CTRL 0x0EU |
cparata | 0:6d69e896ce38 | 242 | typedef struct { |
cparata | 4:77faf76e3cd8 | 243 | uint8_t int2_drdy_xl : 1; |
cparata | 4:77faf76e3cd8 | 244 | uint8_t int2_drdy_g : 1; |
cparata | 4:77faf76e3cd8 | 245 | uint8_t int2_drdy_temp : 1; |
cparata | 4:77faf76e3cd8 | 246 | uint8_t int2_fifo_th : 1; |
cparata | 4:77faf76e3cd8 | 247 | uint8_t int2_fifo_ovr : 1; |
cparata | 4:77faf76e3cd8 | 248 | uint8_t int2_fifo_full : 1; |
cparata | 4:77faf76e3cd8 | 249 | uint8_t int2_cnt_bdr : 1; |
cparata | 4:77faf76e3cd8 | 250 | uint8_t not_used_01 : 1; |
cparata | 0:6d69e896ce38 | 251 | } lsm6dso_int2_ctrl_t; |
cparata | 0:6d69e896ce38 | 252 | |
cparata | 0:6d69e896ce38 | 253 | #define LSM6DSO_WHO_AM_I 0x0FU |
cparata | 0:6d69e896ce38 | 254 | #define LSM6DSO_CTRL1_XL 0x10U |
cparata | 0:6d69e896ce38 | 255 | typedef struct { |
cparata | 4:77faf76e3cd8 | 256 | uint8_t not_used_01 : 1; |
cparata | 4:77faf76e3cd8 | 257 | uint8_t lpf2_xl_en : 1; |
cparata | 4:77faf76e3cd8 | 258 | uint8_t fs_xl : 2; |
cparata | 4:77faf76e3cd8 | 259 | uint8_t odr_xl : 4; |
cparata | 0:6d69e896ce38 | 260 | } lsm6dso_ctrl1_xl_t; |
cparata | 0:6d69e896ce38 | 261 | |
cparata | 0:6d69e896ce38 | 262 | #define LSM6DSO_CTRL2_G 0x11U |
cparata | 0:6d69e896ce38 | 263 | typedef struct { |
cparata | 4:77faf76e3cd8 | 264 | uint8_t not_used_01 : 1; |
cparata | 4:77faf76e3cd8 | 265 | uint8_t fs_g : 3; /* fs_125 + fs_g */ |
cparata | 4:77faf76e3cd8 | 266 | uint8_t odr_g : 4; |
cparata | 0:6d69e896ce38 | 267 | } lsm6dso_ctrl2_g_t; |
cparata | 0:6d69e896ce38 | 268 | |
cparata | 0:6d69e896ce38 | 269 | #define LSM6DSO_CTRL3_C 0x12U |
cparata | 0:6d69e896ce38 | 270 | typedef struct { |
cparata | 4:77faf76e3cd8 | 271 | uint8_t sw_reset : 1; |
cparata | 4:77faf76e3cd8 | 272 | uint8_t not_used_01 : 1; |
cparata | 4:77faf76e3cd8 | 273 | uint8_t if_inc : 1; |
cparata | 4:77faf76e3cd8 | 274 | uint8_t sim : 1; |
cparata | 4:77faf76e3cd8 | 275 | uint8_t pp_od : 1; |
cparata | 4:77faf76e3cd8 | 276 | uint8_t h_lactive : 1; |
cparata | 4:77faf76e3cd8 | 277 | uint8_t bdu : 1; |
cparata | 4:77faf76e3cd8 | 278 | uint8_t boot : 1; |
cparata | 0:6d69e896ce38 | 279 | } lsm6dso_ctrl3_c_t; |
cparata | 0:6d69e896ce38 | 280 | |
cparata | 0:6d69e896ce38 | 281 | #define LSM6DSO_CTRL4_C 0x13U |
cparata | 0:6d69e896ce38 | 282 | typedef struct { |
cparata | 4:77faf76e3cd8 | 283 | uint8_t not_used_01 : 1; |
cparata | 4:77faf76e3cd8 | 284 | uint8_t lpf1_sel_g : 1; |
cparata | 4:77faf76e3cd8 | 285 | uint8_t i2c_disable : 1; |
cparata | 4:77faf76e3cd8 | 286 | uint8_t drdy_mask : 1; |
cparata | 4:77faf76e3cd8 | 287 | uint8_t not_used_02 : 1; |
cparata | 4:77faf76e3cd8 | 288 | uint8_t int2_on_int1 : 1; |
cparata | 4:77faf76e3cd8 | 289 | uint8_t sleep_g : 1; |
cparata | 4:77faf76e3cd8 | 290 | uint8_t not_used_03 : 1; |
cparata | 0:6d69e896ce38 | 291 | } lsm6dso_ctrl4_c_t; |
cparata | 0:6d69e896ce38 | 292 | |
cparata | 0:6d69e896ce38 | 293 | #define LSM6DSO_CTRL5_C 0x14U |
cparata | 0:6d69e896ce38 | 294 | typedef struct { |
cparata | 4:77faf76e3cd8 | 295 | uint8_t st_xl : 2; |
cparata | 4:77faf76e3cd8 | 296 | uint8_t st_g : 2; |
cparata | 4:77faf76e3cd8 | 297 | uint8_t not_used_01 : 1; |
cparata | 4:77faf76e3cd8 | 298 | uint8_t rounding : 2; |
cparata | 4:77faf76e3cd8 | 299 | uint8_t xl_ulp_en : 1; |
cparata | 0:6d69e896ce38 | 300 | } lsm6dso_ctrl5_c_t; |
cparata | 0:6d69e896ce38 | 301 | |
cparata | 0:6d69e896ce38 | 302 | #define LSM6DSO_CTRL6_C 0x15U |
cparata | 0:6d69e896ce38 | 303 | typedef struct { |
cparata | 4:77faf76e3cd8 | 304 | uint8_t ftype : 3; |
cparata | 4:77faf76e3cd8 | 305 | uint8_t usr_off_w : 1; |
cparata | 4:77faf76e3cd8 | 306 | uint8_t xl_hm_mode : 1; |
cparata | 4:77faf76e3cd8 | 307 | uint8_t den_mode : 3; /* trig_en + lvl1_en + lvl2_en */ |
cparata | 0:6d69e896ce38 | 308 | } lsm6dso_ctrl6_c_t; |
cparata | 0:6d69e896ce38 | 309 | |
cparata | 0:6d69e896ce38 | 310 | #define LSM6DSO_CTRL7_G 0x16U |
cparata | 0:6d69e896ce38 | 311 | typedef struct { |
cparata | 4:77faf76e3cd8 | 312 | uint8_t ois_on : 1; |
cparata | 4:77faf76e3cd8 | 313 | uint8_t usr_off_on_out : 1; |
cparata | 4:77faf76e3cd8 | 314 | uint8_t ois_on_en : 1; |
cparata | 4:77faf76e3cd8 | 315 | uint8_t not_used_01 : 1; |
cparata | 4:77faf76e3cd8 | 316 | uint8_t hpm_g : 2; |
cparata | 4:77faf76e3cd8 | 317 | uint8_t hp_en_g : 1; |
cparata | 4:77faf76e3cd8 | 318 | uint8_t g_hm_mode : 1; |
cparata | 0:6d69e896ce38 | 319 | } lsm6dso_ctrl7_g_t; |
cparata | 0:6d69e896ce38 | 320 | |
cparata | 0:6d69e896ce38 | 321 | #define LSM6DSO_CTRL8_XL 0x17U |
cparata | 0:6d69e896ce38 | 322 | typedef struct { |
cparata | 4:77faf76e3cd8 | 323 | uint8_t low_pass_on_6d : 1; |
cparata | 4:77faf76e3cd8 | 324 | uint8_t xl_fs_mode : 1; |
cparata | 4:77faf76e3cd8 | 325 | uint8_t hp_slope_xl_en : 1; |
cparata | 4:77faf76e3cd8 | 326 | uint8_t fastsettl_mode_xl : 1; |
cparata | 4:77faf76e3cd8 | 327 | uint8_t hp_ref_mode_xl : 1; |
cparata | 4:77faf76e3cd8 | 328 | uint8_t hpcf_xl : 3; |
cparata | 0:6d69e896ce38 | 329 | } lsm6dso_ctrl8_xl_t; |
cparata | 0:6d69e896ce38 | 330 | |
cparata | 0:6d69e896ce38 | 331 | #define LSM6DSO_CTRL9_XL 0x18U |
cparata | 0:6d69e896ce38 | 332 | typedef struct { |
cparata | 4:77faf76e3cd8 | 333 | uint8_t not_used_01 : 1; |
cparata | 4:77faf76e3cd8 | 334 | uint8_t i3c_disable : 1; |
cparata | 4:77faf76e3cd8 | 335 | uint8_t den_lh : 1; |
cparata | 4:77faf76e3cd8 | 336 | uint8_t den_xl_g : 2; /* den_xl_en + den_xl_g */ |
cparata | 4:77faf76e3cd8 | 337 | uint8_t den_z : 1; |
cparata | 4:77faf76e3cd8 | 338 | uint8_t den_y : 1; |
cparata | 4:77faf76e3cd8 | 339 | uint8_t den_x : 1; |
cparata | 0:6d69e896ce38 | 340 | } lsm6dso_ctrl9_xl_t; |
cparata | 0:6d69e896ce38 | 341 | |
cparata | 0:6d69e896ce38 | 342 | #define LSM6DSO_CTRL10_C 0x19U |
cparata | 0:6d69e896ce38 | 343 | typedef struct { |
cparata | 4:77faf76e3cd8 | 344 | uint8_t not_used_01 : 5; |
cparata | 4:77faf76e3cd8 | 345 | uint8_t timestamp_en : 1; |
cparata | 4:77faf76e3cd8 | 346 | uint8_t not_used_02 : 2; |
cparata | 0:6d69e896ce38 | 347 | } lsm6dso_ctrl10_c_t; |
cparata | 0:6d69e896ce38 | 348 | |
cparata | 0:6d69e896ce38 | 349 | #define LSM6DSO_ALL_INT_SRC 0x1AU |
cparata | 0:6d69e896ce38 | 350 | typedef struct { |
cparata | 4:77faf76e3cd8 | 351 | uint8_t ff_ia : 1; |
cparata | 4:77faf76e3cd8 | 352 | uint8_t wu_ia : 1; |
cparata | 4:77faf76e3cd8 | 353 | uint8_t single_tap : 1; |
cparata | 4:77faf76e3cd8 | 354 | uint8_t double_tap : 1; |
cparata | 4:77faf76e3cd8 | 355 | uint8_t d6d_ia : 1; |
cparata | 4:77faf76e3cd8 | 356 | uint8_t sleep_change_ia : 1; |
cparata | 4:77faf76e3cd8 | 357 | uint8_t not_used_01 : 1; |
cparata | 4:77faf76e3cd8 | 358 | uint8_t timestamp_endcount : 1; |
cparata | 0:6d69e896ce38 | 359 | } lsm6dso_all_int_src_t; |
cparata | 0:6d69e896ce38 | 360 | |
cparata | 0:6d69e896ce38 | 361 | #define LSM6DSO_WAKE_UP_SRC 0x1BU |
cparata | 0:6d69e896ce38 | 362 | typedef struct { |
cparata | 4:77faf76e3cd8 | 363 | uint8_t z_wu : 1; |
cparata | 4:77faf76e3cd8 | 364 | uint8_t y_wu : 1; |
cparata | 4:77faf76e3cd8 | 365 | uint8_t x_wu : 1; |
cparata | 4:77faf76e3cd8 | 366 | uint8_t wu_ia : 1; |
cparata | 4:77faf76e3cd8 | 367 | uint8_t sleep_state : 1; |
cparata | 4:77faf76e3cd8 | 368 | uint8_t ff_ia : 1; |
cparata | 4:77faf76e3cd8 | 369 | uint8_t sleep_change_ia : 1; |
cparata | 4:77faf76e3cd8 | 370 | uint8_t not_used_01 : 1; |
cparata | 0:6d69e896ce38 | 371 | } lsm6dso_wake_up_src_t; |
cparata | 0:6d69e896ce38 | 372 | |
cparata | 0:6d69e896ce38 | 373 | #define LSM6DSO_TAP_SRC 0x1CU |
cparata | 0:6d69e896ce38 | 374 | typedef struct { |
cparata | 4:77faf76e3cd8 | 375 | uint8_t z_tap : 1; |
cparata | 4:77faf76e3cd8 | 376 | uint8_t y_tap : 1; |
cparata | 4:77faf76e3cd8 | 377 | uint8_t x_tap : 1; |
cparata | 4:77faf76e3cd8 | 378 | uint8_t tap_sign : 1; |
cparata | 4:77faf76e3cd8 | 379 | uint8_t double_tap : 1; |
cparata | 4:77faf76e3cd8 | 380 | uint8_t single_tap : 1; |
cparata | 4:77faf76e3cd8 | 381 | uint8_t tap_ia : 1; |
cparata | 4:77faf76e3cd8 | 382 | uint8_t not_used_02 : 1; |
cparata | 0:6d69e896ce38 | 383 | } lsm6dso_tap_src_t; |
cparata | 0:6d69e896ce38 | 384 | |
cparata | 0:6d69e896ce38 | 385 | #define LSM6DSO_D6D_SRC 0x1DU |
cparata | 0:6d69e896ce38 | 386 | typedef struct { |
cparata | 4:77faf76e3cd8 | 387 | uint8_t xl : 1; |
cparata | 4:77faf76e3cd8 | 388 | uint8_t xh : 1; |
cparata | 4:77faf76e3cd8 | 389 | uint8_t yl : 1; |
cparata | 4:77faf76e3cd8 | 390 | uint8_t yh : 1; |
cparata | 4:77faf76e3cd8 | 391 | uint8_t zl : 1; |
cparata | 4:77faf76e3cd8 | 392 | uint8_t zh : 1; |
cparata | 4:77faf76e3cd8 | 393 | uint8_t d6d_ia : 1; |
cparata | 4:77faf76e3cd8 | 394 | uint8_t den_drdy : 1; |
cparata | 0:6d69e896ce38 | 395 | } lsm6dso_d6d_src_t; |
cparata | 0:6d69e896ce38 | 396 | |
cparata | 0:6d69e896ce38 | 397 | #define LSM6DSO_STATUS_REG 0x1EU |
cparata | 0:6d69e896ce38 | 398 | typedef struct { |
cparata | 4:77faf76e3cd8 | 399 | uint8_t xlda : 1; |
cparata | 4:77faf76e3cd8 | 400 | uint8_t gda : 1; |
cparata | 4:77faf76e3cd8 | 401 | uint8_t tda : 1; |
cparata | 4:77faf76e3cd8 | 402 | uint8_t not_used_01 : 5; |
cparata | 0:6d69e896ce38 | 403 | } lsm6dso_status_reg_t; |
cparata | 0:6d69e896ce38 | 404 | |
cparata | 0:6d69e896ce38 | 405 | #define LSM6DSO_STATUS_SPIAUX 0x1EU |
cparata | 0:6d69e896ce38 | 406 | typedef struct { |
cparata | 4:77faf76e3cd8 | 407 | uint8_t xlda : 1; |
cparata | 4:77faf76e3cd8 | 408 | uint8_t gda : 1; |
cparata | 4:77faf76e3cd8 | 409 | uint8_t gyro_settling : 1; |
cparata | 4:77faf76e3cd8 | 410 | uint8_t not_used_01 : 5; |
cparata | 0:6d69e896ce38 | 411 | } lsm6dso_status_spiaux_t; |
cparata | 0:6d69e896ce38 | 412 | |
cparata | 0:6d69e896ce38 | 413 | #define LSM6DSO_OUT_TEMP_L 0x20U |
cparata | 0:6d69e896ce38 | 414 | #define LSM6DSO_OUT_TEMP_H 0x21U |
cparata | 0:6d69e896ce38 | 415 | #define LSM6DSO_OUTX_L_G 0x22U |
cparata | 0:6d69e896ce38 | 416 | #define LSM6DSO_OUTX_H_G 0x23U |
cparata | 0:6d69e896ce38 | 417 | #define LSM6DSO_OUTY_L_G 0x24U |
cparata | 0:6d69e896ce38 | 418 | #define LSM6DSO_OUTY_H_G 0x25U |
cparata | 0:6d69e896ce38 | 419 | #define LSM6DSO_OUTZ_L_G 0x26U |
cparata | 0:6d69e896ce38 | 420 | #define LSM6DSO_OUTZ_H_G 0x27U |
cparata | 0:6d69e896ce38 | 421 | #define LSM6DSO_OUTX_L_A 0x28U |
cparata | 0:6d69e896ce38 | 422 | #define LSM6DSO_OUTX_H_A 0x29U |
cparata | 0:6d69e896ce38 | 423 | #define LSM6DSO_OUTY_L_A 0x2AU |
cparata | 0:6d69e896ce38 | 424 | #define LSM6DSO_OUTY_H_A 0x2BU |
cparata | 0:6d69e896ce38 | 425 | #define LSM6DSO_OUTZ_L_A 0x2CU |
cparata | 0:6d69e896ce38 | 426 | #define LSM6DSO_OUTZ_H_A 0x2DU |
cparata | 0:6d69e896ce38 | 427 | #define LSM6DSO_EMB_FUNC_STATUS_MAINPAGE 0x35U |
cparata | 0:6d69e896ce38 | 428 | typedef struct { |
cparata | 4:77faf76e3cd8 | 429 | uint8_t not_used_01 : 3; |
cparata | 4:77faf76e3cd8 | 430 | uint8_t is_step_det : 1; |
cparata | 4:77faf76e3cd8 | 431 | uint8_t is_tilt : 1; |
cparata | 4:77faf76e3cd8 | 432 | uint8_t is_sigmot : 1; |
cparata | 4:77faf76e3cd8 | 433 | uint8_t not_used_02 : 1; |
cparata | 4:77faf76e3cd8 | 434 | uint8_t is_fsm_lc : 1; |
cparata | 0:6d69e896ce38 | 435 | } lsm6dso_emb_func_status_mainpage_t; |
cparata | 0:6d69e896ce38 | 436 | |
cparata | 0:6d69e896ce38 | 437 | #define LSM6DSO_FSM_STATUS_A_MAINPAGE 0x36U |
cparata | 0:6d69e896ce38 | 438 | typedef struct { |
cparata | 4:77faf76e3cd8 | 439 | uint8_t is_fsm1 : 1; |
cparata | 4:77faf76e3cd8 | 440 | uint8_t is_fsm2 : 1; |
cparata | 4:77faf76e3cd8 | 441 | uint8_t is_fsm3 : 1; |
cparata | 4:77faf76e3cd8 | 442 | uint8_t is_fsm4 : 1; |
cparata | 4:77faf76e3cd8 | 443 | uint8_t is_fsm5 : 1; |
cparata | 4:77faf76e3cd8 | 444 | uint8_t is_fsm6 : 1; |
cparata | 4:77faf76e3cd8 | 445 | uint8_t is_fsm7 : 1; |
cparata | 4:77faf76e3cd8 | 446 | uint8_t is_fsm8 : 1; |
cparata | 4:77faf76e3cd8 | 447 | } lsm6dso_fsm_status_a_mainpage_t; |
cparata | 0:6d69e896ce38 | 448 | |
cparata | 0:6d69e896ce38 | 449 | #define LSM6DSO_FSM_STATUS_B_MAINPAGE 0x37U |
cparata | 0:6d69e896ce38 | 450 | typedef struct { |
cparata | 4:77faf76e3cd8 | 451 | uint8_t is_fsm9 : 1; |
cparata | 4:77faf76e3cd8 | 452 | uint8_t is_fsm10 : 1; |
cparata | 4:77faf76e3cd8 | 453 | uint8_t is_fsm11 : 1; |
cparata | 4:77faf76e3cd8 | 454 | uint8_t is_fsm12 : 1; |
cparata | 4:77faf76e3cd8 | 455 | uint8_t is_fsm13 : 1; |
cparata | 4:77faf76e3cd8 | 456 | uint8_t is_fsm14 : 1; |
cparata | 4:77faf76e3cd8 | 457 | uint8_t is_fsm15 : 1; |
cparata | 4:77faf76e3cd8 | 458 | uint8_t is_fsm16 : 1; |
cparata | 0:6d69e896ce38 | 459 | } lsm6dso_fsm_status_b_mainpage_t; |
cparata | 0:6d69e896ce38 | 460 | |
cparata | 0:6d69e896ce38 | 461 | #define LSM6DSO_STATUS_MASTER_MAINPAGE 0x39U |
cparata | 0:6d69e896ce38 | 462 | typedef struct { |
cparata | 4:77faf76e3cd8 | 463 | uint8_t sens_hub_endop : 1; |
cparata | 4:77faf76e3cd8 | 464 | uint8_t not_used_01 : 2; |
cparata | 4:77faf76e3cd8 | 465 | uint8_t slave0_nack : 1; |
cparata | 4:77faf76e3cd8 | 466 | uint8_t slave1_nack : 1; |
cparata | 4:77faf76e3cd8 | 467 | uint8_t slave2_nack : 1; |
cparata | 4:77faf76e3cd8 | 468 | uint8_t slave3_nack : 1; |
cparata | 4:77faf76e3cd8 | 469 | uint8_t wr_once_done : 1; |
cparata | 0:6d69e896ce38 | 470 | } lsm6dso_status_master_mainpage_t; |
cparata | 0:6d69e896ce38 | 471 | |
cparata | 0:6d69e896ce38 | 472 | #define LSM6DSO_FIFO_STATUS1 0x3AU |
cparata | 0:6d69e896ce38 | 473 | typedef struct { |
cparata | 4:77faf76e3cd8 | 474 | uint8_t diff_fifo : 8; |
cparata | 0:6d69e896ce38 | 475 | } lsm6dso_fifo_status1_t; |
cparata | 0:6d69e896ce38 | 476 | |
cparata | 0:6d69e896ce38 | 477 | #define LSM6DSO_FIFO_STATUS2 0x3B |
cparata | 0:6d69e896ce38 | 478 | typedef struct { |
cparata | 4:77faf76e3cd8 | 479 | uint8_t diff_fifo : 2; |
cparata | 4:77faf76e3cd8 | 480 | uint8_t not_used_01 : 1; |
cparata | 4:77faf76e3cd8 | 481 | uint8_t over_run_latched : 1; |
cparata | 4:77faf76e3cd8 | 482 | uint8_t counter_bdr_ia : 1; |
cparata | 4:77faf76e3cd8 | 483 | uint8_t fifo_full_ia : 1; |
cparata | 4:77faf76e3cd8 | 484 | uint8_t fifo_ovr_ia : 1; |
cparata | 4:77faf76e3cd8 | 485 | uint8_t fifo_wtm_ia : 1; |
cparata | 0:6d69e896ce38 | 486 | } lsm6dso_fifo_status2_t; |
cparata | 0:6d69e896ce38 | 487 | |
cparata | 0:6d69e896ce38 | 488 | #define LSM6DSO_TIMESTAMP0 0x40U |
cparata | 0:6d69e896ce38 | 489 | #define LSM6DSO_TIMESTAMP1 0x41U |
cparata | 0:6d69e896ce38 | 490 | #define LSM6DSO_TIMESTAMP2 0x42U |
cparata | 0:6d69e896ce38 | 491 | #define LSM6DSO_TIMESTAMP3 0x43U |
cparata | 0:6d69e896ce38 | 492 | #define LSM6DSO_TAP_CFG0 0x56U |
cparata | 0:6d69e896ce38 | 493 | typedef struct { |
cparata | 4:77faf76e3cd8 | 494 | uint8_t lir : 1; |
cparata | 4:77faf76e3cd8 | 495 | uint8_t tap_z_en : 1; |
cparata | 4:77faf76e3cd8 | 496 | uint8_t tap_y_en : 1; |
cparata | 4:77faf76e3cd8 | 497 | uint8_t tap_x_en : 1; |
cparata | 4:77faf76e3cd8 | 498 | uint8_t slope_fds : 1; |
cparata | 4:77faf76e3cd8 | 499 | uint8_t sleep_status_on_int : 1; |
cparata | 4:77faf76e3cd8 | 500 | uint8_t int_clr_on_read : 1; |
cparata | 4:77faf76e3cd8 | 501 | uint8_t not_used_01 : 1; |
cparata | 0:6d69e896ce38 | 502 | } lsm6dso_tap_cfg0_t; |
cparata | 0:6d69e896ce38 | 503 | |
cparata | 0:6d69e896ce38 | 504 | #define LSM6DSO_TAP_CFG1 0x57U |
cparata | 0:6d69e896ce38 | 505 | typedef struct { |
cparata | 4:77faf76e3cd8 | 506 | uint8_t tap_ths_x : 5; |
cparata | 4:77faf76e3cd8 | 507 | uint8_t tap_priority : 3; |
cparata | 0:6d69e896ce38 | 508 | } lsm6dso_tap_cfg1_t; |
cparata | 0:6d69e896ce38 | 509 | |
cparata | 0:6d69e896ce38 | 510 | #define LSM6DSO_TAP_CFG2 0x58U |
cparata | 0:6d69e896ce38 | 511 | typedef struct { |
cparata | 4:77faf76e3cd8 | 512 | uint8_t tap_ths_y : 5; |
cparata | 4:77faf76e3cd8 | 513 | uint8_t inact_en : 2; |
cparata | 4:77faf76e3cd8 | 514 | uint8_t interrupts_enable : 1; |
cparata | 0:6d69e896ce38 | 515 | } lsm6dso_tap_cfg2_t; |
cparata | 0:6d69e896ce38 | 516 | |
cparata | 0:6d69e896ce38 | 517 | #define LSM6DSO_TAP_THS_6D 0x59U |
cparata | 0:6d69e896ce38 | 518 | typedef struct { |
cparata | 4:77faf76e3cd8 | 519 | uint8_t tap_ths_z : 5; |
cparata | 4:77faf76e3cd8 | 520 | uint8_t sixd_ths : 2; |
cparata | 4:77faf76e3cd8 | 521 | uint8_t d4d_en : 1; |
cparata | 0:6d69e896ce38 | 522 | } lsm6dso_tap_ths_6d_t; |
cparata | 0:6d69e896ce38 | 523 | |
cparata | 0:6d69e896ce38 | 524 | #define LSM6DSO_INT_DUR2 0x5AU |
cparata | 0:6d69e896ce38 | 525 | typedef struct { |
cparata | 4:77faf76e3cd8 | 526 | uint8_t shock : 2; |
cparata | 4:77faf76e3cd8 | 527 | uint8_t quiet : 2; |
cparata | 4:77faf76e3cd8 | 528 | uint8_t dur : 4; |
cparata | 0:6d69e896ce38 | 529 | } lsm6dso_int_dur2_t; |
cparata | 0:6d69e896ce38 | 530 | |
cparata | 0:6d69e896ce38 | 531 | #define LSM6DSO_WAKE_UP_THS 0x5BU |
cparata | 0:6d69e896ce38 | 532 | typedef struct { |
cparata | 4:77faf76e3cd8 | 533 | uint8_t wk_ths : 6; |
cparata | 4:77faf76e3cd8 | 534 | uint8_t usr_off_on_wu : 1; |
cparata | 4:77faf76e3cd8 | 535 | uint8_t single_double_tap : 1; |
cparata | 0:6d69e896ce38 | 536 | } lsm6dso_wake_up_ths_t; |
cparata | 0:6d69e896ce38 | 537 | |
cparata | 0:6d69e896ce38 | 538 | #define LSM6DSO_WAKE_UP_DUR 0x5CU |
cparata | 0:6d69e896ce38 | 539 | typedef struct { |
cparata | 4:77faf76e3cd8 | 540 | uint8_t sleep_dur : 4; |
cparata | 4:77faf76e3cd8 | 541 | uint8_t wake_ths_w : 1; |
cparata | 4:77faf76e3cd8 | 542 | uint8_t wake_dur : 2; |
cparata | 4:77faf76e3cd8 | 543 | uint8_t ff_dur : 1; |
cparata | 0:6d69e896ce38 | 544 | } lsm6dso_wake_up_dur_t; |
cparata | 0:6d69e896ce38 | 545 | |
cparata | 0:6d69e896ce38 | 546 | #define LSM6DSO_FREE_FALL 0x5DU |
cparata | 0:6d69e896ce38 | 547 | typedef struct { |
cparata | 4:77faf76e3cd8 | 548 | uint8_t ff_ths : 3; |
cparata | 4:77faf76e3cd8 | 549 | uint8_t ff_dur : 5; |
cparata | 0:6d69e896ce38 | 550 | } lsm6dso_free_fall_t; |
cparata | 0:6d69e896ce38 | 551 | |
cparata | 0:6d69e896ce38 | 552 | #define LSM6DSO_MD1_CFG 0x5EU |
cparata | 0:6d69e896ce38 | 553 | typedef struct { |
cparata | 4:77faf76e3cd8 | 554 | uint8_t int1_shub : 1; |
cparata | 4:77faf76e3cd8 | 555 | uint8_t int1_emb_func : 1; |
cparata | 4:77faf76e3cd8 | 556 | uint8_t int1_6d : 1; |
cparata | 4:77faf76e3cd8 | 557 | uint8_t int1_double_tap : 1; |
cparata | 4:77faf76e3cd8 | 558 | uint8_t int1_ff : 1; |
cparata | 4:77faf76e3cd8 | 559 | uint8_t int1_wu : 1; |
cparata | 4:77faf76e3cd8 | 560 | uint8_t int1_single_tap : 1; |
cparata | 4:77faf76e3cd8 | 561 | uint8_t int1_sleep_change : 1; |
cparata | 0:6d69e896ce38 | 562 | } lsm6dso_md1_cfg_t; |
cparata | 0:6d69e896ce38 | 563 | |
cparata | 0:6d69e896ce38 | 564 | #define LSM6DSO_MD2_CFG 0x5FU |
cparata | 0:6d69e896ce38 | 565 | typedef struct { |
cparata | 4:77faf76e3cd8 | 566 | uint8_t int2_timestamp : 1; |
cparata | 4:77faf76e3cd8 | 567 | uint8_t int2_emb_func : 1; |
cparata | 4:77faf76e3cd8 | 568 | uint8_t int2_6d : 1; |
cparata | 4:77faf76e3cd8 | 569 | uint8_t int2_double_tap : 1; |
cparata | 4:77faf76e3cd8 | 570 | uint8_t int2_ff : 1; |
cparata | 4:77faf76e3cd8 | 571 | uint8_t int2_wu : 1; |
cparata | 4:77faf76e3cd8 | 572 | uint8_t int2_single_tap : 1; |
cparata | 4:77faf76e3cd8 | 573 | uint8_t int2_sleep_change : 1; |
cparata | 0:6d69e896ce38 | 574 | } lsm6dso_md2_cfg_t; |
cparata | 0:6d69e896ce38 | 575 | |
cparata | 0:6d69e896ce38 | 576 | #define LSM6DSO_I3C_BUS_AVB 0x62U |
cparata | 0:6d69e896ce38 | 577 | typedef struct { |
cparata | 4:77faf76e3cd8 | 578 | uint8_t pd_dis_int1 : 1; |
cparata | 4:77faf76e3cd8 | 579 | uint8_t not_used_01 : 2; |
cparata | 4:77faf76e3cd8 | 580 | uint8_t i3c_bus_avb_sel : 2; |
cparata | 4:77faf76e3cd8 | 581 | uint8_t not_used_02 : 3; |
cparata | 0:6d69e896ce38 | 582 | } lsm6dso_i3c_bus_avb_t; |
cparata | 0:6d69e896ce38 | 583 | |
cparata | 0:6d69e896ce38 | 584 | #define LSM6DSO_INTERNAL_FREQ_FINE 0x63U |
cparata | 0:6d69e896ce38 | 585 | typedef struct { |
cparata | 4:77faf76e3cd8 | 586 | uint8_t freq_fine : 8; |
cparata | 0:6d69e896ce38 | 587 | } lsm6dso_internal_freq_fine_t; |
cparata | 0:6d69e896ce38 | 588 | |
cparata | 0:6d69e896ce38 | 589 | #define LSM6DSO_INT_OIS 0x6FU |
cparata | 0:6d69e896ce38 | 590 | typedef struct { |
cparata | 4:77faf76e3cd8 | 591 | uint8_t st_xl_ois : 2; |
cparata | 4:77faf76e3cd8 | 592 | uint8_t not_used_01 : 3; |
cparata | 4:77faf76e3cd8 | 593 | uint8_t den_lh_ois : 1; |
cparata | 4:77faf76e3cd8 | 594 | uint8_t lvl2_ois : 1; |
cparata | 4:77faf76e3cd8 | 595 | uint8_t int2_drdy_ois : 1; |
cparata | 0:6d69e896ce38 | 596 | } lsm6dso_int_ois_t; |
cparata | 0:6d69e896ce38 | 597 | |
cparata | 0:6d69e896ce38 | 598 | #define LSM6DSO_CTRL1_OIS 0x70U |
cparata | 0:6d69e896ce38 | 599 | typedef struct { |
cparata | 4:77faf76e3cd8 | 600 | uint8_t ois_en_spi2 : 1; |
cparata | 4:77faf76e3cd8 | 601 | uint8_t fs_g_ois : 3; /* fs_125_ois + fs[1:0]_g_ois */ |
cparata | 4:77faf76e3cd8 | 602 | uint8_t mode4_en : 1; |
cparata | 4:77faf76e3cd8 | 603 | uint8_t sim_ois : 1; |
cparata | 4:77faf76e3cd8 | 604 | uint8_t lvl1_ois : 1; |
cparata | 4:77faf76e3cd8 | 605 | uint8_t not_used_01 : 1; |
cparata | 0:6d69e896ce38 | 606 | } lsm6dso_ctrl1_ois_t; |
cparata | 0:6d69e896ce38 | 607 | |
cparata | 0:6d69e896ce38 | 608 | #define LSM6DSO_CTRL2_OIS 0x71U |
cparata | 0:6d69e896ce38 | 609 | typedef struct { |
cparata | 4:77faf76e3cd8 | 610 | uint8_t hp_en_ois : 1; |
cparata | 4:77faf76e3cd8 | 611 | uint8_t ftype_ois : 2; |
cparata | 4:77faf76e3cd8 | 612 | uint8_t not_used_01 : 1; |
cparata | 4:77faf76e3cd8 | 613 | uint8_t hpm_ois : 2; |
cparata | 4:77faf76e3cd8 | 614 | uint8_t not_used_02 : 2; |
cparata | 0:6d69e896ce38 | 615 | } lsm6dso_ctrl2_ois_t; |
cparata | 0:6d69e896ce38 | 616 | |
cparata | 0:6d69e896ce38 | 617 | #define LSM6DSO_CTRL3_OIS 0x72U |
cparata | 0:6d69e896ce38 | 618 | typedef struct { |
cparata | 4:77faf76e3cd8 | 619 | uint8_t st_ois_clampdis : 1; |
cparata | 4:77faf76e3cd8 | 620 | uint8_t st_ois : 2; |
cparata | 4:77faf76e3cd8 | 621 | uint8_t filter_xl_conf_ois : 3; |
cparata | 4:77faf76e3cd8 | 622 | uint8_t fs_xl_ois : 2; |
cparata | 0:6d69e896ce38 | 623 | } lsm6dso_ctrl3_ois_t; |
cparata | 0:6d69e896ce38 | 624 | |
cparata | 0:6d69e896ce38 | 625 | #define LSM6DSO_X_OFS_USR 0x73U |
cparata | 0:6d69e896ce38 | 626 | #define LSM6DSO_Y_OFS_USR 0x74U |
cparata | 0:6d69e896ce38 | 627 | #define LSM6DSO_Z_OFS_USR 0x75U |
cparata | 0:6d69e896ce38 | 628 | #define LSM6DSO_FIFO_DATA_OUT_TAG 0x78U |
cparata | 0:6d69e896ce38 | 629 | typedef struct { |
cparata | 4:77faf76e3cd8 | 630 | uint8_t tag_parity : 1; |
cparata | 4:77faf76e3cd8 | 631 | uint8_t tag_cnt : 2; |
cparata | 4:77faf76e3cd8 | 632 | uint8_t tag_sensor : 5; |
cparata | 0:6d69e896ce38 | 633 | } lsm6dso_fifo_data_out_tag_t; |
cparata | 0:6d69e896ce38 | 634 | |
cparata | 0:6d69e896ce38 | 635 | #define LSM6DSO_FIFO_DATA_OUT_X_L 0x79U |
cparata | 0:6d69e896ce38 | 636 | #define LSM6DSO_FIFO_DATA_OUT_X_H 0x7AU |
cparata | 0:6d69e896ce38 | 637 | #define LSM6DSO_FIFO_DATA_OUT_Y_L 0x7BU |
cparata | 0:6d69e896ce38 | 638 | #define LSM6DSO_FIFO_DATA_OUT_Y_H 0x7CU |
cparata | 0:6d69e896ce38 | 639 | #define LSM6DSO_FIFO_DATA_OUT_Z_L 0x7DU |
cparata | 0:6d69e896ce38 | 640 | #define LSM6DSO_FIFO_DATA_OUT_Z_H 0x7EU |
cparata | 0:6d69e896ce38 | 641 | #define LSM6DSO_PAGE_SEL 0x02U |
cparata | 0:6d69e896ce38 | 642 | typedef struct { |
cparata | 4:77faf76e3cd8 | 643 | uint8_t not_used_01 : 4; |
cparata | 4:77faf76e3cd8 | 644 | uint8_t page_sel : 4; |
cparata | 0:6d69e896ce38 | 645 | } lsm6dso_page_sel_t; |
cparata | 0:6d69e896ce38 | 646 | |
cparata | 0:6d69e896ce38 | 647 | #define LSM6DSO_EMB_FUNC_EN_A 0x04U |
cparata | 0:6d69e896ce38 | 648 | typedef struct { |
cparata | 4:77faf76e3cd8 | 649 | uint8_t not_used_01 : 3; |
cparata | 4:77faf76e3cd8 | 650 | uint8_t pedo_en : 1; |
cparata | 4:77faf76e3cd8 | 651 | uint8_t tilt_en : 1; |
cparata | 4:77faf76e3cd8 | 652 | uint8_t sign_motion_en : 1; |
cparata | 4:77faf76e3cd8 | 653 | uint8_t not_used_02 : 2; |
cparata | 0:6d69e896ce38 | 654 | } lsm6dso_emb_func_en_a_t; |
cparata | 0:6d69e896ce38 | 655 | |
cparata | 0:6d69e896ce38 | 656 | #define LSM6DSO_EMB_FUNC_EN_B 0x05U |
cparata | 0:6d69e896ce38 | 657 | typedef struct { |
cparata | 4:77faf76e3cd8 | 658 | uint8_t fsm_en : 1; |
cparata | 4:77faf76e3cd8 | 659 | uint8_t not_used_01 : 2; |
cparata | 4:77faf76e3cd8 | 660 | uint8_t fifo_compr_en : 1; |
cparata | 4:77faf76e3cd8 | 661 | uint8_t pedo_adv_en : 1; |
cparata | 4:77faf76e3cd8 | 662 | uint8_t not_used_02 : 3; |
cparata | 0:6d69e896ce38 | 663 | } lsm6dso_emb_func_en_b_t; |
cparata | 0:6d69e896ce38 | 664 | |
cparata | 0:6d69e896ce38 | 665 | #define LSM6DSO_PAGE_ADDRESS 0x08U |
cparata | 0:6d69e896ce38 | 666 | typedef struct { |
cparata | 4:77faf76e3cd8 | 667 | uint8_t page_addr : 8; |
cparata | 0:6d69e896ce38 | 668 | } lsm6dso_page_address_t; |
cparata | 0:6d69e896ce38 | 669 | |
cparata | 0:6d69e896ce38 | 670 | #define LSM6DSO_PAGE_VALUE 0x09U |
cparata | 0:6d69e896ce38 | 671 | typedef struct { |
cparata | 4:77faf76e3cd8 | 672 | uint8_t page_value : 8; |
cparata | 0:6d69e896ce38 | 673 | } lsm6dso_page_value_t; |
cparata | 0:6d69e896ce38 | 674 | |
cparata | 0:6d69e896ce38 | 675 | #define LSM6DSO_EMB_FUNC_INT1 0x0AU |
cparata | 0:6d69e896ce38 | 676 | typedef struct { |
cparata | 4:77faf76e3cd8 | 677 | uint8_t not_used_01 : 3; |
cparata | 4:77faf76e3cd8 | 678 | uint8_t int1_step_detector : 1; |
cparata | 4:77faf76e3cd8 | 679 | uint8_t int1_tilt : 1; |
cparata | 4:77faf76e3cd8 | 680 | uint8_t int1_sig_mot : 1; |
cparata | 4:77faf76e3cd8 | 681 | uint8_t not_used_02 : 1; |
cparata | 4:77faf76e3cd8 | 682 | uint8_t int1_fsm_lc : 1; |
cparata | 0:6d69e896ce38 | 683 | } lsm6dso_emb_func_int1_t; |
cparata | 0:6d69e896ce38 | 684 | |
cparata | 0:6d69e896ce38 | 685 | #define LSM6DSO_FSM_INT1_A 0x0BU |
cparata | 0:6d69e896ce38 | 686 | typedef struct { |
cparata | 4:77faf76e3cd8 | 687 | uint8_t int1_fsm1 : 1; |
cparata | 4:77faf76e3cd8 | 688 | uint8_t int1_fsm2 : 1; |
cparata | 4:77faf76e3cd8 | 689 | uint8_t int1_fsm3 : 1; |
cparata | 4:77faf76e3cd8 | 690 | uint8_t int1_fsm4 : 1; |
cparata | 4:77faf76e3cd8 | 691 | uint8_t int1_fsm5 : 1; |
cparata | 4:77faf76e3cd8 | 692 | uint8_t int1_fsm6 : 1; |
cparata | 4:77faf76e3cd8 | 693 | uint8_t int1_fsm7 : 1; |
cparata | 4:77faf76e3cd8 | 694 | uint8_t int1_fsm8 : 1; |
cparata | 0:6d69e896ce38 | 695 | } lsm6dso_fsm_int1_a_t; |
cparata | 0:6d69e896ce38 | 696 | |
cparata | 0:6d69e896ce38 | 697 | #define LSM6DSO_FSM_INT1_B 0x0CU |
cparata | 0:6d69e896ce38 | 698 | typedef struct { |
cparata | 4:77faf76e3cd8 | 699 | uint8_t int1_fsm9 : 1; |
cparata | 4:77faf76e3cd8 | 700 | uint8_t int1_fsm10 : 1; |
cparata | 4:77faf76e3cd8 | 701 | uint8_t int1_fsm11 : 1; |
cparata | 4:77faf76e3cd8 | 702 | uint8_t int1_fsm12 : 1; |
cparata | 4:77faf76e3cd8 | 703 | uint8_t int1_fsm13 : 1; |
cparata | 4:77faf76e3cd8 | 704 | uint8_t int1_fsm14 : 1; |
cparata | 4:77faf76e3cd8 | 705 | uint8_t int1_fsm15 : 1; |
cparata | 4:77faf76e3cd8 | 706 | uint8_t int1_fsm16 : 1; |
cparata | 0:6d69e896ce38 | 707 | } lsm6dso_fsm_int1_b_t; |
cparata | 0:6d69e896ce38 | 708 | |
cparata | 0:6d69e896ce38 | 709 | #define LSM6DSO_EMB_FUNC_INT2 0x0EU |
cparata | 0:6d69e896ce38 | 710 | typedef struct { |
cparata | 4:77faf76e3cd8 | 711 | uint8_t not_used_01 : 3; |
cparata | 4:77faf76e3cd8 | 712 | uint8_t int2_step_detector : 1; |
cparata | 4:77faf76e3cd8 | 713 | uint8_t int2_tilt : 1; |
cparata | 4:77faf76e3cd8 | 714 | uint8_t int2_sig_mot : 1; |
cparata | 4:77faf76e3cd8 | 715 | uint8_t not_used_02 : 1; |
cparata | 4:77faf76e3cd8 | 716 | uint8_t int2_fsm_lc : 1; |
cparata | 0:6d69e896ce38 | 717 | } lsm6dso_emb_func_int2_t; |
cparata | 0:6d69e896ce38 | 718 | |
cparata | 0:6d69e896ce38 | 719 | #define LSM6DSO_FSM_INT2_A 0x0FU |
cparata | 0:6d69e896ce38 | 720 | typedef struct { |
cparata | 4:77faf76e3cd8 | 721 | uint8_t int2_fsm1 : 1; |
cparata | 4:77faf76e3cd8 | 722 | uint8_t int2_fsm2 : 1; |
cparata | 4:77faf76e3cd8 | 723 | uint8_t int2_fsm3 : 1; |
cparata | 4:77faf76e3cd8 | 724 | uint8_t int2_fsm4 : 1; |
cparata | 4:77faf76e3cd8 | 725 | uint8_t int2_fsm5 : 1; |
cparata | 4:77faf76e3cd8 | 726 | uint8_t int2_fsm6 : 1; |
cparata | 4:77faf76e3cd8 | 727 | uint8_t int2_fsm7 : 1; |
cparata | 4:77faf76e3cd8 | 728 | uint8_t int2_fsm8 : 1; |
cparata | 0:6d69e896ce38 | 729 | } lsm6dso_fsm_int2_a_t; |
cparata | 0:6d69e896ce38 | 730 | |
cparata | 0:6d69e896ce38 | 731 | #define LSM6DSO_FSM_INT2_B 0x10U |
cparata | 0:6d69e896ce38 | 732 | typedef struct { |
cparata | 4:77faf76e3cd8 | 733 | uint8_t int2_fsm9 : 1; |
cparata | 4:77faf76e3cd8 | 734 | uint8_t int2_fsm10 : 1; |
cparata | 4:77faf76e3cd8 | 735 | uint8_t int2_fsm11 : 1; |
cparata | 4:77faf76e3cd8 | 736 | uint8_t int2_fsm12 : 1; |
cparata | 4:77faf76e3cd8 | 737 | uint8_t int2_fsm13 : 1; |
cparata | 4:77faf76e3cd8 | 738 | uint8_t int2_fsm14 : 1; |
cparata | 4:77faf76e3cd8 | 739 | uint8_t int2_fsm15 : 1; |
cparata | 4:77faf76e3cd8 | 740 | uint8_t int2_fsm16 : 1; |
cparata | 0:6d69e896ce38 | 741 | } lsm6dso_fsm_int2_b_t; |
cparata | 0:6d69e896ce38 | 742 | |
cparata | 0:6d69e896ce38 | 743 | #define LSM6DSO_EMB_FUNC_STATUS 0x12U |
cparata | 0:6d69e896ce38 | 744 | typedef struct { |
cparata | 4:77faf76e3cd8 | 745 | uint8_t not_used_01 : 3; |
cparata | 4:77faf76e3cd8 | 746 | uint8_t is_step_det : 1; |
cparata | 4:77faf76e3cd8 | 747 | uint8_t is_tilt : 1; |
cparata | 4:77faf76e3cd8 | 748 | uint8_t is_sigmot : 1; |
cparata | 4:77faf76e3cd8 | 749 | uint8_t not_used_02 : 1; |
cparata | 4:77faf76e3cd8 | 750 | uint8_t is_fsm_lc : 1; |
cparata | 0:6d69e896ce38 | 751 | } lsm6dso_emb_func_status_t; |
cparata | 0:6d69e896ce38 | 752 | |
cparata | 0:6d69e896ce38 | 753 | #define LSM6DSO_FSM_STATUS_A 0x13U |
cparata | 0:6d69e896ce38 | 754 | typedef struct { |
cparata | 4:77faf76e3cd8 | 755 | uint8_t is_fsm1 : 1; |
cparata | 4:77faf76e3cd8 | 756 | uint8_t is_fsm2 : 1; |
cparata | 4:77faf76e3cd8 | 757 | uint8_t is_fsm3 : 1; |
cparata | 4:77faf76e3cd8 | 758 | uint8_t is_fsm4 : 1; |
cparata | 4:77faf76e3cd8 | 759 | uint8_t is_fsm5 : 1; |
cparata | 4:77faf76e3cd8 | 760 | uint8_t is_fsm6 : 1; |
cparata | 4:77faf76e3cd8 | 761 | uint8_t is_fsm7 : 1; |
cparata | 4:77faf76e3cd8 | 762 | uint8_t is_fsm8 : 1; |
cparata | 0:6d69e896ce38 | 763 | } lsm6dso_fsm_status_a_t; |
cparata | 0:6d69e896ce38 | 764 | |
cparata | 0:6d69e896ce38 | 765 | #define LSM6DSO_FSM_STATUS_B 0x14U |
cparata | 0:6d69e896ce38 | 766 | typedef struct { |
cparata | 4:77faf76e3cd8 | 767 | uint8_t is_fsm9 : 1; |
cparata | 4:77faf76e3cd8 | 768 | uint8_t is_fsm10 : 1; |
cparata | 4:77faf76e3cd8 | 769 | uint8_t is_fsm11 : 1; |
cparata | 4:77faf76e3cd8 | 770 | uint8_t is_fsm12 : 1; |
cparata | 4:77faf76e3cd8 | 771 | uint8_t is_fsm13 : 1; |
cparata | 4:77faf76e3cd8 | 772 | uint8_t is_fsm14 : 1; |
cparata | 4:77faf76e3cd8 | 773 | uint8_t is_fsm15 : 1; |
cparata | 4:77faf76e3cd8 | 774 | uint8_t is_fsm16 : 1; |
cparata | 0:6d69e896ce38 | 775 | } lsm6dso_fsm_status_b_t; |
cparata | 0:6d69e896ce38 | 776 | |
cparata | 0:6d69e896ce38 | 777 | #define LSM6DSO_PAGE_RW 0x17U |
cparata | 0:6d69e896ce38 | 778 | typedef struct { |
cparata | 4:77faf76e3cd8 | 779 | uint8_t not_used_01 : 5; |
cparata | 4:77faf76e3cd8 | 780 | uint8_t page_rw : 2; /* page_write + page_read */ |
cparata | 4:77faf76e3cd8 | 781 | uint8_t emb_func_lir : 1; |
cparata | 0:6d69e896ce38 | 782 | } lsm6dso_page_rw_t; |
cparata | 0:6d69e896ce38 | 783 | |
cparata | 4:77faf76e3cd8 | 784 | #define LSM6DSO_EMB_FUNC_FIFO_CFG 0x44U |
cparata | 0:6d69e896ce38 | 785 | typedef struct { |
cparata | 4:77faf76e3cd8 | 786 | uint8_t not_used_00 : 6; |
cparata | 4:77faf76e3cd8 | 787 | uint8_t pedo_fifo_en : 1; |
cparata | 4:77faf76e3cd8 | 788 | uint8_t not_used_01 : 1; |
cparata | 0:6d69e896ce38 | 789 | } lsm6dso_emb_func_fifo_cfg_t; |
cparata | 0:6d69e896ce38 | 790 | |
cparata | 0:6d69e896ce38 | 791 | #define LSM6DSO_FSM_ENABLE_A 0x46U |
cparata | 0:6d69e896ce38 | 792 | typedef struct { |
cparata | 4:77faf76e3cd8 | 793 | uint8_t fsm1_en : 1; |
cparata | 4:77faf76e3cd8 | 794 | uint8_t fsm2_en : 1; |
cparata | 4:77faf76e3cd8 | 795 | uint8_t fsm3_en : 1; |
cparata | 4:77faf76e3cd8 | 796 | uint8_t fsm4_en : 1; |
cparata | 4:77faf76e3cd8 | 797 | uint8_t fsm5_en : 1; |
cparata | 4:77faf76e3cd8 | 798 | uint8_t fsm6_en : 1; |
cparata | 4:77faf76e3cd8 | 799 | uint8_t fsm7_en : 1; |
cparata | 4:77faf76e3cd8 | 800 | uint8_t fsm8_en : 1; |
cparata | 0:6d69e896ce38 | 801 | } lsm6dso_fsm_enable_a_t; |
cparata | 0:6d69e896ce38 | 802 | |
cparata | 0:6d69e896ce38 | 803 | #define LSM6DSO_FSM_ENABLE_B 0x47U |
cparata | 0:6d69e896ce38 | 804 | typedef struct { |
cparata | 4:77faf76e3cd8 | 805 | uint8_t fsm9_en : 1; |
cparata | 4:77faf76e3cd8 | 806 | uint8_t fsm10_en : 1; |
cparata | 4:77faf76e3cd8 | 807 | uint8_t fsm11_en : 1; |
cparata | 4:77faf76e3cd8 | 808 | uint8_t fsm12_en : 1; |
cparata | 4:77faf76e3cd8 | 809 | uint8_t fsm13_en : 1; |
cparata | 4:77faf76e3cd8 | 810 | uint8_t fsm14_en : 1; |
cparata | 4:77faf76e3cd8 | 811 | uint8_t fsm15_en : 1; |
cparata | 4:77faf76e3cd8 | 812 | uint8_t fsm16_en : 1; |
cparata | 0:6d69e896ce38 | 813 | } lsm6dso_fsm_enable_b_t; |
cparata | 0:6d69e896ce38 | 814 | |
cparata | 0:6d69e896ce38 | 815 | #define LSM6DSO_FSM_LONG_COUNTER_L 0x48U |
cparata | 0:6d69e896ce38 | 816 | #define LSM6DSO_FSM_LONG_COUNTER_H 0x49U |
cparata | 0:6d69e896ce38 | 817 | #define LSM6DSO_FSM_LONG_COUNTER_CLEAR 0x4AU |
cparata | 0:6d69e896ce38 | 818 | typedef struct { |
cparata | 4:77faf76e3cd8 | 819 | uint8_t fsm_lc_clr : 2; /* fsm_lc_cleared + fsm_lc_clear */ |
cparata | 4:77faf76e3cd8 | 820 | uint8_t not_used_01 : 6; |
cparata | 0:6d69e896ce38 | 821 | } lsm6dso_fsm_long_counter_clear_t; |
cparata | 0:6d69e896ce38 | 822 | |
cparata | 0:6d69e896ce38 | 823 | #define LSM6DSO_FSM_OUTS1 0x4CU |
cparata | 0:6d69e896ce38 | 824 | typedef struct { |
cparata | 4:77faf76e3cd8 | 825 | uint8_t n_v : 1; |
cparata | 4:77faf76e3cd8 | 826 | uint8_t p_v : 1; |
cparata | 4:77faf76e3cd8 | 827 | uint8_t n_z : 1; |
cparata | 4:77faf76e3cd8 | 828 | uint8_t p_z : 1; |
cparata | 4:77faf76e3cd8 | 829 | uint8_t n_y : 1; |
cparata | 4:77faf76e3cd8 | 830 | uint8_t p_y : 1; |
cparata | 4:77faf76e3cd8 | 831 | uint8_t n_x : 1; |
cparata | 4:77faf76e3cd8 | 832 | uint8_t p_x : 1; |
cparata | 0:6d69e896ce38 | 833 | } lsm6dso_fsm_outs1_t; |
cparata | 0:6d69e896ce38 | 834 | |
cparata | 0:6d69e896ce38 | 835 | #define LSM6DSO_FSM_OUTS2 0x4DU |
cparata | 0:6d69e896ce38 | 836 | typedef struct { |
cparata | 4:77faf76e3cd8 | 837 | uint8_t n_v : 1; |
cparata | 4:77faf76e3cd8 | 838 | uint8_t p_v : 1; |
cparata | 4:77faf76e3cd8 | 839 | uint8_t n_z : 1; |
cparata | 4:77faf76e3cd8 | 840 | uint8_t p_z : 1; |
cparata | 4:77faf76e3cd8 | 841 | uint8_t n_y : 1; |
cparata | 4:77faf76e3cd8 | 842 | uint8_t p_y : 1; |
cparata | 4:77faf76e3cd8 | 843 | uint8_t n_x : 1; |
cparata | 4:77faf76e3cd8 | 844 | uint8_t p_x : 1; |
cparata | 0:6d69e896ce38 | 845 | } lsm6dso_fsm_outs2_t; |
cparata | 0:6d69e896ce38 | 846 | |
cparata | 0:6d69e896ce38 | 847 | #define LSM6DSO_FSM_OUTS3 0x4EU |
cparata | 0:6d69e896ce38 | 848 | typedef struct { |
cparata | 4:77faf76e3cd8 | 849 | uint8_t n_v : 1; |
cparata | 4:77faf76e3cd8 | 850 | uint8_t p_v : 1; |
cparata | 4:77faf76e3cd8 | 851 | uint8_t n_z : 1; |
cparata | 4:77faf76e3cd8 | 852 | uint8_t p_z : 1; |
cparata | 4:77faf76e3cd8 | 853 | uint8_t n_y : 1; |
cparata | 4:77faf76e3cd8 | 854 | uint8_t p_y : 1; |
cparata | 4:77faf76e3cd8 | 855 | uint8_t n_x : 1; |
cparata | 4:77faf76e3cd8 | 856 | uint8_t p_x : 1; |
cparata | 0:6d69e896ce38 | 857 | } lsm6dso_fsm_outs3_t; |
cparata | 0:6d69e896ce38 | 858 | |
cparata | 0:6d69e896ce38 | 859 | #define LSM6DSO_FSM_OUTS4 0x4FU |
cparata | 0:6d69e896ce38 | 860 | typedef struct { |
cparata | 4:77faf76e3cd8 | 861 | uint8_t n_v : 1; |
cparata | 4:77faf76e3cd8 | 862 | uint8_t p_v : 1; |
cparata | 4:77faf76e3cd8 | 863 | uint8_t n_z : 1; |
cparata | 4:77faf76e3cd8 | 864 | uint8_t p_z : 1; |
cparata | 4:77faf76e3cd8 | 865 | uint8_t n_y : 1; |
cparata | 4:77faf76e3cd8 | 866 | uint8_t p_y : 1; |
cparata | 4:77faf76e3cd8 | 867 | uint8_t n_x : 1; |
cparata | 4:77faf76e3cd8 | 868 | uint8_t p_x : 1; |
cparata | 0:6d69e896ce38 | 869 | } lsm6dso_fsm_outs4_t; |
cparata | 0:6d69e896ce38 | 870 | |
cparata | 0:6d69e896ce38 | 871 | #define LSM6DSO_FSM_OUTS5 0x50U |
cparata | 0:6d69e896ce38 | 872 | typedef struct { |
cparata | 4:77faf76e3cd8 | 873 | uint8_t n_v : 1; |
cparata | 4:77faf76e3cd8 | 874 | uint8_t p_v : 1; |
cparata | 4:77faf76e3cd8 | 875 | uint8_t n_z : 1; |
cparata | 4:77faf76e3cd8 | 876 | uint8_t p_z : 1; |
cparata | 4:77faf76e3cd8 | 877 | uint8_t n_y : 1; |
cparata | 4:77faf76e3cd8 | 878 | uint8_t p_y : 1; |
cparata | 4:77faf76e3cd8 | 879 | uint8_t n_x : 1; |
cparata | 4:77faf76e3cd8 | 880 | uint8_t p_x : 1; |
cparata | 0:6d69e896ce38 | 881 | } lsm6dso_fsm_outs5_t; |
cparata | 0:6d69e896ce38 | 882 | |
cparata | 0:6d69e896ce38 | 883 | #define LSM6DSO_FSM_OUTS6 0x51U |
cparata | 0:6d69e896ce38 | 884 | typedef struct { |
cparata | 4:77faf76e3cd8 | 885 | uint8_t n_v : 1; |
cparata | 4:77faf76e3cd8 | 886 | uint8_t p_v : 1; |
cparata | 4:77faf76e3cd8 | 887 | uint8_t n_z : 1; |
cparata | 4:77faf76e3cd8 | 888 | uint8_t p_z : 1; |
cparata | 4:77faf76e3cd8 | 889 | uint8_t n_y : 1; |
cparata | 4:77faf76e3cd8 | 890 | uint8_t p_y : 1; |
cparata | 4:77faf76e3cd8 | 891 | uint8_t n_x : 1; |
cparata | 4:77faf76e3cd8 | 892 | uint8_t p_x : 1; |
cparata | 0:6d69e896ce38 | 893 | } lsm6dso_fsm_outs6_t; |
cparata | 0:6d69e896ce38 | 894 | |
cparata | 0:6d69e896ce38 | 895 | #define LSM6DSO_FSM_OUTS7 0x52U |
cparata | 0:6d69e896ce38 | 896 | typedef struct { |
cparata | 4:77faf76e3cd8 | 897 | uint8_t n_v : 1; |
cparata | 4:77faf76e3cd8 | 898 | uint8_t p_v : 1; |
cparata | 4:77faf76e3cd8 | 899 | uint8_t n_z : 1; |
cparata | 4:77faf76e3cd8 | 900 | uint8_t p_z : 1; |
cparata | 4:77faf76e3cd8 | 901 | uint8_t n_y : 1; |
cparata | 4:77faf76e3cd8 | 902 | uint8_t p_y : 1; |
cparata | 4:77faf76e3cd8 | 903 | uint8_t n_x : 1; |
cparata | 4:77faf76e3cd8 | 904 | uint8_t p_x : 1; |
cparata | 0:6d69e896ce38 | 905 | } lsm6dso_fsm_outs7_t; |
cparata | 0:6d69e896ce38 | 906 | |
cparata | 0:6d69e896ce38 | 907 | #define LSM6DSO_FSM_OUTS8 0x53U |
cparata | 0:6d69e896ce38 | 908 | typedef struct { |
cparata | 4:77faf76e3cd8 | 909 | uint8_t n_v : 1; |
cparata | 4:77faf76e3cd8 | 910 | uint8_t p_v : 1; |
cparata | 4:77faf76e3cd8 | 911 | uint8_t n_z : 1; |
cparata | 4:77faf76e3cd8 | 912 | uint8_t p_z : 1; |
cparata | 4:77faf76e3cd8 | 913 | uint8_t n_y : 1; |
cparata | 4:77faf76e3cd8 | 914 | uint8_t p_y : 1; |
cparata | 4:77faf76e3cd8 | 915 | uint8_t n_x : 1; |
cparata | 4:77faf76e3cd8 | 916 | uint8_t p_x : 1; |
cparata | 0:6d69e896ce38 | 917 | } lsm6dso_fsm_outs8_t; |
cparata | 0:6d69e896ce38 | 918 | |
cparata | 0:6d69e896ce38 | 919 | #define LSM6DSO_FSM_OUTS9 0x54U |
cparata | 0:6d69e896ce38 | 920 | typedef struct { |
cparata | 4:77faf76e3cd8 | 921 | uint8_t n_v : 1; |
cparata | 4:77faf76e3cd8 | 922 | uint8_t p_v : 1; |
cparata | 4:77faf76e3cd8 | 923 | uint8_t n_z : 1; |
cparata | 4:77faf76e3cd8 | 924 | uint8_t p_z : 1; |
cparata | 4:77faf76e3cd8 | 925 | uint8_t n_y : 1; |
cparata | 4:77faf76e3cd8 | 926 | uint8_t p_y : 1; |
cparata | 4:77faf76e3cd8 | 927 | uint8_t n_x : 1; |
cparata | 4:77faf76e3cd8 | 928 | uint8_t p_x : 1; |
cparata | 0:6d69e896ce38 | 929 | } lsm6dso_fsm_outs9_t; |
cparata | 0:6d69e896ce38 | 930 | |
cparata | 0:6d69e896ce38 | 931 | #define LSM6DSO_FSM_OUTS10 0x55U |
cparata | 0:6d69e896ce38 | 932 | typedef struct { |
cparata | 4:77faf76e3cd8 | 933 | uint8_t n_v : 1; |
cparata | 4:77faf76e3cd8 | 934 | uint8_t p_v : 1; |
cparata | 4:77faf76e3cd8 | 935 | uint8_t n_z : 1; |
cparata | 4:77faf76e3cd8 | 936 | uint8_t p_z : 1; |
cparata | 4:77faf76e3cd8 | 937 | uint8_t n_y : 1; |
cparata | 4:77faf76e3cd8 | 938 | uint8_t p_y : 1; |
cparata | 4:77faf76e3cd8 | 939 | uint8_t n_x : 1; |
cparata | 4:77faf76e3cd8 | 940 | uint8_t p_x : 1; |
cparata | 0:6d69e896ce38 | 941 | } lsm6dso_fsm_outs10_t; |
cparata | 0:6d69e896ce38 | 942 | |
cparata | 0:6d69e896ce38 | 943 | #define LSM6DSO_FSM_OUTS11 0x56U |
cparata | 0:6d69e896ce38 | 944 | typedef struct { |
cparata | 4:77faf76e3cd8 | 945 | uint8_t n_v : 1; |
cparata | 4:77faf76e3cd8 | 946 | uint8_t p_v : 1; |
cparata | 4:77faf76e3cd8 | 947 | uint8_t n_z : 1; |
cparata | 4:77faf76e3cd8 | 948 | uint8_t p_z : 1; |
cparata | 4:77faf76e3cd8 | 949 | uint8_t n_y : 1; |
cparata | 4:77faf76e3cd8 | 950 | uint8_t p_y : 1; |
cparata | 4:77faf76e3cd8 | 951 | uint8_t n_x : 1; |
cparata | 4:77faf76e3cd8 | 952 | uint8_t p_x : 1; |
cparata | 0:6d69e896ce38 | 953 | } lsm6dso_fsm_outs11_t; |
cparata | 0:6d69e896ce38 | 954 | |
cparata | 0:6d69e896ce38 | 955 | #define LSM6DSO_FSM_OUTS12 0x57U |
cparata | 0:6d69e896ce38 | 956 | typedef struct { |
cparata | 4:77faf76e3cd8 | 957 | uint8_t n_v : 1; |
cparata | 4:77faf76e3cd8 | 958 | uint8_t p_v : 1; |
cparata | 4:77faf76e3cd8 | 959 | uint8_t n_z : 1; |
cparata | 4:77faf76e3cd8 | 960 | uint8_t p_z : 1; |
cparata | 4:77faf76e3cd8 | 961 | uint8_t n_y : 1; |
cparata | 4:77faf76e3cd8 | 962 | uint8_t p_y : 1; |
cparata | 4:77faf76e3cd8 | 963 | uint8_t n_x : 1; |
cparata | 4:77faf76e3cd8 | 964 | uint8_t p_x : 1; |
cparata | 0:6d69e896ce38 | 965 | } lsm6dso_fsm_outs12_t; |
cparata | 0:6d69e896ce38 | 966 | |
cparata | 0:6d69e896ce38 | 967 | #define LSM6DSO_FSM_OUTS13 0x58U |
cparata | 0:6d69e896ce38 | 968 | typedef struct { |
cparata | 4:77faf76e3cd8 | 969 | uint8_t n_v : 1; |
cparata | 4:77faf76e3cd8 | 970 | uint8_t p_v : 1; |
cparata | 4:77faf76e3cd8 | 971 | uint8_t n_z : 1; |
cparata | 4:77faf76e3cd8 | 972 | uint8_t p_z : 1; |
cparata | 4:77faf76e3cd8 | 973 | uint8_t n_y : 1; |
cparata | 4:77faf76e3cd8 | 974 | uint8_t p_y : 1; |
cparata | 4:77faf76e3cd8 | 975 | uint8_t n_x : 1; |
cparata | 4:77faf76e3cd8 | 976 | uint8_t p_x : 1; |
cparata | 0:6d69e896ce38 | 977 | } lsm6dso_fsm_outs13_t; |
cparata | 0:6d69e896ce38 | 978 | |
cparata | 0:6d69e896ce38 | 979 | #define LSM6DSO_FSM_OUTS14 0x59U |
cparata | 0:6d69e896ce38 | 980 | typedef struct { |
cparata | 4:77faf76e3cd8 | 981 | uint8_t n_v : 1; |
cparata | 4:77faf76e3cd8 | 982 | uint8_t p_v : 1; |
cparata | 4:77faf76e3cd8 | 983 | uint8_t n_z : 1; |
cparata | 4:77faf76e3cd8 | 984 | uint8_t p_z : 1; |
cparata | 4:77faf76e3cd8 | 985 | uint8_t n_y : 1; |
cparata | 4:77faf76e3cd8 | 986 | uint8_t p_y : 1; |
cparata | 4:77faf76e3cd8 | 987 | uint8_t n_x : 1; |
cparata | 4:77faf76e3cd8 | 988 | uint8_t p_x : 1; |
cparata | 0:6d69e896ce38 | 989 | } lsm6dso_fsm_outs14_t; |
cparata | 0:6d69e896ce38 | 990 | |
cparata | 0:6d69e896ce38 | 991 | #define LSM6DSO_FSM_OUTS15 0x5AU |
cparata | 0:6d69e896ce38 | 992 | typedef struct { |
cparata | 4:77faf76e3cd8 | 993 | uint8_t n_v : 1; |
cparata | 4:77faf76e3cd8 | 994 | uint8_t p_v : 1; |
cparata | 4:77faf76e3cd8 | 995 | uint8_t n_z : 1; |
cparata | 4:77faf76e3cd8 | 996 | uint8_t p_z : 1; |
cparata | 4:77faf76e3cd8 | 997 | uint8_t n_y : 1; |
cparata | 4:77faf76e3cd8 | 998 | uint8_t p_y : 1; |
cparata | 4:77faf76e3cd8 | 999 | uint8_t n_x : 1; |
cparata | 4:77faf76e3cd8 | 1000 | uint8_t p_x : 1; |
cparata | 0:6d69e896ce38 | 1001 | } lsm6dso_fsm_outs15_t; |
cparata | 0:6d69e896ce38 | 1002 | |
cparata | 0:6d69e896ce38 | 1003 | #define LSM6DSO_FSM_OUTS16 0x5BU |
cparata | 0:6d69e896ce38 | 1004 | typedef struct { |
cparata | 4:77faf76e3cd8 | 1005 | uint8_t n_v : 1; |
cparata | 4:77faf76e3cd8 | 1006 | uint8_t p_v : 1; |
cparata | 4:77faf76e3cd8 | 1007 | uint8_t n_z : 1; |
cparata | 4:77faf76e3cd8 | 1008 | uint8_t p_z : 1; |
cparata | 4:77faf76e3cd8 | 1009 | uint8_t n_y : 1; |
cparata | 4:77faf76e3cd8 | 1010 | uint8_t p_y : 1; |
cparata | 4:77faf76e3cd8 | 1011 | uint8_t n_x : 1; |
cparata | 4:77faf76e3cd8 | 1012 | uint8_t p_x : 1; |
cparata | 0:6d69e896ce38 | 1013 | } lsm6dso_fsm_outs16_t; |
cparata | 0:6d69e896ce38 | 1014 | |
cparata | 0:6d69e896ce38 | 1015 | #define LSM6DSO_EMB_FUNC_ODR_CFG_B 0x5FU |
cparata | 0:6d69e896ce38 | 1016 | typedef struct { |
cparata | 4:77faf76e3cd8 | 1017 | uint8_t not_used_01 : 3; |
cparata | 4:77faf76e3cd8 | 1018 | uint8_t fsm_odr : 2; |
cparata | 4:77faf76e3cd8 | 1019 | uint8_t not_used_02 : 3; |
cparata | 0:6d69e896ce38 | 1020 | } lsm6dso_emb_func_odr_cfg_b_t; |
cparata | 0:6d69e896ce38 | 1021 | |
cparata | 0:6d69e896ce38 | 1022 | #define LSM6DSO_STEP_COUNTER_L 0x62U |
cparata | 0:6d69e896ce38 | 1023 | #define LSM6DSO_STEP_COUNTER_H 0x63U |
cparata | 0:6d69e896ce38 | 1024 | #define LSM6DSO_EMB_FUNC_SRC 0x64U |
cparata | 0:6d69e896ce38 | 1025 | typedef struct { |
cparata | 4:77faf76e3cd8 | 1026 | uint8_t not_used_01 : 2; |
cparata | 4:77faf76e3cd8 | 1027 | uint8_t stepcounter_bit_set : 1; |
cparata | 4:77faf76e3cd8 | 1028 | uint8_t step_overflow : 1; |
cparata | 4:77faf76e3cd8 | 1029 | uint8_t step_count_delta_ia : 1; |
cparata | 4:77faf76e3cd8 | 1030 | uint8_t step_detected : 1; |
cparata | 4:77faf76e3cd8 | 1031 | uint8_t not_used_02 : 1; |
cparata | 4:77faf76e3cd8 | 1032 | uint8_t pedo_rst_step : 1; |
cparata | 0:6d69e896ce38 | 1033 | } lsm6dso_emb_func_src_t; |
cparata | 0:6d69e896ce38 | 1034 | |
cparata | 0:6d69e896ce38 | 1035 | #define LSM6DSO_EMB_FUNC_INIT_A 0x66U |
cparata | 0:6d69e896ce38 | 1036 | typedef struct { |
cparata | 4:77faf76e3cd8 | 1037 | uint8_t not_used_01 : 3; |
cparata | 4:77faf76e3cd8 | 1038 | uint8_t step_det_init : 1; |
cparata | 4:77faf76e3cd8 | 1039 | uint8_t tilt_init : 1; |
cparata | 4:77faf76e3cd8 | 1040 | uint8_t sig_mot_init : 1; |
cparata | 4:77faf76e3cd8 | 1041 | uint8_t not_used_02 : 2; |
cparata | 0:6d69e896ce38 | 1042 | } lsm6dso_emb_func_init_a_t; |
cparata | 0:6d69e896ce38 | 1043 | |
cparata | 0:6d69e896ce38 | 1044 | #define LSM6DSO_EMB_FUNC_INIT_B 0x67U |
cparata | 0:6d69e896ce38 | 1045 | typedef struct { |
cparata | 4:77faf76e3cd8 | 1046 | uint8_t fsm_init : 1; |
cparata | 4:77faf76e3cd8 | 1047 | uint8_t not_used_01 : 2; |
cparata | 4:77faf76e3cd8 | 1048 | uint8_t fifo_compr_init : 1; |
cparata | 4:77faf76e3cd8 | 1049 | uint8_t not_used_02 : 4; |
cparata | 0:6d69e896ce38 | 1050 | } lsm6dso_emb_func_init_b_t; |
cparata | 0:6d69e896ce38 | 1051 | |
cparata | 0:6d69e896ce38 | 1052 | #define LSM6DSO_MAG_SENSITIVITY_L 0xBAU |
cparata | 0:6d69e896ce38 | 1053 | #define LSM6DSO_MAG_SENSITIVITY_H 0xBBU |
cparata | 0:6d69e896ce38 | 1054 | #define LSM6DSO_MAG_OFFX_L 0xC0U |
cparata | 0:6d69e896ce38 | 1055 | #define LSM6DSO_MAG_OFFX_H 0xC1U |
cparata | 0:6d69e896ce38 | 1056 | #define LSM6DSO_MAG_OFFY_L 0xC2U |
cparata | 0:6d69e896ce38 | 1057 | #define LSM6DSO_MAG_OFFY_H 0xC3U |
cparata | 0:6d69e896ce38 | 1058 | #define LSM6DSO_MAG_OFFZ_L 0xC4U |
cparata | 0:6d69e896ce38 | 1059 | #define LSM6DSO_MAG_OFFZ_H 0xC5U |
cparata | 0:6d69e896ce38 | 1060 | #define LSM6DSO_MAG_SI_XX_L 0xC6U |
cparata | 0:6d69e896ce38 | 1061 | #define LSM6DSO_MAG_SI_XX_H 0xC7U |
cparata | 0:6d69e896ce38 | 1062 | #define LSM6DSO_MAG_SI_XY_L 0xC8U |
cparata | 0:6d69e896ce38 | 1063 | #define LSM6DSO_MAG_SI_XY_H 0xC9U |
cparata | 0:6d69e896ce38 | 1064 | #define LSM6DSO_MAG_SI_XZ_L 0xCAU |
cparata | 0:6d69e896ce38 | 1065 | #define LSM6DSO_MAG_SI_XZ_H 0xCBU |
cparata | 0:6d69e896ce38 | 1066 | #define LSM6DSO_MAG_SI_YY_L 0xCCU |
cparata | 0:6d69e896ce38 | 1067 | #define LSM6DSO_MAG_SI_YY_H 0xCDU |
cparata | 0:6d69e896ce38 | 1068 | #define LSM6DSO_MAG_SI_YZ_L 0xCEU |
cparata | 0:6d69e896ce38 | 1069 | #define LSM6DSO_MAG_SI_YZ_H 0xCFU |
cparata | 0:6d69e896ce38 | 1070 | #define LSM6DSO_MAG_SI_ZZ_L 0xD0U |
cparata | 0:6d69e896ce38 | 1071 | #define LSM6DSO_MAG_SI_ZZ_H 0xD1U |
cparata | 0:6d69e896ce38 | 1072 | #define LSM6DSO_MAG_CFG_A 0xD4U |
cparata | 0:6d69e896ce38 | 1073 | typedef struct { |
cparata | 4:77faf76e3cd8 | 1074 | uint8_t mag_z_axis : 3; |
cparata | 4:77faf76e3cd8 | 1075 | uint8_t not_used_01 : 1; |
cparata | 4:77faf76e3cd8 | 1076 | uint8_t mag_y_axis : 3; |
cparata | 4:77faf76e3cd8 | 1077 | uint8_t not_used_02 : 1; |
cparata | 0:6d69e896ce38 | 1078 | } lsm6dso_mag_cfg_a_t; |
cparata | 0:6d69e896ce38 | 1079 | |
cparata | 0:6d69e896ce38 | 1080 | #define LSM6DSO_MAG_CFG_B 0xD5U |
cparata | 0:6d69e896ce38 | 1081 | typedef struct { |
cparata | 4:77faf76e3cd8 | 1082 | uint8_t mag_x_axis : 3; |
cparata | 4:77faf76e3cd8 | 1083 | uint8_t not_used_01 : 5; |
cparata | 0:6d69e896ce38 | 1084 | } lsm6dso_mag_cfg_b_t; |
cparata | 0:6d69e896ce38 | 1085 | |
cparata | 0:6d69e896ce38 | 1086 | #define LSM6DSO_FSM_LC_TIMEOUT_L 0x17AU |
cparata | 0:6d69e896ce38 | 1087 | #define LSM6DSO_FSM_LC_TIMEOUT_H 0x17BU |
cparata | 0:6d69e896ce38 | 1088 | #define LSM6DSO_FSM_PROGRAMS 0x17CU |
cparata | 0:6d69e896ce38 | 1089 | #define LSM6DSO_FSM_START_ADD_L 0x17EU |
cparata | 0:6d69e896ce38 | 1090 | #define LSM6DSO_FSM_START_ADD_H 0x17FU |
cparata | 0:6d69e896ce38 | 1091 | #define LSM6DSO_PEDO_CMD_REG 0x183U |
cparata | 0:6d69e896ce38 | 1092 | typedef struct { |
cparata | 4:77faf76e3cd8 | 1093 | uint8_t ad_det_en : 1; |
cparata | 4:77faf76e3cd8 | 1094 | uint8_t not_used_01 : 1; |
cparata | 4:77faf76e3cd8 | 1095 | uint8_t fp_rejection_en : 1; |
cparata | 4:77faf76e3cd8 | 1096 | uint8_t carry_count_en : 1; |
cparata | 4:77faf76e3cd8 | 1097 | uint8_t not_used_02 : 4; |
cparata | 0:6d69e896ce38 | 1098 | } lsm6dso_pedo_cmd_reg_t; |
cparata | 0:6d69e896ce38 | 1099 | |
cparata | 0:6d69e896ce38 | 1100 | #define LSM6DSO_PEDO_DEB_STEPS_CONF 0x184U |
cparata | 0:6d69e896ce38 | 1101 | #define LSM6DSO_PEDO_SC_DELTAT_L 0x1D0U |
cparata | 0:6d69e896ce38 | 1102 | #define LSM6DSO_PEDO_SC_DELTAT_H 0x1D1U |
cparata | 0:6d69e896ce38 | 1103 | #define LSM6DSO_SENSOR_HUB_1 0x02U |
cparata | 0:6d69e896ce38 | 1104 | typedef struct { |
cparata | 4:77faf76e3cd8 | 1105 | uint8_t bit0 : 1; |
cparata | 4:77faf76e3cd8 | 1106 | uint8_t bit1 : 1; |
cparata | 4:77faf76e3cd8 | 1107 | uint8_t bit2 : 1; |
cparata | 4:77faf76e3cd8 | 1108 | uint8_t bit3 : 1; |
cparata | 4:77faf76e3cd8 | 1109 | uint8_t bit4 : 1; |
cparata | 4:77faf76e3cd8 | 1110 | uint8_t bit5 : 1; |
cparata | 4:77faf76e3cd8 | 1111 | uint8_t bit6 : 1; |
cparata | 4:77faf76e3cd8 | 1112 | uint8_t bit7 : 1; |
cparata | 0:6d69e896ce38 | 1113 | } lsm6dso_sensor_hub_1_t; |
cparata | 0:6d69e896ce38 | 1114 | |
cparata | 0:6d69e896ce38 | 1115 | #define LSM6DSO_SENSOR_HUB_2 0x03U |
cparata | 0:6d69e896ce38 | 1116 | typedef struct { |
cparata | 4:77faf76e3cd8 | 1117 | uint8_t bit0 : 1; |
cparata | 4:77faf76e3cd8 | 1118 | uint8_t bit1 : 1; |
cparata | 4:77faf76e3cd8 | 1119 | uint8_t bit2 : 1; |
cparata | 4:77faf76e3cd8 | 1120 | uint8_t bit3 : 1; |
cparata | 4:77faf76e3cd8 | 1121 | uint8_t bit4 : 1; |
cparata | 4:77faf76e3cd8 | 1122 | uint8_t bit5 : 1; |
cparata | 4:77faf76e3cd8 | 1123 | uint8_t bit6 : 1; |
cparata | 4:77faf76e3cd8 | 1124 | uint8_t bit7 : 1; |
cparata | 0:6d69e896ce38 | 1125 | } lsm6dso_sensor_hub_2_t; |
cparata | 0:6d69e896ce38 | 1126 | |
cparata | 0:6d69e896ce38 | 1127 | #define LSM6DSO_SENSOR_HUB_3 0x04U |
cparata | 0:6d69e896ce38 | 1128 | typedef struct { |
cparata | 4:77faf76e3cd8 | 1129 | uint8_t bit0 : 1; |
cparata | 4:77faf76e3cd8 | 1130 | uint8_t bit1 : 1; |
cparata | 4:77faf76e3cd8 | 1131 | uint8_t bit2 : 1; |
cparata | 4:77faf76e3cd8 | 1132 | uint8_t bit3 : 1; |
cparata | 4:77faf76e3cd8 | 1133 | uint8_t bit4 : 1; |
cparata | 4:77faf76e3cd8 | 1134 | uint8_t bit5 : 1; |
cparata | 4:77faf76e3cd8 | 1135 | uint8_t bit6 : 1; |
cparata | 4:77faf76e3cd8 | 1136 | uint8_t bit7 : 1; |
cparata | 0:6d69e896ce38 | 1137 | } lsm6dso_sensor_hub_3_t; |
cparata | 0:6d69e896ce38 | 1138 | |
cparata | 0:6d69e896ce38 | 1139 | #define LSM6DSO_SENSOR_HUB_4 0x05U |
cparata | 0:6d69e896ce38 | 1140 | typedef struct { |
cparata | 4:77faf76e3cd8 | 1141 | uint8_t bit0 : 1; |
cparata | 4:77faf76e3cd8 | 1142 | uint8_t bit1 : 1; |
cparata | 4:77faf76e3cd8 | 1143 | uint8_t bit2 : 1; |
cparata | 4:77faf76e3cd8 | 1144 | uint8_t bit3 : 1; |
cparata | 4:77faf76e3cd8 | 1145 | uint8_t bit4 : 1; |
cparata | 4:77faf76e3cd8 | 1146 | uint8_t bit5 : 1; |
cparata | 4:77faf76e3cd8 | 1147 | uint8_t bit6 : 1; |
cparata | 4:77faf76e3cd8 | 1148 | uint8_t bit7 : 1; |
cparata | 0:6d69e896ce38 | 1149 | } lsm6dso_sensor_hub_4_t; |
cparata | 0:6d69e896ce38 | 1150 | |
cparata | 0:6d69e896ce38 | 1151 | #define LSM6DSO_SENSOR_HUB_5 0x06U |
cparata | 0:6d69e896ce38 | 1152 | typedef struct { |
cparata | 4:77faf76e3cd8 | 1153 | uint8_t bit0 : 1; |
cparata | 4:77faf76e3cd8 | 1154 | uint8_t bit1 : 1; |
cparata | 4:77faf76e3cd8 | 1155 | uint8_t bit2 : 1; |
cparata | 4:77faf76e3cd8 | 1156 | uint8_t bit3 : 1; |
cparata | 4:77faf76e3cd8 | 1157 | uint8_t bit4 : 1; |
cparata | 4:77faf76e3cd8 | 1158 | uint8_t bit5 : 1; |
cparata | 4:77faf76e3cd8 | 1159 | uint8_t bit6 : 1; |
cparata | 4:77faf76e3cd8 | 1160 | uint8_t bit7 : 1; |
cparata | 0:6d69e896ce38 | 1161 | } lsm6dso_sensor_hub_5_t; |
cparata | 0:6d69e896ce38 | 1162 | |
cparata | 0:6d69e896ce38 | 1163 | #define LSM6DSO_SENSOR_HUB_6 0x07U |
cparata | 0:6d69e896ce38 | 1164 | typedef struct { |
cparata | 4:77faf76e3cd8 | 1165 | uint8_t bit0 : 1; |
cparata | 4:77faf76e3cd8 | 1166 | uint8_t bit1 : 1; |
cparata | 4:77faf76e3cd8 | 1167 | uint8_t bit2 : 1; |
cparata | 4:77faf76e3cd8 | 1168 | uint8_t bit3 : 1; |
cparata | 4:77faf76e3cd8 | 1169 | uint8_t bit4 : 1; |
cparata | 4:77faf76e3cd8 | 1170 | uint8_t bit5 : 1; |
cparata | 4:77faf76e3cd8 | 1171 | uint8_t bit6 : 1; |
cparata | 4:77faf76e3cd8 | 1172 | uint8_t bit7 : 1; |
cparata | 0:6d69e896ce38 | 1173 | } lsm6dso_sensor_hub_6_t; |
cparata | 0:6d69e896ce38 | 1174 | |
cparata | 0:6d69e896ce38 | 1175 | #define LSM6DSO_SENSOR_HUB_7 0x08U |
cparata | 0:6d69e896ce38 | 1176 | typedef struct { |
cparata | 4:77faf76e3cd8 | 1177 | uint8_t bit0 : 1; |
cparata | 4:77faf76e3cd8 | 1178 | uint8_t bit1 : 1; |
cparata | 4:77faf76e3cd8 | 1179 | uint8_t bit2 : 1; |
cparata | 4:77faf76e3cd8 | 1180 | uint8_t bit3 : 1; |
cparata | 4:77faf76e3cd8 | 1181 | uint8_t bit4 : 1; |
cparata | 4:77faf76e3cd8 | 1182 | uint8_t bit5 : 1; |
cparata | 4:77faf76e3cd8 | 1183 | uint8_t bit6 : 1; |
cparata | 4:77faf76e3cd8 | 1184 | uint8_t bit7 : 1; |
cparata | 0:6d69e896ce38 | 1185 | } lsm6dso_sensor_hub_7_t; |
cparata | 0:6d69e896ce38 | 1186 | |
cparata | 0:6d69e896ce38 | 1187 | #define LSM6DSO_SENSOR_HUB_8 0x09U |
cparata | 0:6d69e896ce38 | 1188 | typedef struct { |
cparata | 4:77faf76e3cd8 | 1189 | uint8_t bit0 : 1; |
cparata | 4:77faf76e3cd8 | 1190 | uint8_t bit1 : 1; |
cparata | 4:77faf76e3cd8 | 1191 | uint8_t bit2 : 1; |
cparata | 4:77faf76e3cd8 | 1192 | uint8_t bit3 : 1; |
cparata | 4:77faf76e3cd8 | 1193 | uint8_t bit4 : 1; |
cparata | 4:77faf76e3cd8 | 1194 | uint8_t bit5 : 1; |
cparata | 4:77faf76e3cd8 | 1195 | uint8_t bit6 : 1; |
cparata | 4:77faf76e3cd8 | 1196 | uint8_t bit7 : 1; |
cparata | 0:6d69e896ce38 | 1197 | } lsm6dso_sensor_hub_8_t; |
cparata | 0:6d69e896ce38 | 1198 | |
cparata | 0:6d69e896ce38 | 1199 | #define LSM6DSO_SENSOR_HUB_9 0x0AU |
cparata | 0:6d69e896ce38 | 1200 | typedef struct { |
cparata | 4:77faf76e3cd8 | 1201 | uint8_t bit0 : 1; |
cparata | 4:77faf76e3cd8 | 1202 | uint8_t bit1 : 1; |
cparata | 4:77faf76e3cd8 | 1203 | uint8_t bit2 : 1; |
cparata | 4:77faf76e3cd8 | 1204 | uint8_t bit3 : 1; |
cparata | 4:77faf76e3cd8 | 1205 | uint8_t bit4 : 1; |
cparata | 4:77faf76e3cd8 | 1206 | uint8_t bit5 : 1; |
cparata | 4:77faf76e3cd8 | 1207 | uint8_t bit6 : 1; |
cparata | 4:77faf76e3cd8 | 1208 | uint8_t bit7 : 1; |
cparata | 0:6d69e896ce38 | 1209 | } lsm6dso_sensor_hub_9_t; |
cparata | 0:6d69e896ce38 | 1210 | |
cparata | 0:6d69e896ce38 | 1211 | #define LSM6DSO_SENSOR_HUB_10 0x0BU |
cparata | 0:6d69e896ce38 | 1212 | typedef struct { |
cparata | 4:77faf76e3cd8 | 1213 | uint8_t bit0 : 1; |
cparata | 4:77faf76e3cd8 | 1214 | uint8_t bit1 : 1; |
cparata | 4:77faf76e3cd8 | 1215 | uint8_t bit2 : 1; |
cparata | 4:77faf76e3cd8 | 1216 | uint8_t bit3 : 1; |
cparata | 4:77faf76e3cd8 | 1217 | uint8_t bit4 : 1; |
cparata | 4:77faf76e3cd8 | 1218 | uint8_t bit5 : 1; |
cparata | 4:77faf76e3cd8 | 1219 | uint8_t bit6 : 1; |
cparata | 4:77faf76e3cd8 | 1220 | uint8_t bit7 : 1; |
cparata | 0:6d69e896ce38 | 1221 | } lsm6dso_sensor_hub_10_t; |
cparata | 0:6d69e896ce38 | 1222 | |
cparata | 0:6d69e896ce38 | 1223 | #define LSM6DSO_SENSOR_HUB_11 0x0CU |
cparata | 0:6d69e896ce38 | 1224 | typedef struct { |
cparata | 4:77faf76e3cd8 | 1225 | uint8_t bit0 : 1; |
cparata | 4:77faf76e3cd8 | 1226 | uint8_t bit1 : 1; |
cparata | 4:77faf76e3cd8 | 1227 | uint8_t bit2 : 1; |
cparata | 4:77faf76e3cd8 | 1228 | uint8_t bit3 : 1; |
cparata | 4:77faf76e3cd8 | 1229 | uint8_t bit4 : 1; |
cparata | 4:77faf76e3cd8 | 1230 | uint8_t bit5 : 1; |
cparata | 4:77faf76e3cd8 | 1231 | uint8_t bit6 : 1; |
cparata | 4:77faf76e3cd8 | 1232 | uint8_t bit7 : 1; |
cparata | 0:6d69e896ce38 | 1233 | } lsm6dso_sensor_hub_11_t; |
cparata | 0:6d69e896ce38 | 1234 | |
cparata | 0:6d69e896ce38 | 1235 | #define LSM6DSO_SENSOR_HUB_12 0x0DU |
cparata | 0:6d69e896ce38 | 1236 | typedef struct { |
cparata | 4:77faf76e3cd8 | 1237 | uint8_t bit0 : 1; |
cparata | 4:77faf76e3cd8 | 1238 | uint8_t bit1 : 1; |
cparata | 4:77faf76e3cd8 | 1239 | uint8_t bit2 : 1; |
cparata | 4:77faf76e3cd8 | 1240 | uint8_t bit3 : 1; |
cparata | 4:77faf76e3cd8 | 1241 | uint8_t bit4 : 1; |
cparata | 4:77faf76e3cd8 | 1242 | uint8_t bit5 : 1; |
cparata | 4:77faf76e3cd8 | 1243 | uint8_t bit6 : 1; |
cparata | 4:77faf76e3cd8 | 1244 | uint8_t bit7 : 1; |
cparata | 0:6d69e896ce38 | 1245 | } lsm6dso_sensor_hub_12_t; |
cparata | 0:6d69e896ce38 | 1246 | |
cparata | 0:6d69e896ce38 | 1247 | #define LSM6DSO_SENSOR_HUB_13 0x0EU |
cparata | 0:6d69e896ce38 | 1248 | typedef struct { |
cparata | 4:77faf76e3cd8 | 1249 | uint8_t bit0 : 1; |
cparata | 4:77faf76e3cd8 | 1250 | uint8_t bit1 : 1; |
cparata | 4:77faf76e3cd8 | 1251 | uint8_t bit2 : 1; |
cparata | 4:77faf76e3cd8 | 1252 | uint8_t bit3 : 1; |
cparata | 4:77faf76e3cd8 | 1253 | uint8_t bit4 : 1; |
cparata | 4:77faf76e3cd8 | 1254 | uint8_t bit5 : 1; |
cparata | 4:77faf76e3cd8 | 1255 | uint8_t bit6 : 1; |
cparata | 4:77faf76e3cd8 | 1256 | uint8_t bit7 : 1; |
cparata | 0:6d69e896ce38 | 1257 | } lsm6dso_sensor_hub_13_t; |
cparata | 0:6d69e896ce38 | 1258 | |
cparata | 0:6d69e896ce38 | 1259 | #define LSM6DSO_SENSOR_HUB_14 0x0FU |
cparata | 0:6d69e896ce38 | 1260 | typedef struct { |
cparata | 4:77faf76e3cd8 | 1261 | uint8_t bit0 : 1; |
cparata | 4:77faf76e3cd8 | 1262 | uint8_t bit1 : 1; |
cparata | 4:77faf76e3cd8 | 1263 | uint8_t bit2 : 1; |
cparata | 4:77faf76e3cd8 | 1264 | uint8_t bit3 : 1; |
cparata | 4:77faf76e3cd8 | 1265 | uint8_t bit4 : 1; |
cparata | 4:77faf76e3cd8 | 1266 | uint8_t bit5 : 1; |
cparata | 4:77faf76e3cd8 | 1267 | uint8_t bit6 : 1; |
cparata | 4:77faf76e3cd8 | 1268 | uint8_t bit7 : 1; |
cparata | 0:6d69e896ce38 | 1269 | } lsm6dso_sensor_hub_14_t; |
cparata | 0:6d69e896ce38 | 1270 | |
cparata | 0:6d69e896ce38 | 1271 | #define LSM6DSO_SENSOR_HUB_15 0x10U |
cparata | 0:6d69e896ce38 | 1272 | typedef struct { |
cparata | 4:77faf76e3cd8 | 1273 | uint8_t bit0 : 1; |
cparata | 4:77faf76e3cd8 | 1274 | uint8_t bit1 : 1; |
cparata | 4:77faf76e3cd8 | 1275 | uint8_t bit2 : 1; |
cparata | 4:77faf76e3cd8 | 1276 | uint8_t bit3 : 1; |
cparata | 4:77faf76e3cd8 | 1277 | uint8_t bit4 : 1; |
cparata | 4:77faf76e3cd8 | 1278 | uint8_t bit5 : 1; |
cparata | 4:77faf76e3cd8 | 1279 | uint8_t bit6 : 1; |
cparata | 4:77faf76e3cd8 | 1280 | uint8_t bit7 : 1; |
cparata | 0:6d69e896ce38 | 1281 | } lsm6dso_sensor_hub_15_t; |
cparata | 0:6d69e896ce38 | 1282 | |
cparata | 0:6d69e896ce38 | 1283 | #define LSM6DSO_SENSOR_HUB_16 0x11U |
cparata | 0:6d69e896ce38 | 1284 | typedef struct { |
cparata | 4:77faf76e3cd8 | 1285 | uint8_t bit0 : 1; |
cparata | 4:77faf76e3cd8 | 1286 | uint8_t bit1 : 1; |
cparata | 4:77faf76e3cd8 | 1287 | uint8_t bit2 : 1; |
cparata | 4:77faf76e3cd8 | 1288 | uint8_t bit3 : 1; |
cparata | 4:77faf76e3cd8 | 1289 | uint8_t bit4 : 1; |
cparata | 4:77faf76e3cd8 | 1290 | uint8_t bit5 : 1; |
cparata | 4:77faf76e3cd8 | 1291 | uint8_t bit6 : 1; |
cparata | 4:77faf76e3cd8 | 1292 | uint8_t bit7 : 1; |
cparata | 0:6d69e896ce38 | 1293 | } lsm6dso_sensor_hub_16_t; |
cparata | 0:6d69e896ce38 | 1294 | |
cparata | 0:6d69e896ce38 | 1295 | #define LSM6DSO_SENSOR_HUB_17 0x12U |
cparata | 0:6d69e896ce38 | 1296 | typedef struct { |
cparata | 4:77faf76e3cd8 | 1297 | uint8_t bit0 : 1; |
cparata | 4:77faf76e3cd8 | 1298 | uint8_t bit1 : 1; |
cparata | 4:77faf76e3cd8 | 1299 | uint8_t bit2 : 1; |
cparata | 4:77faf76e3cd8 | 1300 | uint8_t bit3 : 1; |
cparata | 4:77faf76e3cd8 | 1301 | uint8_t bit4 : 1; |
cparata | 4:77faf76e3cd8 | 1302 | uint8_t bit5 : 1; |
cparata | 4:77faf76e3cd8 | 1303 | uint8_t bit6 : 1; |
cparata | 4:77faf76e3cd8 | 1304 | uint8_t bit7 : 1; |
cparata | 0:6d69e896ce38 | 1305 | } lsm6dso_sensor_hub_17_t; |
cparata | 0:6d69e896ce38 | 1306 | |
cparata | 0:6d69e896ce38 | 1307 | #define LSM6DSO_SENSOR_HUB_18 0x13U |
cparata | 0:6d69e896ce38 | 1308 | typedef struct { |
cparata | 4:77faf76e3cd8 | 1309 | uint8_t bit0 : 1; |
cparata | 4:77faf76e3cd8 | 1310 | uint8_t bit1 : 1; |
cparata | 4:77faf76e3cd8 | 1311 | uint8_t bit2 : 1; |
cparata | 4:77faf76e3cd8 | 1312 | uint8_t bit3 : 1; |
cparata | 4:77faf76e3cd8 | 1313 | uint8_t bit4 : 1; |
cparata | 4:77faf76e3cd8 | 1314 | uint8_t bit5 : 1; |
cparata | 4:77faf76e3cd8 | 1315 | uint8_t bit6 : 1; |
cparata | 4:77faf76e3cd8 | 1316 | uint8_t bit7 : 1; |
cparata | 0:6d69e896ce38 | 1317 | } lsm6dso_sensor_hub_18_t; |
cparata | 0:6d69e896ce38 | 1318 | |
cparata | 0:6d69e896ce38 | 1319 | #define LSM6DSO_MASTER_CONFIG 0x14U |
cparata | 0:6d69e896ce38 | 1320 | typedef struct { |
cparata | 4:77faf76e3cd8 | 1321 | uint8_t aux_sens_on : 2; |
cparata | 4:77faf76e3cd8 | 1322 | uint8_t master_on : 1; |
cparata | 4:77faf76e3cd8 | 1323 | uint8_t shub_pu_en : 1; |
cparata | 4:77faf76e3cd8 | 1324 | uint8_t pass_through_mode : 1; |
cparata | 4:77faf76e3cd8 | 1325 | uint8_t start_config : 1; |
cparata | 4:77faf76e3cd8 | 1326 | uint8_t write_once : 1; |
cparata | 4:77faf76e3cd8 | 1327 | uint8_t rst_master_regs : 1; |
cparata | 0:6d69e896ce38 | 1328 | } lsm6dso_master_config_t; |
cparata | 0:6d69e896ce38 | 1329 | |
cparata | 0:6d69e896ce38 | 1330 | #define LSM6DSO_SLV0_ADD 0x15U |
cparata | 0:6d69e896ce38 | 1331 | typedef struct { |
cparata | 4:77faf76e3cd8 | 1332 | uint8_t rw_0 : 1; |
cparata | 4:77faf76e3cd8 | 1333 | uint8_t slave0 : 7; |
cparata | 0:6d69e896ce38 | 1334 | } lsm6dso_slv0_add_t; |
cparata | 0:6d69e896ce38 | 1335 | |
cparata | 0:6d69e896ce38 | 1336 | #define LSM6DSO_SLV0_SUBADD 0x16U |
cparata | 0:6d69e896ce38 | 1337 | typedef struct { |
cparata | 4:77faf76e3cd8 | 1338 | uint8_t slave0_reg : 8; |
cparata | 0:6d69e896ce38 | 1339 | } lsm6dso_slv0_subadd_t; |
cparata | 0:6d69e896ce38 | 1340 | |
cparata | 0:6d69e896ce38 | 1341 | #define LSM6DSO_SLV0_CONFIG 0x17U |
cparata | 0:6d69e896ce38 | 1342 | typedef struct { |
cparata | 4:77faf76e3cd8 | 1343 | uint8_t slave0_numop : 3; |
cparata | 4:77faf76e3cd8 | 1344 | uint8_t batch_ext_sens_0_en : 1; |
cparata | 4:77faf76e3cd8 | 1345 | uint8_t not_used_01 : 2; |
cparata | 4:77faf76e3cd8 | 1346 | uint8_t shub_odr : 2; |
cparata | 0:6d69e896ce38 | 1347 | } lsm6dso_slv0_config_t; |
cparata | 0:6d69e896ce38 | 1348 | |
cparata | 0:6d69e896ce38 | 1349 | #define LSM6DSO_SLV1_ADD 0x18U |
cparata | 0:6d69e896ce38 | 1350 | typedef struct { |
cparata | 4:77faf76e3cd8 | 1351 | uint8_t r_1 : 1; |
cparata | 4:77faf76e3cd8 | 1352 | uint8_t slave1_add : 7; |
cparata | 0:6d69e896ce38 | 1353 | } lsm6dso_slv1_add_t; |
cparata | 0:6d69e896ce38 | 1354 | |
cparata | 0:6d69e896ce38 | 1355 | #define LSM6DSO_SLV1_SUBADD 0x19U |
cparata | 0:6d69e896ce38 | 1356 | typedef struct { |
cparata | 4:77faf76e3cd8 | 1357 | uint8_t slave1_reg : 8; |
cparata | 0:6d69e896ce38 | 1358 | } lsm6dso_slv1_subadd_t; |
cparata | 0:6d69e896ce38 | 1359 | |
cparata | 0:6d69e896ce38 | 1360 | #define LSM6DSO_SLV1_CONFIG 0x1AU |
cparata | 0:6d69e896ce38 | 1361 | typedef struct { |
cparata | 4:77faf76e3cd8 | 1362 | uint8_t slave1_numop : 3; |
cparata | 4:77faf76e3cd8 | 1363 | uint8_t batch_ext_sens_1_en : 1; |
cparata | 4:77faf76e3cd8 | 1364 | uint8_t not_used_01 : 4; |
cparata | 0:6d69e896ce38 | 1365 | } lsm6dso_slv1_config_t; |
cparata | 0:6d69e896ce38 | 1366 | |
cparata | 0:6d69e896ce38 | 1367 | #define LSM6DSO_SLV2_ADD 0x1BU |
cparata | 0:6d69e896ce38 | 1368 | typedef struct { |
cparata | 4:77faf76e3cd8 | 1369 | uint8_t r_2 : 1; |
cparata | 4:77faf76e3cd8 | 1370 | uint8_t slave2_add : 7; |
cparata | 0:6d69e896ce38 | 1371 | } lsm6dso_slv2_add_t; |
cparata | 0:6d69e896ce38 | 1372 | |
cparata | 0:6d69e896ce38 | 1373 | #define LSM6DSO_SLV2_SUBADD 0x1CU |
cparata | 0:6d69e896ce38 | 1374 | typedef struct { |
cparata | 4:77faf76e3cd8 | 1375 | uint8_t slave2_reg : 8; |
cparata | 0:6d69e896ce38 | 1376 | } lsm6dso_slv2_subadd_t; |
cparata | 0:6d69e896ce38 | 1377 | |
cparata | 0:6d69e896ce38 | 1378 | #define LSM6DSO_SLV2_CONFIG 0x1DU |
cparata | 0:6d69e896ce38 | 1379 | typedef struct { |
cparata | 4:77faf76e3cd8 | 1380 | uint8_t slave2_numop : 3; |
cparata | 4:77faf76e3cd8 | 1381 | uint8_t batch_ext_sens_2_en : 1; |
cparata | 4:77faf76e3cd8 | 1382 | uint8_t not_used_01 : 4; |
cparata | 0:6d69e896ce38 | 1383 | } lsm6dso_slv2_config_t; |
cparata | 0:6d69e896ce38 | 1384 | |
cparata | 0:6d69e896ce38 | 1385 | #define LSM6DSO_SLV3_ADD 0x1EU |
cparata | 0:6d69e896ce38 | 1386 | typedef struct { |
cparata | 4:77faf76e3cd8 | 1387 | uint8_t r_3 : 1; |
cparata | 4:77faf76e3cd8 | 1388 | uint8_t slave3_add : 7; |
cparata | 0:6d69e896ce38 | 1389 | } lsm6dso_slv3_add_t; |
cparata | 0:6d69e896ce38 | 1390 | |
cparata | 0:6d69e896ce38 | 1391 | #define LSM6DSO_SLV3_SUBADD 0x1FU |
cparata | 0:6d69e896ce38 | 1392 | typedef struct { |
cparata | 4:77faf76e3cd8 | 1393 | uint8_t slave3_reg : 8; |
cparata | 0:6d69e896ce38 | 1394 | } lsm6dso_slv3_subadd_t; |
cparata | 0:6d69e896ce38 | 1395 | |
cparata | 0:6d69e896ce38 | 1396 | #define LSM6DSO_SLV3_CONFIG 0x20U |
cparata | 0:6d69e896ce38 | 1397 | typedef struct { |
cparata | 4:77faf76e3cd8 | 1398 | uint8_t slave3_numop : 3; |
cparata | 4:77faf76e3cd8 | 1399 | uint8_t batch_ext_sens_3_en : 1; |
cparata | 4:77faf76e3cd8 | 1400 | uint8_t not_used_01 : 4; |
cparata | 0:6d69e896ce38 | 1401 | } lsm6dso_slv3_config_t; |
cparata | 0:6d69e896ce38 | 1402 | |
cparata | 0:6d69e896ce38 | 1403 | #define LSM6DSO_DATAWRITE_SLV0 0x21U |
cparata | 0:6d69e896ce38 | 1404 | typedef struct { |
cparata | 4:77faf76e3cd8 | 1405 | uint8_t slave0_dataw : 8; |
cparata | 0:6d69e896ce38 | 1406 | } lsm6dso_datawrite_src_mode_sub_slv0_t; |
cparata | 0:6d69e896ce38 | 1407 | |
cparata | 0:6d69e896ce38 | 1408 | #define LSM6DSO_STATUS_MASTER 0x22U |
cparata | 0:6d69e896ce38 | 1409 | typedef struct { |
cparata | 4:77faf76e3cd8 | 1410 | uint8_t sens_hub_endop : 1; |
cparata | 4:77faf76e3cd8 | 1411 | uint8_t not_used_01 : 2; |
cparata | 4:77faf76e3cd8 | 1412 | uint8_t slave0_nack : 1; |
cparata | 4:77faf76e3cd8 | 1413 | uint8_t slave1_nack : 1; |
cparata | 4:77faf76e3cd8 | 1414 | uint8_t slave2_nack : 1; |
cparata | 4:77faf76e3cd8 | 1415 | uint8_t slave3_nack : 1; |
cparata | 4:77faf76e3cd8 | 1416 | uint8_t wr_once_done : 1; |
cparata | 0:6d69e896ce38 | 1417 | } lsm6dso_status_master_t; |
cparata | 0:6d69e896ce38 | 1418 | |
cparata | 2:4d14e9edf37e | 1419 | #define LSM6DSO_START_FSM_ADD 0x0400U |
cparata | 2:4d14e9edf37e | 1420 | |
cparata | 0:6d69e896ce38 | 1421 | /** |
cparata | 0:6d69e896ce38 | 1422 | * @defgroup LSM6DSO_Register_Union |
cparata | 0:6d69e896ce38 | 1423 | * @brief This union group all the registers that has a bitfield |
cparata | 0:6d69e896ce38 | 1424 | * description. |
cparata | 0:6d69e896ce38 | 1425 | * This union is useful but not need by the driver. |
cparata | 0:6d69e896ce38 | 1426 | * |
cparata | 0:6d69e896ce38 | 1427 | * REMOVING this union you are compliant with: |
cparata | 0:6d69e896ce38 | 1428 | * MISRA-C 2012 [Rule 19.2] -> " Union are not allowed " |
cparata | 0:6d69e896ce38 | 1429 | * |
cparata | 0:6d69e896ce38 | 1430 | * @{ |
cparata | 0:6d69e896ce38 | 1431 | * |
cparata | 0:6d69e896ce38 | 1432 | */ |
cparata | 4:77faf76e3cd8 | 1433 | typedef union{ |
cparata | 4:77faf76e3cd8 | 1434 | lsm6dso_func_cfg_access_t func_cfg_access; |
cparata | 4:77faf76e3cd8 | 1435 | lsm6dso_pin_ctrl_t pin_ctrl; |
cparata | 4:77faf76e3cd8 | 1436 | lsm6dso_fifo_ctrl1_t fifo_ctrl1; |
cparata | 4:77faf76e3cd8 | 1437 | lsm6dso_fifo_ctrl2_t fifo_ctrl2; |
cparata | 4:77faf76e3cd8 | 1438 | lsm6dso_fifo_ctrl3_t fifo_ctrl3; |
cparata | 4:77faf76e3cd8 | 1439 | lsm6dso_fifo_ctrl4_t fifo_ctrl4; |
cparata | 4:77faf76e3cd8 | 1440 | lsm6dso_counter_bdr_reg1_t counter_bdr_reg1; |
cparata | 4:77faf76e3cd8 | 1441 | lsm6dso_counter_bdr_reg2_t counter_bdr_reg2; |
cparata | 4:77faf76e3cd8 | 1442 | lsm6dso_int1_ctrl_t int1_ctrl; |
cparata | 4:77faf76e3cd8 | 1443 | lsm6dso_int2_ctrl_t int2_ctrl; |
cparata | 4:77faf76e3cd8 | 1444 | lsm6dso_ctrl1_xl_t ctrl1_xl; |
cparata | 4:77faf76e3cd8 | 1445 | lsm6dso_ctrl2_g_t ctrl2_g; |
cparata | 4:77faf76e3cd8 | 1446 | lsm6dso_ctrl3_c_t ctrl3_c; |
cparata | 4:77faf76e3cd8 | 1447 | lsm6dso_ctrl4_c_t ctrl4_c; |
cparata | 4:77faf76e3cd8 | 1448 | lsm6dso_ctrl5_c_t ctrl5_c; |
cparata | 4:77faf76e3cd8 | 1449 | lsm6dso_ctrl6_c_t ctrl6_c; |
cparata | 4:77faf76e3cd8 | 1450 | lsm6dso_ctrl7_g_t ctrl7_g; |
cparata | 4:77faf76e3cd8 | 1451 | lsm6dso_ctrl8_xl_t ctrl8_xl; |
cparata | 4:77faf76e3cd8 | 1452 | lsm6dso_ctrl9_xl_t ctrl9_xl; |
cparata | 4:77faf76e3cd8 | 1453 | lsm6dso_ctrl10_c_t ctrl10_c; |
cparata | 4:77faf76e3cd8 | 1454 | lsm6dso_all_int_src_t all_int_src; |
cparata | 4:77faf76e3cd8 | 1455 | lsm6dso_wake_up_src_t wake_up_src; |
cparata | 4:77faf76e3cd8 | 1456 | lsm6dso_tap_src_t tap_src; |
cparata | 4:77faf76e3cd8 | 1457 | lsm6dso_d6d_src_t d6d_src; |
cparata | 4:77faf76e3cd8 | 1458 | lsm6dso_status_reg_t status_reg; |
cparata | 4:77faf76e3cd8 | 1459 | lsm6dso_status_spiaux_t status_spiaux; |
cparata | 4:77faf76e3cd8 | 1460 | lsm6dso_fifo_status1_t fifo_status1; |
cparata | 4:77faf76e3cd8 | 1461 | lsm6dso_fifo_status2_t fifo_status2; |
cparata | 4:77faf76e3cd8 | 1462 | lsm6dso_tap_cfg0_t tap_cfg0; |
cparata | 4:77faf76e3cd8 | 1463 | lsm6dso_tap_cfg1_t tap_cfg1; |
cparata | 4:77faf76e3cd8 | 1464 | lsm6dso_tap_cfg2_t tap_cfg2; |
cparata | 4:77faf76e3cd8 | 1465 | lsm6dso_tap_ths_6d_t tap_ths_6d; |
cparata | 4:77faf76e3cd8 | 1466 | lsm6dso_int_dur2_t int_dur2; |
cparata | 4:77faf76e3cd8 | 1467 | lsm6dso_wake_up_ths_t wake_up_ths; |
cparata | 4:77faf76e3cd8 | 1468 | lsm6dso_wake_up_dur_t wake_up_dur; |
cparata | 4:77faf76e3cd8 | 1469 | lsm6dso_free_fall_t free_fall; |
cparata | 4:77faf76e3cd8 | 1470 | lsm6dso_md1_cfg_t md1_cfg; |
cparata | 4:77faf76e3cd8 | 1471 | lsm6dso_md2_cfg_t md2_cfg; |
cparata | 4:77faf76e3cd8 | 1472 | lsm6dso_i3c_bus_avb_t i3c_bus_avb; |
cparata | 4:77faf76e3cd8 | 1473 | lsm6dso_internal_freq_fine_t internal_freq_fine; |
cparata | 4:77faf76e3cd8 | 1474 | lsm6dso_int_ois_t int_ois; |
cparata | 4:77faf76e3cd8 | 1475 | lsm6dso_ctrl1_ois_t ctrl1_ois; |
cparata | 4:77faf76e3cd8 | 1476 | lsm6dso_ctrl2_ois_t ctrl2_ois; |
cparata | 4:77faf76e3cd8 | 1477 | lsm6dso_ctrl3_ois_t ctrl3_ois; |
cparata | 4:77faf76e3cd8 | 1478 | lsm6dso_fifo_data_out_tag_t fifo_data_out_tag; |
cparata | 4:77faf76e3cd8 | 1479 | lsm6dso_page_sel_t page_sel; |
cparata | 4:77faf76e3cd8 | 1480 | lsm6dso_emb_func_en_a_t emb_func_en_a; |
cparata | 4:77faf76e3cd8 | 1481 | lsm6dso_emb_func_en_b_t emb_func_en_b; |
cparata | 4:77faf76e3cd8 | 1482 | lsm6dso_page_address_t page_address; |
cparata | 4:77faf76e3cd8 | 1483 | lsm6dso_page_value_t page_value; |
cparata | 4:77faf76e3cd8 | 1484 | lsm6dso_emb_func_int1_t emb_func_int1; |
cparata | 4:77faf76e3cd8 | 1485 | lsm6dso_fsm_int1_a_t fsm_int1_a; |
cparata | 4:77faf76e3cd8 | 1486 | lsm6dso_fsm_int1_b_t fsm_int1_b; |
cparata | 4:77faf76e3cd8 | 1487 | lsm6dso_emb_func_int2_t emb_func_int2; |
cparata | 4:77faf76e3cd8 | 1488 | lsm6dso_fsm_int2_a_t fsm_int2_a; |
cparata | 4:77faf76e3cd8 | 1489 | lsm6dso_fsm_int2_b_t fsm_int2_b; |
cparata | 4:77faf76e3cd8 | 1490 | lsm6dso_emb_func_status_t emb_func_status; |
cparata | 4:77faf76e3cd8 | 1491 | lsm6dso_fsm_status_a_t fsm_status_a; |
cparata | 4:77faf76e3cd8 | 1492 | lsm6dso_fsm_status_b_t fsm_status_b; |
cparata | 4:77faf76e3cd8 | 1493 | lsm6dso_page_rw_t page_rw; |
cparata | 4:77faf76e3cd8 | 1494 | lsm6dso_emb_func_fifo_cfg_t emb_func_fifo_cfg; |
cparata | 4:77faf76e3cd8 | 1495 | lsm6dso_fsm_enable_a_t fsm_enable_a; |
cparata | 4:77faf76e3cd8 | 1496 | lsm6dso_fsm_enable_b_t fsm_enable_b; |
cparata | 4:77faf76e3cd8 | 1497 | lsm6dso_fsm_long_counter_clear_t fsm_long_counter_clear; |
cparata | 4:77faf76e3cd8 | 1498 | lsm6dso_fsm_outs1_t fsm_outs1; |
cparata | 4:77faf76e3cd8 | 1499 | lsm6dso_fsm_outs2_t fsm_outs2; |
cparata | 4:77faf76e3cd8 | 1500 | lsm6dso_fsm_outs3_t fsm_outs3; |
cparata | 4:77faf76e3cd8 | 1501 | lsm6dso_fsm_outs4_t fsm_outs4; |
cparata | 4:77faf76e3cd8 | 1502 | lsm6dso_fsm_outs5_t fsm_outs5; |
cparata | 4:77faf76e3cd8 | 1503 | lsm6dso_fsm_outs6_t fsm_outs6; |
cparata | 4:77faf76e3cd8 | 1504 | lsm6dso_fsm_outs7_t fsm_outs7; |
cparata | 4:77faf76e3cd8 | 1505 | lsm6dso_fsm_outs8_t fsm_outs8; |
cparata | 4:77faf76e3cd8 | 1506 | lsm6dso_fsm_outs9_t fsm_outs9; |
cparata | 4:77faf76e3cd8 | 1507 | lsm6dso_fsm_outs10_t fsm_outs10; |
cparata | 4:77faf76e3cd8 | 1508 | lsm6dso_fsm_outs11_t fsm_outs11; |
cparata | 4:77faf76e3cd8 | 1509 | lsm6dso_fsm_outs12_t fsm_outs12; |
cparata | 4:77faf76e3cd8 | 1510 | lsm6dso_fsm_outs13_t fsm_outs13; |
cparata | 4:77faf76e3cd8 | 1511 | lsm6dso_fsm_outs14_t fsm_outs14; |
cparata | 4:77faf76e3cd8 | 1512 | lsm6dso_fsm_outs15_t fsm_outs15; |
cparata | 4:77faf76e3cd8 | 1513 | lsm6dso_fsm_outs16_t fsm_outs16; |
cparata | 4:77faf76e3cd8 | 1514 | lsm6dso_emb_func_odr_cfg_b_t emb_func_odr_cfg_b; |
cparata | 4:77faf76e3cd8 | 1515 | lsm6dso_emb_func_src_t emb_func_src; |
cparata | 4:77faf76e3cd8 | 1516 | lsm6dso_emb_func_init_a_t emb_func_init_a; |
cparata | 4:77faf76e3cd8 | 1517 | lsm6dso_emb_func_init_b_t emb_func_init_b; |
cparata | 4:77faf76e3cd8 | 1518 | lsm6dso_mag_cfg_a_t mag_cfg_a; |
cparata | 4:77faf76e3cd8 | 1519 | lsm6dso_mag_cfg_b_t mag_cfg_b; |
cparata | 4:77faf76e3cd8 | 1520 | lsm6dso_pedo_cmd_reg_t pedo_cmd_reg; |
cparata | 4:77faf76e3cd8 | 1521 | lsm6dso_sensor_hub_1_t sensor_hub_1; |
cparata | 4:77faf76e3cd8 | 1522 | lsm6dso_sensor_hub_2_t sensor_hub_2; |
cparata | 4:77faf76e3cd8 | 1523 | lsm6dso_sensor_hub_3_t sensor_hub_3; |
cparata | 4:77faf76e3cd8 | 1524 | lsm6dso_sensor_hub_4_t sensor_hub_4; |
cparata | 4:77faf76e3cd8 | 1525 | lsm6dso_sensor_hub_5_t sensor_hub_5; |
cparata | 4:77faf76e3cd8 | 1526 | lsm6dso_sensor_hub_6_t sensor_hub_6; |
cparata | 4:77faf76e3cd8 | 1527 | lsm6dso_sensor_hub_7_t sensor_hub_7; |
cparata | 4:77faf76e3cd8 | 1528 | lsm6dso_sensor_hub_8_t sensor_hub_8; |
cparata | 4:77faf76e3cd8 | 1529 | lsm6dso_sensor_hub_9_t sensor_hub_9; |
cparata | 4:77faf76e3cd8 | 1530 | lsm6dso_sensor_hub_10_t sensor_hub_10; |
cparata | 4:77faf76e3cd8 | 1531 | lsm6dso_sensor_hub_11_t sensor_hub_11; |
cparata | 4:77faf76e3cd8 | 1532 | lsm6dso_sensor_hub_12_t sensor_hub_12; |
cparata | 4:77faf76e3cd8 | 1533 | lsm6dso_sensor_hub_13_t sensor_hub_13; |
cparata | 4:77faf76e3cd8 | 1534 | lsm6dso_sensor_hub_14_t sensor_hub_14; |
cparata | 4:77faf76e3cd8 | 1535 | lsm6dso_sensor_hub_15_t sensor_hub_15; |
cparata | 4:77faf76e3cd8 | 1536 | lsm6dso_sensor_hub_16_t sensor_hub_16; |
cparata | 4:77faf76e3cd8 | 1537 | lsm6dso_sensor_hub_17_t sensor_hub_17; |
cparata | 4:77faf76e3cd8 | 1538 | lsm6dso_sensor_hub_18_t sensor_hub_18; |
cparata | 4:77faf76e3cd8 | 1539 | lsm6dso_master_config_t master_config; |
cparata | 4:77faf76e3cd8 | 1540 | lsm6dso_slv0_add_t slv0_add; |
cparata | 4:77faf76e3cd8 | 1541 | lsm6dso_slv0_subadd_t slv0_subadd; |
cparata | 4:77faf76e3cd8 | 1542 | lsm6dso_slv0_config_t slv0_config; |
cparata | 4:77faf76e3cd8 | 1543 | lsm6dso_slv1_add_t slv1_add; |
cparata | 4:77faf76e3cd8 | 1544 | lsm6dso_slv1_subadd_t slv1_subadd; |
cparata | 4:77faf76e3cd8 | 1545 | lsm6dso_slv1_config_t slv1_config; |
cparata | 4:77faf76e3cd8 | 1546 | lsm6dso_slv2_add_t slv2_add; |
cparata | 4:77faf76e3cd8 | 1547 | lsm6dso_slv2_subadd_t slv2_subadd; |
cparata | 4:77faf76e3cd8 | 1548 | lsm6dso_slv2_config_t slv2_config; |
cparata | 4:77faf76e3cd8 | 1549 | lsm6dso_slv3_add_t slv3_add; |
cparata | 4:77faf76e3cd8 | 1550 | lsm6dso_slv3_subadd_t slv3_subadd; |
cparata | 4:77faf76e3cd8 | 1551 | lsm6dso_slv3_config_t slv3_config; |
cparata | 4:77faf76e3cd8 | 1552 | lsm6dso_datawrite_src_mode_sub_slv0_t datawrite_src_mode_sub_slv0; |
cparata | 4:77faf76e3cd8 | 1553 | lsm6dso_status_master_t status_master; |
cparata | 4:77faf76e3cd8 | 1554 | bitwise_t bitwise; |
cparata | 4:77faf76e3cd8 | 1555 | uint8_t byte; |
cparata | 0:6d69e896ce38 | 1556 | } lsm6dso_reg_t; |
cparata | 0:6d69e896ce38 | 1557 | |
cparata | 0:6d69e896ce38 | 1558 | /** |
cparata | 0:6d69e896ce38 | 1559 | * @} |
cparata | 0:6d69e896ce38 | 1560 | * |
cparata | 0:6d69e896ce38 | 1561 | */ |
cparata | 0:6d69e896ce38 | 1562 | |
cparata | 4:77faf76e3cd8 | 1563 | int32_t lsm6dso_read_reg(lsm6dso_ctx_t *ctx, uint8_t reg, uint8_t* data, |
cparata | 0:6d69e896ce38 | 1564 | uint16_t len); |
cparata | 4:77faf76e3cd8 | 1565 | int32_t lsm6dso_write_reg(lsm6dso_ctx_t *ctx, uint8_t reg, uint8_t* data, |
cparata | 0:6d69e896ce38 | 1566 | uint16_t len); |
cparata | 0:6d69e896ce38 | 1567 | |
cparata | 2:4d14e9edf37e | 1568 | extern float_t lsm6dso_from_fs2_to_mg(int16_t lsb); |
cparata | 2:4d14e9edf37e | 1569 | extern float_t lsm6dso_from_fs4_to_mg(int16_t lsb); |
cparata | 2:4d14e9edf37e | 1570 | extern float_t lsm6dso_from_fs8_to_mg(int16_t lsb); |
cparata | 2:4d14e9edf37e | 1571 | extern float_t lsm6dso_from_fs16_to_mg(int16_t lsb); |
cparata | 2:4d14e9edf37e | 1572 | extern float_t lsm6dso_from_fs125_to_mdps(int16_t lsb); |
cparata | 2:4d14e9edf37e | 1573 | extern float_t lsm6dso_from_fs500_to_mdps(int16_t lsb); |
cparata | 2:4d14e9edf37e | 1574 | extern float_t lsm6dso_from_fs250_to_mdps(int16_t lsb); |
cparata | 2:4d14e9edf37e | 1575 | extern float_t lsm6dso_from_fs1000_to_mdps(int16_t lsb); |
cparata | 2:4d14e9edf37e | 1576 | extern float_t lsm6dso_from_fs2000_to_mdps(int16_t lsb); |
cparata | 2:4d14e9edf37e | 1577 | extern float_t lsm6dso_from_lsb_to_celsius(int16_t lsb); |
cparata | 2:4d14e9edf37e | 1578 | extern float_t lsm6dso_from_lsb_to_nsec(int16_t lsb); |
cparata | 0:6d69e896ce38 | 1579 | |
cparata | 0:6d69e896ce38 | 1580 | typedef enum { |
cparata | 4:77faf76e3cd8 | 1581 | LSM6DSO_2g = 0, |
cparata | 4:77faf76e3cd8 | 1582 | LSM6DSO_16g = 1, /* if XL_FS_MODE = ‘1’ -> LSM6DSO_2g */ |
cparata | 4:77faf76e3cd8 | 1583 | LSM6DSO_4g = 2, |
cparata | 4:77faf76e3cd8 | 1584 | LSM6DSO_8g = 3, |
cparata | 0:6d69e896ce38 | 1585 | } lsm6dso_fs_xl_t; |
cparata | 0:6d69e896ce38 | 1586 | int32_t lsm6dso_xl_full_scale_set(lsm6dso_ctx_t *ctx, lsm6dso_fs_xl_t val); |
cparata | 0:6d69e896ce38 | 1587 | int32_t lsm6dso_xl_full_scale_get(lsm6dso_ctx_t *ctx, lsm6dso_fs_xl_t *val); |
cparata | 0:6d69e896ce38 | 1588 | |
cparata | 0:6d69e896ce38 | 1589 | typedef enum { |
cparata | 4:77faf76e3cd8 | 1590 | LSM6DSO_XL_ODR_OFF = 0, |
cparata | 4:77faf76e3cd8 | 1591 | LSM6DSO_XL_ODR_12Hz5 = 1, |
cparata | 4:77faf76e3cd8 | 1592 | LSM6DSO_XL_ODR_26Hz = 2, |
cparata | 4:77faf76e3cd8 | 1593 | LSM6DSO_XL_ODR_52Hz = 3, |
cparata | 4:77faf76e3cd8 | 1594 | LSM6DSO_XL_ODR_104Hz = 4, |
cparata | 4:77faf76e3cd8 | 1595 | LSM6DSO_XL_ODR_208Hz = 5, |
cparata | 4:77faf76e3cd8 | 1596 | LSM6DSO_XL_ODR_417Hz = 6, |
cparata | 4:77faf76e3cd8 | 1597 | LSM6DSO_XL_ODR_833Hz = 7, |
cparata | 4:77faf76e3cd8 | 1598 | LSM6DSO_XL_ODR_1667Hz = 8, |
cparata | 4:77faf76e3cd8 | 1599 | LSM6DSO_XL_ODR_3333Hz = 9, |
cparata | 4:77faf76e3cd8 | 1600 | LSM6DSO_XL_ODR_6667Hz = 10, |
cparata | 4:77faf76e3cd8 | 1601 | LSM6DSO_XL_ODR_1Hz6 = 11, /* (low power only) */ |
cparata | 0:6d69e896ce38 | 1602 | } lsm6dso_odr_xl_t; |
cparata | 0:6d69e896ce38 | 1603 | int32_t lsm6dso_xl_data_rate_set(lsm6dso_ctx_t *ctx, lsm6dso_odr_xl_t val); |
cparata | 0:6d69e896ce38 | 1604 | int32_t lsm6dso_xl_data_rate_get(lsm6dso_ctx_t *ctx, lsm6dso_odr_xl_t *val); |
cparata | 0:6d69e896ce38 | 1605 | |
cparata | 0:6d69e896ce38 | 1606 | typedef enum { |
cparata | 4:77faf76e3cd8 | 1607 | LSM6DSO_250dps = 0, |
cparata | 4:77faf76e3cd8 | 1608 | LSM6DSO_125dps = 1, |
cparata | 4:77faf76e3cd8 | 1609 | LSM6DSO_500dps = 2, |
cparata | 4:77faf76e3cd8 | 1610 | LSM6DSO_1000dps = 4, |
cparata | 4:77faf76e3cd8 | 1611 | LSM6DSO_2000dps = 6, |
cparata | 0:6d69e896ce38 | 1612 | } lsm6dso_fs_g_t; |
cparata | 0:6d69e896ce38 | 1613 | int32_t lsm6dso_gy_full_scale_set(lsm6dso_ctx_t *ctx, lsm6dso_fs_g_t val); |
cparata | 0:6d69e896ce38 | 1614 | int32_t lsm6dso_gy_full_scale_get(lsm6dso_ctx_t *ctx, lsm6dso_fs_g_t *val); |
cparata | 0:6d69e896ce38 | 1615 | |
cparata | 0:6d69e896ce38 | 1616 | typedef enum { |
cparata | 4:77faf76e3cd8 | 1617 | LSM6DSO_GY_ODR_OFF = 0, |
cparata | 4:77faf76e3cd8 | 1618 | LSM6DSO_GY_ODR_12Hz5 = 1, |
cparata | 4:77faf76e3cd8 | 1619 | LSM6DSO_GY_ODR_26Hz = 2, |
cparata | 4:77faf76e3cd8 | 1620 | LSM6DSO_GY_ODR_52Hz = 3, |
cparata | 4:77faf76e3cd8 | 1621 | LSM6DSO_GY_ODR_104Hz = 4, |
cparata | 4:77faf76e3cd8 | 1622 | LSM6DSO_GY_ODR_208Hz = 5, |
cparata | 4:77faf76e3cd8 | 1623 | LSM6DSO_GY_ODR_417Hz = 6, |
cparata | 4:77faf76e3cd8 | 1624 | LSM6DSO_GY_ODR_833Hz = 7, |
cparata | 4:77faf76e3cd8 | 1625 | LSM6DSO_GY_ODR_1667Hz = 8, |
cparata | 4:77faf76e3cd8 | 1626 | LSM6DSO_GY_ODR_3333Hz = 9, |
cparata | 4:77faf76e3cd8 | 1627 | LSM6DSO_GY_ODR_6667Hz = 10, |
cparata | 0:6d69e896ce38 | 1628 | } lsm6dso_odr_g_t; |
cparata | 0:6d69e896ce38 | 1629 | int32_t lsm6dso_gy_data_rate_set(lsm6dso_ctx_t *ctx, lsm6dso_odr_g_t val); |
cparata | 0:6d69e896ce38 | 1630 | int32_t lsm6dso_gy_data_rate_get(lsm6dso_ctx_t *ctx, lsm6dso_odr_g_t *val); |
cparata | 0:6d69e896ce38 | 1631 | |
cparata | 0:6d69e896ce38 | 1632 | int32_t lsm6dso_block_data_update_set(lsm6dso_ctx_t *ctx, uint8_t val); |
cparata | 0:6d69e896ce38 | 1633 | int32_t lsm6dso_block_data_update_get(lsm6dso_ctx_t *ctx, uint8_t *val); |
cparata | 0:6d69e896ce38 | 1634 | |
cparata | 0:6d69e896ce38 | 1635 | typedef enum { |
cparata | 4:77faf76e3cd8 | 1636 | LSM6DSO_LSb_1mg = 0, |
cparata | 4:77faf76e3cd8 | 1637 | LSM6DSO_LSb_16mg = 1, |
cparata | 0:6d69e896ce38 | 1638 | } lsm6dso_usr_off_w_t; |
cparata | 0:6d69e896ce38 | 1639 | int32_t lsm6dso_xl_offset_weight_set(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 1640 | lsm6dso_usr_off_w_t val); |
cparata | 0:6d69e896ce38 | 1641 | int32_t lsm6dso_xl_offset_weight_get(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 1642 | lsm6dso_usr_off_w_t *val); |
cparata | 0:6d69e896ce38 | 1643 | |
cparata | 0:6d69e896ce38 | 1644 | typedef enum { |
cparata | 4:77faf76e3cd8 | 1645 | LSM6DSO_HIGH_PERFORMANCE_MD = 0, |
cparata | 4:77faf76e3cd8 | 1646 | LSM6DSO_LOW_NORMAL_POWER_MD = 1, |
cparata | 4:77faf76e3cd8 | 1647 | LSM6DSO_ULTRA_LOW_POWER_MD = 2, |
cparata | 0:6d69e896ce38 | 1648 | } lsm6dso_xl_hm_mode_t; |
cparata | 0:6d69e896ce38 | 1649 | int32_t lsm6dso_xl_power_mode_set(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 1650 | lsm6dso_xl_hm_mode_t val); |
cparata | 0:6d69e896ce38 | 1651 | int32_t lsm6dso_xl_power_mode_get(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 1652 | lsm6dso_xl_hm_mode_t *val); |
cparata | 0:6d69e896ce38 | 1653 | |
cparata | 0:6d69e896ce38 | 1654 | typedef enum { |
cparata | 4:77faf76e3cd8 | 1655 | LSM6DSO_GY_HIGH_PERFORMANCE = 0, |
cparata | 4:77faf76e3cd8 | 1656 | LSM6DSO_GY_NORMAL = 1, |
cparata | 0:6d69e896ce38 | 1657 | } lsm6dso_g_hm_mode_t; |
cparata | 0:6d69e896ce38 | 1658 | int32_t lsm6dso_gy_power_mode_set(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 1659 | lsm6dso_g_hm_mode_t val); |
cparata | 0:6d69e896ce38 | 1660 | int32_t lsm6dso_gy_power_mode_get(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 1661 | lsm6dso_g_hm_mode_t *val); |
cparata | 0:6d69e896ce38 | 1662 | |
cparata | 0:6d69e896ce38 | 1663 | int32_t lsm6dso_status_reg_get(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 1664 | lsm6dso_status_reg_t *val); |
cparata | 0:6d69e896ce38 | 1665 | |
cparata | 0:6d69e896ce38 | 1666 | int32_t lsm6dso_xl_flag_data_ready_get(lsm6dso_ctx_t *ctx, uint8_t *val); |
cparata | 0:6d69e896ce38 | 1667 | |
cparata | 0:6d69e896ce38 | 1668 | int32_t lsm6dso_gy_flag_data_ready_get(lsm6dso_ctx_t *ctx, uint8_t *val); |
cparata | 0:6d69e896ce38 | 1669 | |
cparata | 0:6d69e896ce38 | 1670 | int32_t lsm6dso_temp_flag_data_ready_get(lsm6dso_ctx_t *ctx, uint8_t *val); |
cparata | 0:6d69e896ce38 | 1671 | |
cparata | 0:6d69e896ce38 | 1672 | int32_t lsm6dso_xl_usr_offset_x_set(lsm6dso_ctx_t *ctx, uint8_t *buff); |
cparata | 0:6d69e896ce38 | 1673 | int32_t lsm6dso_xl_usr_offset_x_get(lsm6dso_ctx_t *ctx, uint8_t *buff); |
cparata | 0:6d69e896ce38 | 1674 | |
cparata | 0:6d69e896ce38 | 1675 | int32_t lsm6dso_xl_usr_offset_y_set(lsm6dso_ctx_t *ctx, uint8_t *buff); |
cparata | 0:6d69e896ce38 | 1676 | int32_t lsm6dso_xl_usr_offset_y_get(lsm6dso_ctx_t *ctx, uint8_t *buff); |
cparata | 0:6d69e896ce38 | 1677 | |
cparata | 0:6d69e896ce38 | 1678 | int32_t lsm6dso_xl_usr_offset_z_set(lsm6dso_ctx_t *ctx, uint8_t *buff); |
cparata | 0:6d69e896ce38 | 1679 | int32_t lsm6dso_xl_usr_offset_z_get(lsm6dso_ctx_t *ctx, uint8_t *buff); |
cparata | 0:6d69e896ce38 | 1680 | |
cparata | 0:6d69e896ce38 | 1681 | int32_t lsm6dso_xl_usr_offset_set(lsm6dso_ctx_t *ctx, uint8_t val); |
cparata | 0:6d69e896ce38 | 1682 | int32_t lsm6dso_xl_usr_offset_get(lsm6dso_ctx_t *ctx, uint8_t *val); |
cparata | 0:6d69e896ce38 | 1683 | |
cparata | 4:77faf76e3cd8 | 1684 | int32_t lsm6dso_timestamp_rst(lsm6dso_ctx_t *ctx); |
cparata | 4:77faf76e3cd8 | 1685 | |
cparata | 0:6d69e896ce38 | 1686 | int32_t lsm6dso_timestamp_set(lsm6dso_ctx_t *ctx, uint8_t val); |
cparata | 0:6d69e896ce38 | 1687 | int32_t lsm6dso_timestamp_get(lsm6dso_ctx_t *ctx, uint8_t *val); |
cparata | 0:6d69e896ce38 | 1688 | |
cparata | 0:6d69e896ce38 | 1689 | int32_t lsm6dso_timestamp_raw_get(lsm6dso_ctx_t *ctx, uint8_t *buff); |
cparata | 0:6d69e896ce38 | 1690 | |
cparata | 0:6d69e896ce38 | 1691 | typedef enum { |
cparata | 4:77faf76e3cd8 | 1692 | LSM6DSO_NO_ROUND = 0, |
cparata | 4:77faf76e3cd8 | 1693 | LSM6DSO_ROUND_XL = 1, |
cparata | 4:77faf76e3cd8 | 1694 | LSM6DSO_ROUND_GY = 2, |
cparata | 4:77faf76e3cd8 | 1695 | LSM6DSO_ROUND_GY_XL = 3, |
cparata | 0:6d69e896ce38 | 1696 | } lsm6dso_rounding_t; |
cparata | 0:6d69e896ce38 | 1697 | int32_t lsm6dso_rounding_mode_set(lsm6dso_ctx_t *ctx, |
cparata | 4:77faf76e3cd8 | 1698 | lsm6dso_rounding_t val); |
cparata | 0:6d69e896ce38 | 1699 | int32_t lsm6dso_rounding_mode_get(lsm6dso_ctx_t *ctx, |
cparata | 4:77faf76e3cd8 | 1700 | lsm6dso_rounding_t *val); |
cparata | 0:6d69e896ce38 | 1701 | |
cparata | 0:6d69e896ce38 | 1702 | int32_t lsm6dso_temperature_raw_get(lsm6dso_ctx_t *ctx, uint8_t *buff); |
cparata | 0:6d69e896ce38 | 1703 | |
cparata | 0:6d69e896ce38 | 1704 | int32_t lsm6dso_angular_rate_raw_get(lsm6dso_ctx_t *ctx, uint8_t *buff); |
cparata | 0:6d69e896ce38 | 1705 | |
cparata | 0:6d69e896ce38 | 1706 | int32_t lsm6dso_acceleration_raw_get(lsm6dso_ctx_t *ctx, uint8_t *buff); |
cparata | 0:6d69e896ce38 | 1707 | |
cparata | 0:6d69e896ce38 | 1708 | int32_t lsm6dso_fifo_out_raw_get(lsm6dso_ctx_t *ctx, uint8_t *buff); |
cparata | 0:6d69e896ce38 | 1709 | |
cparata | 0:6d69e896ce38 | 1710 | int32_t lsm6dso_number_of_steps_get(lsm6dso_ctx_t *ctx, uint8_t *buff); |
cparata | 0:6d69e896ce38 | 1711 | |
cparata | 0:6d69e896ce38 | 1712 | int32_t lsm6dso_steps_reset(lsm6dso_ctx_t *ctx); |
cparata | 0:6d69e896ce38 | 1713 | |
cparata | 0:6d69e896ce38 | 1714 | int32_t lsm6dso_odr_cal_reg_set(lsm6dso_ctx_t *ctx, uint8_t val); |
cparata | 0:6d69e896ce38 | 1715 | int32_t lsm6dso_odr_cal_reg_get(lsm6dso_ctx_t *ctx, uint8_t *val); |
cparata | 0:6d69e896ce38 | 1716 | |
cparata | 0:6d69e896ce38 | 1717 | typedef enum { |
cparata | 4:77faf76e3cd8 | 1718 | LSM6DSO_USER_BANK = 0, |
cparata | 4:77faf76e3cd8 | 1719 | LSM6DSO_SENSOR_HUB_BANK = 1, |
cparata | 4:77faf76e3cd8 | 1720 | LSM6DSO_EMBEDDED_FUNC_BANK = 2, |
cparata | 0:6d69e896ce38 | 1721 | } lsm6dso_reg_access_t; |
cparata | 0:6d69e896ce38 | 1722 | int32_t lsm6dso_mem_bank_set(lsm6dso_ctx_t *ctx, lsm6dso_reg_access_t val); |
cparata | 0:6d69e896ce38 | 1723 | int32_t lsm6dso_mem_bank_get(lsm6dso_ctx_t *ctx, lsm6dso_reg_access_t *val); |
cparata | 0:6d69e896ce38 | 1724 | |
cparata | 0:6d69e896ce38 | 1725 | int32_t lsm6dso_ln_pg_write_byte(lsm6dso_ctx_t *ctx, uint16_t address, |
cparata | 0:6d69e896ce38 | 1726 | uint8_t *val); |
cparata | 0:6d69e896ce38 | 1727 | int32_t lsm6dso_ln_pg_read_byte(lsm6dso_ctx_t *ctx, uint16_t address, |
cparata | 0:6d69e896ce38 | 1728 | uint8_t *val); |
cparata | 0:6d69e896ce38 | 1729 | int32_t lsm6dso_ln_pg_write(lsm6dso_ctx_t *ctx, uint16_t address, |
cparata | 0:6d69e896ce38 | 1730 | uint8_t *buf, uint8_t len); |
cparata | 0:6d69e896ce38 | 1731 | int32_t lsm6dso_ln_pg_read(lsm6dso_ctx_t *ctx, uint16_t address, |
cparata | 0:6d69e896ce38 | 1732 | uint8_t *val); |
cparata | 0:6d69e896ce38 | 1733 | |
cparata | 0:6d69e896ce38 | 1734 | typedef enum { |
cparata | 4:77faf76e3cd8 | 1735 | LSM6DSO_DRDY_LATCHED = 0, |
cparata | 4:77faf76e3cd8 | 1736 | LSM6DSO_DRDY_PULSED = 1, |
cparata | 0:6d69e896ce38 | 1737 | } lsm6dso_dataready_pulsed_t; |
cparata | 0:6d69e896ce38 | 1738 | int32_t lsm6dso_data_ready_mode_set(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 1739 | lsm6dso_dataready_pulsed_t val); |
cparata | 0:6d69e896ce38 | 1740 | int32_t lsm6dso_data_ready_mode_get(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 1741 | lsm6dso_dataready_pulsed_t *val); |
cparata | 0:6d69e896ce38 | 1742 | |
cparata | 0:6d69e896ce38 | 1743 | int32_t lsm6dso_device_id_get(lsm6dso_ctx_t *ctx, uint8_t *buff); |
cparata | 0:6d69e896ce38 | 1744 | |
cparata | 0:6d69e896ce38 | 1745 | int32_t lsm6dso_reset_set(lsm6dso_ctx_t *ctx, uint8_t val); |
cparata | 0:6d69e896ce38 | 1746 | int32_t lsm6dso_reset_get(lsm6dso_ctx_t *ctx, uint8_t *val); |
cparata | 0:6d69e896ce38 | 1747 | |
cparata | 0:6d69e896ce38 | 1748 | int32_t lsm6dso_auto_increment_set(lsm6dso_ctx_t *ctx, uint8_t val); |
cparata | 0:6d69e896ce38 | 1749 | int32_t lsm6dso_auto_increment_get(lsm6dso_ctx_t *ctx, uint8_t *val); |
cparata | 0:6d69e896ce38 | 1750 | |
cparata | 0:6d69e896ce38 | 1751 | int32_t lsm6dso_boot_set(lsm6dso_ctx_t *ctx, uint8_t val); |
cparata | 0:6d69e896ce38 | 1752 | int32_t lsm6dso_boot_get(lsm6dso_ctx_t *ctx, uint8_t *val); |
cparata | 0:6d69e896ce38 | 1753 | |
cparata | 0:6d69e896ce38 | 1754 | typedef enum { |
cparata | 4:77faf76e3cd8 | 1755 | LSM6DSO_XL_ST_DISABLE = 0, |
cparata | 4:77faf76e3cd8 | 1756 | LSM6DSO_XL_ST_POSITIVE = 1, |
cparata | 4:77faf76e3cd8 | 1757 | LSM6DSO_XL_ST_NEGATIVE = 2, |
cparata | 0:6d69e896ce38 | 1758 | } lsm6dso_st_xl_t; |
cparata | 0:6d69e896ce38 | 1759 | int32_t lsm6dso_xl_self_test_set(lsm6dso_ctx_t *ctx, lsm6dso_st_xl_t val); |
cparata | 0:6d69e896ce38 | 1760 | int32_t lsm6dso_xl_self_test_get(lsm6dso_ctx_t *ctx, lsm6dso_st_xl_t *val); |
cparata | 0:6d69e896ce38 | 1761 | |
cparata | 0:6d69e896ce38 | 1762 | typedef enum { |
cparata | 4:77faf76e3cd8 | 1763 | LSM6DSO_GY_ST_DISABLE = 0, |
cparata | 4:77faf76e3cd8 | 1764 | LSM6DSO_GY_ST_POSITIVE = 1, |
cparata | 4:77faf76e3cd8 | 1765 | LSM6DSO_GY_ST_NEGATIVE = 3, |
cparata | 0:6d69e896ce38 | 1766 | } lsm6dso_st_g_t; |
cparata | 0:6d69e896ce38 | 1767 | int32_t lsm6dso_gy_self_test_set(lsm6dso_ctx_t *ctx, lsm6dso_st_g_t val); |
cparata | 0:6d69e896ce38 | 1768 | int32_t lsm6dso_gy_self_test_get(lsm6dso_ctx_t *ctx, lsm6dso_st_g_t *val); |
cparata | 0:6d69e896ce38 | 1769 | |
cparata | 0:6d69e896ce38 | 1770 | int32_t lsm6dso_xl_filter_lp2_set(lsm6dso_ctx_t *ctx, uint8_t val); |
cparata | 0:6d69e896ce38 | 1771 | int32_t lsm6dso_xl_filter_lp2_get(lsm6dso_ctx_t *ctx, uint8_t *val); |
cparata | 0:6d69e896ce38 | 1772 | |
cparata | 0:6d69e896ce38 | 1773 | int32_t lsm6dso_gy_filter_lp1_set(lsm6dso_ctx_t *ctx, uint8_t val); |
cparata | 0:6d69e896ce38 | 1774 | int32_t lsm6dso_gy_filter_lp1_get(lsm6dso_ctx_t *ctx, uint8_t *val); |
cparata | 0:6d69e896ce38 | 1775 | |
cparata | 0:6d69e896ce38 | 1776 | int32_t lsm6dso_filter_settling_mask_set(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 1777 | uint8_t val); |
cparata | 0:6d69e896ce38 | 1778 | int32_t lsm6dso_filter_settling_mask_get(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 1779 | uint8_t *val); |
cparata | 0:6d69e896ce38 | 1780 | |
cparata | 0:6d69e896ce38 | 1781 | typedef enum { |
cparata | 4:77faf76e3cd8 | 1782 | LSM6DSO_ULTRA_LIGHT = 0, |
cparata | 4:77faf76e3cd8 | 1783 | LSM6DSO_VERY_LIGHT = 1, |
cparata | 4:77faf76e3cd8 | 1784 | LSM6DSO_LIGHT = 2, |
cparata | 4:77faf76e3cd8 | 1785 | LSM6DSO_MEDIUM = 3, |
cparata | 4:77faf76e3cd8 | 1786 | LSM6DSO_STRONG = 4, /* not available for data rate > 1k670Hz */ |
cparata | 4:77faf76e3cd8 | 1787 | LSM6DSO_VERY_STRONG = 5, /* not available for data rate > 1k670Hz */ |
cparata | 4:77faf76e3cd8 | 1788 | LSM6DSO_AGGRESSIVE = 6, /* not available for data rate > 1k670Hz */ |
cparata | 4:77faf76e3cd8 | 1789 | LSM6DSO_XTREME = 7, /* not available for data rate > 1k670Hz */ |
cparata | 0:6d69e896ce38 | 1790 | } lsm6dso_ftype_t; |
cparata | 0:6d69e896ce38 | 1791 | int32_t lsm6dso_gy_lp1_bandwidth_set(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 1792 | lsm6dso_ftype_t val); |
cparata | 0:6d69e896ce38 | 1793 | int32_t lsm6dso_gy_lp1_bandwidth_get(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 1794 | lsm6dso_ftype_t *val); |
cparata | 0:6d69e896ce38 | 1795 | |
cparata | 0:6d69e896ce38 | 1796 | int32_t lsm6dso_xl_lp2_on_6d_set(lsm6dso_ctx_t *ctx, uint8_t val); |
cparata | 0:6d69e896ce38 | 1797 | int32_t lsm6dso_xl_lp2_on_6d_get(lsm6dso_ctx_t *ctx, uint8_t *val); |
cparata | 0:6d69e896ce38 | 1798 | |
cparata | 0:6d69e896ce38 | 1799 | typedef enum { |
cparata | 4:77faf76e3cd8 | 1800 | LSM6DSO_HP_PATH_DISABLE_ON_OUT = 0x00, |
cparata | 4:77faf76e3cd8 | 1801 | LSM6DSO_SLOPE_ODR_DIV_4 = 0x10, |
cparata | 4:77faf76e3cd8 | 1802 | LSM6DSO_HP_ODR_DIV_10 = 0x11, |
cparata | 4:77faf76e3cd8 | 1803 | LSM6DSO_HP_ODR_DIV_20 = 0x12, |
cparata | 4:77faf76e3cd8 | 1804 | LSM6DSO_HP_ODR_DIV_45 = 0x13, |
cparata | 4:77faf76e3cd8 | 1805 | LSM6DSO_HP_ODR_DIV_100 = 0x14, |
cparata | 4:77faf76e3cd8 | 1806 | LSM6DSO_HP_ODR_DIV_200 = 0x15, |
cparata | 4:77faf76e3cd8 | 1807 | LSM6DSO_HP_ODR_DIV_400 = 0x16, |
cparata | 4:77faf76e3cd8 | 1808 | LSM6DSO_HP_ODR_DIV_800 = 0x17, |
cparata | 4:77faf76e3cd8 | 1809 | LSM6DSO_HP_REF_MD_ODR_DIV_10 = 0x31, |
cparata | 4:77faf76e3cd8 | 1810 | LSM6DSO_HP_REF_MD_ODR_DIV_20 = 0x32, |
cparata | 4:77faf76e3cd8 | 1811 | LSM6DSO_HP_REF_MD_ODR_DIV_45 = 0x33, |
cparata | 4:77faf76e3cd8 | 1812 | LSM6DSO_HP_REF_MD_ODR_DIV_100 = 0x34, |
cparata | 4:77faf76e3cd8 | 1813 | LSM6DSO_HP_REF_MD_ODR_DIV_200 = 0x35, |
cparata | 4:77faf76e3cd8 | 1814 | LSM6DSO_HP_REF_MD_ODR_DIV_400 = 0x36, |
cparata | 4:77faf76e3cd8 | 1815 | LSM6DSO_HP_REF_MD_ODR_DIV_800 = 0x37, |
cparata | 4:77faf76e3cd8 | 1816 | LSM6DSO_LP_ODR_DIV_10 = 0x01, |
cparata | 4:77faf76e3cd8 | 1817 | LSM6DSO_LP_ODR_DIV_20 = 0x02, |
cparata | 4:77faf76e3cd8 | 1818 | LSM6DSO_LP_ODR_DIV_45 = 0x03, |
cparata | 4:77faf76e3cd8 | 1819 | LSM6DSO_LP_ODR_DIV_100 = 0x04, |
cparata | 4:77faf76e3cd8 | 1820 | LSM6DSO_LP_ODR_DIV_200 = 0x05, |
cparata | 4:77faf76e3cd8 | 1821 | LSM6DSO_LP_ODR_DIV_400 = 0x06, |
cparata | 4:77faf76e3cd8 | 1822 | LSM6DSO_LP_ODR_DIV_800 = 0x07, |
cparata | 0:6d69e896ce38 | 1823 | } lsm6dso_hp_slope_xl_en_t; |
cparata | 0:6d69e896ce38 | 1824 | int32_t lsm6dso_xl_hp_path_on_out_set(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 1825 | lsm6dso_hp_slope_xl_en_t val); |
cparata | 0:6d69e896ce38 | 1826 | int32_t lsm6dso_xl_hp_path_on_out_get(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 1827 | lsm6dso_hp_slope_xl_en_t *val); |
cparata | 0:6d69e896ce38 | 1828 | |
cparata | 0:6d69e896ce38 | 1829 | int32_t lsm6dso_xl_fast_settling_set(lsm6dso_ctx_t *ctx, uint8_t val); |
cparata | 0:6d69e896ce38 | 1830 | int32_t lsm6dso_xl_fast_settling_get(lsm6dso_ctx_t *ctx, uint8_t *val); |
cparata | 0:6d69e896ce38 | 1831 | |
cparata | 0:6d69e896ce38 | 1832 | typedef enum { |
cparata | 4:77faf76e3cd8 | 1833 | LSM6DSO_USE_SLOPE = 0, |
cparata | 4:77faf76e3cd8 | 1834 | LSM6DSO_USE_HPF = 1, |
cparata | 0:6d69e896ce38 | 1835 | } lsm6dso_slope_fds_t; |
cparata | 0:6d69e896ce38 | 1836 | int32_t lsm6dso_xl_hp_path_internal_set(lsm6dso_ctx_t *ctx, |
cparata | 4:77faf76e3cd8 | 1837 | lsm6dso_slope_fds_t val); |
cparata | 0:6d69e896ce38 | 1838 | int32_t lsm6dso_xl_hp_path_internal_get(lsm6dso_ctx_t *ctx, |
cparata | 4:77faf76e3cd8 | 1839 | lsm6dso_slope_fds_t *val); |
cparata | 0:6d69e896ce38 | 1840 | |
cparata | 0:6d69e896ce38 | 1841 | typedef enum { |
cparata | 4:77faf76e3cd8 | 1842 | LSM6DSO_HP_FILTER_NONE = 0x00, |
cparata | 4:77faf76e3cd8 | 1843 | LSM6DSO_HP_FILTER_16mHz = 0x80, |
cparata | 4:77faf76e3cd8 | 1844 | LSM6DSO_HP_FILTER_65mHz = 0x81, |
cparata | 4:77faf76e3cd8 | 1845 | LSM6DSO_HP_FILTER_260mHz = 0x82, |
cparata | 4:77faf76e3cd8 | 1846 | LSM6DSO_HP_FILTER_1Hz04 = 0x83, |
cparata | 0:6d69e896ce38 | 1847 | } lsm6dso_hpm_g_t; |
cparata | 0:6d69e896ce38 | 1848 | int32_t lsm6dso_gy_hp_path_internal_set(lsm6dso_ctx_t *ctx, |
cparata | 4:77faf76e3cd8 | 1849 | lsm6dso_hpm_g_t val); |
cparata | 0:6d69e896ce38 | 1850 | int32_t lsm6dso_gy_hp_path_internal_get(lsm6dso_ctx_t *ctx, |
cparata | 4:77faf76e3cd8 | 1851 | lsm6dso_hpm_g_t *val); |
cparata | 0:6d69e896ce38 | 1852 | |
cparata | 0:6d69e896ce38 | 1853 | typedef enum { |
cparata | 4:77faf76e3cd8 | 1854 | LSM6DSO_AUX_PULL_UP_DISC = 0, |
cparata | 4:77faf76e3cd8 | 1855 | LSM6DSO_AUX_PULL_UP_CONNECT = 1, |
cparata | 0:6d69e896ce38 | 1856 | } lsm6dso_ois_pu_dis_t; |
cparata | 0:6d69e896ce38 | 1857 | int32_t lsm6dso_aux_sdo_ocs_mode_set(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 1858 | lsm6dso_ois_pu_dis_t val); |
cparata | 0:6d69e896ce38 | 1859 | int32_t lsm6dso_aux_sdo_ocs_mode_get(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 1860 | lsm6dso_ois_pu_dis_t *val); |
cparata | 0:6d69e896ce38 | 1861 | |
cparata | 0:6d69e896ce38 | 1862 | typedef enum { |
cparata | 4:77faf76e3cd8 | 1863 | LSM6DSO_AUX_ON = 1, |
cparata | 4:77faf76e3cd8 | 1864 | LSM6DSO_AUX_ON_BY_AUX_INTERFACE = 0, |
cparata | 0:6d69e896ce38 | 1865 | } lsm6dso_ois_on_t; |
cparata | 0:6d69e896ce38 | 1866 | int32_t lsm6dso_aux_pw_on_ctrl_set(lsm6dso_ctx_t *ctx, lsm6dso_ois_on_t val); |
cparata | 0:6d69e896ce38 | 1867 | int32_t lsm6dso_aux_pw_on_ctrl_get(lsm6dso_ctx_t *ctx, lsm6dso_ois_on_t *val); |
cparata | 0:6d69e896ce38 | 1868 | |
cparata | 0:6d69e896ce38 | 1869 | typedef enum { |
cparata | 4:77faf76e3cd8 | 1870 | LSM6DSO_USE_SAME_XL_FS = 0, |
cparata | 4:77faf76e3cd8 | 1871 | LSM6DSO_USE_DIFFERENT_XL_FS = 1, |
cparata | 0:6d69e896ce38 | 1872 | } lsm6dso_xl_fs_mode_t; |
cparata | 0:6d69e896ce38 | 1873 | int32_t lsm6dso_aux_xl_fs_mode_set(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 1874 | lsm6dso_xl_fs_mode_t val); |
cparata | 0:6d69e896ce38 | 1875 | int32_t lsm6dso_aux_xl_fs_mode_get(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 1876 | lsm6dso_xl_fs_mode_t *val); |
cparata | 0:6d69e896ce38 | 1877 | |
cparata | 0:6d69e896ce38 | 1878 | int32_t lsm6dso_aux_status_reg_get(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 1879 | lsm6dso_status_spiaux_t *val); |
cparata | 0:6d69e896ce38 | 1880 | |
cparata | 0:6d69e896ce38 | 1881 | int32_t lsm6dso_aux_xl_flag_data_ready_get(lsm6dso_ctx_t *ctx, uint8_t *val); |
cparata | 0:6d69e896ce38 | 1882 | |
cparata | 0:6d69e896ce38 | 1883 | int32_t lsm6dso_aux_gy_flag_data_ready_get(lsm6dso_ctx_t *ctx, uint8_t *val); |
cparata | 0:6d69e896ce38 | 1884 | |
cparata | 0:6d69e896ce38 | 1885 | int32_t lsm6dso_aux_gy_flag_settling_get(lsm6dso_ctx_t *ctx, uint8_t *val); |
cparata | 0:6d69e896ce38 | 1886 | |
cparata | 0:6d69e896ce38 | 1887 | typedef enum { |
cparata | 4:77faf76e3cd8 | 1888 | LSM6DSO_AUX_XL_DISABLE = 0, |
cparata | 4:77faf76e3cd8 | 1889 | LSM6DSO_AUX_XL_POS = 1, |
cparata | 4:77faf76e3cd8 | 1890 | LSM6DSO_AUX_XL_NEG = 2, |
cparata | 0:6d69e896ce38 | 1891 | } lsm6dso_st_xl_ois_t; |
cparata | 0:6d69e896ce38 | 1892 | int32_t lsm6dso_aux_xl_self_test_set(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 1893 | lsm6dso_st_xl_ois_t val); |
cparata | 0:6d69e896ce38 | 1894 | int32_t lsm6dso_aux_xl_self_test_get(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 1895 | lsm6dso_st_xl_ois_t *val); |
cparata | 0:6d69e896ce38 | 1896 | |
cparata | 0:6d69e896ce38 | 1897 | typedef enum { |
cparata | 4:77faf76e3cd8 | 1898 | LSM6DSO_AUX_DEN_ACTIVE_LOW = 0, |
cparata | 4:77faf76e3cd8 | 1899 | LSM6DSO_AUX_DEN_ACTIVE_HIGH = 1, |
cparata | 0:6d69e896ce38 | 1900 | } lsm6dso_den_lh_ois_t; |
cparata | 0:6d69e896ce38 | 1901 | int32_t lsm6dso_aux_den_polarity_set(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 1902 | lsm6dso_den_lh_ois_t val); |
cparata | 0:6d69e896ce38 | 1903 | int32_t lsm6dso_aux_den_polarity_get(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 1904 | lsm6dso_den_lh_ois_t *val); |
cparata | 0:6d69e896ce38 | 1905 | |
cparata | 0:6d69e896ce38 | 1906 | typedef enum { |
cparata | 4:77faf76e3cd8 | 1907 | LSM6DSO_AUX_DEN_DISABLE = 0, |
cparata | 4:77faf76e3cd8 | 1908 | LSM6DSO_AUX_DEN_LEVEL_LATCH = 3, |
cparata | 4:77faf76e3cd8 | 1909 | LSM6DSO_AUX_DEN_LEVEL_TRIG = 2, |
cparata | 0:6d69e896ce38 | 1910 | } lsm6dso_lvl2_ois_t; |
cparata | 0:6d69e896ce38 | 1911 | int32_t lsm6dso_aux_den_mode_set(lsm6dso_ctx_t *ctx, lsm6dso_lvl2_ois_t val); |
cparata | 0:6d69e896ce38 | 1912 | int32_t lsm6dso_aux_den_mode_get(lsm6dso_ctx_t *ctx, lsm6dso_lvl2_ois_t *val); |
cparata | 0:6d69e896ce38 | 1913 | |
cparata | 0:6d69e896ce38 | 1914 | int32_t lsm6dso_aux_drdy_on_int2_set(lsm6dso_ctx_t *ctx, uint8_t val); |
cparata | 0:6d69e896ce38 | 1915 | int32_t lsm6dso_aux_drdy_on_int2_get(lsm6dso_ctx_t *ctx, uint8_t *val); |
cparata | 0:6d69e896ce38 | 1916 | |
cparata | 0:6d69e896ce38 | 1917 | typedef enum { |
cparata | 4:77faf76e3cd8 | 1918 | LSM6DSO_AUX_DISABLE = 0, |
cparata | 4:77faf76e3cd8 | 1919 | LSM6DSO_MODE_3_GY = 1, |
cparata | 4:77faf76e3cd8 | 1920 | LSM6DSO_MODE_4_GY_XL = 3, |
cparata | 0:6d69e896ce38 | 1921 | } lsm6dso_ois_en_spi2_t; |
cparata | 0:6d69e896ce38 | 1922 | int32_t lsm6dso_aux_mode_set(lsm6dso_ctx_t *ctx, lsm6dso_ois_en_spi2_t val); |
cparata | 0:6d69e896ce38 | 1923 | int32_t lsm6dso_aux_mode_get(lsm6dso_ctx_t *ctx, lsm6dso_ois_en_spi2_t *val); |
cparata | 0:6d69e896ce38 | 1924 | |
cparata | 0:6d69e896ce38 | 1925 | typedef enum { |
cparata | 4:77faf76e3cd8 | 1926 | LSM6DSO_250dps_AUX = 0, |
cparata | 4:77faf76e3cd8 | 1927 | LSM6DSO_125dps_AUX = 1, |
cparata | 4:77faf76e3cd8 | 1928 | LSM6DSO_500dps_AUX = 2, |
cparata | 4:77faf76e3cd8 | 1929 | LSM6DSO_1000dps_AUX = 4, |
cparata | 4:77faf76e3cd8 | 1930 | LSM6DSO_2000dps_AUX = 6, |
cparata | 0:6d69e896ce38 | 1931 | } lsm6dso_fs_g_ois_t; |
cparata | 0:6d69e896ce38 | 1932 | int32_t lsm6dso_aux_gy_full_scale_set(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 1933 | lsm6dso_fs_g_ois_t val); |
cparata | 0:6d69e896ce38 | 1934 | int32_t lsm6dso_aux_gy_full_scale_get(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 1935 | lsm6dso_fs_g_ois_t *val); |
cparata | 0:6d69e896ce38 | 1936 | |
cparata | 0:6d69e896ce38 | 1937 | typedef enum { |
cparata | 4:77faf76e3cd8 | 1938 | LSM6DSO_AUX_SPI_4_WIRE = 0, |
cparata | 4:77faf76e3cd8 | 1939 | LSM6DSO_AUX_SPI_3_WIRE = 1, |
cparata | 0:6d69e896ce38 | 1940 | } lsm6dso_sim_ois_t; |
cparata | 0:6d69e896ce38 | 1941 | int32_t lsm6dso_aux_spi_mode_set(lsm6dso_ctx_t *ctx, lsm6dso_sim_ois_t val); |
cparata | 0:6d69e896ce38 | 1942 | int32_t lsm6dso_aux_spi_mode_get(lsm6dso_ctx_t *ctx, lsm6dso_sim_ois_t *val); |
cparata | 0:6d69e896ce38 | 1943 | |
cparata | 0:6d69e896ce38 | 1944 | typedef enum { |
cparata | 4:77faf76e3cd8 | 1945 | LSM6DSO_351Hz39 = 0, |
cparata | 4:77faf76e3cd8 | 1946 | LSM6DSO_236Hz63 = 1, |
cparata | 4:77faf76e3cd8 | 1947 | LSM6DSO_172Hz70 = 2, |
cparata | 4:77faf76e3cd8 | 1948 | LSM6DSO_937Hz91 = 3, |
cparata | 0:6d69e896ce38 | 1949 | } lsm6dso_ftype_ois_t; |
cparata | 0:6d69e896ce38 | 1950 | int32_t lsm6dso_aux_gy_lp1_bandwidth_set(lsm6dso_ctx_t *ctx, |
cparata | 4:77faf76e3cd8 | 1951 | lsm6dso_ftype_ois_t val); |
cparata | 0:6d69e896ce38 | 1952 | int32_t lsm6dso_aux_gy_lp1_bandwidth_get(lsm6dso_ctx_t *ctx, |
cparata | 4:77faf76e3cd8 | 1953 | lsm6dso_ftype_ois_t *val); |
cparata | 0:6d69e896ce38 | 1954 | |
cparata | 0:6d69e896ce38 | 1955 | typedef enum { |
cparata | 4:77faf76e3cd8 | 1956 | LSM6DSO_AUX_HP_DISABLE = 0x00, |
cparata | 4:77faf76e3cd8 | 1957 | LSM6DSO_AUX_HP_Hz016 = 0x10, |
cparata | 4:77faf76e3cd8 | 1958 | LSM6DSO_AUX_HP_Hz065 = 0x11, |
cparata | 4:77faf76e3cd8 | 1959 | LSM6DSO_AUX_HP_Hz260 = 0x12, |
cparata | 4:77faf76e3cd8 | 1960 | LSM6DSO_AUX_HP_1Hz040 = 0x13, |
cparata | 0:6d69e896ce38 | 1961 | } lsm6dso_hpm_ois_t; |
cparata | 0:6d69e896ce38 | 1962 | int32_t lsm6dso_aux_gy_hp_bandwidth_set(lsm6dso_ctx_t *ctx, |
cparata | 4:77faf76e3cd8 | 1963 | lsm6dso_hpm_ois_t val); |
cparata | 0:6d69e896ce38 | 1964 | int32_t lsm6dso_aux_gy_hp_bandwidth_get(lsm6dso_ctx_t *ctx, |
cparata | 4:77faf76e3cd8 | 1965 | lsm6dso_hpm_ois_t *val); |
cparata | 0:6d69e896ce38 | 1966 | |
cparata | 0:6d69e896ce38 | 1967 | typedef enum { |
cparata | 4:77faf76e3cd8 | 1968 | LSM6DSO_ENABLE_CLAMP = 0, |
cparata | 4:77faf76e3cd8 | 1969 | LSM6DSO_DISABLE_CLAMP = 1, |
cparata | 0:6d69e896ce38 | 1970 | } lsm6dso_st_ois_clampdis_t; |
cparata | 0:6d69e896ce38 | 1971 | int32_t lsm6dso_aux_gy_clamp_set(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 1972 | lsm6dso_st_ois_clampdis_t val); |
cparata | 0:6d69e896ce38 | 1973 | int32_t lsm6dso_aux_gy_clamp_get(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 1974 | lsm6dso_st_ois_clampdis_t *val); |
cparata | 0:6d69e896ce38 | 1975 | |
cparata | 0:6d69e896ce38 | 1976 | typedef enum { |
cparata | 4:77faf76e3cd8 | 1977 | LSM6DSO_AUX_GY_DISABLE = 0, |
cparata | 4:77faf76e3cd8 | 1978 | LSM6DSO_AUX_GY_POS = 1, |
cparata | 4:77faf76e3cd8 | 1979 | LSM6DSO_AUX_GY_NEG = 3, |
cparata | 0:6d69e896ce38 | 1980 | } lsm6dso_st_ois_t; |
cparata | 0:6d69e896ce38 | 1981 | int32_t lsm6dso_aux_gy_self_test_set(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 1982 | lsm6dso_st_ois_t val); |
cparata | 0:6d69e896ce38 | 1983 | int32_t lsm6dso_aux_gy_self_test_get(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 1984 | lsm6dso_st_ois_t *val); |
cparata | 0:6d69e896ce38 | 1985 | |
cparata | 0:6d69e896ce38 | 1986 | typedef enum { |
cparata | 4:77faf76e3cd8 | 1987 | LSM6DSO_289Hz = 0, |
cparata | 4:77faf76e3cd8 | 1988 | LSM6DSO_258Hz = 1, |
cparata | 4:77faf76e3cd8 | 1989 | LSM6DSO_120Hz = 2, |
cparata | 4:77faf76e3cd8 | 1990 | LSM6DSO_65Hz2 = 3, |
cparata | 4:77faf76e3cd8 | 1991 | LSM6DSO_33Hz2 = 4, |
cparata | 4:77faf76e3cd8 | 1992 | LSM6DSO_16Hz6 = 5, |
cparata | 4:77faf76e3cd8 | 1993 | LSM6DSO_8Hz30 = 6, |
cparata | 4:77faf76e3cd8 | 1994 | LSM6DSO_4Hz15 = 7, |
cparata | 0:6d69e896ce38 | 1995 | } lsm6dso_filter_xl_conf_ois_t; |
cparata | 0:6d69e896ce38 | 1996 | int32_t lsm6dso_aux_xl_bandwidth_set(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 1997 | lsm6dso_filter_xl_conf_ois_t val); |
cparata | 0:6d69e896ce38 | 1998 | int32_t lsm6dso_aux_xl_bandwidth_get(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 1999 | lsm6dso_filter_xl_conf_ois_t *val); |
cparata | 0:6d69e896ce38 | 2000 | |
cparata | 0:6d69e896ce38 | 2001 | typedef enum { |
cparata | 4:77faf76e3cd8 | 2002 | LSM6DSO_AUX_2g = 0, |
cparata | 4:77faf76e3cd8 | 2003 | LSM6DSO_AUX_16g = 1, |
cparata | 4:77faf76e3cd8 | 2004 | LSM6DSO_AUX_4g = 2, |
cparata | 4:77faf76e3cd8 | 2005 | LSM6DSO_AUX_8g = 3, |
cparata | 0:6d69e896ce38 | 2006 | } lsm6dso_fs_xl_ois_t; |
cparata | 0:6d69e896ce38 | 2007 | int32_t lsm6dso_aux_xl_full_scale_set(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 2008 | lsm6dso_fs_xl_ois_t val); |
cparata | 0:6d69e896ce38 | 2009 | int32_t lsm6dso_aux_xl_full_scale_get(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 2010 | lsm6dso_fs_xl_ois_t *val); |
cparata | 0:6d69e896ce38 | 2011 | |
cparata | 0:6d69e896ce38 | 2012 | typedef enum { |
cparata | 4:77faf76e3cd8 | 2013 | LSM6DSO_PULL_UP_DISC = 0, |
cparata | 4:77faf76e3cd8 | 2014 | LSM6DSO_PULL_UP_CONNECT = 1, |
cparata | 0:6d69e896ce38 | 2015 | } lsm6dso_sdo_pu_en_t; |
cparata | 0:6d69e896ce38 | 2016 | int32_t lsm6dso_sdo_sa0_mode_set(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 2017 | lsm6dso_sdo_pu_en_t val); |
cparata | 0:6d69e896ce38 | 2018 | int32_t lsm6dso_sdo_sa0_mode_get(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 2019 | lsm6dso_sdo_pu_en_t *val); |
cparata | 0:6d69e896ce38 | 2020 | |
cparata | 0:6d69e896ce38 | 2021 | typedef enum { |
cparata | 4:77faf76e3cd8 | 2022 | LSM6DSO_SPI_4_WIRE = 0, |
cparata | 4:77faf76e3cd8 | 2023 | LSM6DSO_SPI_3_WIRE = 1, |
cparata | 0:6d69e896ce38 | 2024 | } lsm6dso_sim_t; |
cparata | 0:6d69e896ce38 | 2025 | int32_t lsm6dso_spi_mode_set(lsm6dso_ctx_t *ctx, lsm6dso_sim_t val); |
cparata | 0:6d69e896ce38 | 2026 | int32_t lsm6dso_spi_mode_get(lsm6dso_ctx_t *ctx, lsm6dso_sim_t *val); |
cparata | 0:6d69e896ce38 | 2027 | |
cparata | 0:6d69e896ce38 | 2028 | typedef enum { |
cparata | 4:77faf76e3cd8 | 2029 | LSM6DSO_I2C_ENABLE = 0, |
cparata | 4:77faf76e3cd8 | 2030 | LSM6DSO_I2C_DISABLE = 1, |
cparata | 0:6d69e896ce38 | 2031 | } lsm6dso_i2c_disable_t; |
cparata | 0:6d69e896ce38 | 2032 | int32_t lsm6dso_i2c_interface_set(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 2033 | lsm6dso_i2c_disable_t val); |
cparata | 0:6d69e896ce38 | 2034 | int32_t lsm6dso_i2c_interface_get(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 2035 | lsm6dso_i2c_disable_t *val); |
cparata | 0:6d69e896ce38 | 2036 | |
cparata | 0:6d69e896ce38 | 2037 | typedef enum { |
cparata | 4:77faf76e3cd8 | 2038 | LSM6DSO_I3C_DISABLE = 0x80, |
cparata | 4:77faf76e3cd8 | 2039 | LSM6DSO_I3C_ENABLE_T_50us = 0x00, |
cparata | 4:77faf76e3cd8 | 2040 | LSM6DSO_I3C_ENABLE_T_2us = 0x01, |
cparata | 4:77faf76e3cd8 | 2041 | LSM6DSO_I3C_ENABLE_T_1ms = 0x02, |
cparata | 4:77faf76e3cd8 | 2042 | LSM6DSO_I3C_ENABLE_T_25ms = 0x03, |
cparata | 0:6d69e896ce38 | 2043 | } lsm6dso_i3c_disable_t; |
cparata | 0:6d69e896ce38 | 2044 | int32_t lsm6dso_i3c_disable_set(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 2045 | lsm6dso_i3c_disable_t val); |
cparata | 0:6d69e896ce38 | 2046 | int32_t lsm6dso_i3c_disable_get(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 2047 | lsm6dso_i3c_disable_t *val); |
cparata | 0:6d69e896ce38 | 2048 | |
cparata | 0:6d69e896ce38 | 2049 | typedef enum { |
cparata | 4:77faf76e3cd8 | 2050 | LSM6DSO_PULL_DOWN_DISC = 0, |
cparata | 4:77faf76e3cd8 | 2051 | LSM6DSO_PULL_DOWN_CONNECT = 1, |
cparata | 0:6d69e896ce38 | 2052 | } lsm6dso_int1_pd_en_t; |
cparata | 0:6d69e896ce38 | 2053 | int32_t lsm6dso_int1_mode_set(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 2054 | lsm6dso_int1_pd_en_t val); |
cparata | 0:6d69e896ce38 | 2055 | int32_t lsm6dso_int1_mode_get(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 2056 | lsm6dso_int1_pd_en_t *val); |
cparata | 0:6d69e896ce38 | 2057 | |
cparata | 0:6d69e896ce38 | 2058 | typedef enum { |
cparata | 4:77faf76e3cd8 | 2059 | LSM6DSO_PUSH_PULL = 0, |
cparata | 4:77faf76e3cd8 | 2060 | LSM6DSO_OPEN_DRAIN = 1, |
cparata | 0:6d69e896ce38 | 2061 | } lsm6dso_pp_od_t; |
cparata | 0:6d69e896ce38 | 2062 | int32_t lsm6dso_pin_mode_set(lsm6dso_ctx_t *ctx, lsm6dso_pp_od_t val); |
cparata | 0:6d69e896ce38 | 2063 | int32_t lsm6dso_pin_mode_get(lsm6dso_ctx_t *ctx, lsm6dso_pp_od_t *val); |
cparata | 0:6d69e896ce38 | 2064 | |
cparata | 0:6d69e896ce38 | 2065 | typedef enum { |
cparata | 4:77faf76e3cd8 | 2066 | LSM6DSO_ACTIVE_HIGH = 0, |
cparata | 4:77faf76e3cd8 | 2067 | LSM6DSO_ACTIVE_LOW = 1, |
cparata | 0:6d69e896ce38 | 2068 | } lsm6dso_h_lactive_t; |
cparata | 0:6d69e896ce38 | 2069 | int32_t lsm6dso_pin_polarity_set(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 2070 | lsm6dso_h_lactive_t val); |
cparata | 0:6d69e896ce38 | 2071 | int32_t lsm6dso_pin_polarity_get(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 2072 | lsm6dso_h_lactive_t *val); |
cparata | 0:6d69e896ce38 | 2073 | |
cparata | 0:6d69e896ce38 | 2074 | int32_t lsm6dso_all_on_int1_set(lsm6dso_ctx_t *ctx, uint8_t val); |
cparata | 0:6d69e896ce38 | 2075 | int32_t lsm6dso_all_on_int1_get(lsm6dso_ctx_t *ctx, uint8_t *val); |
cparata | 0:6d69e896ce38 | 2076 | |
cparata | 0:6d69e896ce38 | 2077 | typedef enum { |
cparata | 4:77faf76e3cd8 | 2078 | LSM6DSO_ALL_INT_PULSED = 0, |
cparata | 4:77faf76e3cd8 | 2079 | LSM6DSO_BASE_LATCHED_EMB_PULSED = 1, |
cparata | 4:77faf76e3cd8 | 2080 | LSM6DSO_BASE_PULSED_EMB_LATCHED = 2, |
cparata | 4:77faf76e3cd8 | 2081 | LSM6DSO_ALL_INT_LATCHED = 3, |
cparata | 0:6d69e896ce38 | 2082 | } lsm6dso_lir_t; |
cparata | 0:6d69e896ce38 | 2083 | int32_t lsm6dso_int_notification_set(lsm6dso_ctx_t *ctx, lsm6dso_lir_t val); |
cparata | 0:6d69e896ce38 | 2084 | int32_t lsm6dso_int_notification_get(lsm6dso_ctx_t *ctx, lsm6dso_lir_t *val); |
cparata | 0:6d69e896ce38 | 2085 | |
cparata | 0:6d69e896ce38 | 2086 | typedef enum { |
cparata | 4:77faf76e3cd8 | 2087 | LSM6DSO_LSb_FS_DIV_64 = 0, |
cparata | 4:77faf76e3cd8 | 2088 | LSM6DSO_LSb_FS_DIV_256 = 1, |
cparata | 0:6d69e896ce38 | 2089 | } lsm6dso_wake_ths_w_t; |
cparata | 0:6d69e896ce38 | 2090 | int32_t lsm6dso_wkup_ths_weight_set(lsm6dso_ctx_t *ctx, |
cparata | 4:77faf76e3cd8 | 2091 | lsm6dso_wake_ths_w_t val); |
cparata | 0:6d69e896ce38 | 2092 | int32_t lsm6dso_wkup_ths_weight_get(lsm6dso_ctx_t *ctx, |
cparata | 4:77faf76e3cd8 | 2093 | lsm6dso_wake_ths_w_t *val); |
cparata | 0:6d69e896ce38 | 2094 | |
cparata | 0:6d69e896ce38 | 2095 | int32_t lsm6dso_wkup_threshold_set(lsm6dso_ctx_t *ctx, uint8_t val); |
cparata | 0:6d69e896ce38 | 2096 | int32_t lsm6dso_wkup_threshold_get(lsm6dso_ctx_t *ctx, uint8_t *val); |
cparata | 0:6d69e896ce38 | 2097 | |
cparata | 0:6d69e896ce38 | 2098 | int32_t lsm6dso_xl_usr_offset_on_wkup_set(lsm6dso_ctx_t *ctx, uint8_t val); |
cparata | 0:6d69e896ce38 | 2099 | int32_t lsm6dso_xl_usr_offset_on_wkup_get(lsm6dso_ctx_t *ctx, uint8_t *val); |
cparata | 0:6d69e896ce38 | 2100 | |
cparata | 0:6d69e896ce38 | 2101 | int32_t lsm6dso_wkup_dur_set(lsm6dso_ctx_t *ctx, uint8_t val); |
cparata | 0:6d69e896ce38 | 2102 | int32_t lsm6dso_wkup_dur_get(lsm6dso_ctx_t *ctx, uint8_t *val); |
cparata | 0:6d69e896ce38 | 2103 | |
cparata | 0:6d69e896ce38 | 2104 | int32_t lsm6dso_gy_sleep_mode_set(lsm6dso_ctx_t *ctx, uint8_t val); |
cparata | 0:6d69e896ce38 | 2105 | int32_t lsm6dso_gy_sleep_mode_get(lsm6dso_ctx_t *ctx, uint8_t *val); |
cparata | 0:6d69e896ce38 | 2106 | |
cparata | 0:6d69e896ce38 | 2107 | typedef enum { |
cparata | 4:77faf76e3cd8 | 2108 | LSM6DSO_DRIVE_SLEEP_CHG_EVENT = 0, |
cparata | 4:77faf76e3cd8 | 2109 | LSM6DSO_DRIVE_SLEEP_STATUS = 1, |
cparata | 0:6d69e896ce38 | 2110 | } lsm6dso_sleep_status_on_int_t; |
cparata | 0:6d69e896ce38 | 2111 | int32_t lsm6dso_act_pin_notification_set(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 2112 | lsm6dso_sleep_status_on_int_t val); |
cparata | 0:6d69e896ce38 | 2113 | int32_t lsm6dso_act_pin_notification_get(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 2114 | lsm6dso_sleep_status_on_int_t *val); |
cparata | 0:6d69e896ce38 | 2115 | |
cparata | 0:6d69e896ce38 | 2116 | typedef enum { |
cparata | 4:77faf76e3cd8 | 2117 | LSM6DSO_XL_AND_GY_NOT_AFFECTED = 0, |
cparata | 4:77faf76e3cd8 | 2118 | LSM6DSO_XL_12Hz5_GY_NOT_AFFECTED = 1, |
cparata | 4:77faf76e3cd8 | 2119 | LSM6DSO_XL_12Hz5_GY_SLEEP = 2, |
cparata | 4:77faf76e3cd8 | 2120 | LSM6DSO_XL_12Hz5_GY_PD = 3, |
cparata | 0:6d69e896ce38 | 2121 | } lsm6dso_inact_en_t; |
cparata | 0:6d69e896ce38 | 2122 | int32_t lsm6dso_act_mode_set(lsm6dso_ctx_t *ctx, lsm6dso_inact_en_t val); |
cparata | 0:6d69e896ce38 | 2123 | int32_t lsm6dso_act_mode_get(lsm6dso_ctx_t *ctx, lsm6dso_inact_en_t *val); |
cparata | 0:6d69e896ce38 | 2124 | |
cparata | 0:6d69e896ce38 | 2125 | int32_t lsm6dso_act_sleep_dur_set(lsm6dso_ctx_t *ctx, uint8_t val); |
cparata | 0:6d69e896ce38 | 2126 | int32_t lsm6dso_act_sleep_dur_get(lsm6dso_ctx_t *ctx, uint8_t *val); |
cparata | 0:6d69e896ce38 | 2127 | |
cparata | 0:6d69e896ce38 | 2128 | int32_t lsm6dso_tap_detection_on_z_set(lsm6dso_ctx_t *ctx, uint8_t val); |
cparata | 0:6d69e896ce38 | 2129 | int32_t lsm6dso_tap_detection_on_z_get(lsm6dso_ctx_t *ctx, uint8_t *val); |
cparata | 0:6d69e896ce38 | 2130 | |
cparata | 0:6d69e896ce38 | 2131 | int32_t lsm6dso_tap_detection_on_y_set(lsm6dso_ctx_t *ctx, uint8_t val); |
cparata | 0:6d69e896ce38 | 2132 | int32_t lsm6dso_tap_detection_on_y_get(lsm6dso_ctx_t *ctx, uint8_t *val); |
cparata | 0:6d69e896ce38 | 2133 | |
cparata | 0:6d69e896ce38 | 2134 | int32_t lsm6dso_tap_detection_on_x_set(lsm6dso_ctx_t *ctx, uint8_t val); |
cparata | 0:6d69e896ce38 | 2135 | int32_t lsm6dso_tap_detection_on_x_get(lsm6dso_ctx_t *ctx, uint8_t *val); |
cparata | 0:6d69e896ce38 | 2136 | |
cparata | 0:6d69e896ce38 | 2137 | int32_t lsm6dso_tap_threshold_x_set(lsm6dso_ctx_t *ctx, uint8_t val); |
cparata | 0:6d69e896ce38 | 2138 | int32_t lsm6dso_tap_threshold_x_get(lsm6dso_ctx_t *ctx, uint8_t *val); |
cparata | 0:6d69e896ce38 | 2139 | |
cparata | 0:6d69e896ce38 | 2140 | typedef enum { |
cparata | 4:77faf76e3cd8 | 2141 | LSM6DSO_XYZ = 0, |
cparata | 4:77faf76e3cd8 | 2142 | LSM6DSO_YXZ = 1, |
cparata | 4:77faf76e3cd8 | 2143 | LSM6DSO_XZY = 2, |
cparata | 4:77faf76e3cd8 | 2144 | LSM6DSO_ZYX = 3, |
cparata | 4:77faf76e3cd8 | 2145 | LSM6DSO_YZX = 5, |
cparata | 4:77faf76e3cd8 | 2146 | LSM6DSO_ZXY = 6, |
cparata | 0:6d69e896ce38 | 2147 | } lsm6dso_tap_priority_t; |
cparata | 0:6d69e896ce38 | 2148 | int32_t lsm6dso_tap_axis_priority_set(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 2149 | lsm6dso_tap_priority_t val); |
cparata | 0:6d69e896ce38 | 2150 | int32_t lsm6dso_tap_axis_priority_get(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 2151 | lsm6dso_tap_priority_t *val); |
cparata | 0:6d69e896ce38 | 2152 | |
cparata | 0:6d69e896ce38 | 2153 | int32_t lsm6dso_tap_threshold_y_set(lsm6dso_ctx_t *ctx, uint8_t val); |
cparata | 0:6d69e896ce38 | 2154 | int32_t lsm6dso_tap_threshold_y_get(lsm6dso_ctx_t *ctx, uint8_t *val); |
cparata | 0:6d69e896ce38 | 2155 | |
cparata | 0:6d69e896ce38 | 2156 | int32_t lsm6dso_tap_threshold_z_set(lsm6dso_ctx_t *ctx, uint8_t val); |
cparata | 0:6d69e896ce38 | 2157 | int32_t lsm6dso_tap_threshold_z_get(lsm6dso_ctx_t *ctx, uint8_t *val); |
cparata | 0:6d69e896ce38 | 2158 | |
cparata | 0:6d69e896ce38 | 2159 | int32_t lsm6dso_tap_shock_set(lsm6dso_ctx_t *ctx, uint8_t val); |
cparata | 0:6d69e896ce38 | 2160 | int32_t lsm6dso_tap_shock_get(lsm6dso_ctx_t *ctx, uint8_t *val); |
cparata | 0:6d69e896ce38 | 2161 | |
cparata | 0:6d69e896ce38 | 2162 | int32_t lsm6dso_tap_quiet_set(lsm6dso_ctx_t *ctx, uint8_t val); |
cparata | 0:6d69e896ce38 | 2163 | int32_t lsm6dso_tap_quiet_get(lsm6dso_ctx_t *ctx, uint8_t *val); |
cparata | 0:6d69e896ce38 | 2164 | |
cparata | 0:6d69e896ce38 | 2165 | int32_t lsm6dso_tap_dur_set(lsm6dso_ctx_t *ctx, uint8_t val); |
cparata | 0:6d69e896ce38 | 2166 | int32_t lsm6dso_tap_dur_get(lsm6dso_ctx_t *ctx, uint8_t *val); |
cparata | 0:6d69e896ce38 | 2167 | |
cparata | 0:6d69e896ce38 | 2168 | typedef enum { |
cparata | 4:77faf76e3cd8 | 2169 | LSM6DSO_ONLY_SINGLE = 0, |
cparata | 4:77faf76e3cd8 | 2170 | LSM6DSO_BOTH_SINGLE_DOUBLE = 1, |
cparata | 0:6d69e896ce38 | 2171 | } lsm6dso_single_double_tap_t; |
cparata | 0:6d69e896ce38 | 2172 | int32_t lsm6dso_tap_mode_set(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 2173 | lsm6dso_single_double_tap_t val); |
cparata | 0:6d69e896ce38 | 2174 | int32_t lsm6dso_tap_mode_get(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 2175 | lsm6dso_single_double_tap_t *val); |
cparata | 0:6d69e896ce38 | 2176 | |
cparata | 0:6d69e896ce38 | 2177 | typedef enum { |
cparata | 4:77faf76e3cd8 | 2178 | LSM6DSO_DEG_80 = 0, |
cparata | 4:77faf76e3cd8 | 2179 | LSM6DSO_DEG_70 = 1, |
cparata | 4:77faf76e3cd8 | 2180 | LSM6DSO_DEG_60 = 2, |
cparata | 4:77faf76e3cd8 | 2181 | LSM6DSO_DEG_50 = 3, |
cparata | 0:6d69e896ce38 | 2182 | } lsm6dso_sixd_ths_t; |
cparata | 0:6d69e896ce38 | 2183 | int32_t lsm6dso_6d_threshold_set(lsm6dso_ctx_t *ctx, lsm6dso_sixd_ths_t val); |
cparata | 0:6d69e896ce38 | 2184 | int32_t lsm6dso_6d_threshold_get(lsm6dso_ctx_t *ctx, lsm6dso_sixd_ths_t *val); |
cparata | 0:6d69e896ce38 | 2185 | |
cparata | 0:6d69e896ce38 | 2186 | int32_t lsm6dso_4d_mode_set(lsm6dso_ctx_t *ctx, uint8_t val); |
cparata | 0:6d69e896ce38 | 2187 | int32_t lsm6dso_4d_mode_get(lsm6dso_ctx_t *ctx, uint8_t *val); |
cparata | 0:6d69e896ce38 | 2188 | |
cparata | 0:6d69e896ce38 | 2189 | typedef enum { |
cparata | 4:77faf76e3cd8 | 2190 | LSM6DSO_FF_TSH_156mg = 0, |
cparata | 4:77faf76e3cd8 | 2191 | LSM6DSO_FF_TSH_219mg = 1, |
cparata | 4:77faf76e3cd8 | 2192 | LSM6DSO_FF_TSH_250mg = 2, |
cparata | 4:77faf76e3cd8 | 2193 | LSM6DSO_FF_TSH_312mg = 3, |
cparata | 4:77faf76e3cd8 | 2194 | LSM6DSO_FF_TSH_344mg = 4, |
cparata | 4:77faf76e3cd8 | 2195 | LSM6DSO_FF_TSH_406mg = 5, |
cparata | 4:77faf76e3cd8 | 2196 | LSM6DSO_FF_TSH_469mg = 6, |
cparata | 4:77faf76e3cd8 | 2197 | LSM6DSO_FF_TSH_500mg = 7, |
cparata | 0:6d69e896ce38 | 2198 | } lsm6dso_ff_ths_t; |
cparata | 0:6d69e896ce38 | 2199 | int32_t lsm6dso_ff_threshold_set(lsm6dso_ctx_t *ctx, lsm6dso_ff_ths_t val); |
cparata | 0:6d69e896ce38 | 2200 | int32_t lsm6dso_ff_threshold_get(lsm6dso_ctx_t *ctx, lsm6dso_ff_ths_t *val); |
cparata | 0:6d69e896ce38 | 2201 | |
cparata | 0:6d69e896ce38 | 2202 | int32_t lsm6dso_ff_dur_set(lsm6dso_ctx_t *ctx, uint8_t val); |
cparata | 0:6d69e896ce38 | 2203 | int32_t lsm6dso_ff_dur_get(lsm6dso_ctx_t *ctx, uint8_t *val); |
cparata | 0:6d69e896ce38 | 2204 | |
cparata | 0:6d69e896ce38 | 2205 | int32_t lsm6dso_fifo_watermark_set(lsm6dso_ctx_t *ctx, uint16_t val); |
cparata | 0:6d69e896ce38 | 2206 | int32_t lsm6dso_fifo_watermark_get(lsm6dso_ctx_t *ctx, uint16_t *val); |
cparata | 0:6d69e896ce38 | 2207 | |
cparata | 0:6d69e896ce38 | 2208 | int32_t lsm6dso_compression_algo_init_set(lsm6dso_ctx_t *ctx, uint8_t val); |
cparata | 0:6d69e896ce38 | 2209 | int32_t lsm6dso_compression_algo_init_get(lsm6dso_ctx_t *ctx, uint8_t *val); |
cparata | 0:6d69e896ce38 | 2210 | |
cparata | 0:6d69e896ce38 | 2211 | typedef enum { |
cparata | 4:77faf76e3cd8 | 2212 | LSM6DSO_CMP_DISABLE = 0x00, |
cparata | 4:77faf76e3cd8 | 2213 | LSM6DSO_CMP_ALWAYS = 0x04, |
cparata | 4:77faf76e3cd8 | 2214 | LSM6DSO_CMP_8_TO_1 = 0x05, |
cparata | 4:77faf76e3cd8 | 2215 | LSM6DSO_CMP_16_TO_1 = 0x06, |
cparata | 4:77faf76e3cd8 | 2216 | LSM6DSO_CMP_32_TO_1 = 0x07, |
cparata | 0:6d69e896ce38 | 2217 | } lsm6dso_uncoptr_rate_t; |
cparata | 0:6d69e896ce38 | 2218 | int32_t lsm6dso_compression_algo_set(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 2219 | lsm6dso_uncoptr_rate_t val); |
cparata | 0:6d69e896ce38 | 2220 | int32_t lsm6dso_compression_algo_get(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 2221 | lsm6dso_uncoptr_rate_t *val); |
cparata | 0:6d69e896ce38 | 2222 | |
cparata | 0:6d69e896ce38 | 2223 | int32_t lsm6dso_fifo_virtual_sens_odr_chg_set(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 2224 | uint8_t val); |
cparata | 0:6d69e896ce38 | 2225 | int32_t lsm6dso_fifo_virtual_sens_odr_chg_get(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 2226 | uint8_t *val); |
cparata | 0:6d69e896ce38 | 2227 | |
cparata | 0:6d69e896ce38 | 2228 | int32_t lsm6dso_compression_algo_real_time_set(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 2229 | uint8_t val); |
cparata | 0:6d69e896ce38 | 2230 | int32_t lsm6dso_compression_algo_real_time_get(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 2231 | uint8_t *val); |
cparata | 0:6d69e896ce38 | 2232 | |
cparata | 0:6d69e896ce38 | 2233 | int32_t lsm6dso_fifo_stop_on_wtm_set(lsm6dso_ctx_t *ctx, uint8_t val); |
cparata | 0:6d69e896ce38 | 2234 | int32_t lsm6dso_fifo_stop_on_wtm_get(lsm6dso_ctx_t *ctx, uint8_t *val); |
cparata | 0:6d69e896ce38 | 2235 | |
cparata | 0:6d69e896ce38 | 2236 | typedef enum { |
cparata | 4:77faf76e3cd8 | 2237 | LSM6DSO_XL_NOT_BATCHED = 0, |
cparata | 4:77faf76e3cd8 | 2238 | LSM6DSO_XL_BATCHED_AT_12Hz5 = 1, |
cparata | 4:77faf76e3cd8 | 2239 | LSM6DSO_XL_BATCHED_AT_26Hz = 2, |
cparata | 4:77faf76e3cd8 | 2240 | LSM6DSO_XL_BATCHED_AT_52Hz = 3, |
cparata | 4:77faf76e3cd8 | 2241 | LSM6DSO_XL_BATCHED_AT_104Hz = 4, |
cparata | 4:77faf76e3cd8 | 2242 | LSM6DSO_XL_BATCHED_AT_208Hz = 5, |
cparata | 4:77faf76e3cd8 | 2243 | LSM6DSO_XL_BATCHED_AT_417Hz = 6, |
cparata | 4:77faf76e3cd8 | 2244 | LSM6DSO_XL_BATCHED_AT_833Hz = 7, |
cparata | 4:77faf76e3cd8 | 2245 | LSM6DSO_XL_BATCHED_AT_1667Hz = 8, |
cparata | 4:77faf76e3cd8 | 2246 | LSM6DSO_XL_BATCHED_AT_3333Hz = 9, |
cparata | 4:77faf76e3cd8 | 2247 | LSM6DSO_XL_BATCHED_AT_6667Hz = 10, |
cparata | 4:77faf76e3cd8 | 2248 | LSM6DSO_XL_BATCHED_AT_6Hz5 = 11, |
cparata | 0:6d69e896ce38 | 2249 | } lsm6dso_bdr_xl_t; |
cparata | 0:6d69e896ce38 | 2250 | int32_t lsm6dso_fifo_xl_batch_set(lsm6dso_ctx_t *ctx, lsm6dso_bdr_xl_t val); |
cparata | 0:6d69e896ce38 | 2251 | int32_t lsm6dso_fifo_xl_batch_get(lsm6dso_ctx_t *ctx, lsm6dso_bdr_xl_t *val); |
cparata | 0:6d69e896ce38 | 2252 | |
cparata | 0:6d69e896ce38 | 2253 | typedef enum { |
cparata | 4:77faf76e3cd8 | 2254 | LSM6DSO_GY_NOT_BATCHED = 0, |
cparata | 4:77faf76e3cd8 | 2255 | LSM6DSO_GY_BATCHED_AT_12Hz5 = 1, |
cparata | 4:77faf76e3cd8 | 2256 | LSM6DSO_GY_BATCHED_AT_26Hz = 2, |
cparata | 4:77faf76e3cd8 | 2257 | LSM6DSO_GY_BATCHED_AT_52Hz = 3, |
cparata | 4:77faf76e3cd8 | 2258 | LSM6DSO_GY_BATCHED_AT_104Hz = 4, |
cparata | 4:77faf76e3cd8 | 2259 | LSM6DSO_GY_BATCHED_AT_208Hz = 5, |
cparata | 4:77faf76e3cd8 | 2260 | LSM6DSO_GY_BATCHED_AT_417Hz = 6, |
cparata | 4:77faf76e3cd8 | 2261 | LSM6DSO_GY_BATCHED_AT_833Hz = 7, |
cparata | 4:77faf76e3cd8 | 2262 | LSM6DSO_GY_BATCHED_AT_1667Hz = 8, |
cparata | 4:77faf76e3cd8 | 2263 | LSM6DSO_GY_BATCHED_AT_3333Hz = 9, |
cparata | 4:77faf76e3cd8 | 2264 | LSM6DSO_GY_BATCHED_AT_6667Hz = 10, |
cparata | 4:77faf76e3cd8 | 2265 | LSM6DSO_GY_BATCHED_AT_6Hz5 = 11, |
cparata | 0:6d69e896ce38 | 2266 | } lsm6dso_bdr_gy_t; |
cparata | 0:6d69e896ce38 | 2267 | int32_t lsm6dso_fifo_gy_batch_set(lsm6dso_ctx_t *ctx, lsm6dso_bdr_gy_t val); |
cparata | 0:6d69e896ce38 | 2268 | int32_t lsm6dso_fifo_gy_batch_get(lsm6dso_ctx_t *ctx, lsm6dso_bdr_gy_t *val); |
cparata | 0:6d69e896ce38 | 2269 | |
cparata | 0:6d69e896ce38 | 2270 | typedef enum { |
cparata | 4:77faf76e3cd8 | 2271 | LSM6DSO_BYPASS_MODE = 0, |
cparata | 4:77faf76e3cd8 | 2272 | LSM6DSO_FIFO_MODE = 1, |
cparata | 4:77faf76e3cd8 | 2273 | LSM6DSO_STREAM_TO_FIFO_MODE = 3, |
cparata | 4:77faf76e3cd8 | 2274 | LSM6DSO_BYPASS_TO_STREAM_MODE = 4, |
cparata | 4:77faf76e3cd8 | 2275 | LSM6DSO_STREAM_MODE = 6, |
cparata | 4:77faf76e3cd8 | 2276 | LSM6DSO_BYPASS_TO_FIFO_MODE = 7, |
cparata | 0:6d69e896ce38 | 2277 | } lsm6dso_fifo_mode_t; |
cparata | 0:6d69e896ce38 | 2278 | int32_t lsm6dso_fifo_mode_set(lsm6dso_ctx_t *ctx, lsm6dso_fifo_mode_t val); |
cparata | 0:6d69e896ce38 | 2279 | int32_t lsm6dso_fifo_mode_get(lsm6dso_ctx_t *ctx, lsm6dso_fifo_mode_t *val); |
cparata | 0:6d69e896ce38 | 2280 | |
cparata | 0:6d69e896ce38 | 2281 | typedef enum { |
cparata | 4:77faf76e3cd8 | 2282 | LSM6DSO_TEMP_NOT_BATCHED = 0, |
cparata | 4:77faf76e3cd8 | 2283 | LSM6DSO_TEMP_BATCHED_AT_1Hz6 = 1, |
cparata | 4:77faf76e3cd8 | 2284 | LSM6DSO_TEMP_BATCHED_AT_12Hz5 = 2, |
cparata | 4:77faf76e3cd8 | 2285 | LSM6DSO_TEMP_BATCHED_AT_52Hz = 3, |
cparata | 0:6d69e896ce38 | 2286 | } lsm6dso_odr_t_batch_t; |
cparata | 0:6d69e896ce38 | 2287 | int32_t lsm6dso_fifo_temp_batch_set(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 2288 | lsm6dso_odr_t_batch_t val); |
cparata | 0:6d69e896ce38 | 2289 | int32_t lsm6dso_fifo_temp_batch_get(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 2290 | lsm6dso_odr_t_batch_t *val); |
cparata | 0:6d69e896ce38 | 2291 | |
cparata | 0:6d69e896ce38 | 2292 | typedef enum { |
cparata | 4:77faf76e3cd8 | 2293 | LSM6DSO_NO_DECIMATION = 0, |
cparata | 4:77faf76e3cd8 | 2294 | LSM6DSO_DEC_1 = 1, |
cparata | 4:77faf76e3cd8 | 2295 | LSM6DSO_DEC_8 = 2, |
cparata | 4:77faf76e3cd8 | 2296 | LSM6DSO_DEC_32 = 3, |
cparata | 0:6d69e896ce38 | 2297 | } lsm6dso_odr_ts_batch_t; |
cparata | 0:6d69e896ce38 | 2298 | int32_t lsm6dso_fifo_timestamp_decimation_set(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 2299 | lsm6dso_odr_ts_batch_t val); |
cparata | 0:6d69e896ce38 | 2300 | int32_t lsm6dso_fifo_timestamp_decimation_get(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 2301 | lsm6dso_odr_ts_batch_t *val); |
cparata | 0:6d69e896ce38 | 2302 | |
cparata | 0:6d69e896ce38 | 2303 | typedef enum { |
cparata | 4:77faf76e3cd8 | 2304 | LSM6DSO_XL_BATCH_EVENT = 0, |
cparata | 4:77faf76e3cd8 | 2305 | LSM6DSO_GYRO_BATCH_EVENT = 1, |
cparata | 0:6d69e896ce38 | 2306 | } lsm6dso_trig_counter_bdr_t; |
cparata | 0:6d69e896ce38 | 2307 | |
cparata | 0:6d69e896ce38 | 2308 | typedef enum { |
cparata | 4:77faf76e3cd8 | 2309 | LSM6DSO_GYRO_NC_TAG = 1, |
cparata | 4:77faf76e3cd8 | 2310 | LSM6DSO_XL_NC_TAG, |
cparata | 4:77faf76e3cd8 | 2311 | LSM6DSO_TEMPERATURE_TAG, |
cparata | 4:77faf76e3cd8 | 2312 | LSM6DSO_TIMESTAMP_TAG, |
cparata | 4:77faf76e3cd8 | 2313 | LSM6DSO_CFG_CHANGE_TAG, |
cparata | 4:77faf76e3cd8 | 2314 | LSM6DSO_XL_NC_T_2_TAG, |
cparata | 4:77faf76e3cd8 | 2315 | LSM6DSO_XL_NC_T_1_TAG, |
cparata | 4:77faf76e3cd8 | 2316 | LSM6DSO_XL_2XC_TAG, |
cparata | 4:77faf76e3cd8 | 2317 | LSM6DSO_XL_3XC_TAG, |
cparata | 4:77faf76e3cd8 | 2318 | LSM6DSO_GYRO_NC_T_2_TAG, |
cparata | 4:77faf76e3cd8 | 2319 | LSM6DSO_GYRO_NC_T_1_TAG, |
cparata | 4:77faf76e3cd8 | 2320 | LSM6DSO_GYRO_2XC_TAG, |
cparata | 4:77faf76e3cd8 | 2321 | LSM6DSO_GYRO_3XC_TAG, |
cparata | 4:77faf76e3cd8 | 2322 | LSM6DSO_SENSORHUB_SLAVE0_TAG, |
cparata | 4:77faf76e3cd8 | 2323 | LSM6DSO_SENSORHUB_SLAVE1_TAG, |
cparata | 4:77faf76e3cd8 | 2324 | LSM6DSO_SENSORHUB_SLAVE2_TAG, |
cparata | 4:77faf76e3cd8 | 2325 | LSM6DSO_SENSORHUB_SLAVE3_TAG, |
cparata | 4:77faf76e3cd8 | 2326 | LSM6DSO_STEP_CPUNTER_TAG, |
cparata | 4:77faf76e3cd8 | 2327 | LSM6DSO_GAME_ROTATION_TAG, |
cparata | 4:77faf76e3cd8 | 2328 | LSM6DSO_GEOMAG_ROTATION_TAG, |
cparata | 4:77faf76e3cd8 | 2329 | LSM6DSO_ROTATION_TAG, |
cparata | 4:77faf76e3cd8 | 2330 | LSM6DSO_SENSORHUB_NACK_TAG = 0x19, |
cparata | 0:6d69e896ce38 | 2331 | } lsm6dso_fifo_tag_t; |
cparata | 0:6d69e896ce38 | 2332 | int32_t lsm6dso_fifo_cnt_event_batch_set(lsm6dso_ctx_t *ctx, |
cparata | 4:77faf76e3cd8 | 2333 | lsm6dso_trig_counter_bdr_t val); |
cparata | 0:6d69e896ce38 | 2334 | int32_t lsm6dso_fifo_cnt_event_batch_get(lsm6dso_ctx_t *ctx, |
cparata | 4:77faf76e3cd8 | 2335 | lsm6dso_trig_counter_bdr_t *val); |
cparata | 0:6d69e896ce38 | 2336 | |
cparata | 0:6d69e896ce38 | 2337 | int32_t lsm6dso_rst_batch_counter_set(lsm6dso_ctx_t *ctx, uint8_t val); |
cparata | 0:6d69e896ce38 | 2338 | int32_t lsm6dso_rst_batch_counter_get(lsm6dso_ctx_t *ctx, uint8_t *val); |
cparata | 0:6d69e896ce38 | 2339 | |
cparata | 0:6d69e896ce38 | 2340 | int32_t lsm6dso_batch_counter_threshold_set(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 2341 | uint16_t val); |
cparata | 0:6d69e896ce38 | 2342 | int32_t lsm6dso_batch_counter_threshold_get(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 2343 | uint16_t *val); |
cparata | 0:6d69e896ce38 | 2344 | |
cparata | 0:6d69e896ce38 | 2345 | int32_t lsm6dso_fifo_data_level_get(lsm6dso_ctx_t *ctx, uint16_t *val); |
cparata | 0:6d69e896ce38 | 2346 | |
cparata | 0:6d69e896ce38 | 2347 | int32_t lsm6dso_fifo_status_get(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 2348 | lsm6dso_fifo_status2_t *val); |
cparata | 0:6d69e896ce38 | 2349 | |
cparata | 0:6d69e896ce38 | 2350 | int32_t lsm6dso_fifo_full_flag_get(lsm6dso_ctx_t *ctx, uint8_t *val); |
cparata | 0:6d69e896ce38 | 2351 | |
cparata | 0:6d69e896ce38 | 2352 | int32_t lsm6dso_fifo_ovr_flag_get(lsm6dso_ctx_t *ctx, uint8_t *val); |
cparata | 0:6d69e896ce38 | 2353 | |
cparata | 0:6d69e896ce38 | 2354 | int32_t lsm6dso_fifo_wtm_flag_get(lsm6dso_ctx_t *ctx, uint8_t *val); |
cparata | 0:6d69e896ce38 | 2355 | |
cparata | 0:6d69e896ce38 | 2356 | int32_t lsm6dso_fifo_sensor_tag_get(lsm6dso_ctx_t *ctx, |
cparata | 4:77faf76e3cd8 | 2357 | lsm6dso_fifo_tag_t *val); |
cparata | 0:6d69e896ce38 | 2358 | |
cparata | 0:6d69e896ce38 | 2359 | int32_t lsm6dso_fifo_pedo_batch_set(lsm6dso_ctx_t *ctx, uint8_t val); |
cparata | 0:6d69e896ce38 | 2360 | int32_t lsm6dso_fifo_pedo_batch_get(lsm6dso_ctx_t *ctx, uint8_t *val); |
cparata | 0:6d69e896ce38 | 2361 | |
cparata | 0:6d69e896ce38 | 2362 | int32_t lsm6dso_sh_batch_slave_0_set(lsm6dso_ctx_t *ctx, uint8_t val); |
cparata | 0:6d69e896ce38 | 2363 | int32_t lsm6dso_sh_batch_slave_0_get(lsm6dso_ctx_t *ctx, uint8_t *val); |
cparata | 0:6d69e896ce38 | 2364 | |
cparata | 0:6d69e896ce38 | 2365 | int32_t lsm6dso_sh_batch_slave_1_set(lsm6dso_ctx_t *ctx, uint8_t val); |
cparata | 0:6d69e896ce38 | 2366 | int32_t lsm6dso_sh_batch_slave_1_get(lsm6dso_ctx_t *ctx, uint8_t *val); |
cparata | 0:6d69e896ce38 | 2367 | |
cparata | 0:6d69e896ce38 | 2368 | int32_t lsm6dso_sh_batch_slave_2_set(lsm6dso_ctx_t *ctx, uint8_t val); |
cparata | 0:6d69e896ce38 | 2369 | int32_t lsm6dso_sh_batch_slave_2_get(lsm6dso_ctx_t *ctx, uint8_t *val); |
cparata | 0:6d69e896ce38 | 2370 | |
cparata | 0:6d69e896ce38 | 2371 | int32_t lsm6dso_sh_batch_slave_3_set(lsm6dso_ctx_t *ctx, uint8_t val); |
cparata | 0:6d69e896ce38 | 2372 | int32_t lsm6dso_sh_batch_slave_3_get(lsm6dso_ctx_t *ctx, uint8_t *val); |
cparata | 0:6d69e896ce38 | 2373 | |
cparata | 0:6d69e896ce38 | 2374 | typedef enum { |
cparata | 4:77faf76e3cd8 | 2375 | LSM6DSO_DEN_DISABLE = 0, |
cparata | 4:77faf76e3cd8 | 2376 | LSM6DSO_LEVEL_FIFO = 6, |
cparata | 4:77faf76e3cd8 | 2377 | LSM6DSO_LEVEL_LETCHED = 3, |
cparata | 4:77faf76e3cd8 | 2378 | LSM6DSO_LEVEL_TRIGGER = 2, |
cparata | 4:77faf76e3cd8 | 2379 | LSM6DSO_EDGE_TRIGGER = 4, |
cparata | 0:6d69e896ce38 | 2380 | } lsm6dso_den_mode_t; |
cparata | 0:6d69e896ce38 | 2381 | int32_t lsm6dso_den_mode_set(lsm6dso_ctx_t *ctx, lsm6dso_den_mode_t val); |
cparata | 0:6d69e896ce38 | 2382 | int32_t lsm6dso_den_mode_get(lsm6dso_ctx_t *ctx, lsm6dso_den_mode_t *val); |
cparata | 0:6d69e896ce38 | 2383 | |
cparata | 0:6d69e896ce38 | 2384 | typedef enum { |
cparata | 4:77faf76e3cd8 | 2385 | LSM6DSO_DEN_ACT_LOW = 0, |
cparata | 4:77faf76e3cd8 | 2386 | LSM6DSO_DEN_ACT_HIGH = 1, |
cparata | 0:6d69e896ce38 | 2387 | } lsm6dso_den_lh_t; |
cparata | 0:6d69e896ce38 | 2388 | int32_t lsm6dso_den_polarity_set(lsm6dso_ctx_t *ctx, lsm6dso_den_lh_t val); |
cparata | 0:6d69e896ce38 | 2389 | int32_t lsm6dso_den_polarity_get(lsm6dso_ctx_t *ctx, lsm6dso_den_lh_t *val); |
cparata | 0:6d69e896ce38 | 2390 | |
cparata | 0:6d69e896ce38 | 2391 | typedef enum { |
cparata | 4:77faf76e3cd8 | 2392 | LSM6DSO_STAMP_IN_GY_DATA = 0, |
cparata | 4:77faf76e3cd8 | 2393 | LSM6DSO_STAMP_IN_XL_DATA = 1, |
cparata | 4:77faf76e3cd8 | 2394 | LSM6DSO_STAMP_IN_GY_XL_DATA = 2, |
cparata | 0:6d69e896ce38 | 2395 | } lsm6dso_den_xl_g_t; |
cparata | 0:6d69e896ce38 | 2396 | int32_t lsm6dso_den_enable_set(lsm6dso_ctx_t *ctx, lsm6dso_den_xl_g_t val); |
cparata | 0:6d69e896ce38 | 2397 | int32_t lsm6dso_den_enable_get(lsm6dso_ctx_t *ctx, lsm6dso_den_xl_g_t *val); |
cparata | 0:6d69e896ce38 | 2398 | |
cparata | 0:6d69e896ce38 | 2399 | int32_t lsm6dso_den_mark_axis_x_set(lsm6dso_ctx_t *ctx, uint8_t val); |
cparata | 0:6d69e896ce38 | 2400 | int32_t lsm6dso_den_mark_axis_x_get(lsm6dso_ctx_t *ctx, uint8_t *val); |
cparata | 0:6d69e896ce38 | 2401 | |
cparata | 0:6d69e896ce38 | 2402 | int32_t lsm6dso_den_mark_axis_y_set(lsm6dso_ctx_t *ctx, uint8_t val); |
cparata | 0:6d69e896ce38 | 2403 | int32_t lsm6dso_den_mark_axis_y_get(lsm6dso_ctx_t *ctx, uint8_t *val); |
cparata | 0:6d69e896ce38 | 2404 | |
cparata | 0:6d69e896ce38 | 2405 | int32_t lsm6dso_den_mark_axis_z_set(lsm6dso_ctx_t *ctx, uint8_t val); |
cparata | 0:6d69e896ce38 | 2406 | int32_t lsm6dso_den_mark_axis_z_get(lsm6dso_ctx_t *ctx, uint8_t *val); |
cparata | 0:6d69e896ce38 | 2407 | |
cparata | 0:6d69e896ce38 | 2408 | typedef enum { |
cparata | 4:77faf76e3cd8 | 2409 | LSM6DSO_PEDO_BASE_MODE = 0x00, |
cparata | 4:77faf76e3cd8 | 2410 | LSM6DSO_FALSE_STEP_REJ = 0x10, |
cparata | 4:77faf76e3cd8 | 2411 | LSM6DSO_FALSE_STEP_REJ_ADV_MODE = 0x30, |
cparata | 0:6d69e896ce38 | 2412 | } lsm6dso_pedo_md_t; |
cparata | 0:6d69e896ce38 | 2413 | int32_t lsm6dso_pedo_sens_set(lsm6dso_ctx_t *ctx, lsm6dso_pedo_md_t val); |
cparata | 0:6d69e896ce38 | 2414 | int32_t lsm6dso_pedo_sens_get(lsm6dso_ctx_t *ctx, lsm6dso_pedo_md_t *val); |
cparata | 0:6d69e896ce38 | 2415 | |
cparata | 0:6d69e896ce38 | 2416 | int32_t lsm6dso_pedo_step_detect_get(lsm6dso_ctx_t *ctx, uint8_t *val); |
cparata | 0:6d69e896ce38 | 2417 | |
cparata | 0:6d69e896ce38 | 2418 | int32_t lsm6dso_pedo_debounce_steps_set(lsm6dso_ctx_t *ctx, |
cparata | 4:77faf76e3cd8 | 2419 | uint8_t *buff); |
cparata | 0:6d69e896ce38 | 2420 | int32_t lsm6dso_pedo_debounce_steps_get(lsm6dso_ctx_t *ctx, |
cparata | 4:77faf76e3cd8 | 2421 | uint8_t *buff); |
cparata | 0:6d69e896ce38 | 2422 | |
cparata | 0:6d69e896ce38 | 2423 | int32_t lsm6dso_pedo_steps_period_set(lsm6dso_ctx_t *ctx, uint8_t *buff); |
cparata | 0:6d69e896ce38 | 2424 | int32_t lsm6dso_pedo_steps_period_get(lsm6dso_ctx_t *ctx, uint8_t *buff); |
cparata | 0:6d69e896ce38 | 2425 | |
cparata | 0:6d69e896ce38 | 2426 | typedef enum { |
cparata | 4:77faf76e3cd8 | 2427 | LSM6DSO_EVERY_STEP = 0, |
cparata | 4:77faf76e3cd8 | 2428 | LSM6DSO_COUNT_OVERFLOW = 1, |
cparata | 0:6d69e896ce38 | 2429 | } lsm6dso_carry_count_en_t; |
cparata | 0:6d69e896ce38 | 2430 | int32_t lsm6dso_pedo_int_mode_set(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 2431 | lsm6dso_carry_count_en_t val); |
cparata | 0:6d69e896ce38 | 2432 | int32_t lsm6dso_pedo_int_mode_get(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 2433 | lsm6dso_carry_count_en_t *val); |
cparata | 0:6d69e896ce38 | 2434 | |
cparata | 0:6d69e896ce38 | 2435 | int32_t lsm6dso_motion_flag_data_ready_get(lsm6dso_ctx_t *ctx, |
cparata | 4:77faf76e3cd8 | 2436 | uint8_t *val); |
cparata | 0:6d69e896ce38 | 2437 | |
cparata | 0:6d69e896ce38 | 2438 | int32_t lsm6dso_tilt_flag_data_ready_get(lsm6dso_ctx_t *ctx, |
cparata | 4:77faf76e3cd8 | 2439 | uint8_t *val); |
cparata | 0:6d69e896ce38 | 2440 | |
cparata | 0:6d69e896ce38 | 2441 | int32_t lsm6dso_mag_sensitivity_set(lsm6dso_ctx_t *ctx, uint8_t *buff); |
cparata | 0:6d69e896ce38 | 2442 | int32_t lsm6dso_mag_sensitivity_get(lsm6dso_ctx_t *ctx, uint8_t *buff); |
cparata | 0:6d69e896ce38 | 2443 | |
cparata | 0:6d69e896ce38 | 2444 | int32_t lsm6dso_mag_offset_set(lsm6dso_ctx_t *ctx, uint8_t *buff); |
cparata | 0:6d69e896ce38 | 2445 | int32_t lsm6dso_mag_offset_get(lsm6dso_ctx_t *ctx, uint8_t *buff); |
cparata | 0:6d69e896ce38 | 2446 | |
cparata | 0:6d69e896ce38 | 2447 | int32_t lsm6dso_mag_soft_iron_set(lsm6dso_ctx_t *ctx, uint8_t *buff); |
cparata | 0:6d69e896ce38 | 2448 | int32_t lsm6dso_mag_soft_iron_get(lsm6dso_ctx_t *ctx, uint8_t *buff); |
cparata | 0:6d69e896ce38 | 2449 | |
cparata | 0:6d69e896ce38 | 2450 | typedef enum { |
cparata | 4:77faf76e3cd8 | 2451 | LSM6DSO_Z_EQ_Y = 0, |
cparata | 4:77faf76e3cd8 | 2452 | LSM6DSO_Z_EQ_MIN_Y = 1, |
cparata | 4:77faf76e3cd8 | 2453 | LSM6DSO_Z_EQ_X = 2, |
cparata | 4:77faf76e3cd8 | 2454 | LSM6DSO_Z_EQ_MIN_X = 3, |
cparata | 4:77faf76e3cd8 | 2455 | LSM6DSO_Z_EQ_MIN_Z = 4, |
cparata | 4:77faf76e3cd8 | 2456 | LSM6DSO_Z_EQ_Z = 5, |
cparata | 0:6d69e896ce38 | 2457 | } lsm6dso_mag_z_axis_t; |
cparata | 0:6d69e896ce38 | 2458 | int32_t lsm6dso_mag_z_orient_set(lsm6dso_ctx_t *ctx, |
cparata | 4:77faf76e3cd8 | 2459 | lsm6dso_mag_z_axis_t val); |
cparata | 0:6d69e896ce38 | 2460 | int32_t lsm6dso_mag_z_orient_get(lsm6dso_ctx_t *ctx, |
cparata | 4:77faf76e3cd8 | 2461 | lsm6dso_mag_z_axis_t *val); |
cparata | 0:6d69e896ce38 | 2462 | |
cparata | 0:6d69e896ce38 | 2463 | typedef enum { |
cparata | 4:77faf76e3cd8 | 2464 | LSM6DSO_Y_EQ_Y = 0, |
cparata | 4:77faf76e3cd8 | 2465 | LSM6DSO_Y_EQ_MIN_Y = 1, |
cparata | 4:77faf76e3cd8 | 2466 | LSM6DSO_Y_EQ_X = 2, |
cparata | 4:77faf76e3cd8 | 2467 | LSM6DSO_Y_EQ_MIN_X = 3, |
cparata | 4:77faf76e3cd8 | 2468 | LSM6DSO_Y_EQ_MIN_Z = 4, |
cparata | 4:77faf76e3cd8 | 2469 | LSM6DSO_Y_EQ_Z = 5, |
cparata | 0:6d69e896ce38 | 2470 | } lsm6dso_mag_y_axis_t; |
cparata | 0:6d69e896ce38 | 2471 | int32_t lsm6dso_mag_y_orient_set(lsm6dso_ctx_t *ctx, |
cparata | 4:77faf76e3cd8 | 2472 | lsm6dso_mag_y_axis_t val); |
cparata | 0:6d69e896ce38 | 2473 | int32_t lsm6dso_mag_y_orient_get(lsm6dso_ctx_t *ctx, |
cparata | 4:77faf76e3cd8 | 2474 | lsm6dso_mag_y_axis_t *val); |
cparata | 0:6d69e896ce38 | 2475 | |
cparata | 0:6d69e896ce38 | 2476 | typedef enum { |
cparata | 4:77faf76e3cd8 | 2477 | LSM6DSO_X_EQ_Y = 0, |
cparata | 4:77faf76e3cd8 | 2478 | LSM6DSO_X_EQ_MIN_Y = 1, |
cparata | 4:77faf76e3cd8 | 2479 | LSM6DSO_X_EQ_X = 2, |
cparata | 4:77faf76e3cd8 | 2480 | LSM6DSO_X_EQ_MIN_X = 3, |
cparata | 4:77faf76e3cd8 | 2481 | LSM6DSO_X_EQ_MIN_Z = 4, |
cparata | 4:77faf76e3cd8 | 2482 | LSM6DSO_X_EQ_Z = 5, |
cparata | 0:6d69e896ce38 | 2483 | } lsm6dso_mag_x_axis_t; |
cparata | 0:6d69e896ce38 | 2484 | int32_t lsm6dso_mag_x_orient_set(lsm6dso_ctx_t *ctx, |
cparata | 4:77faf76e3cd8 | 2485 | lsm6dso_mag_x_axis_t val); |
cparata | 0:6d69e896ce38 | 2486 | int32_t lsm6dso_mag_x_orient_get(lsm6dso_ctx_t *ctx, |
cparata | 4:77faf76e3cd8 | 2487 | lsm6dso_mag_x_axis_t *val); |
cparata | 0:6d69e896ce38 | 2488 | |
cparata | 0:6d69e896ce38 | 2489 | int32_t lsm6dso_long_cnt_flag_data_ready_get(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 2490 | uint8_t *val); |
cparata | 0:6d69e896ce38 | 2491 | |
cparata | 0:6d69e896ce38 | 2492 | typedef struct { |
cparata | 0:6d69e896ce38 | 2493 | lsm6dso_fsm_enable_a_t fsm_enable_a; |
cparata | 0:6d69e896ce38 | 2494 | lsm6dso_fsm_enable_b_t fsm_enable_b; |
cparata | 0:6d69e896ce38 | 2495 | } lsm6dso_emb_fsm_enable_t; |
cparata | 0:6d69e896ce38 | 2496 | int32_t lsm6dso_fsm_enable_set(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 2497 | lsm6dso_emb_fsm_enable_t *val); |
cparata | 0:6d69e896ce38 | 2498 | int32_t lsm6dso_fsm_enable_get(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 2499 | lsm6dso_emb_fsm_enable_t *val); |
cparata | 0:6d69e896ce38 | 2500 | |
cparata | 0:6d69e896ce38 | 2501 | int32_t lsm6dso_long_cnt_set(lsm6dso_ctx_t *ctx, uint8_t *buff); |
cparata | 0:6d69e896ce38 | 2502 | int32_t lsm6dso_long_cnt_get(lsm6dso_ctx_t *ctx, uint8_t *buff); |
cparata | 0:6d69e896ce38 | 2503 | |
cparata | 0:6d69e896ce38 | 2504 | typedef enum { |
cparata | 4:77faf76e3cd8 | 2505 | LSM6DSO_LC_NORMAL = 0, |
cparata | 4:77faf76e3cd8 | 2506 | LSM6DSO_LC_CLEAR = 1, |
cparata | 4:77faf76e3cd8 | 2507 | LSM6DSO_LC_CLEAR_DONE = 2, |
cparata | 0:6d69e896ce38 | 2508 | } lsm6dso_fsm_lc_clr_t; |
cparata | 0:6d69e896ce38 | 2509 | int32_t lsm6dso_long_clr_set(lsm6dso_ctx_t *ctx, lsm6dso_fsm_lc_clr_t val); |
cparata | 0:6d69e896ce38 | 2510 | int32_t lsm6dso_long_clr_get(lsm6dso_ctx_t *ctx, lsm6dso_fsm_lc_clr_t *val); |
cparata | 0:6d69e896ce38 | 2511 | |
cparata | 0:6d69e896ce38 | 2512 | typedef struct { |
cparata | 0:6d69e896ce38 | 2513 | lsm6dso_fsm_outs1_t fsm_outs1; |
cparata | 0:6d69e896ce38 | 2514 | lsm6dso_fsm_outs2_t fsm_outs2; |
cparata | 0:6d69e896ce38 | 2515 | lsm6dso_fsm_outs3_t fsm_outs3; |
cparata | 0:6d69e896ce38 | 2516 | lsm6dso_fsm_outs4_t fsm_outs4; |
cparata | 0:6d69e896ce38 | 2517 | lsm6dso_fsm_outs5_t fsm_outs5; |
cparata | 0:6d69e896ce38 | 2518 | lsm6dso_fsm_outs6_t fsm_outs6; |
cparata | 0:6d69e896ce38 | 2519 | lsm6dso_fsm_outs7_t fsm_outs7; |
cparata | 0:6d69e896ce38 | 2520 | lsm6dso_fsm_outs8_t fsm_outs8; |
cparata | 2:4d14e9edf37e | 2521 | lsm6dso_fsm_outs9_t fsm_outs9; |
cparata | 2:4d14e9edf37e | 2522 | lsm6dso_fsm_outs10_t fsm_outs10; |
cparata | 2:4d14e9edf37e | 2523 | lsm6dso_fsm_outs11_t fsm_outs11; |
cparata | 2:4d14e9edf37e | 2524 | lsm6dso_fsm_outs12_t fsm_outs12; |
cparata | 2:4d14e9edf37e | 2525 | lsm6dso_fsm_outs13_t fsm_outs13; |
cparata | 2:4d14e9edf37e | 2526 | lsm6dso_fsm_outs14_t fsm_outs14; |
cparata | 2:4d14e9edf37e | 2527 | lsm6dso_fsm_outs15_t fsm_outs15; |
cparata | 2:4d14e9edf37e | 2528 | lsm6dso_fsm_outs16_t fsm_outs16; |
cparata | 0:6d69e896ce38 | 2529 | } lsm6dso_fsm_out_t; |
cparata | 0:6d69e896ce38 | 2530 | int32_t lsm6dso_fsm_out_get(lsm6dso_ctx_t *ctx, lsm6dso_fsm_out_t *val); |
cparata | 0:6d69e896ce38 | 2531 | |
cparata | 0:6d69e896ce38 | 2532 | typedef enum { |
cparata | 4:77faf76e3cd8 | 2533 | LSM6DSO_ODR_FSM_12Hz5 = 0, |
cparata | 4:77faf76e3cd8 | 2534 | LSM6DSO_ODR_FSM_26Hz = 1, |
cparata | 4:77faf76e3cd8 | 2535 | LSM6DSO_ODR_FSM_52Hz = 2, |
cparata | 4:77faf76e3cd8 | 2536 | LSM6DSO_ODR_FSM_104Hz = 3, |
cparata | 0:6d69e896ce38 | 2537 | } lsm6dso_fsm_odr_t; |
cparata | 0:6d69e896ce38 | 2538 | int32_t lsm6dso_fsm_data_rate_set(lsm6dso_ctx_t *ctx, lsm6dso_fsm_odr_t val); |
cparata | 0:6d69e896ce38 | 2539 | int32_t lsm6dso_fsm_data_rate_get(lsm6dso_ctx_t *ctx, lsm6dso_fsm_odr_t *val); |
cparata | 0:6d69e896ce38 | 2540 | |
cparata | 0:6d69e896ce38 | 2541 | int32_t lsm6dso_fsm_init_set(lsm6dso_ctx_t *ctx, uint8_t val); |
cparata | 0:6d69e896ce38 | 2542 | int32_t lsm6dso_fsm_init_get(lsm6dso_ctx_t *ctx, uint8_t *val); |
cparata | 0:6d69e896ce38 | 2543 | |
cparata | 2:4d14e9edf37e | 2544 | int32_t lsm6dso_long_cnt_int_value_set(lsm6dso_ctx_t *ctx, uint16_t val); |
cparata | 2:4d14e9edf37e | 2545 | int32_t lsm6dso_long_cnt_int_value_get(lsm6dso_ctx_t *ctx, uint16_t *val); |
cparata | 0:6d69e896ce38 | 2546 | |
cparata | 2:4d14e9edf37e | 2547 | int32_t lsm6dso_fsm_number_of_programs_set(lsm6dso_ctx_t *ctx, uint8_t val); |
cparata | 2:4d14e9edf37e | 2548 | int32_t lsm6dso_fsm_number_of_programs_get(lsm6dso_ctx_t *ctx, uint8_t *val); |
cparata | 0:6d69e896ce38 | 2549 | |
cparata | 2:4d14e9edf37e | 2550 | int32_t lsm6dso_fsm_start_address_set(lsm6dso_ctx_t *ctx, uint16_t val); |
cparata | 2:4d14e9edf37e | 2551 | int32_t lsm6dso_fsm_start_address_get(lsm6dso_ctx_t *ctx, uint16_t *val); |
cparata | 2:4d14e9edf37e | 2552 | |
cparata | 2:4d14e9edf37e | 2553 | int32_t lsm6dso_sh_read_data_raw_get(lsm6dso_ctx_t *ctx, uint8_t *val, |
cparata | 2:4d14e9edf37e | 2554 | uint8_t len); |
cparata | 0:6d69e896ce38 | 2555 | |
cparata | 0:6d69e896ce38 | 2556 | typedef enum { |
cparata | 4:77faf76e3cd8 | 2557 | LSM6DSO_SLV_0 = 0, |
cparata | 4:77faf76e3cd8 | 2558 | LSM6DSO_SLV_0_1 = 1, |
cparata | 4:77faf76e3cd8 | 2559 | LSM6DSO_SLV_0_1_2 = 2, |
cparata | 4:77faf76e3cd8 | 2560 | LSM6DSO_SLV_0_1_2_3 = 3, |
cparata | 0:6d69e896ce38 | 2561 | } lsm6dso_aux_sens_on_t; |
cparata | 0:6d69e896ce38 | 2562 | int32_t lsm6dso_sh_slave_connected_set(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 2563 | lsm6dso_aux_sens_on_t val); |
cparata | 0:6d69e896ce38 | 2564 | int32_t lsm6dso_sh_slave_connected_get(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 2565 | lsm6dso_aux_sens_on_t *val); |
cparata | 0:6d69e896ce38 | 2566 | |
cparata | 0:6d69e896ce38 | 2567 | int32_t lsm6dso_sh_master_set(lsm6dso_ctx_t *ctx, uint8_t val); |
cparata | 0:6d69e896ce38 | 2568 | int32_t lsm6dso_sh_master_get(lsm6dso_ctx_t *ctx, uint8_t *val); |
cparata | 0:6d69e896ce38 | 2569 | |
cparata | 0:6d69e896ce38 | 2570 | typedef enum { |
cparata | 4:77faf76e3cd8 | 2571 | LSM6DSO_EXT_PULL_UP = 0, |
cparata | 4:77faf76e3cd8 | 2572 | LSM6DSO_INTERNAL_PULL_UP = 1, |
cparata | 0:6d69e896ce38 | 2573 | } lsm6dso_shub_pu_en_t; |
cparata | 0:6d69e896ce38 | 2574 | int32_t lsm6dso_sh_pin_mode_set(lsm6dso_ctx_t *ctx, lsm6dso_shub_pu_en_t val); |
cparata | 0:6d69e896ce38 | 2575 | int32_t lsm6dso_sh_pin_mode_get(lsm6dso_ctx_t *ctx, lsm6dso_shub_pu_en_t *val); |
cparata | 0:6d69e896ce38 | 2576 | |
cparata | 0:6d69e896ce38 | 2577 | int32_t lsm6dso_sh_pass_through_set(lsm6dso_ctx_t *ctx, uint8_t val); |
cparata | 0:6d69e896ce38 | 2578 | int32_t lsm6dso_sh_pass_through_get(lsm6dso_ctx_t *ctx, uint8_t *val); |
cparata | 0:6d69e896ce38 | 2579 | |
cparata | 0:6d69e896ce38 | 2580 | typedef enum { |
cparata | 4:77faf76e3cd8 | 2581 | LSM6DSO_EXT_ON_INT2_PIN = 0, |
cparata | 4:77faf76e3cd8 | 2582 | LSM6DSO_XL_GY_DRDY = 1, |
cparata | 0:6d69e896ce38 | 2583 | } lsm6dso_start_config_t; |
cparata | 0:6d69e896ce38 | 2584 | int32_t lsm6dso_sh_syncro_mode_set(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 2585 | lsm6dso_start_config_t val); |
cparata | 0:6d69e896ce38 | 2586 | int32_t lsm6dso_sh_syncro_mode_get(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 2587 | lsm6dso_start_config_t *val); |
cparata | 0:6d69e896ce38 | 2588 | |
cparata | 0:6d69e896ce38 | 2589 | typedef enum { |
cparata | 4:77faf76e3cd8 | 2590 | LSM6DSO_EACH_SH_CYCLE = 0, |
cparata | 4:77faf76e3cd8 | 2591 | LSM6DSO_ONLY_FIRST_CYCLE = 1, |
cparata | 0:6d69e896ce38 | 2592 | } lsm6dso_write_once_t; |
cparata | 0:6d69e896ce38 | 2593 | int32_t lsm6dso_sh_write_mode_set(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 2594 | lsm6dso_write_once_t val); |
cparata | 0:6d69e896ce38 | 2595 | int32_t lsm6dso_sh_write_mode_get(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 2596 | lsm6dso_write_once_t *val); |
cparata | 0:6d69e896ce38 | 2597 | |
cparata | 0:6d69e896ce38 | 2598 | int32_t lsm6dso_sh_reset_set(lsm6dso_ctx_t *ctx); |
cparata | 0:6d69e896ce38 | 2599 | int32_t lsm6dso_sh_reset_get(lsm6dso_ctx_t *ctx, uint8_t *val); |
cparata | 0:6d69e896ce38 | 2600 | |
cparata | 0:6d69e896ce38 | 2601 | typedef enum { |
cparata | 4:77faf76e3cd8 | 2602 | LSM6DSO_SH_ODR_104Hz = 0, |
cparata | 4:77faf76e3cd8 | 2603 | LSM6DSO_SH_ODR_52Hz = 1, |
cparata | 4:77faf76e3cd8 | 2604 | LSM6DSO_SH_ODR_26Hz = 2, |
cparata | 4:77faf76e3cd8 | 2605 | LSM6DSO_SH_ODR_13Hz = 3, |
cparata | 0:6d69e896ce38 | 2606 | } lsm6dso_shub_odr_t; |
cparata | 0:6d69e896ce38 | 2607 | int32_t lsm6dso_sh_data_rate_set(lsm6dso_ctx_t *ctx, lsm6dso_shub_odr_t val); |
cparata | 0:6d69e896ce38 | 2608 | int32_t lsm6dso_sh_data_rate_get(lsm6dso_ctx_t *ctx, lsm6dso_shub_odr_t *val); |
cparata | 0:6d69e896ce38 | 2609 | |
cparata | 4:77faf76e3cd8 | 2610 | typedef struct{ |
cparata | 4:77faf76e3cd8 | 2611 | uint8_t slv0_add; |
cparata | 4:77faf76e3cd8 | 2612 | uint8_t slv0_subadd; |
cparata | 4:77faf76e3cd8 | 2613 | uint8_t slv0_data; |
cparata | 0:6d69e896ce38 | 2614 | } lsm6dso_sh_cfg_write_t; |
cparata | 0:6d69e896ce38 | 2615 | int32_t lsm6dso_sh_cfg_write(lsm6dso_ctx_t *ctx, lsm6dso_sh_cfg_write_t *val); |
cparata | 0:6d69e896ce38 | 2616 | |
cparata | 4:77faf76e3cd8 | 2617 | typedef struct{ |
cparata | 4:77faf76e3cd8 | 2618 | uint8_t slv_add; |
cparata | 4:77faf76e3cd8 | 2619 | uint8_t slv_subadd; |
cparata | 4:77faf76e3cd8 | 2620 | uint8_t slv_len; |
cparata | 0:6d69e896ce38 | 2621 | } lsm6dso_sh_cfg_read_t; |
cparata | 0:6d69e896ce38 | 2622 | int32_t lsm6dso_sh_slv0_cfg_read(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 2623 | lsm6dso_sh_cfg_read_t *val); |
cparata | 0:6d69e896ce38 | 2624 | int32_t lsm6dso_sh_slv1_cfg_read(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 2625 | lsm6dso_sh_cfg_read_t *val); |
cparata | 0:6d69e896ce38 | 2626 | int32_t lsm6dso_sh_slv2_cfg_read(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 2627 | lsm6dso_sh_cfg_read_t *val); |
cparata | 0:6d69e896ce38 | 2628 | int32_t lsm6dso_sh_slv3_cfg_read(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 2629 | lsm6dso_sh_cfg_read_t *val); |
cparata | 0:6d69e896ce38 | 2630 | |
cparata | 0:6d69e896ce38 | 2631 | int32_t lsm6dso_sh_status_get(lsm6dso_ctx_t *ctx, |
cparata | 0:6d69e896ce38 | 2632 | lsm6dso_status_master_t *val); |
cparata | 0:6d69e896ce38 | 2633 | |
cparata | 4:77faf76e3cd8 | 2634 | |
cparata | 4:77faf76e3cd8 | 2635 | typedef struct { |
cparata | 4:77faf76e3cd8 | 2636 | uint8_t ui; |
cparata | 4:77faf76e3cd8 | 2637 | uint8_t aux; |
cparata | 4:77faf76e3cd8 | 2638 | } lsm6dso_id_t; |
cparata | 4:77faf76e3cd8 | 2639 | int32_t lsm6dso_id_get(lsm6dso_ctx_t *ctx, lsm6dso_ctx_t *aux_ctx, |
cparata | 4:77faf76e3cd8 | 2640 | lsm6dso_id_t *val); |
cparata | 4:77faf76e3cd8 | 2641 | |
cparata | 4:77faf76e3cd8 | 2642 | typedef struct { |
cparata | 4:77faf76e3cd8 | 2643 | enum { |
cparata | 4:77faf76e3cd8 | 2644 | LSM6DSO_SEL_BY_HW = 0x00, /* bus mode select by HW (SPI 3W disable) */ |
cparata | 4:77faf76e3cd8 | 2645 | LSM6DSO_SPI_4W = 0x06, /* Only SPI: SDO / SDI separated pins */ |
cparata | 4:77faf76e3cd8 | 2646 | LSM6DSO_SPI_3W = 0x07, /* Only SPI: SDO / SDI share the same pin */ |
cparata | 4:77faf76e3cd8 | 2647 | LSM6DSO_I2C = 0x04, /* Only I2C */ |
cparata | 4:77faf76e3cd8 | 2648 | LSM6DSO_I3C_T_50us = 0x02, /* I3C: available time equal to 50 μs */ |
cparata | 4:77faf76e3cd8 | 2649 | LSM6DSO_I3C_T_2us = 0x12, /* I3C: available time equal to 2 μs */ |
cparata | 4:77faf76e3cd8 | 2650 | LSM6DSO_I3C_T_1ms = 0x22, /* I3C: available time equal to 1 ms */ |
cparata | 4:77faf76e3cd8 | 2651 | LSM6DSO_I3C_T_25ms = 0x32, /* I3C: available time equal to 25 ms */ |
cparata | 4:77faf76e3cd8 | 2652 | } ui_bus_md; |
cparata | 4:77faf76e3cd8 | 2653 | enum { |
cparata | 4:77faf76e3cd8 | 2654 | LSM6DSO_SPI_4W_AUX = 0x00, |
cparata | 4:77faf76e3cd8 | 2655 | LSM6DSO_SPI_3W_AUX = 0x01, |
cparata | 4:77faf76e3cd8 | 2656 | } aux_bus_md; |
cparata | 4:77faf76e3cd8 | 2657 | } lsm6dso_bus_mode_t; |
cparata | 4:77faf76e3cd8 | 2658 | int32_t lsm6dso_bus_mode_set(lsm6dso_ctx_t *ctx, lsm6dso_ctx_t *aux_ctx, |
cparata | 4:77faf76e3cd8 | 2659 | lsm6dso_bus_mode_t val); |
cparata | 4:77faf76e3cd8 | 2660 | int32_t lsm6dso_bus_mode_get(lsm6dso_ctx_t *ctx, lsm6dso_ctx_t *aux_ctx, |
cparata | 4:77faf76e3cd8 | 2661 | lsm6dso_bus_mode_t *val); |
cparata | 4:77faf76e3cd8 | 2662 | |
cparata | 4:77faf76e3cd8 | 2663 | typedef enum { |
cparata | 4:77faf76e3cd8 | 2664 | LSM6DSO_DRV_RDY = 0x00, /* Initialize the device for driver usage */ |
cparata | 4:77faf76e3cd8 | 2665 | LSM6DSO_BOOT = 0x01, /* Restore calib. param. ( it takes 10ms ) */ |
cparata | 4:77faf76e3cd8 | 2666 | LSM6DSO_RESET = 0x02, /* Reset configuration registers */ |
cparata | 4:77faf76e3cd8 | 2667 | LSM6DSO_FIFO_COMP = 0x04, /* FIFO compression initialization request. */ |
cparata | 4:77faf76e3cd8 | 2668 | LSM6DSO_FSM = 0x08, /* Finite State Machine initialization request */ |
cparata | 4:77faf76e3cd8 | 2669 | LSM6DSO_PEDO = 0x20, /* Pedometer algo initialization request. */ |
cparata | 4:77faf76e3cd8 | 2670 | LSM6DSO_TILT = 0x40, /* Tilt algo initialization request */ |
cparata | 4:77faf76e3cd8 | 2671 | LSM6DSO_SMOTION = 0x80, /* Significant Motion initialization request */ |
cparata | 4:77faf76e3cd8 | 2672 | } lsm6dso_init_t; |
cparata | 4:77faf76e3cd8 | 2673 | int32_t lsm6dso_init_set(lsm6dso_ctx_t *ctx, lsm6dso_init_t val); |
cparata | 4:77faf76e3cd8 | 2674 | |
cparata | 4:77faf76e3cd8 | 2675 | typedef struct { |
cparata | 4:77faf76e3cd8 | 2676 | uint8_t sw_reset : 1; /* Restoring configuration registers */ |
cparata | 4:77faf76e3cd8 | 2677 | uint8_t boot : 1; /* Restoring calibration parameters */ |
cparata | 4:77faf76e3cd8 | 2678 | uint8_t drdy_xl : 1; /* Accelerometer data ready */ |
cparata | 4:77faf76e3cd8 | 2679 | uint8_t drdy_g : 1; /* Gyroscope data ready */ |
cparata | 4:77faf76e3cd8 | 2680 | uint8_t drdy_temp : 1; /* Temperature data ready */ |
cparata | 4:77faf76e3cd8 | 2681 | uint8_t ois_drdy_xl : 1; /* Accelerometer data ready on OIS */ |
cparata | 4:77faf76e3cd8 | 2682 | uint8_t ois_drdy_g : 1; /* Gyroscope data ready on OIS */ |
cparata | 4:77faf76e3cd8 | 2683 | uint8_t ois_gyro_settling : 1; /* Gyroscope is in the settling phase */ |
cparata | 4:77faf76e3cd8 | 2684 | } lsm6dso_status_t; |
cparata | 4:77faf76e3cd8 | 2685 | int32_t lsm6dso_status_get(lsm6dso_ctx_t *ctx, lsm6dso_ctx_t *aux_ctx, |
cparata | 4:77faf76e3cd8 | 2686 | lsm6dso_status_t *val); |
cparata | 4:77faf76e3cd8 | 2687 | |
cparata | 4:77faf76e3cd8 | 2688 | typedef struct { |
cparata | 4:77faf76e3cd8 | 2689 | uint8_t sdo_sa0_pull_up : 1; /* 1 = pull-up on SDO/SA0 pin */ |
cparata | 4:77faf76e3cd8 | 2690 | uint8_t aux_sdo_ocs_pull_up : 1; /* 1 = pull-up on OCS_Aux/SDO_Aux pins */ |
cparata | 4:77faf76e3cd8 | 2691 | uint8_t int1_int2_push_pull : 1; /* 1 = push-pull / 0 = open-drain*/ |
cparata | 4:77faf76e3cd8 | 2692 | uint8_t int1_pull_down : 1; /* 1 = pull-down always disabled (0=auto) */ |
cparata | 4:77faf76e3cd8 | 2693 | } lsm6dso_pin_conf_t; |
cparata | 4:77faf76e3cd8 | 2694 | int32_t lsm6dso_pin_conf_set(lsm6dso_ctx_t *ctx, lsm6dso_pin_conf_t val); |
cparata | 4:77faf76e3cd8 | 2695 | int32_t lsm6dso_pin_conf_get(lsm6dso_ctx_t *ctx, lsm6dso_pin_conf_t *val); |
cparata | 4:77faf76e3cd8 | 2696 | |
cparata | 4:77faf76e3cd8 | 2697 | typedef struct { |
cparata | 4:77faf76e3cd8 | 2698 | uint8_t active_low : 1; /* 1 = active low / 0 = active high */ |
cparata | 4:77faf76e3cd8 | 2699 | uint8_t base_latched : 1; /* base functions are: FF, WU, 6D, Tap, Act/Inac */ |
cparata | 4:77faf76e3cd8 | 2700 | uint8_t emb_latched : 1; /* emb functions are: Pedo, Tilt, SMot, Timestamp */ |
cparata | 4:77faf76e3cd8 | 2701 | } lsm6dso_int_mode_t; |
cparata | 4:77faf76e3cd8 | 2702 | int32_t lsm6dso_interrupt_mode_set(lsm6dso_ctx_t *ctx, |
cparata | 4:77faf76e3cd8 | 2703 | lsm6dso_int_mode_t val); |
cparata | 4:77faf76e3cd8 | 2704 | int32_t lsm6dso_interrupt_mode_get(lsm6dso_ctx_t *ctx, |
cparata | 4:77faf76e3cd8 | 2705 | lsm6dso_int_mode_t *val); |
cparata | 4:77faf76e3cd8 | 2706 | |
cparata | 4:77faf76e3cd8 | 2707 | typedef struct { |
cparata | 4:77faf76e3cd8 | 2708 | uint8_t drdy_xl : 1; /* Accelerometer data ready */ |
cparata | 4:77faf76e3cd8 | 2709 | uint8_t drdy_g : 1; /* Gyroscope data ready */ |
cparata | 4:77faf76e3cd8 | 2710 | uint8_t drdy_temp : 1; /* Temperature data ready (1 = int2 pin disable) */ |
cparata | 4:77faf76e3cd8 | 2711 | uint8_t boot : 1; /* Restoring calibration parameters */ |
cparata | 4:77faf76e3cd8 | 2712 | uint8_t fifo_th : 1; /* FIFO threshold reached */ |
cparata | 4:77faf76e3cd8 | 2713 | uint8_t fifo_ovr : 1; /* FIFO overrun */ |
cparata | 4:77faf76e3cd8 | 2714 | uint8_t fifo_full : 1; /* FIFO full */ |
cparata | 4:77faf76e3cd8 | 2715 | uint8_t fifo_bdr : 1; /* FIFO Batch counter threshold reached */ |
cparata | 4:77faf76e3cd8 | 2716 | uint8_t den_flag : 1; /* external trigger level recognition (DEN) */ |
cparata | 4:77faf76e3cd8 | 2717 | uint8_t sh_endop : 1; /* sensor hub end operation */ |
cparata | 4:77faf76e3cd8 | 2718 | uint8_t timestamp : 1; /* timestamp overflow (1 = int2 pin disable) */ |
cparata | 4:77faf76e3cd8 | 2719 | uint8_t six_d : 1; /* orientation change (6D/4D detection) */ |
cparata | 4:77faf76e3cd8 | 2720 | uint8_t double_tap : 1; /* double-tap event */ |
cparata | 4:77faf76e3cd8 | 2721 | uint8_t free_fall : 1; /* free fall event */ |
cparata | 4:77faf76e3cd8 | 2722 | uint8_t wake_up : 1; /* wake up event */ |
cparata | 4:77faf76e3cd8 | 2723 | uint8_t single_tap : 1; /* single-tap event */ |
cparata | 4:77faf76e3cd8 | 2724 | uint8_t sleep_change : 1; /* Act/Inact (or Vice-versa) status changed */ |
cparata | 4:77faf76e3cd8 | 2725 | uint8_t step_detector : 1; /* Step detected */ |
cparata | 4:77faf76e3cd8 | 2726 | uint8_t tilt : 1; /* Relative tilt event detected */ |
cparata | 4:77faf76e3cd8 | 2727 | uint8_t sig_mot : 1; /* "significant motion" event detected */ |
cparata | 4:77faf76e3cd8 | 2728 | uint8_t fsm_lc : 1; /* fsm long counter timeout interrupt event */ |
cparata | 4:77faf76e3cd8 | 2729 | uint8_t fsm1 : 1; /* fsm 1 interrupt event */ |
cparata | 4:77faf76e3cd8 | 2730 | uint8_t fsm2 : 1; /* fsm 2 interrupt event */ |
cparata | 4:77faf76e3cd8 | 2731 | uint8_t fsm3 : 1; /* fsm 3 interrupt event */ |
cparata | 4:77faf76e3cd8 | 2732 | uint8_t fsm4 : 1; /* fsm 4 interrupt event */ |
cparata | 4:77faf76e3cd8 | 2733 | uint8_t fsm5 : 1; /* fsm 5 interrupt event */ |
cparata | 4:77faf76e3cd8 | 2734 | uint8_t fsm6 : 1; /* fsm 6 interrupt event */ |
cparata | 4:77faf76e3cd8 | 2735 | uint8_t fsm7 : 1; /* fsm 7 interrupt event */ |
cparata | 4:77faf76e3cd8 | 2736 | uint8_t fsm8 : 1; /* fsm 8 interrupt event */ |
cparata | 4:77faf76e3cd8 | 2737 | uint8_t fsm9 : 1; /* fsm 9 interrupt event */ |
cparata | 4:77faf76e3cd8 | 2738 | uint8_t fsm10 : 1; /* fsm 10 interrupt event */ |
cparata | 4:77faf76e3cd8 | 2739 | uint8_t fsm11 : 1; /* fsm 11 interrupt event */ |
cparata | 4:77faf76e3cd8 | 2740 | uint8_t fsm12 : 1; /* fsm 12 interrupt event */ |
cparata | 4:77faf76e3cd8 | 2741 | uint8_t fsm13 : 1; /* fsm 13 interrupt event */ |
cparata | 4:77faf76e3cd8 | 2742 | uint8_t fsm14 : 1; /* fsm 14 interrupt event */ |
cparata | 4:77faf76e3cd8 | 2743 | uint8_t fsm15 : 1; /* fsm 15 interrupt event */ |
cparata | 4:77faf76e3cd8 | 2744 | uint8_t fsm16 : 1; /* fsm 16 interrupt event */ |
cparata | 4:77faf76e3cd8 | 2745 | uint8_t mlc1 : 1; /* mlc 1 interrupt event */ |
cparata | 4:77faf76e3cd8 | 2746 | uint8_t mlc2 : 1; /* mlc 2 interrupt event */ |
cparata | 4:77faf76e3cd8 | 2747 | uint8_t mlc3 : 1; /* mlc 3 interrupt event */ |
cparata | 4:77faf76e3cd8 | 2748 | uint8_t mlc4 : 1; /* mlc 4 interrupt event */ |
cparata | 4:77faf76e3cd8 | 2749 | uint8_t mlc5 : 1; /* mlc 5 interrupt event */ |
cparata | 4:77faf76e3cd8 | 2750 | uint8_t mlc6 : 1; /* mlc 6 interrupt event */ |
cparata | 4:77faf76e3cd8 | 2751 | uint8_t mlc7 : 1; /* mlc 7 interrupt event */ |
cparata | 4:77faf76e3cd8 | 2752 | uint8_t mlc8 : 1; /* mlc 8 interrupt event */ |
cparata | 4:77faf76e3cd8 | 2753 | } lsm6dso_pin_int1_route_t; |
cparata | 4:77faf76e3cd8 | 2754 | |
cparata | 4:77faf76e3cd8 | 2755 | int32_t lsm6dso_pin_int1_route_set(lsm6dso_ctx_t *ctx, |
cparata | 4:77faf76e3cd8 | 2756 | lsm6dso_pin_int1_route_t val); |
cparata | 4:77faf76e3cd8 | 2757 | int32_t lsm6dso_pin_int1_route_get(lsm6dso_ctx_t *ctx, |
cparata | 4:77faf76e3cd8 | 2758 | lsm6dso_pin_int1_route_t *val); |
cparata | 4:77faf76e3cd8 | 2759 | |
cparata | 4:77faf76e3cd8 | 2760 | typedef struct { |
cparata | 4:77faf76e3cd8 | 2761 | uint8_t drdy_ois : 1; /* OIS chain data ready */ |
cparata | 4:77faf76e3cd8 | 2762 | uint8_t drdy_xl : 1; /* Accelerometer data ready */ |
cparata | 4:77faf76e3cd8 | 2763 | uint8_t drdy_g : 1; /* Gyroscope data ready */ |
cparata | 4:77faf76e3cd8 | 2764 | uint8_t drdy_temp : 1; /* Temperature data ready */ |
cparata | 4:77faf76e3cd8 | 2765 | uint8_t fifo_th : 1; /* FIFO threshold reached */ |
cparata | 4:77faf76e3cd8 | 2766 | uint8_t fifo_ovr : 1; /* FIFO overrun */ |
cparata | 4:77faf76e3cd8 | 2767 | uint8_t fifo_full : 1; /* FIFO full */ |
cparata | 4:77faf76e3cd8 | 2768 | uint8_t fifo_bdr : 1; /* FIFO Batch counter threshold reached */ |
cparata | 4:77faf76e3cd8 | 2769 | uint8_t timestamp : 1; /* timestamp overflow */ |
cparata | 4:77faf76e3cd8 | 2770 | uint8_t six_d : 1; /* orientation change (6D/4D detection) */ |
cparata | 4:77faf76e3cd8 | 2771 | uint8_t double_tap : 1; /* double-tap event */ |
cparata | 4:77faf76e3cd8 | 2772 | uint8_t free_fall : 1; /* free fall event */ |
cparata | 4:77faf76e3cd8 | 2773 | uint8_t wake_up : 1; /* wake up event */ |
cparata | 4:77faf76e3cd8 | 2774 | uint8_t single_tap : 1; /* single-tap event */ |
cparata | 4:77faf76e3cd8 | 2775 | uint8_t sleep_change : 1; /* Act/Inact (or Vice-versa) status changed */ |
cparata | 4:77faf76e3cd8 | 2776 | uint8_t step_detector : 1; /* Step detected */ |
cparata | 4:77faf76e3cd8 | 2777 | uint8_t tilt : 1; /* Relative tilt event detected */ |
cparata | 4:77faf76e3cd8 | 2778 | uint8_t sig_mot : 1; /* "significant motion" event detected */ |
cparata | 4:77faf76e3cd8 | 2779 | uint8_t fsm_lc : 1; /* fsm long counter timeout interrupt event */ |
cparata | 4:77faf76e3cd8 | 2780 | uint8_t fsm1 : 1; /* fsm 1 interrupt event */ |
cparata | 4:77faf76e3cd8 | 2781 | uint8_t fsm2 : 1; /* fsm 2 interrupt event */ |
cparata | 4:77faf76e3cd8 | 2782 | uint8_t fsm3 : 1; /* fsm 3 interrupt event */ |
cparata | 4:77faf76e3cd8 | 2783 | uint8_t fsm4 : 1; /* fsm 4 interrupt event */ |
cparata | 4:77faf76e3cd8 | 2784 | uint8_t fsm5 : 1; /* fsm 5 interrupt event */ |
cparata | 4:77faf76e3cd8 | 2785 | uint8_t fsm6 : 1; /* fsm 6 interrupt event */ |
cparata | 4:77faf76e3cd8 | 2786 | uint8_t fsm7 : 1; /* fsm 7 interrupt event */ |
cparata | 4:77faf76e3cd8 | 2787 | uint8_t fsm8 : 1; /* fsm 8 interrupt event */ |
cparata | 4:77faf76e3cd8 | 2788 | uint8_t fsm9 : 1; /* fsm 9 interrupt event */ |
cparata | 4:77faf76e3cd8 | 2789 | uint8_t fsm10 : 1; /* fsm 10 interrupt event */ |
cparata | 4:77faf76e3cd8 | 2790 | uint8_t fsm11 : 1; /* fsm 11 interrupt event */ |
cparata | 4:77faf76e3cd8 | 2791 | uint8_t fsm12 : 1; /* fsm 12 interrupt event */ |
cparata | 4:77faf76e3cd8 | 2792 | uint8_t fsm13 : 1; /* fsm 13 interrupt event */ |
cparata | 4:77faf76e3cd8 | 2793 | uint8_t fsm14 : 1; /* fsm 14 interrupt event */ |
cparata | 4:77faf76e3cd8 | 2794 | uint8_t fsm15 : 1; /* fsm 15 interrupt event */ |
cparata | 4:77faf76e3cd8 | 2795 | uint8_t fsm16 : 1; /* fsm 16 interrupt event */ |
cparata | 4:77faf76e3cd8 | 2796 | uint8_t mlc1 : 1; /* mlc 1 interrupt event */ |
cparata | 4:77faf76e3cd8 | 2797 | uint8_t mlc2 : 1; /* mlc 2 interrupt event */ |
cparata | 4:77faf76e3cd8 | 2798 | uint8_t mlc3 : 1; /* mlc 3 interrupt event */ |
cparata | 4:77faf76e3cd8 | 2799 | uint8_t mlc4 : 1; /* mlc 4 interrupt event */ |
cparata | 4:77faf76e3cd8 | 2800 | uint8_t mlc5 : 1; /* mlc 5 interrupt event */ |
cparata | 4:77faf76e3cd8 | 2801 | uint8_t mlc6 : 1; /* mlc 6 interrupt event */ |
cparata | 4:77faf76e3cd8 | 2802 | uint8_t mlc7 : 1; /* mlc 7 interrupt event */ |
cparata | 4:77faf76e3cd8 | 2803 | uint8_t mlc8 : 1; /* mlc 8 interrupt event */ |
cparata | 4:77faf76e3cd8 | 2804 | } lsm6dso_pin_int2_route_t; |
cparata | 4:77faf76e3cd8 | 2805 | |
cparata | 4:77faf76e3cd8 | 2806 | int32_t lsm6dso_pin_int2_route_set(lsm6dso_ctx_t *ctx, lsm6dso_ctx_t *aux_ctx, |
cparata | 4:77faf76e3cd8 | 2807 | lsm6dso_pin_int2_route_t val); |
cparata | 4:77faf76e3cd8 | 2808 | int32_t lsm6dso_pin_int2_route_get(lsm6dso_ctx_t *ctx, lsm6dso_ctx_t *aux_ctx, |
cparata | 4:77faf76e3cd8 | 2809 | lsm6dso_pin_int2_route_t *val); |
cparata | 4:77faf76e3cd8 | 2810 | |
cparata | 4:77faf76e3cd8 | 2811 | typedef struct { |
cparata | 4:77faf76e3cd8 | 2812 | uint8_t drdy_xl : 1; /* Accelerometer data ready */ |
cparata | 4:77faf76e3cd8 | 2813 | uint8_t drdy_g : 1; /* Gyroscope data ready */ |
cparata | 4:77faf76e3cd8 | 2814 | uint8_t drdy_temp : 1; /* Temperature data ready */ |
cparata | 4:77faf76e3cd8 | 2815 | uint8_t den_flag : 1; /* external trigger level recognition (DEN) */ |
cparata | 4:77faf76e3cd8 | 2816 | uint8_t timestamp : 1; /* timestamp overflow (1 = int2 pin disable) */ |
cparata | 4:77faf76e3cd8 | 2817 | uint8_t free_fall : 1; /* free fall event */ |
cparata | 4:77faf76e3cd8 | 2818 | uint8_t wake_up : 1; /* wake up event */ |
cparata | 4:77faf76e3cd8 | 2819 | uint8_t wake_up_z : 1; /* wake up on Z axis event */ |
cparata | 4:77faf76e3cd8 | 2820 | uint8_t wake_up_y : 1; /* wake up on Y axis event */ |
cparata | 4:77faf76e3cd8 | 2821 | uint8_t wake_up_x : 1; /* wake up on X axis event */ |
cparata | 4:77faf76e3cd8 | 2822 | uint8_t single_tap : 1; /* single-tap event */ |
cparata | 4:77faf76e3cd8 | 2823 | uint8_t double_tap : 1; /* double-tap event */ |
cparata | 4:77faf76e3cd8 | 2824 | uint8_t tap_z : 1; /* single-tap on Z axis event */ |
cparata | 4:77faf76e3cd8 | 2825 | uint8_t tap_y : 1; /* single-tap on Y axis event */ |
cparata | 4:77faf76e3cd8 | 2826 | uint8_t tap_x : 1; /* single-tap on X axis event */ |
cparata | 4:77faf76e3cd8 | 2827 | uint8_t tap_sign : 1; /* sign of tap event (0-pos / 1-neg) */ |
cparata | 4:77faf76e3cd8 | 2828 | uint8_t six_d : 1; /* orientation change (6D/4D detection) */ |
cparata | 4:77faf76e3cd8 | 2829 | uint8_t six_d_xl : 1; /* X-axis low 6D/4D event (under threshold) */ |
cparata | 4:77faf76e3cd8 | 2830 | uint8_t six_d_xh : 1; /* X-axis high 6D/4D event (over threshold) */ |
cparata | 4:77faf76e3cd8 | 2831 | uint8_t six_d_yl : 1; /* Y-axis low 6D/4D event (under threshold) */ |
cparata | 4:77faf76e3cd8 | 2832 | uint8_t six_d_yh : 1; /* Y-axis high 6D/4D event (over threshold) */ |
cparata | 4:77faf76e3cd8 | 2833 | uint8_t six_d_zl : 1; /* Z-axis low 6D/4D event (under threshold) */ |
cparata | 4:77faf76e3cd8 | 2834 | uint8_t six_d_zh : 1; /* Z-axis high 6D/4D event (over threshold) */ |
cparata | 4:77faf76e3cd8 | 2835 | uint8_t sleep_change : 1; /* Act/Inact (or Vice-versa) status changed */ |
cparata | 4:77faf76e3cd8 | 2836 | uint8_t sleep_state : 1; /* Act/Inact status flag (0-Act / 1-Inact) */ |
cparata | 4:77faf76e3cd8 | 2837 | uint8_t step_detector : 1; /* Step detected */ |
cparata | 4:77faf76e3cd8 | 2838 | uint8_t tilt : 1; /* Relative tilt event detected */ |
cparata | 4:77faf76e3cd8 | 2839 | uint8_t sig_mot : 1; /* "significant motion" event detected */ |
cparata | 4:77faf76e3cd8 | 2840 | uint8_t fsm_lc : 1; /* fsm long counter timeout interrupt event */ |
cparata | 4:77faf76e3cd8 | 2841 | uint8_t fsm1 : 1; /* fsm 1 interrupt event */ |
cparata | 4:77faf76e3cd8 | 2842 | uint8_t fsm2 : 1; /* fsm 2 interrupt event */ |
cparata | 4:77faf76e3cd8 | 2843 | uint8_t fsm3 : 1; /* fsm 3 interrupt event */ |
cparata | 4:77faf76e3cd8 | 2844 | uint8_t fsm4 : 1; /* fsm 4 interrupt event */ |
cparata | 4:77faf76e3cd8 | 2845 | uint8_t fsm5 : 1; /* fsm 5 interrupt event */ |
cparata | 4:77faf76e3cd8 | 2846 | uint8_t fsm6 : 1; /* fsm 6 interrupt event */ |
cparata | 4:77faf76e3cd8 | 2847 | uint8_t fsm7 : 1; /* fsm 7 interrupt event */ |
cparata | 4:77faf76e3cd8 | 2848 | uint8_t fsm8 : 1; /* fsm 8 interrupt event */ |
cparata | 4:77faf76e3cd8 | 2849 | uint8_t fsm9 : 1; /* fsm 9 interrupt event */ |
cparata | 4:77faf76e3cd8 | 2850 | uint8_t fsm10 : 1; /* fsm 10 interrupt event */ |
cparata | 4:77faf76e3cd8 | 2851 | uint8_t fsm11 : 1; /* fsm 11 interrupt event */ |
cparata | 4:77faf76e3cd8 | 2852 | uint8_t fsm12 : 1; /* fsm 12 interrupt event */ |
cparata | 4:77faf76e3cd8 | 2853 | uint8_t fsm13 : 1; /* fsm 13 interrupt event */ |
cparata | 4:77faf76e3cd8 | 2854 | uint8_t fsm14 : 1; /* fsm 14 interrupt event */ |
cparata | 4:77faf76e3cd8 | 2855 | uint8_t fsm15 : 1; /* fsm 15 interrupt event */ |
cparata | 4:77faf76e3cd8 | 2856 | uint8_t fsm16 : 1; /* fsm 16 interrupt event */ |
cparata | 4:77faf76e3cd8 | 2857 | uint8_t mlc1 : 1; /* mlc 1 interrupt event */ |
cparata | 4:77faf76e3cd8 | 2858 | uint8_t mlc2 : 1; /* mlc 2 interrupt event */ |
cparata | 4:77faf76e3cd8 | 2859 | uint8_t mlc3 : 1; /* mlc 3 interrupt event */ |
cparata | 4:77faf76e3cd8 | 2860 | uint8_t mlc4 : 1; /* mlc 4 interrupt event */ |
cparata | 4:77faf76e3cd8 | 2861 | uint8_t mlc5 : 1; /* mlc 5 interrupt event */ |
cparata | 4:77faf76e3cd8 | 2862 | uint8_t mlc6 : 1; /* mlc 6 interrupt event */ |
cparata | 4:77faf76e3cd8 | 2863 | uint8_t mlc7 : 1; /* mlc 7 interrupt event */ |
cparata | 4:77faf76e3cd8 | 2864 | uint8_t mlc8 : 1; /* mlc 8 interrupt event */ |
cparata | 4:77faf76e3cd8 | 2865 | uint8_t sh_endop : 1; /* sensor hub end operation */ |
cparata | 4:77faf76e3cd8 | 2866 | uint8_t sh_slave0_nack : 1; /* Not acknowledge on sensor hub slave 0 */ |
cparata | 4:77faf76e3cd8 | 2867 | uint8_t sh_slave1_nack : 1; /* Not acknowledge on sensor hub slave 1 */ |
cparata | 4:77faf76e3cd8 | 2868 | uint8_t sh_slave2_nack : 1; /* Not acknowledge on sensor hub slave 2 */ |
cparata | 4:77faf76e3cd8 | 2869 | uint8_t sh_slave3_nack : 1; /* Not acknowledge on sensor hub slave 3 */ |
cparata | 4:77faf76e3cd8 | 2870 | uint8_t sh_wr_once : 1; /* "WRITE_ONCE" end on sensor hub slave 0 */ |
cparata | 4:77faf76e3cd8 | 2871 | uint16_t fifo_diff : 10; /* Number of unread sensor data in FIFO*/ |
cparata | 4:77faf76e3cd8 | 2872 | uint8_t fifo_ovr_latched : 1; /* Latched FIFO overrun status */ |
cparata | 4:77faf76e3cd8 | 2873 | uint8_t fifo_bdr : 1; /* FIFO Batch counter threshold reached */ |
cparata | 4:77faf76e3cd8 | 2874 | uint8_t fifo_full : 1; /* FIFO full */ |
cparata | 4:77faf76e3cd8 | 2875 | uint8_t fifo_ovr : 1; /* FIFO overrun */ |
cparata | 4:77faf76e3cd8 | 2876 | uint8_t fifo_th : 1; /* FIFO threshold reached */ |
cparata | 4:77faf76e3cd8 | 2877 | } lsm6dso_all_sources_t; |
cparata | 4:77faf76e3cd8 | 2878 | int32_t lsm6dso_all_sources_get(lsm6dso_ctx_t *ctx, |
cparata | 4:77faf76e3cd8 | 2879 | lsm6dso_all_sources_t *val); |
cparata | 4:77faf76e3cd8 | 2880 | |
cparata | 4:77faf76e3cd8 | 2881 | typedef struct{ |
cparata | 4:77faf76e3cd8 | 2882 | uint8_t odr_fine_tune; |
cparata | 5:b65c1498ae3f | 2883 | } lsm6dso_dev_cal_t; |
cparata | 5:b65c1498ae3f | 2884 | int32_t lsm6dso_calibration_get(lsm6dso_ctx_t *ctx, lsm6dso_dev_cal_t *val); |
cparata | 4:77faf76e3cd8 | 2885 | |
cparata | 4:77faf76e3cd8 | 2886 | typedef struct { |
cparata | 4:77faf76e3cd8 | 2887 | struct { |
cparata | 4:77faf76e3cd8 | 2888 | struct { |
cparata | 4:77faf76e3cd8 | 2889 | enum { |
cparata | 4:77faf76e3cd8 | 2890 | LSM6DSO_XL_UI_OFF = 0x00, /* in power down */ |
cparata | 4:77faf76e3cd8 | 2891 | LSM6DSO_XL_UI_1Hz6_LP = 0x1B, /* @1Hz6 (low power) */ |
cparata | 4:77faf76e3cd8 | 2892 | LSM6DSO_XL_UI_1Hz6_ULP = 0x2B, /* @1Hz6 (ultra low/Gy, OIS imu off) */ |
cparata | 4:77faf76e3cd8 | 2893 | LSM6DSO_XL_UI_12Hz5_HP = 0x01, /* @12Hz5 (high performance) */ |
cparata | 4:77faf76e3cd8 | 2894 | LSM6DSO_XL_UI_12Hz5_LP = 0x11, /* @12Hz5 (low power) */ |
cparata | 4:77faf76e3cd8 | 2895 | LSM6DSO_XL_UI_12Hz5_ULP = 0x21, /* @12Hz5 (ultra low/Gy, OIS imu off) */ |
cparata | 4:77faf76e3cd8 | 2896 | LSM6DSO_XL_UI_26Hz_HP = 0x02, /* @26Hz (high performance) */ |
cparata | 4:77faf76e3cd8 | 2897 | LSM6DSO_XL_UI_26Hz_LP = 0x12, /* @26Hz (low power) */ |
cparata | 4:77faf76e3cd8 | 2898 | LSM6DSO_XL_UI_26Hz_ULP = 0x22, /* @26Hz (ultra low/Gy, OIS imu off) */ |
cparata | 4:77faf76e3cd8 | 2899 | LSM6DSO_XL_UI_52Hz_HP = 0x03, /* @52Hz (high performance) */ |
cparata | 4:77faf76e3cd8 | 2900 | LSM6DSO_XL_UI_52Hz_LP = 0x13, /* @52Hz (low power) */ |
cparata | 4:77faf76e3cd8 | 2901 | LSM6DSO_XL_UI_52Hz_ULP = 0x23, /* @52Hz (ultra low/Gy, OIS imu off) */ |
cparata | 4:77faf76e3cd8 | 2902 | LSM6DSO_XL_UI_104Hz_HP = 0x04, /* @104Hz (high performance) */ |
cparata | 4:77faf76e3cd8 | 2903 | LSM6DSO_XL_UI_104Hz_NM = 0x14, /* @104Hz (normal mode) */ |
cparata | 4:77faf76e3cd8 | 2904 | LSM6DSO_XL_UI_104Hz_ULP = 0x24, /* @104Hz (ultra low/Gy, OIS imu off) */ |
cparata | 4:77faf76e3cd8 | 2905 | LSM6DSO_XL_UI_208Hz_HP = 0x05, /* @208Hz (high performance) */ |
cparata | 4:77faf76e3cd8 | 2906 | LSM6DSO_XL_UI_208Hz_NM = 0x15, /* @208Hz (normal mode) */ |
cparata | 4:77faf76e3cd8 | 2907 | LSM6DSO_XL_UI_208Hz_ULP = 0x25, /* @208Hz (ultra low/Gy, OIS imu off) */ |
cparata | 4:77faf76e3cd8 | 2908 | LSM6DSO_XL_UI_416Hz_HP = 0x06, /* @416Hz (high performance) */ |
cparata | 4:77faf76e3cd8 | 2909 | LSM6DSO_XL_UI_833Hz_HP = 0x07, /* @833Hz (high performance) */ |
cparata | 4:77faf76e3cd8 | 2910 | LSM6DSO_XL_UI_1667Hz_HP = 0x08, /* @1kHz66 (high performance) */ |
cparata | 4:77faf76e3cd8 | 2911 | LSM6DSO_XL_UI_3333Hz_HP = 0x09, /* @3kHz33 (high performance) */ |
cparata | 4:77faf76e3cd8 | 2912 | LSM6DSO_XL_UI_6667Hz_HP = 0x0A, /* @6kHz66 (high performance) */ |
cparata | 4:77faf76e3cd8 | 2913 | } odr; |
cparata | 4:77faf76e3cd8 | 2914 | enum { |
cparata | 4:77faf76e3cd8 | 2915 | LSM6DSO_XL_UI_2g = 0, |
cparata | 4:77faf76e3cd8 | 2916 | LSM6DSO_XL_UI_4g = 2, |
cparata | 4:77faf76e3cd8 | 2917 | LSM6DSO_XL_UI_8g = 3, |
cparata | 4:77faf76e3cd8 | 2918 | LSM6DSO_XL_UI_16g = 1, /* OIS full scale is also forced to be 16g */ |
cparata | 4:77faf76e3cd8 | 2919 | } fs; |
cparata | 4:77faf76e3cd8 | 2920 | } xl; |
cparata | 4:77faf76e3cd8 | 2921 | struct { |
cparata | 4:77faf76e3cd8 | 2922 | enum { |
cparata | 4:77faf76e3cd8 | 2923 | LSM6DSO_GY_UI_OFF = 0x00, /* gy in power down */ |
cparata | 4:77faf76e3cd8 | 2924 | LSM6DSO_GY_UI_12Hz5_LP = 0x11, /* gy @12Hz5 (low power) */ |
cparata | 4:77faf76e3cd8 | 2925 | LSM6DSO_GY_UI_12Hz5_HP = 0x01, /* gy @12Hz5 (high performance) */ |
cparata | 4:77faf76e3cd8 | 2926 | LSM6DSO_GY_UI_26Hz_LP = 0x12, /* gy @26Hz (low power) */ |
cparata | 4:77faf76e3cd8 | 2927 | LSM6DSO_GY_UI_26Hz_HP = 0x02, /* gy @26Hz (high performance) */ |
cparata | 4:77faf76e3cd8 | 2928 | LSM6DSO_GY_UI_52Hz_LP = 0x13, /* gy @52Hz (low power) */ |
cparata | 4:77faf76e3cd8 | 2929 | LSM6DSO_GY_UI_52Hz_HP = 0x03, /* gy @52Hz (high performance) */ |
cparata | 4:77faf76e3cd8 | 2930 | LSM6DSO_GY_UI_104Hz_NM = 0x14, /* gy @104Hz (low power) */ |
cparata | 4:77faf76e3cd8 | 2931 | LSM6DSO_GY_UI_104Hz_HP = 0x04, /* gy @104Hz (high performance) */ |
cparata | 4:77faf76e3cd8 | 2932 | LSM6DSO_GY_UI_208Hz_NM = 0x15, /* gy @208Hz (low power) */ |
cparata | 4:77faf76e3cd8 | 2933 | LSM6DSO_GY_UI_208Hz_HP = 0x05, /* gy @208Hz (high performance) */ |
cparata | 4:77faf76e3cd8 | 2934 | LSM6DSO_GY_UI_416Hz_HP = 0x06, /* gy @416Hz (high performance) */ |
cparata | 4:77faf76e3cd8 | 2935 | LSM6DSO_GY_UI_833Hz_HP = 0x07, /* gy @833Hz (high performance) */ |
cparata | 4:77faf76e3cd8 | 2936 | LSM6DSO_GY_UI_1667Hz_HP = 0x08, /* gy @1kHz66 (high performance) */ |
cparata | 4:77faf76e3cd8 | 2937 | LSM6DSO_GY_UI_3333Hz_HP = 0x09, /* gy @3kHz33 (high performance) */ |
cparata | 4:77faf76e3cd8 | 2938 | LSM6DSO_GY_UI_6667Hz_HP = 0x0A, /* gy @6kHz66 (high performance) */ |
cparata | 4:77faf76e3cd8 | 2939 | } odr; |
cparata | 4:77faf76e3cd8 | 2940 | enum { |
cparata | 4:77faf76e3cd8 | 2941 | LSM6DSO_GY_UI_250dps = 0, |
cparata | 4:77faf76e3cd8 | 2942 | LSM6DSO_GY_UI_125dps = 1, |
cparata | 4:77faf76e3cd8 | 2943 | LSM6DSO_GY_UI_500dps = 2, |
cparata | 4:77faf76e3cd8 | 2944 | LSM6DSO_GY_UI_1000dps = 4, |
cparata | 4:77faf76e3cd8 | 2945 | LSM6DSO_GY_UI_2000dps = 6, |
cparata | 4:77faf76e3cd8 | 2946 | } fs; |
cparata | 4:77faf76e3cd8 | 2947 | }gy; |
cparata | 4:77faf76e3cd8 | 2948 | } ui; |
cparata | 4:77faf76e3cd8 | 2949 | struct { |
cparata | 4:77faf76e3cd8 | 2950 | enum { |
cparata | 4:77faf76e3cd8 | 2951 | LSM6DSO_OIS_ONLY_AUX = 0x00, /* Auxiliary SPI full control */ |
cparata | 4:77faf76e3cd8 | 2952 | LSM6DSO_OIS_MIXED = 0x01, /* Enabling by UI / read-config by AUX */ |
cparata | 4:77faf76e3cd8 | 2953 | } ctrl_md; |
cparata | 4:77faf76e3cd8 | 2954 | struct { |
cparata | 4:77faf76e3cd8 | 2955 | enum { |
cparata | 4:77faf76e3cd8 | 2956 | LSM6DSO_XL_OIS_OFF = 0x00, /* in power down */ |
cparata | 4:77faf76e3cd8 | 2957 | LSM6DSO_XL_OIS_6667Hz_HP = 0x01, /* @6kHz OIS imu active/NO ULP on UI */ |
cparata | 4:77faf76e3cd8 | 2958 | } odr; |
cparata | 4:77faf76e3cd8 | 2959 | enum { |
cparata | 4:77faf76e3cd8 | 2960 | LSM6DSO_XL_OIS_2g = 0, |
cparata | 4:77faf76e3cd8 | 2961 | LSM6DSO_XL_OIS_4g = 2, |
cparata | 4:77faf76e3cd8 | 2962 | LSM6DSO_XL_OIS_8g = 3, |
cparata | 4:77faf76e3cd8 | 2963 | LSM6DSO_XL_OIS_16g = 1, /* UI full scale is also forced to be 16g */ |
cparata | 4:77faf76e3cd8 | 2964 | } fs; |
cparata | 4:77faf76e3cd8 | 2965 | } xl; |
cparata | 4:77faf76e3cd8 | 2966 | struct { |
cparata | 4:77faf76e3cd8 | 2967 | enum { |
cparata | 4:77faf76e3cd8 | 2968 | LSM6DSO_GY_OIS_OFF = 0x00, /* in power down */ |
cparata | 4:77faf76e3cd8 | 2969 | LSM6DSO_GY_OIS_6667Hz_HP = 0x01, /* @6kHz No Ultra Low Power*/ |
cparata | 4:77faf76e3cd8 | 2970 | } odr; |
cparata | 4:77faf76e3cd8 | 2971 | enum { |
cparata | 4:77faf76e3cd8 | 2972 | LSM6DSO_GY_OIS_250dps = 0, |
cparata | 4:77faf76e3cd8 | 2973 | LSM6DSO_GY_OIS_125dps = 1, |
cparata | 4:77faf76e3cd8 | 2974 | LSM6DSO_GY_OIS_500dps = 2, |
cparata | 4:77faf76e3cd8 | 2975 | LSM6DSO_GY_OIS_1000dps = 4, |
cparata | 4:77faf76e3cd8 | 2976 | LSM6DSO_GY_OIS_2000dps = 6, |
cparata | 4:77faf76e3cd8 | 2977 | } fs; |
cparata | 4:77faf76e3cd8 | 2978 | } gy; |
cparata | 4:77faf76e3cd8 | 2979 | } ois; |
cparata | 4:77faf76e3cd8 | 2980 | struct { |
cparata | 4:77faf76e3cd8 | 2981 | enum { |
cparata | 4:77faf76e3cd8 | 2982 | LSM6DSO_FSM_DISABLE = 0x00, |
cparata | 4:77faf76e3cd8 | 2983 | LSM6DSO_FSM_XL = 0x01, |
cparata | 4:77faf76e3cd8 | 2984 | LSM6DSO_FSM_GY = 0x02, |
cparata | 4:77faf76e3cd8 | 2985 | LSM6DSO_FSM_XL_GY = 0x03, |
cparata | 4:77faf76e3cd8 | 2986 | } sens; |
cparata | 4:77faf76e3cd8 | 2987 | enum { |
cparata | 4:77faf76e3cd8 | 2988 | LSM6DSO_FSM_12Hz5 = 0x00, |
cparata | 4:77faf76e3cd8 | 2989 | LSM6DSO_FSM_26Hz = 0x01, |
cparata | 4:77faf76e3cd8 | 2990 | LSM6DSO_FSM_52Hz = 0x02, |
cparata | 4:77faf76e3cd8 | 2991 | LSM6DSO_FSM_104Hz = 0x03, |
cparata | 4:77faf76e3cd8 | 2992 | } odr; |
cparata | 4:77faf76e3cd8 | 2993 | } fsm; |
cparata | 4:77faf76e3cd8 | 2994 | } lsm6dso_md_t; |
cparata | 4:77faf76e3cd8 | 2995 | int32_t lsm6dso_mode_set(lsm6dso_ctx_t *ctx, lsm6dso_ctx_t *aux_ctx, |
cparata | 4:77faf76e3cd8 | 2996 | lsm6dso_md_t *val); |
cparata | 4:77faf76e3cd8 | 2997 | int32_t lsm6dso_mode_get(lsm6dso_ctx_t *ctx, lsm6dso_ctx_t *aux_ctx, |
cparata | 4:77faf76e3cd8 | 2998 | lsm6dso_md_t *val); |
cparata | 4:77faf76e3cd8 | 2999 | typedef struct { |
cparata | 4:77faf76e3cd8 | 3000 | struct { |
cparata | 4:77faf76e3cd8 | 3001 | struct { |
cparata | 4:77faf76e3cd8 | 3002 | float mg[3]; |
cparata | 4:77faf76e3cd8 | 3003 | int16_t raw[3]; |
cparata | 4:77faf76e3cd8 | 3004 | }xl; |
cparata | 4:77faf76e3cd8 | 3005 | struct { |
cparata | 4:77faf76e3cd8 | 3006 | float mdps[3]; |
cparata | 4:77faf76e3cd8 | 3007 | int16_t raw[3]; |
cparata | 4:77faf76e3cd8 | 3008 | }gy; |
cparata | 4:77faf76e3cd8 | 3009 | struct { |
cparata | 4:77faf76e3cd8 | 3010 | float deg_c; |
cparata | 4:77faf76e3cd8 | 3011 | int16_t raw; |
cparata | 4:77faf76e3cd8 | 3012 | }heat; |
cparata | 4:77faf76e3cd8 | 3013 | } ui; |
cparata | 4:77faf76e3cd8 | 3014 | struct { |
cparata | 4:77faf76e3cd8 | 3015 | struct { |
cparata | 4:77faf76e3cd8 | 3016 | float mg[3]; |
cparata | 4:77faf76e3cd8 | 3017 | int16_t raw[3]; |
cparata | 4:77faf76e3cd8 | 3018 | }xl; |
cparata | 4:77faf76e3cd8 | 3019 | struct { |
cparata | 4:77faf76e3cd8 | 3020 | float mdps[3]; |
cparata | 4:77faf76e3cd8 | 3021 | int16_t raw[3]; |
cparata | 4:77faf76e3cd8 | 3022 | }gy; |
cparata | 4:77faf76e3cd8 | 3023 | } ois; |
cparata | 4:77faf76e3cd8 | 3024 | } lsm6dso_data_t; |
cparata | 4:77faf76e3cd8 | 3025 | int32_t lsm6dso_data_get(lsm6dso_ctx_t *ctx, lsm6dso_ctx_t *aux_ctx, |
cparata | 4:77faf76e3cd8 | 3026 | lsm6dso_md_t *md, lsm6dso_data_t *data); |
cparata | 4:77faf76e3cd8 | 3027 | |
cparata | 4:77faf76e3cd8 | 3028 | typedef struct { |
cparata | 4:77faf76e3cd8 | 3029 | uint8_t sig_mot : 1; /* significant motion */ |
cparata | 4:77faf76e3cd8 | 3030 | uint8_t tilt : 1; /* tilt detection */ |
cparata | 4:77faf76e3cd8 | 3031 | uint8_t step : 1; /* step counter/detector */ |
cparata | 4:77faf76e3cd8 | 3032 | uint8_t step_adv : 1; /* step counter advanced mode */ |
cparata | 4:77faf76e3cd8 | 3033 | uint8_t fsm : 1; /* finite state machine */ |
cparata | 4:77faf76e3cd8 | 3034 | uint8_t fifo_compr : 1; /* FIFO compression */ |
cparata | 4:77faf76e3cd8 | 3035 | } lsm6dso_emb_sens_t; |
cparata | 4:77faf76e3cd8 | 3036 | int32_t lsm6dso_embedded_sens_set(lsm6dso_ctx_t *ctx, |
cparata | 4:77faf76e3cd8 | 3037 | lsm6dso_emb_sens_t *emb_sens); |
cparata | 4:77faf76e3cd8 | 3038 | int32_t lsm6dso_embedded_sens_get(lsm6dso_ctx_t *ctx, |
cparata | 4:77faf76e3cd8 | 3039 | lsm6dso_emb_sens_t *emb_sens); |
cparata | 4:77faf76e3cd8 | 3040 | int32_t lsm6dso_embedded_sens_off(lsm6dso_ctx_t *ctx); |
cparata | 4:77faf76e3cd8 | 3041 | |
cparata | 0:6d69e896ce38 | 3042 | /** |
cparata | 0:6d69e896ce38 | 3043 | * @} |
cparata | 0:6d69e896ce38 | 3044 | * |
cparata | 0:6d69e896ce38 | 3045 | */ |
cparata | 0:6d69e896ce38 | 3046 | |
cparata | 0:6d69e896ce38 | 3047 | #ifdef __cplusplus |
cparata | 0:6d69e896ce38 | 3048 | } |
cparata | 0:6d69e896ce38 | 3049 | #endif |
cparata | 0:6d69e896ce38 | 3050 | |
cparata | 0:6d69e896ce38 | 3051 | #endif /*LSM6DSO_DRIVER_H */ |
cparata | 0:6d69e896ce38 | 3052 | |
cparata | 0:6d69e896ce38 | 3053 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |