Maxim Integrated / MAX77734

The MAX77734 is a tiny PMIC for applications where size and simplicity are critical. The IC integrates a linear-mode Li+ battery charger, low-dropout linear regulator (LDO), analog multiplexer, and dual-channel current sink driver. Datasheet: https://datasheets.maximintegrated.com/en/ds/MAX77734.pdf Applications ● Hearables: Headsets, Headphones, Earbuds ● Fitness Bands and other Bluetooth Wearables ● Action Cameras, Wearable/Body Cameras ● Low-Power Internet of Things (IoT) Gadgets

The MAX77734 is a tiny PMIC for applications where size and simplicity are critical. The IC integrates a linear-mode Li+ battery charger, low-dropout linear regulator (LDO), analog multiplexer, and dual-channel current sink driver.

Applications

● Hearables: Headsets, Headphones, Earbuds

● Fitness Bands and other Bluetooth Wearables

● Action Cameras, Wearable/Body Cameras

● Low-Power Internet of Things (IoT) Gadgets

Datasheet: https://datasheets.maximintegrated.com/en/ds/MAX77734.pdf

EVKit: https://www.maximintegrated.com/en/products/power/battery-management/MAX77734EVKIT.html

max77734.cpp@0:2726f8e71192, 2018-12-27 (annotated)

Committer:
daniel_gs_jeong
Date:
Thu Dec 27 04:59:28 2018 +0000
Revision:
0:2726f8e71192
The 1st version of MAX77734, a tiny PMIC for applications where size; and simplicity are critical.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
daniel_gs_jeong 0:2726f8e71192 1 /*******************************************************************************
daniel_gs_jeong 0:2726f8e71192 2 * Copyright (C) 2018 Maxim Integrated Products, Inc., All Rights Reserved.
daniel_gs_jeong 0:2726f8e71192 3 *
daniel_gs_jeong 0:2726f8e71192 4 * Permission is hereby granted, free of charge, to any person obtaining a
daniel_gs_jeong 0:2726f8e71192 5 * copy of this software and associated documentation files (the "Software"),
daniel_gs_jeong 0:2726f8e71192 6 * to deal in the Software without restriction, including without limitation
daniel_gs_jeong 0:2726f8e71192 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
daniel_gs_jeong 0:2726f8e71192 8 * and/or sell copies of the Software, and to permit persons to whom the
daniel_gs_jeong 0:2726f8e71192 9 * Software is furnished to do so, subject to the following conditions:
daniel_gs_jeong 0:2726f8e71192 10 *
daniel_gs_jeong 0:2726f8e71192 11 * The above copyright notice and this permission notice shall be included
daniel_gs_jeong 0:2726f8e71192 12 * in all copies or substantial portions of the Software.
daniel_gs_jeong 0:2726f8e71192 13 *
daniel_gs_jeong 0:2726f8e71192 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
daniel_gs_jeong 0:2726f8e71192 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
daniel_gs_jeong 0:2726f8e71192 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
daniel_gs_jeong 0:2726f8e71192 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
daniel_gs_jeong 0:2726f8e71192 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
daniel_gs_jeong 0:2726f8e71192 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
daniel_gs_jeong 0:2726f8e71192 20 * OTHER DEALINGS IN THE SOFTWARE.
daniel_gs_jeong 0:2726f8e71192 21 *
daniel_gs_jeong 0:2726f8e71192 22 * Except as contained in this notice, the name of Maxim Integrated
daniel_gs_jeong 0:2726f8e71192 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
daniel_gs_jeong 0:2726f8e71192 24 * Products, Inc. Branding Policy.
daniel_gs_jeong 0:2726f8e71192 25 *
daniel_gs_jeong 0:2726f8e71192 26 * The mere transfer of this software does not imply any licenses
daniel_gs_jeong 0:2726f8e71192 27 * of trade secrets, proprietary technology, copyrights, patents,
daniel_gs_jeong 0:2726f8e71192 28 * trademarks, maskwork rights, or any other form of intellectual
daniel_gs_jeong 0:2726f8e71192 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
daniel_gs_jeong 0:2726f8e71192 30 * ownership rights.
daniel_gs_jeong 0:2726f8e71192 31 *******************************************************************************
daniel_gs_jeong 0:2726f8e71192 32 */
daniel_gs_jeong 0:2726f8e71192 33 #include "max77734.h"
daniel_gs_jeong 0:2726f8e71192 34
daniel_gs_jeong 0:2726f8e71192 35 /***** Definitions *****/
daniel_gs_jeong 0:2726f8e71192 36 #define I2C_ADDR (0x48<<1)
daniel_gs_jeong 0:2726f8e71192 37
daniel_gs_jeong 0:2726f8e71192 38 //******************************************************************************
daniel_gs_jeong 0:2726f8e71192 39 MAX77734::MAX77734(PinName sda, PinName scl)
daniel_gs_jeong 0:2726f8e71192 40 {
daniel_gs_jeong 0:2726f8e71192 41 i2c_ = new I2C(sda, scl);
daniel_gs_jeong 0:2726f8e71192 42 i2c_owner = true;
daniel_gs_jeong 0:2726f8e71192 43
daniel_gs_jeong 0:2726f8e71192 44 i2c_->frequency(400000);
daniel_gs_jeong 0:2726f8e71192 45 }
daniel_gs_jeong 0:2726f8e71192 46
daniel_gs_jeong 0:2726f8e71192 47 //******************************************************************************
daniel_gs_jeong 0:2726f8e71192 48 MAX77734::MAX77734(I2C *i2c) :
daniel_gs_jeong 0:2726f8e71192 49 i2c_(i2c)
daniel_gs_jeong 0:2726f8e71192 50 {
daniel_gs_jeong 0:2726f8e71192 51 i2c_owner = false;
daniel_gs_jeong 0:2726f8e71192 52 }
daniel_gs_jeong 0:2726f8e71192 53
daniel_gs_jeong 0:2726f8e71192 54 //******************************************************************************
daniel_gs_jeong 0:2726f8e71192 55 MAX77734::~MAX77734()
daniel_gs_jeong 0:2726f8e71192 56 {
daniel_gs_jeong 0:2726f8e71192 57 if(i2c_owner) {
daniel_gs_jeong 0:2726f8e71192 58 delete i2c_;
daniel_gs_jeong 0:2726f8e71192 59 }
daniel_gs_jeong 0:2726f8e71192 60 }
daniel_gs_jeong 0:2726f8e71192 61
daniel_gs_jeong 0:2726f8e71192 62 //******************************************************************************
daniel_gs_jeong 0:2726f8e71192 63 int32_t MAX77734::init()
daniel_gs_jeong 0:2726f8e71192 64 {
daniel_gs_jeong 0:2726f8e71192 65 // Clear Mask
daniel_gs_jeong 0:2726f8e71192 66 interrupt_isr();
daniel_gs_jeong 0:2726f8e71192 67
daniel_gs_jeong 0:2726f8e71192 68 // set INTM_GLBL: masked all interrupt(Chip Reset Value)
daniel_gs_jeong 0:2726f8e71192 69 i2c_update_byte(REG_INTM_GLBL, 0x7c, 0x7c);
daniel_gs_jeong 0:2726f8e71192 70
daniel_gs_jeong 0:2726f8e71192 71 // set INTM_CHG: masked all interrupt(Chip Reset Value)
daniel_gs_jeong 0:2726f8e71192 72 i2c_update_byte(REG_INTM_CHG, 0x7f, 0x7f);
daniel_gs_jeong 0:2726f8e71192 73
daniel_gs_jeong 0:2726f8e71192 74 return 0;
daniel_gs_jeong 0:2726f8e71192 75 }
daniel_gs_jeong 0:2726f8e71192 76
daniel_gs_jeong 0:2726f8e71192 77 //******************************************************************************
daniel_gs_jeong 0:2726f8e71192 78 int32_t MAX77734::i2c_write_byte(MAX77734::REG_TYPE reg_addr, char reg_data)
daniel_gs_jeong 0:2726f8e71192 79 {
daniel_gs_jeong 0:2726f8e71192 80 char data[2];
daniel_gs_jeong 0:2726f8e71192 81
daniel_gs_jeong 0:2726f8e71192 82 data[0] = reg_addr;
daniel_gs_jeong 0:2726f8e71192 83 data[1] = reg_data;
daniel_gs_jeong 0:2726f8e71192 84 if (i2c_->write(I2C_ADDR, data, 2) != 0) {
daniel_gs_jeong 0:2726f8e71192 85 return -1;
daniel_gs_jeong 0:2726f8e71192 86 }
daniel_gs_jeong 0:2726f8e71192 87
daniel_gs_jeong 0:2726f8e71192 88 return 0;
daniel_gs_jeong 0:2726f8e71192 89 }
daniel_gs_jeong 0:2726f8e71192 90
daniel_gs_jeong 0:2726f8e71192 91 //*****************************************************************************
daniel_gs_jeong 0:2726f8e71192 92 int32_t MAX77734::i2c_write_bytes(MAX77734::REG_TYPE startReg,
daniel_gs_jeong 0:2726f8e71192 93 MAX77734::REG_TYPE stopReg,
daniel_gs_jeong 0:2726f8e71192 94 const uint8_t *data)
daniel_gs_jeong 0:2726f8e71192 95 {
daniel_gs_jeong 0:2726f8e71192 96 int32_t numBytes = ((stopReg - startReg) + 1);
daniel_gs_jeong 0:2726f8e71192 97 char packet[numBytes + 1];
daniel_gs_jeong 0:2726f8e71192 98
daniel_gs_jeong 0:2726f8e71192 99 packet[0] = static_cast<char>(startReg);
daniel_gs_jeong 0:2726f8e71192 100 memcpy(packet + 1, data, numBytes);
daniel_gs_jeong 0:2726f8e71192 101
daniel_gs_jeong 0:2726f8e71192 102 return i2c_->write(I2C_ADDR, packet, sizeof(packet));
daniel_gs_jeong 0:2726f8e71192 103 }
daniel_gs_jeong 0:2726f8e71192 104
daniel_gs_jeong 0:2726f8e71192 105 //******************************************************************************
daniel_gs_jeong 0:2726f8e71192 106 int32_t MAX77734::i2c_read_byte(MAX77734::REG_TYPE reg_addr)
daniel_gs_jeong 0:2726f8e71192 107 {
daniel_gs_jeong 0:2726f8e71192 108 char data;
daniel_gs_jeong 0:2726f8e71192 109
daniel_gs_jeong 0:2726f8e71192 110 data = reg_addr;
daniel_gs_jeong 0:2726f8e71192 111 if (i2c_->write(I2C_ADDR, &data, 1, true) != 0) {
daniel_gs_jeong 0:2726f8e71192 112 return -1;
daniel_gs_jeong 0:2726f8e71192 113 }
daniel_gs_jeong 0:2726f8e71192 114
daniel_gs_jeong 0:2726f8e71192 115 if (i2c_->read(I2C_ADDR | 0x01, &data, 1) != 0) {
daniel_gs_jeong 0:2726f8e71192 116 return -1;
daniel_gs_jeong 0:2726f8e71192 117 }
daniel_gs_jeong 0:2726f8e71192 118
daniel_gs_jeong 0:2726f8e71192 119 return (0x0 + data);
daniel_gs_jeong 0:2726f8e71192 120 }
daniel_gs_jeong 0:2726f8e71192 121
daniel_gs_jeong 0:2726f8e71192 122 //*****************************************************************************
daniel_gs_jeong 0:2726f8e71192 123 int32_t MAX77734::i2c_read_bytes(MAX77734::REG_TYPE startReg,
daniel_gs_jeong 0:2726f8e71192 124 MAX77734::REG_TYPE stopReg,
daniel_gs_jeong 0:2726f8e71192 125 uint8_t *data)
daniel_gs_jeong 0:2726f8e71192 126 {
daniel_gs_jeong 0:2726f8e71192 127 int32_t rtnVal = -1;
daniel_gs_jeong 0:2726f8e71192 128 int32_t numBytes = ((stopReg - startReg) + 1);
daniel_gs_jeong 0:2726f8e71192 129 char packet[] = {static_cast<char>(startReg)};
daniel_gs_jeong 0:2726f8e71192 130
daniel_gs_jeong 0:2726f8e71192 131 if(i2c_->write(I2C_ADDR, packet, 1) == 0)
daniel_gs_jeong 0:2726f8e71192 132 {
daniel_gs_jeong 0:2726f8e71192 133 rtnVal = i2c_->read(I2C_ADDR | 0x01,
daniel_gs_jeong 0:2726f8e71192 134 reinterpret_cast<char *>(data), numBytes);
daniel_gs_jeong 0:2726f8e71192 135 }
daniel_gs_jeong 0:2726f8e71192 136
daniel_gs_jeong 0:2726f8e71192 137 return rtnVal;
daniel_gs_jeong 0:2726f8e71192 138 }
daniel_gs_jeong 0:2726f8e71192 139
daniel_gs_jeong 0:2726f8e71192 140 //******************************************************************************
daniel_gs_jeong 0:2726f8e71192 141 int32_t MAX77734::i2c_update_byte(MAX77734::REG_TYPE reg_addr,
daniel_gs_jeong 0:2726f8e71192 142 char set_data, char mask)
daniel_gs_jeong 0:2726f8e71192 143 {
daniel_gs_jeong 0:2726f8e71192 144 int32_t rData;
daniel_gs_jeong 0:2726f8e71192 145
daniel_gs_jeong 0:2726f8e71192 146 rData = i2c_read_byte(reg_addr);
daniel_gs_jeong 0:2726f8e71192 147 if(rData < 0)
daniel_gs_jeong 0:2726f8e71192 148 return rData;
daniel_gs_jeong 0:2726f8e71192 149
daniel_gs_jeong 0:2726f8e71192 150 rData &= ~mask;
daniel_gs_jeong 0:2726f8e71192 151 rData = (set_data & mask);
daniel_gs_jeong 0:2726f8e71192 152
daniel_gs_jeong 0:2726f8e71192 153 rData = i2c_write_byte(reg_addr, rData);
daniel_gs_jeong 0:2726f8e71192 154 if(rData < 0)
daniel_gs_jeong 0:2726f8e71192 155 return rData;
daniel_gs_jeong 0:2726f8e71192 156
daniel_gs_jeong 0:2726f8e71192 157 return 0;
daniel_gs_jeong 0:2726f8e71192 158 }
daniel_gs_jeong 0:2726f8e71192 159
daniel_gs_jeong 0:2726f8e71192 160 //*****************************************************************************
daniel_gs_jeong 0:2726f8e71192 161 int32_t MAX77734::read_register(MAX77734::REG_TYPE reg_addr)
daniel_gs_jeong 0:2726f8e71192 162 {
daniel_gs_jeong 0:2726f8e71192 163 int32_t rData, mask;
daniel_gs_jeong 0:2726f8e71192 164
daniel_gs_jeong 0:2726f8e71192 165 rData = i2c_read_byte(reg_addr);
daniel_gs_jeong 0:2726f8e71192 166 if(rData < 0)
daniel_gs_jeong 0:2726f8e71192 167 return rData;
daniel_gs_jeong 0:2726f8e71192 168
daniel_gs_jeong 0:2726f8e71192 169 switch(reg_addr) {
daniel_gs_jeong 0:2726f8e71192 170 case REG_INT_GLBL: mask = 0x7F; break;
daniel_gs_jeong 0:2726f8e71192 171 case REG_INT_CHG: mask = 0x7F; break;
daniel_gs_jeong 0:2726f8e71192 172 case REG_STAT_CHG_A: mask = 0x7F; break;
daniel_gs_jeong 0:2726f8e71192 173 case REG_INTM_GLBL: mask = 0x7C; break;
daniel_gs_jeong 0:2726f8e71192 174 case REG_INTM_CHG: mask = 0x7F; break;
daniel_gs_jeong 0:2726f8e71192 175 case REG_CID: mask = 0x0F; break;
daniel_gs_jeong 0:2726f8e71192 176 case REG_CNFG_WDT: mask = 0x3F; break;
daniel_gs_jeong 0:2726f8e71192 177 case REG_CNFG_CHG_F: mask = 0xFE; break;
daniel_gs_jeong 0:2726f8e71192 178 case REG_CNFG_CHG_G: mask = 0xFE; break;
daniel_gs_jeong 0:2726f8e71192 179 case REG_CNFG_CHG_H: mask = 0xFC; break;
daniel_gs_jeong 0:2726f8e71192 180 case REG_CNFG_LDO_B: mask = 0x0F; break;
daniel_gs_jeong 0:2726f8e71192 181 case REG_CNFG_SNK_TOP: mask = 0x03; break;
daniel_gs_jeong 0:2726f8e71192 182 default: mask = 0xFF; break;
daniel_gs_jeong 0:2726f8e71192 183 }
daniel_gs_jeong 0:2726f8e71192 184
daniel_gs_jeong 0:2726f8e71192 185 return (rData & mask);
daniel_gs_jeong 0:2726f8e71192 186 }
daniel_gs_jeong 0:2726f8e71192 187
daniel_gs_jeong 0:2726f8e71192 188 //*****************************************************************************
daniel_gs_jeong 0:2726f8e71192 189 int32_t MAX77734::interrupt_isr()
daniel_gs_jeong 0:2726f8e71192 190 {
daniel_gs_jeong 0:2726f8e71192 191 int32_t rData[2];
daniel_gs_jeong 0:2726f8e71192 192
daniel_gs_jeong 0:2726f8e71192 193 rData[0] = i2c_read_byte(REG_INT_GLBL) & 0xff;
daniel_gs_jeong 0:2726f8e71192 194 if(rData[0] < 0)
daniel_gs_jeong 0:2726f8e71192 195 return rData[0];
daniel_gs_jeong 0:2726f8e71192 196
daniel_gs_jeong 0:2726f8e71192 197 rData[1] = i2c_read_byte(REG_INT_CHG) & 0xff;
daniel_gs_jeong 0:2726f8e71192 198 if(rData[1] < 1)
daniel_gs_jeong 0:2726f8e71192 199 return rData[1];
daniel_gs_jeong 0:2726f8e71192 200
daniel_gs_jeong 0:2726f8e71192 201 return ((rData[1] &0xff) << 8 ) | (rData[0] &0xff);
daniel_gs_jeong 0:2726f8e71192 202 }
daniel_gs_jeong 0:2726f8e71192 203
daniel_gs_jeong 0:2726f8e71192 204 //*****************************************************************************
daniel_gs_jeong 0:2726f8e71192 205 int32_t MAX77734::set_i_fastchg_uA(int32_t current)
daniel_gs_jeong 0:2726f8e71192 206 {
daniel_gs_jeong 0:2726f8e71192 207 int32_t rData;
daniel_gs_jeong 0:2726f8e71192 208 int32_t code = (current - 7500) / 7500;
daniel_gs_jeong 0:2726f8e71192 209
daniel_gs_jeong 0:2726f8e71192 210 if( current > 300000)
daniel_gs_jeong 0:2726f8e71192 211 code = 0x3f;
daniel_gs_jeong 0:2726f8e71192 212
daniel_gs_jeong 0:2726f8e71192 213 rData = i2c_update_byte(REG_CNFG_CHG_E, code <<2, 0xFC);
daniel_gs_jeong 0:2726f8e71192 214 if(rData < 0)
daniel_gs_jeong 0:2726f8e71192 215 return rData;
daniel_gs_jeong 0:2726f8e71192 216
daniel_gs_jeong 0:2726f8e71192 217 return 0;
daniel_gs_jeong 0:2726f8e71192 218 }
daniel_gs_jeong 0:2726f8e71192 219
daniel_gs_jeong 0:2726f8e71192 220 //*****************************************************************************
daniel_gs_jeong 0:2726f8e71192 221 int32_t MAX77734::set_time_fastchg_hour(int32_t hour)
daniel_gs_jeong 0:2726f8e71192 222 {
daniel_gs_jeong 0:2726f8e71192 223 int32_t rData, code;
daniel_gs_jeong 0:2726f8e71192 224
daniel_gs_jeong 0:2726f8e71192 225 switch(hour) {
daniel_gs_jeong 0:2726f8e71192 226 case 0: code = 0x0; break; //Timer Disabled
daniel_gs_jeong 0:2726f8e71192 227 case 1 ... 3: code = 0x1; break; // 3hours
daniel_gs_jeong 0:2726f8e71192 228 case 4 ... 5: code = 0x2; break; //5 hours
daniel_gs_jeong 0:2726f8e71192 229 default: code = 0x3; break; //7 hours
daniel_gs_jeong 0:2726f8e71192 230 };
daniel_gs_jeong 0:2726f8e71192 231
daniel_gs_jeong 0:2726f8e71192 232 rData = i2c_update_byte(REG_CNFG_CHG_E, code, 0x03);
daniel_gs_jeong 0:2726f8e71192 233 if(rData < 0)
daniel_gs_jeong 0:2726f8e71192 234 return rData;
daniel_gs_jeong 0:2726f8e71192 235
daniel_gs_jeong 0:2726f8e71192 236 return 0;
daniel_gs_jeong 0:2726f8e71192 237 }
daniel_gs_jeong 0:2726f8e71192 238
daniel_gs_jeong 0:2726f8e71192 239 //*****************************************************************************
daniel_gs_jeong 0:2726f8e71192 240 int32_t MAX77734::set_v_fastchg_mA(int32_t voltage)
daniel_gs_jeong 0:2726f8e71192 241 {
daniel_gs_jeong 0:2726f8e71192 242 int32_t rData;
daniel_gs_jeong 0:2726f8e71192 243 int32_t code = (voltage - 3600) / 25;
daniel_gs_jeong 0:2726f8e71192 244
daniel_gs_jeong 0:2726f8e71192 245 if( voltage > 4600)
daniel_gs_jeong 0:2726f8e71192 246 code = 0x3f;
daniel_gs_jeong 0:2726f8e71192 247
daniel_gs_jeong 0:2726f8e71192 248 rData = i2c_update_byte(REG_CNFG_CHG_G, code <<2, 0xFC);
daniel_gs_jeong 0:2726f8e71192 249 if(rData < 0)
daniel_gs_jeong 0:2726f8e71192 250 return rData;
daniel_gs_jeong 0:2726f8e71192 251
daniel_gs_jeong 0:2726f8e71192 252 return 0;
daniel_gs_jeong 0:2726f8e71192 253 }
daniel_gs_jeong 0:2726f8e71192 254
daniel_gs_jeong 0:2726f8e71192 255 //*****************************************************************************
daniel_gs_jeong 0:2726f8e71192 256 int32_t MAX77734::set_i_term_percent(MAX77734::I_TERM_TYPE percent)
daniel_gs_jeong 0:2726f8e71192 257 {
daniel_gs_jeong 0:2726f8e71192 258 int32_t rData;
daniel_gs_jeong 0:2726f8e71192 259
daniel_gs_jeong 0:2726f8e71192 260 rData = i2c_update_byte(REG_CNFG_CHG_C, percent <<3, 0x18);
daniel_gs_jeong 0:2726f8e71192 261 if(rData < 0)
daniel_gs_jeong 0:2726f8e71192 262 return rData;
daniel_gs_jeong 0:2726f8e71192 263
daniel_gs_jeong 0:2726f8e71192 264 return 0;
daniel_gs_jeong 0:2726f8e71192 265 }
daniel_gs_jeong 0:2726f8e71192 266
daniel_gs_jeong 0:2726f8e71192 267 //*****************************************************************************
daniel_gs_jeong 0:2726f8e71192 268 int32_t MAX77734::set_time_topoff_min(int32_t minute)
daniel_gs_jeong 0:2726f8e71192 269 {
daniel_gs_jeong 0:2726f8e71192 270 int32_t rData, code;
daniel_gs_jeong 0:2726f8e71192 271
daniel_gs_jeong 0:2726f8e71192 272 switch(minute) {
daniel_gs_jeong 0:2726f8e71192 273 case 0: code = 0x0; break;
daniel_gs_jeong 0:2726f8e71192 274 case 1 ... 5: code = 0x1; break;
daniel_gs_jeong 0:2726f8e71192 275 case 6 ... 10: code = 0x2; break;
daniel_gs_jeong 0:2726f8e71192 276 case 11 ... 15: code = 0x3; break;
daniel_gs_jeong 0:2726f8e71192 277 case 16 ... 20: code = 0x4; break;
daniel_gs_jeong 0:2726f8e71192 278 case 21 ... 25: code = 0x5; break;
daniel_gs_jeong 0:2726f8e71192 279 case 26 ... 30: code = 0x6; break;
daniel_gs_jeong 0:2726f8e71192 280 default: code = 0x7; break;
daniel_gs_jeong 0:2726f8e71192 281 };
daniel_gs_jeong 0:2726f8e71192 282
daniel_gs_jeong 0:2726f8e71192 283 rData = i2c_update_byte(REG_CNFG_CHG_C, code, 0x07);
daniel_gs_jeong 0:2726f8e71192 284 if(rData < 0)
daniel_gs_jeong 0:2726f8e71192 285 return rData;
daniel_gs_jeong 0:2726f8e71192 286
daniel_gs_jeong 0:2726f8e71192 287 return 0;
daniel_gs_jeong 0:2726f8e71192 288 }
daniel_gs_jeong 0:2726f8e71192 289
daniel_gs_jeong 0:2726f8e71192 290 //*****************************************************************************
daniel_gs_jeong 0:2726f8e71192 291 int32_t MAX77734::set_charger_enable(MAX77734::ENABLE_TYPE control)
daniel_gs_jeong 0:2726f8e71192 292 {
daniel_gs_jeong 0:2726f8e71192 293 int32_t rData, code = 0;
daniel_gs_jeong 0:2726f8e71192 294
daniel_gs_jeong 0:2726f8e71192 295 if(control == VAL_ENABLE)
daniel_gs_jeong 0:2726f8e71192 296 code = 0x01;
daniel_gs_jeong 0:2726f8e71192 297
daniel_gs_jeong 0:2726f8e71192 298 rData = i2c_update_byte(REG_CNFG_CHG_B, code, 0x01);
daniel_gs_jeong 0:2726f8e71192 299 if(rData < 0)
daniel_gs_jeong 0:2726f8e71192 300 return rData;
daniel_gs_jeong 0:2726f8e71192 301
daniel_gs_jeong 0:2726f8e71192 302 return 0;
daniel_gs_jeong 0:2726f8e71192 303 }
daniel_gs_jeong 0:2726f8e71192 304
daniel_gs_jeong 0:2726f8e71192 305 //*****************************************************************************
daniel_gs_jeong 0:2726f8e71192 306 int32_t MAX77734::set_ldo_enable(MAX77734::ENABLE_TYPE control)
daniel_gs_jeong 0:2726f8e71192 307 {
daniel_gs_jeong 0:2726f8e71192 308 int32_t rData, code;
daniel_gs_jeong 0:2726f8e71192 309
daniel_gs_jeong 0:2726f8e71192 310 switch(control) {
daniel_gs_jeong 0:2726f8e71192 311 case VAL_ENABLE: code = 0x01; break;
daniel_gs_jeong 0:2726f8e71192 312 case VAL_ENABLE_OPTION1: code = 0x02; break;
daniel_gs_jeong 0:2726f8e71192 313 default: code = 0x00; break;
daniel_gs_jeong 0:2726f8e71192 314 };
daniel_gs_jeong 0:2726f8e71192 315
daniel_gs_jeong 0:2726f8e71192 316 rData = i2c_update_byte(REG_CNFG_LDO_B, code, 0x03);
daniel_gs_jeong 0:2726f8e71192 317 if(rData < 0)
daniel_gs_jeong 0:2726f8e71192 318 return rData;
daniel_gs_jeong 0:2726f8e71192 319
daniel_gs_jeong 0:2726f8e71192 320 return 0;
daniel_gs_jeong 0:2726f8e71192 321 }
daniel_gs_jeong 0:2726f8e71192 322
daniel_gs_jeong 0:2726f8e71192 323 //*****************************************************************************
daniel_gs_jeong 0:2726f8e71192 324 int32_t MAX77734::set_ldo_pwr_mode(MAX77734::POWER_MODE_TYPE mode)
daniel_gs_jeong 0:2726f8e71192 325 {
daniel_gs_jeong 0:2726f8e71192 326 int32_t rData, code;
daniel_gs_jeong 0:2726f8e71192 327
daniel_gs_jeong 0:2726f8e71192 328 switch(mode) {
daniel_gs_jeong 0:2726f8e71192 329 case LDO_LOW_PWR_MODE: code = 0x00; break;
daniel_gs_jeong 0:2726f8e71192 330 case LDO_NORMAL_PWR_MODE: code = 0x01; break;
daniel_gs_jeong 0:2726f8e71192 331 case LDO_PIN_ACT_HIGH: code = 0x02; break;
daniel_gs_jeong 0:2726f8e71192 332 case LDO_PIN_ACT_LOW: code = 0x03; break;
daniel_gs_jeong 0:2726f8e71192 333 default: return -1;
daniel_gs_jeong 0:2726f8e71192 334 };
daniel_gs_jeong 0:2726f8e71192 335
daniel_gs_jeong 0:2726f8e71192 336 rData = i2c_update_byte(REG_CNFG_LDO_B, code << 2, 0x0C);
daniel_gs_jeong 0:2726f8e71192 337 if(rData < 0)
daniel_gs_jeong 0:2726f8e71192 338 return rData;
daniel_gs_jeong 0:2726f8e71192 339
daniel_gs_jeong 0:2726f8e71192 340 return 0;
daniel_gs_jeong 0:2726f8e71192 341 }
daniel_gs_jeong 0:2726f8e71192 342
daniel_gs_jeong 0:2726f8e71192 343 //*****************************************************************************
daniel_gs_jeong 0:2726f8e71192 344 int32_t MAX77734::set_ldo_voltage_mV(int32_t voltage)
daniel_gs_jeong 0:2726f8e71192 345 {
daniel_gs_jeong 0:2726f8e71192 346 int32_t rData;
daniel_gs_jeong 0:2726f8e71192 347 int32_t code = (voltage - 800) / 25;
daniel_gs_jeong 0:2726f8e71192 348
daniel_gs_jeong 0:2726f8e71192 349 rData = i2c_update_byte(REG_CNFG_LDO_A, code, 0x7F);
daniel_gs_jeong 0:2726f8e71192 350 if(rData < 0)
daniel_gs_jeong 0:2726f8e71192 351 return rData;
daniel_gs_jeong 0:2726f8e71192 352
daniel_gs_jeong 0:2726f8e71192 353 return 0;
daniel_gs_jeong 0:2726f8e71192 354 }