Maxim Integrated
MAX77658 Ultra-Low Power PMIC Mbed Driver
MAX77658_regs.h@2:70a11f46a913, 21 months ago (annotated)
- Committer:
- Okan Sahin
- Date:
- Fri Aug 26 15:03:09 2022 +0300
- Revision:
- 2:70a11f46a913
- Parent:
- 0:00d2a8670533
fix interrupt_handler_list
use number of interrupts as a size of array.
initialize with NULL.
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| metin.ozkan@analog.com | 0:00d2a8670533 | 1 | /******************************************************************************* |
| metin.ozkan@analog.com | 0:00d2a8670533 | 2 | * Copyright(C) Analog Devices Inc., All Rights Reserved. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 3 | * |
| metin.ozkan@analog.com | 0:00d2a8670533 | 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
| metin.ozkan@analog.com | 0:00d2a8670533 | 5 | * copy of this software and associated documentation files(the "Software"), |
| metin.ozkan@analog.com | 0:00d2a8670533 | 6 | * to deal in the Software without restriction, including without limitation |
| metin.ozkan@analog.com | 0:00d2a8670533 | 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| metin.ozkan@analog.com | 0:00d2a8670533 | 8 | * and/or sell copies of the Software, and to permit persons to whom the |
| metin.ozkan@analog.com | 0:00d2a8670533 | 9 | * Software is furnished to do so, subject to the following conditions: |
| metin.ozkan@analog.com | 0:00d2a8670533 | 10 | * |
| metin.ozkan@analog.com | 0:00d2a8670533 | 11 | * The above copyright notice and this permission notice shall be included |
| metin.ozkan@analog.com | 0:00d2a8670533 | 12 | * in all copies or substantial portions of the Software. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 13 | * |
| metin.ozkan@analog.com | 0:00d2a8670533 | 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS |
| metin.ozkan@analog.com | 0:00d2a8670533 | 15 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| metin.ozkan@analog.com | 0:00d2a8670533 | 16 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 17 | * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES |
| metin.ozkan@analog.com | 0:00d2a8670533 | 18 | * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
| metin.ozkan@analog.com | 0:00d2a8670533 | 19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
| metin.ozkan@analog.com | 0:00d2a8670533 | 20 | * OTHER DEALINGS IN THE SOFTWARE. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 21 | * |
| metin.ozkan@analog.com | 0:00d2a8670533 | 22 | * Except as contained in this notice, the name of Analog Devices Inc. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 23 | * shall not be used except as stated in the Analog Devices Inc. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 24 | * Branding Policy. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 25 | * |
| metin.ozkan@analog.com | 0:00d2a8670533 | 26 | * The mere transfer of this software does not imply any licenses |
| metin.ozkan@analog.com | 0:00d2a8670533 | 27 | * of trade secrets, proprietary technology, copyrights, patents, |
| metin.ozkan@analog.com | 0:00d2a8670533 | 28 | * trademarks, maskwork rights, or any other form of intellectual |
| metin.ozkan@analog.com | 0:00d2a8670533 | 29 | * property whatsoever. Analog Devices Inc.retains all ownership rights. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 30 | ******************************************************************************* |
| metin.ozkan@analog.com | 0:00d2a8670533 | 31 | */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 32 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 33 | #ifndef MAX77658_REGS_H_ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 34 | #define MAX77658_REGS_H_ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 35 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 36 | /** |
| metin.ozkan@analog.com | 0:00d2a8670533 | 37 | * @brief INT_GLBL0 Register |
| metin.ozkan@analog.com | 0:00d2a8670533 | 38 | * |
| metin.ozkan@analog.com | 0:00d2a8670533 | 39 | * Address : 0x00 |
| metin.ozkan@analog.com | 0:00d2a8670533 | 40 | */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 41 | typedef union { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 42 | unsigned char raw; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 43 | struct { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 44 | unsigned char gpi0_f : 1; /**< GPI Falling Interrupt. Bit 0. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 45 | Note that "GPI" refers to the GPIO programmed to be an input. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 46 | 0 = No GPI falling edges have occurred since the last time this bit was read. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 47 | 1 = A GPI falling edge has occurred since the last time this bit was read. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 48 | unsigned char gpi0_r : 1; /**< GPI Rising Interrupt. Bit 1. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 49 | Note that "GPI" refers to the GPIO programmed to be an input. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 50 | 0 = No GPI rising edges have occurred since the last time this bit was read. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 51 | 1 = A GPI rising edge has occurred since the last time this bit was read. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 52 | unsigned char nen_f : 1; /**< nEN Falling Interrupt.Bit 2. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 53 | 0 = No nEN falling edges have occurred since the last time this bit was read. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 54 | 1 = A nEN falling edge as occurred since the last time this bit was read. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 55 | unsigned char nen_r : 1; /**< nEN Rising Interrupt. Bit 3. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 56 | 0 = No nEN rising edges have occurred since the last time this bit was read. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 57 | 1 = A nEN rising edge as occurred since the last time this bit was read. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 58 | unsigned char tjal1_r : 1; /**< Thermal Alarm 1 Rising Interrupt. Bit 4. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 59 | 0 = The junction temperature has not risen above TJAL1 since the last time this bit was read. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 60 | 1 = The junction temperature has risen above TJAL1 since the last time this bit was read. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 61 | unsigned char tjal2_r : 1; /**< Thermal Alarm 2 Rising Interrupt. Bit 5. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 62 | 0 = The junction temperature has not risen above TJAL2 since the last time this bit was read. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 63 | 1 = The junction temperature has risen above TJAL2 since the last time this bit was read. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 64 | unsigned char d0d1_r : 1; /**< LDO Dropout Detector Rising Interrupt. Bit 6. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 65 | 0 = The LDO has not detected dropout since the last time this bit was read. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 66 | 1 = The LDO has detected dropout since the last time this bit was read. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 67 | unsigned char dod0_r : 1; /**< LDO Dropout Detector Rising Interrupt. Bit 7. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 68 | 0 = The LDO has not detected dropout since the last time this bit was read. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 69 | 1 = The LDO has detected dropout since the last time this bit was read. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 70 | } bits; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 71 | } reg_int_glbl0_t; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 72 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 73 | /** |
| metin.ozkan@analog.com | 0:00d2a8670533 | 74 | * @brief INT_GLBL1 Register |
| metin.ozkan@analog.com | 0:00d2a8670533 | 75 | * |
| metin.ozkan@analog.com | 0:00d2a8670533 | 76 | * Address : 0x04 |
| metin.ozkan@analog.com | 0:00d2a8670533 | 77 | */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 78 | typedef union { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 79 | unsigned char raw; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 80 | struct { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 81 | unsigned char gpi1_f : 1; /**< GPI Falling Interrupt. Bit 0. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 82 | Note that "GPI" refers to the GPIO programmed to be an input. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 83 | 0 = No GPI falling edges have occurred since the last time this bit was read. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 84 | 1 = A GPI falling edge has occurred since the last time this bit was read. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 85 | unsigned char gpi1_r : 1; /**< GPI Rising Interrupt. Bit 1. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 86 | Note that "GPI" refers to the GPIO programmed to be an input. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 87 | 0 = No GPI rising edges have occurred since the last time this bit was read. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 88 | 1 = A GPI rising edge has occurred since the last time this bit was read. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 89 | unsigned char sbb0_f : 1; /**< SBB0 Fault Indicator. Bit 2. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 90 | 0 = No fault has occurred on SBB0 since the last time this bit was read. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 91 | 1 = SBB0 has fallen out of regulation since the last time this bit was read. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 92 | unsigned char sbb1_f : 1; /**< SBB1 Fault Indicator. Bit 3. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 93 | 0 = No fault has occurred on SBB1 since the last time this bit was read. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 94 | 1 = SBB1 has fallen out of regulation since the last time this bit was read. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 95 | unsigned char sbb2_f : 1; /**< SBB2 Fault Indicator. Bit 4. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 96 | 0 = No fault has occurred on SBB2 since the last time this bit was read. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 97 | 1 = SBB2 has fallen out of regulation since the last time this bit was read. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 98 | unsigned char ldo0_f : 1; /**< LDO0 Fault Interrupt. Bit 5. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 99 | 0 = No fault has occurred on LDO0 since the last time this bit was read. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 100 | 1 = LDO0 has fallen out of regulation since the last time this bit was read. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 101 | unsigned char ldo1_f : 1; /**< LDO1 Fault Interrupt. Bit 6. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 102 | 0 = No fault has occurred on LDO1 since the last time this bit was read. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 103 | 1 = LDO1 has fallen out of regulation since the last time this bit was read. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 104 | unsigned char rsvd : 1; /**< Reserved. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 105 | Unutilized bit. Write to 0. Reads are don't care. Bit 7. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 106 | } bits; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 107 | } reg_int_glbl1_t; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 108 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 109 | /** |
| metin.ozkan@analog.com | 0:00d2a8670533 | 110 | * @brief ERCFLAG Register |
| metin.ozkan@analog.com | 0:00d2a8670533 | 111 | * |
| metin.ozkan@analog.com | 0:00d2a8670533 | 112 | * Address : 0x05 |
| metin.ozkan@analog.com | 0:00d2a8670533 | 113 | */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 114 | typedef union { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 115 | unsigned char raw; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 116 | struct { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 117 | unsigned char tovld : 1; /**< Thermal Overload. Bit 0. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 118 | 0 = Thermal overload has not occurred since the last read of this register. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 119 | 1 = Thermal overload has occurred since the list read of this register. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 120 | This indicates that the junction temperature has exceeded 165ºC. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 121 | unsigned char sysovlo : 1; /**< SYS Domain Overvoltage Lockout. Bit 1. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 122 | 0 = The SYS domain overvoltage lockout has not occurred since this last read of this register. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 123 | 1 = The SYS domain overvoltage lockout has occurred since the last read of this register. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 124 | unsigned char sysuvlo : 1; /**< SYS Domain Undervoltage Lockout. Bit 2. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 125 | 0 = The SYS domain undervoltage lockout has not occurred since this last read of this register. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 126 | 1 = The SYS domain undervoltage lockout has occurred since the last read of this register. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 127 | unsigned char mrst_f : 1; /**< Manual Reset Timer. Bit 3. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 128 | 0 = A Manual Reset has not occurred since this last read of this register. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 129 | 1 = A Manual Reset has occurred since this last read of this register. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 130 | unsigned char sft_off_f : 1; /**< Software Off Flag. Bit 4. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 131 | 0 = The SFT_OFF function has not occurred since the last read of this register. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 132 | 1 = The SFT_OFF function has occurred since the last read of this register. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 133 | unsigned char sft_crst_f: 1; /**< Software Cold Reset Flag. Bit 5. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 134 | 0 = The software cold reset has not occurred since the last read of this register. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 135 | 1 = The software cold reset has occurred since the last read of this register. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 136 | unsigned char wdt_off : 1; /**< Watchdog Timer OFF Flag. Bit 6. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 137 | This bit sets when the watchdog timer expires and causes a power-off. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 138 | 0 = Watchdog timer has not caused a power-off since the last time this bit was read. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 139 | 1 = Watchdog timer has expired and caused a power-off since the last time this bit was read. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 140 | unsigned char wdt_rst : 1; /**< Watchdog Timer Reset Flag. Bit 7. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 141 | This bit sets when the watchdog timer expires and causes a power-reset. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 142 | 0 = Watchdog timer has not caused a power-reset since the last time this bit was read. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 143 | 1 = Watchdog timer has expired and caused a power-reset since the last time this bit was read.*/ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 144 | } bits; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 145 | } reg_ercflag_t; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 146 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 147 | /** |
| metin.ozkan@analog.com | 0:00d2a8670533 | 148 | * @brief STAT_GLBL Register |
| metin.ozkan@analog.com | 0:00d2a8670533 | 149 | * |
| metin.ozkan@analog.com | 0:00d2a8670533 | 150 | * Address : 0x06 |
| metin.ozkan@analog.com | 0:00d2a8670533 | 151 | */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 152 | typedef union { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 153 | unsigned char raw; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 154 | struct { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 155 | unsigned char stat_irq : 1; /**< Software Version of the nIRQ MOSFET gate drive. Bit 0. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 156 | 0 = unmasked gate drive is logic low |
| metin.ozkan@analog.com | 0:00d2a8670533 | 157 | 1 = unmasked gate drive is logic high */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 158 | unsigned char stat_en : 1; /**< Debounced Status for the nEN input. Bit 1. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 159 | 0 = nEN is not active (logic high) |
| metin.ozkan@analog.com | 0:00d2a8670533 | 160 | 1 = nEN is active (logic low) */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 161 | unsigned char tjal1_s : 1; /**< Thermal Alarm 1 Status. Bit 2. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 162 | 0 = The junction temperature is less than TJAL1 |
| metin.ozkan@analog.com | 0:00d2a8670533 | 163 | 1 = The junction temperature is greater than TJAL1 */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 164 | unsigned char tjal2_s : 1; /**< Thermal Alarm 2 Status. Bit 3. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 165 | 0 = The junction temperature is less than TJAL2 |
| metin.ozkan@analog.com | 0:00d2a8670533 | 166 | 1 = The junction temperature is greater than TJAL2 */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 167 | unsigned char dod1_s : 1; /**< LDO1 Dropout Detector Rising Status. Bit 4. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 168 | 0 = LDO1 is not in dropout |
| metin.ozkan@analog.com | 0:00d2a8670533 | 169 | 1 = LDO1 is in dropout */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 170 | unsigned char dod0_s : 1; /**< LDO0 Dropout Detector Rising Status. Bit 5. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 171 | 0 = LDO0 is not in dropout |
| metin.ozkan@analog.com | 0:00d2a8670533 | 172 | 1 = LDO0 is in dropout */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 173 | unsigned char bok : 1; /**< BOK Interrupt Status. Bit 6. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 174 | 0 = Main Bias is not ready. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 175 | 1 = Main Bias enabled and ready. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 176 | unsigned char didm : 1; /**< Device Identification Bits for Metal Options. Bit 7. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 177 | 0 = MAX77658 |
| metin.ozkan@analog.com | 0:00d2a8670533 | 178 | 1 = Reserved */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 179 | } bits; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 180 | } reg_stat_glbl_t; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 181 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 182 | /** |
| metin.ozkan@analog.com | 0:00d2a8670533 | 183 | * @brief INTM_GLBL0 Register |
| metin.ozkan@analog.com | 0:00d2a8670533 | 184 | * |
| metin.ozkan@analog.com | 0:00d2a8670533 | 185 | * Address : 0x08 |
| metin.ozkan@analog.com | 0:00d2a8670533 | 186 | */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 187 | typedef union { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 188 | unsigned char raw; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 189 | struct { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 190 | unsigned char gpi0_fm : 1; /**< GPI Falling Interrupt Mask. Bit 0. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 191 | 0 = Unmasked. If GPI_F goes from 0 to 1, then nIRQ goes low. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 192 | nIRQ goes high when all interrupt bits are cleared. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 193 | 1 = Masked. nIRQ does not go low due to GPI_F. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 194 | unsigned char gpi0_rm : 1; /**< GPI Rising Interrupt Mask. Bit 1. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 195 | 0 = Unmasked. If GPI_R goes from 0 to 1, then nIRQ goes low. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 196 | nIRQ goes high when all interrupt bits are cleared. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 197 | 1 = Masked. nIRQ does not go low due to GPI_R. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 198 | unsigned char nen_fm : 1; /**< nEN Falling Interrupt Mask. Bit 2. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 199 | 0 = Unmasked. If nEN_F goes from 0 to 1, then nIRQ goes low. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 200 | nIRQ goes high when all interrupt bits are cleared. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 201 | 1 = Masked. nIRQ does not go low due to nEN_F. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 202 | unsigned char nen_rm : 1; /**< nEN Rising Interrupt Mask. Bit 3. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 203 | 0 = Unmasked. If nEN_R goes from 0 to 1, then nIRQ goes low. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 204 | nIRQ goes high when all interrupt bits are cleared. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 205 | 1 = Masked. nIRQ does not go low due to nEN_R. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 206 | unsigned char tjal1_rm : 1; /**< Thermal Alarm 1 Rising Interrupt Mask. Bit 4. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 207 | 0 = Unmasked. If TJAL1_R goes from 0 to 1, then nIRQ goes low. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 208 | nIRQ goes high when all interrupt bits are cleared. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 209 | 1 = Masked. nIRQ does not go low due to TJAL1_R. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 210 | unsigned char tjal2_rm : 1; /**< Thermal Alarm 2 Rising Interrupt Mask. Bit 5. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 211 | 0 = Unmasked. If TJAL2_R goes from 0 to 1, then nIRQ goes low. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 212 | nIRQ goes high when all interrupt bits are cleared. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 213 | 1 = Masked. nIRQ does not go low due to TJAL2_R. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 214 | unsigned char dod1_rm : 1; /**< LDO Dropout Detector Rising Interrupt Mask. Bit 6. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 215 | 0 = Unmasked. If DOD1_R goes from 0 to 1, then nIRQ goes low. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 216 | nIRQ goes high when all interrupt bits are cleared. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 217 | 1 = Masked. nIRQ does not go low due to DOD1_R. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 218 | unsigned char dod0_rm : 1; /**< LDO Dropout Detector Rising Interrupt Mask. Bit 7. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 219 | 0 = Unmasked. If DOD0_R goes from 0 to 1, then nIRQ goes low. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 220 | nIRQ goes high when all interrupt bits are cleared. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 221 | 1 = Masked. nIRQ does not go low due to DOD0_R. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 222 | } bits; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 223 | } reg_intm_glbl0_t; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 224 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 225 | /** |
| metin.ozkan@analog.com | 0:00d2a8670533 | 226 | * @brief INTM_GLBL1 Register |
| metin.ozkan@analog.com | 0:00d2a8670533 | 227 | * |
| metin.ozkan@analog.com | 0:00d2a8670533 | 228 | * Address : 0x09 |
| metin.ozkan@analog.com | 0:00d2a8670533 | 229 | */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 230 | typedef union { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 231 | unsigned char raw; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 232 | struct { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 233 | unsigned char gpi1_fm : 1; /**< GPI Falling Interrupt Mask. Bit 0. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 234 | 0 = Unmasked. If GPI_F goes from 0 to 1, then nIRQ goes low. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 235 | nIRQ goes high when all interrupt bits are cleared. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 236 | 1 = Masked. nIRQ does not go low due to GPI_F. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 237 | unsigned char gpi1_rm : 1; /**< GPI Rising Interrupt Mask. Bit 1. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 238 | 0 = Unmasked. If GPI_R goes from 0 to 1, then nIRQ goes low. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 239 | nIRQ goes high when all interrupt bits are cleared. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 240 | 1 = Masked. nIRQ does not go low due to GPI_R. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 241 | unsigned char sbb0_fm : 1; /**< SBB0 Fault Interrupt Mask. Bit 2. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 242 | 0 = Unmasked. If SBB0_F goes from 0 to 1, then nIRQ goes low. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 243 | nIRQ goes high when all interrupt bits are cleared.. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 244 | 1 = Masked. nIRQ does not go low due to SBB0_F. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 245 | unsigned char sbb1_fm : 1; /**< SBB1 Fault Interrupt Mask. Bit 3. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 246 | 0 = Unmasked. If SBB1_F goes from 0 to 1, then nIRQ goes low. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 247 | nIRQ goes high when all interrupt bits are cleared.. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 248 | 1 = Masked. nIRQ does not go low due to SBB1_F. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 249 | unsigned char sbb2_fm : 1; /**< SBB2 Fault Interrupt Mask. Bit 4. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 250 | 0 = Unmasked. If SBB2_F goes from 0 to 1, then nIRQ goes low. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 251 | nIRQ goes high when all interrupt bits are cleared.. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 252 | 1 = Masked. nIRQ does not go low due to SBB2_F. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 253 | unsigned char ldo0_m : 1; /**< LDO0 Fault Interrupt. Bit 5. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 254 | 0 = Unmasked. If LDO0_F goes from 0 to 1, then nIRQ goes low. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 255 | nIRQ goes high when all interrupt bits are cleared. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 256 | 1 = Masked. nIRQ does not go low due to LDO0_F. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 257 | unsigned char ldo1_m : 1; /**< LDO1 Fault Interrupt Mask. Bit 6. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 258 | 0 = Unmasked. If LDO1_F goes from 0 to 1, then nIRQ goes low. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 259 | nIRQ goes high when all interrupt bits are cleared. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 260 | 1 = Masked. nIRQ does not go low due to LDO1_F. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 261 | unsigned char rsvd : 1; /**< Reserved. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 262 | Unutilized bit. Write to 0. Reads are don't care. Bit 7. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 263 | } bits; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 264 | } reg_intm_glbl1_t; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 265 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 266 | /** |
| metin.ozkan@analog.com | 0:00d2a8670533 | 267 | * @brief CNFG_GLBL Register |
| metin.ozkan@analog.com | 0:00d2a8670533 | 268 | * |
| metin.ozkan@analog.com | 0:00d2a8670533 | 269 | * Address : 0x10 |
| metin.ozkan@analog.com | 0:00d2a8670533 | 270 | */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 271 | typedef union { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 272 | unsigned char raw; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 273 | struct { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 274 | unsigned char sft_ctrl : 2; /**< Software Reset Functions. Bit 1:0. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 275 | 0b00 = No Action |
| metin.ozkan@analog.com | 0:00d2a8670533 | 276 | 0b01 = Software Cold Reset (SFT_CRST). The device powers down, resets, and the powers up again. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 277 | 0b10 = Software Off (SFT_OFF). The device powers down, resets, and then remains off and waiting for a wake-up event. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 278 | 0b11 = Factory-Ship Mode Enter (FSM). */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 279 | unsigned char dben_nen : 1; /**< Debounce Timer Enable for the nEN Pin. Bit 2. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 280 | 0 = 500μs Debounce |
| metin.ozkan@analog.com | 0:00d2a8670533 | 281 | 1 = 30ms Debounce */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 282 | unsigned char nen_mode : 2; /**< nEN Input (ON-KEY) Default Configuration Mode. Bit 4:3. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 283 | 0b00 = Push-button mode |
| metin.ozkan@analog.com | 0:00d2a8670533 | 284 | 0b01 = Slide-switch mode |
| metin.ozkan@analog.com | 0:00d2a8670533 | 285 | 0b10 = Logic mode |
| metin.ozkan@analog.com | 0:00d2a8670533 | 286 | 0b11 = Reserved */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 287 | unsigned char sbia_lpm : 1; /**< Main Bias Low-Power Mode Software Request. Bit 5. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 288 | 0 = Main Bias requested to be in Normal-Power Mode by software. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 289 | 1 = Main Bias request to be in Low-Power Mode by software. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 290 | unsigned char t_mrst : 1; /**< Sets the Manual Reset Time (tMRST). Bit 6. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 291 | 0 = 8s |
| metin.ozkan@analog.com | 0:00d2a8670533 | 292 | 1 = 4s */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 293 | unsigned char pu_dis : 1; /**< nEN Internal Pullup Resistor. Bit 7. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 294 | 0 = Strong internal nEN pullup (200kΩ) |
| metin.ozkan@analog.com | 0:00d2a8670533 | 295 | 1 = Weak internal nEN pullup (10MΩ) */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 296 | } bits; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 297 | } reg_cnfg_glbl_t; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 298 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 299 | /** |
| metin.ozkan@analog.com | 0:00d2a8670533 | 300 | * @brief CNFG_GPIO0 Register |
| metin.ozkan@analog.com | 0:00d2a8670533 | 301 | * |
| metin.ozkan@analog.com | 0:00d2a8670533 | 302 | * Address : 0x11 |
| metin.ozkan@analog.com | 0:00d2a8670533 | 303 | */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 304 | typedef union { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 305 | unsigned char raw; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 306 | struct { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 307 | unsigned char gpo_dir : 1; /**< GPIO Direction. Bit 0. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 308 | 0 = General purpose output (GPO) |
| metin.ozkan@analog.com | 0:00d2a8670533 | 309 | 1 = General purpose input (GPI) */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 310 | unsigned char gpo_di : 1; /**< GPIO Digital Input Value. Bit 1. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 311 | 0 = Input logic low |
| metin.ozkan@analog.com | 0:00d2a8670533 | 312 | 1 = Input logic high */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 313 | unsigned char gpo_drv : 1; /**< General Purpose Output Driver Type. Bit 2. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 314 | This bit is a don't care when DIR = 1 (configured as input) When set for GPO (DIR = 0): |
| metin.ozkan@analog.com | 0:00d2a8670533 | 315 | 0 = Open-Drain |
| metin.ozkan@analog.com | 0:00d2a8670533 | 316 | 1 = Push-Pull */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 317 | unsigned char gpo_do : 1; /**< General Purpose Output Data Output. Bit 3. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 318 | This bit is a don't care when DIR = 1 (configured as input). When set for GPO (DIR = 0): |
| metin.ozkan@analog.com | 0:00d2a8670533 | 319 | 0 = GPIO is output is logic low |
| metin.ozkan@analog.com | 0:00d2a8670533 | 320 | 1 = GPIO is output logic high when set as push-pull output (DRV = 1). */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 321 | unsigned char dben_gpi : 1; /**< General Purpose Input Debounce Timer Enable. Bit 4. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 322 | 0 = no debounce |
| metin.ozkan@analog.com | 0:00d2a8670533 | 323 | 1 = 30ms debounce */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 324 | unsigned char alt_gpio : 1; /**< Alternate Mode Enable for GPIO0. Bit 5. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 325 | 0 = Standard GPIO. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 326 | 1 = Active-high input, Force USB Suspend (FUS). FUS is only active if the FUS_M bit is set to 0. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 327 | unsigned char : 1; /**< Bit 6. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 328 | unsigned char rsvd : 1; /**< Reserved. Bit 7. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 329 | Unutilized bit. Write to 0. Reads are don't care. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 330 | } bits; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 331 | } reg_cnfg_gpio0_t; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 332 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 333 | /** |
| metin.ozkan@analog.com | 0:00d2a8670533 | 334 | * @brief CNFG_GPIO1 Register |
| metin.ozkan@analog.com | 0:00d2a8670533 | 335 | * |
| metin.ozkan@analog.com | 0:00d2a8670533 | 336 | * Address : 0x12 |
| metin.ozkan@analog.com | 0:00d2a8670533 | 337 | */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 338 | typedef union { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 339 | unsigned char raw; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 340 | struct { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 341 | unsigned char gpo_dir : 1; /**< GPIO Direction. Bit 0. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 342 | 0 = General purpose output (GPO) |
| metin.ozkan@analog.com | 0:00d2a8670533 | 343 | 1 = General purpose input (GPI) */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 344 | unsigned char gpo_di : 1; /**< GPIO Digital Input Value. Bit 1. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 345 | 0 = Input logic low |
| metin.ozkan@analog.com | 0:00d2a8670533 | 346 | 1 = Input logic high */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 347 | unsigned char gpo_drv : 1; /**< General Purpose Output Driver Type. Bit 2. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 348 | This bit is a don't care when DIR = 1 (configured as input) When set for GPO (DIR = 0): |
| metin.ozkan@analog.com | 0:00d2a8670533 | 349 | 0 = Open-Drain |
| metin.ozkan@analog.com | 0:00d2a8670533 | 350 | 1 = Push-Pull */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 351 | unsigned char gpo_do : 1; /**< General Purpose Output Data Output. Bit 3. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 352 | This bit is a don't care when DIR = 1 (configured as input). When set for GPO (DIR = 0): |
| metin.ozkan@analog.com | 0:00d2a8670533 | 353 | 0 = GPIO is output is logic low |
| metin.ozkan@analog.com | 0:00d2a8670533 | 354 | 1 = GPIO is output logic high when set as push-pull output (DRV = 1). */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 355 | unsigned char dben_gpi : 1; /**< General Purpose Input Debounce Timer Enable. Bit 4. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 356 | 0 = no debounce |
| metin.ozkan@analog.com | 0:00d2a8670533 | 357 | 1 = 30ms debounce */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 358 | unsigned char alt_gpio : 1; /**< Alternate Mode Enable for GPIO1. Bit 5. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 359 | 0 = Standard GPIO. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 360 | 1 = Active-high output of SBB2's Flexible Power Sequencer (FPS) slot. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 361 | unsigned char rsvd : 2; /**< Reserved. Bit 7:6. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 362 | Unutilized bit. Write to 0. Reads are don't care. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 363 | } bits; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 364 | } reg_cnfg_gpio1_t; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 365 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 366 | /** |
| metin.ozkan@analog.com | 0:00d2a8670533 | 367 | * @brief CNFG_GPIO2 Register |
| metin.ozkan@analog.com | 0:00d2a8670533 | 368 | * |
| metin.ozkan@analog.com | 0:00d2a8670533 | 369 | * Address : 0x13 |
| metin.ozkan@analog.com | 0:00d2a8670533 | 370 | */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 371 | typedef union { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 372 | unsigned char raw; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 373 | struct { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 374 | unsigned char gpo_dir : 1; /**< GPIO Direction. Bit 0. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 375 | 0 = General purpose output (GPO) |
| metin.ozkan@analog.com | 0:00d2a8670533 | 376 | 1 = General purpose input (GPI) */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 377 | unsigned char gpo_di : 1; /**< GPIO Digital Input Value. Bit 1. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 378 | 0 = Input logic low |
| metin.ozkan@analog.com | 0:00d2a8670533 | 379 | 1 = Input logic high */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 380 | unsigned char gpo_drv : 1; /**< General Purpose Output Driver Type. Bit 2. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 381 | This bit is a don't care when DIR = 1 (configured as input) When set for GPO (DIR = 0): |
| metin.ozkan@analog.com | 0:00d2a8670533 | 382 | 0 = Open-Drain |
| metin.ozkan@analog.com | 0:00d2a8670533 | 383 | 1 = Push-Pull */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 384 | unsigned char gpo_do : 1; /**< General Purpose Output Data Output. Bit 3. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 385 | This bit is a don't care when DIR = 1 (configured as input). When set for GPO (DIR = 0): |
| metin.ozkan@analog.com | 0:00d2a8670533 | 386 | 0 = GPIO is output is logic low |
| metin.ozkan@analog.com | 0:00d2a8670533 | 387 | 1 = GPIO is output logic high when set as push-pull output (DRV = 1). */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 388 | unsigned char dben_gpi : 1; /**< General Purpose Input Debounce Timer Enable. Bit 4. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 389 | 0 = no debounce |
| metin.ozkan@analog.com | 0:00d2a8670533 | 390 | 1 = 30ms debounce */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 391 | unsigned char alt_gpio : 1; /**< Alternate Mode Enable for GPIO2. Bit 5. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 392 | 0 = Standard GPIO. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 393 | 1 = Active-high input, Enable DISQBAT. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 394 | unsigned char rsvd : 2; /**< Reserved. Bit 7:6. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 395 | Unutilized bit. Write to 0. Reads are don't care. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 396 | } bits; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 397 | } reg_cnfg_gpio2_t; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 398 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 399 | /** |
| metin.ozkan@analog.com | 0:00d2a8670533 | 400 | * @brief CID Register |
| metin.ozkan@analog.com | 0:00d2a8670533 | 401 | * |
| metin.ozkan@analog.com | 0:00d2a8670533 | 402 | * Address : 0x14 |
| metin.ozkan@analog.com | 0:00d2a8670533 | 403 | */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 404 | typedef union { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 405 | unsigned char raw; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 406 | struct { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 407 | unsigned char cid : 4; /**< Chip Identification Code. Bit 4:0. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 408 | The Chip Identification Code refers to a set of reset values in the register map, or the "OTP configuration.". */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 409 | unsigned char : 4; /**< Bit 7:4. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 410 | } bits; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 411 | } reg_cid_t; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 412 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 413 | /** |
| metin.ozkan@analog.com | 0:00d2a8670533 | 414 | * @brief CNFG_WDT Register |
| metin.ozkan@analog.com | 0:00d2a8670533 | 415 | * |
| metin.ozkan@analog.com | 0:00d2a8670533 | 416 | * Address : 0x17 |
| metin.ozkan@analog.com | 0:00d2a8670533 | 417 | */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 418 | typedef union { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 419 | unsigned char raw; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 420 | struct { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 421 | unsigned char wdt_lock : 1; /**< Factory-Set Safety Bit for the Watchdog Timer. Bit 0. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 422 | 0 = Watchdog timer can be enabled and disabled with WDT_EN. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 423 | 1 = Watchdog timer can not be disabled with WDT_EN. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 424 | However, WDT_EN can still be used to enable the watchdog timer. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 425 | unsigned char wdt_en : 1; /**< Watchdog Timer Enable. Bit 1. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 426 | 0 = Watchdog timer is not enabled. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 427 | 1 = Watchdog timer is enabled. The timer will expire if not reset by setting WDT_CLR. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 428 | unsigned char wdt_clr : 1; /**< Watchdog Timer Clear Control. Bit 2. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 429 | 0 = Watchdog timer period is not reset. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 430 | 1 = Watchdog timer is reset back to tWD. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 431 | unsigned char wdt_mode : 1; /**< Watchdog Timer Expired Action. Bit 3. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 432 | 0 = Watchdog timer expire causes power-off. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 433 | 1 = Watchdog timer expire causes power-reset. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 434 | unsigned char wdt_per : 2; /**< Watchdog Timer Period. Bit 5:4. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 435 | 0b00 = 16 seconds 0b01 = 32 seconds |
| metin.ozkan@analog.com | 0:00d2a8670533 | 436 | 0b10 = 64 seconds 0b11 = 128 seconds. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 437 | unsigned char rsvd : 2; /**< Reserved. Bit 7:6. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 438 | Unutilized bit. Write to 0. Reads are don't care. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 439 | } bits; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 440 | } reg_cnfg_wdt_t; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 441 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 442 | /** |
| metin.ozkan@analog.com | 0:00d2a8670533 | 443 | * @brief INT_CHG Register |
| metin.ozkan@analog.com | 0:00d2a8670533 | 444 | * |
| metin.ozkan@analog.com | 0:00d2a8670533 | 445 | * Address : 0x01 |
| metin.ozkan@analog.com | 0:00d2a8670533 | 446 | */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 447 | typedef union { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 448 | unsigned char raw; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 449 | struct { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 450 | unsigned char thm_i : 1; /**< Thermistor related interrupt. Bit 0. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 451 | 0 = The bits in THM_DTLS[2:0] have not changed since the last time this bit was read |
| metin.ozkan@analog.com | 0:00d2a8670533 | 452 | 1 = The bits in THM_DTLS[2:0] have changed since the last time this bit was read */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 453 | unsigned char chg_i : 1; /**< Charger related interrupt. Bit 1. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 454 | 0 = The bits in CHG_DTLS[3:0] have not changed since the last time this bit was read |
| metin.ozkan@analog.com | 0:00d2a8670533 | 455 | 1 = The bits in CHG_DTLS[3:0] have changed since the last time this bit was read */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 456 | unsigned char chgin_i : 1; /**< CHGIN related interrupt. Bit 2. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 457 | 0 = The bits in CHGIN_DTLS[1:0] have not changed since the last time this bit was read |
| metin.ozkan@analog.com | 0:00d2a8670533 | 458 | 1 = The bits in CHGIN_DTLS[1:0] have changed since the last time this bit was read */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 459 | unsigned char tj_reg_i : 1; /**< Die junction temperature regulation interrupt. Bit 3. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 460 | 0 = The die temperature has not exceeded TJ-REG since the last time this bit was read |
| metin.ozkan@analog.com | 0:00d2a8670533 | 461 | 1 = The die temperature has exceeded TJ-REG since the last time this bit was read */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 462 | unsigned char chgin_ctrl_i : 1; /**< CHGIN control-loop related interrupt. Bit 4. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 463 | 0 = Neither the VCHGIN_MIN_STAT nor the ICHGIN_LIM_STAT bits have changed since the last time this bit was read |
| metin.ozkan@analog.com | 0:00d2a8670533 | 464 | 1 = The VCHGIN_MIN_STAT or ICHGIN_LIM_STAT bits have changed since the last time this bit was read */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 465 | unsigned char sys_ctrl_i : 1; /**< Minimum System Voltage Regulation-loop related interrupt. Bit 5. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 466 | 0 = The minimum system voltage regulation loop has not engaged since the last time this bit was read |
| metin.ozkan@analog.com | 0:00d2a8670533 | 467 | 1 = The minimum system voltage regulation loop has engaged since the last time this bit was read */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 468 | unsigned char sys_cnfg_i : 1; /**< System voltage configuration error interrupt. Bit 6. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 469 | 0 = The bit combination in CHG_CV has not been forced to change since the last time this bit was read |
| metin.ozkan@analog.com | 0:00d2a8670533 | 470 | 1 = The bit combination in CHG_CV has been forced to change to ensure VSYS-REG = VFAST-CHG + 200mV |
| metin.ozkan@analog.com | 0:00d2a8670533 | 471 | since the last time this bit was read */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 472 | unsigned char rsvd : 1; /**< Reserved. Bit 7. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 473 | Unutilized bit. Write to 0. Reads are don't care. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 474 | } bits; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 475 | } reg_int_chg_t; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 476 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 477 | /** |
| metin.ozkan@analog.com | 0:00d2a8670533 | 478 | * @brief STAT_CHG_A |
| metin.ozkan@analog.com | 0:00d2a8670533 | 479 | * |
| metin.ozkan@analog.com | 0:00d2a8670533 | 480 | * Address : 0x02 |
| metin.ozkan@analog.com | 0:00d2a8670533 | 481 | */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 482 | typedef union { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 483 | unsigned char raw; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 484 | struct |
| metin.ozkan@analog.com | 0:00d2a8670533 | 485 | { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 486 | unsigned char thm_dtls : 3; /**< Battery Temperature Details. Bit 2:0. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 487 | 0b000 = Thermistor is disabled (THM_EN = 0) |
| metin.ozkan@analog.com | 0:00d2a8670533 | 488 | 0b001 = Battery is cold as programmed by THM_COLD[1:0] If thermistor and charger are enabled while the battery is cold, a battery temperature fault will occur. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 489 | 0b010 = Battery is cool as programmed by THM_COOL[1:0] |
| metin.ozkan@analog.com | 0:00d2a8670533 | 490 | 0b011 = Battery is warm as programmed by THM_WARM[1:0] |
| metin.ozkan@analog.com | 0:00d2a8670533 | 491 | 0b100 = Battery is hot as programmed by THM_HOT[1:0]. If thermistor and charger are enabled while the battery is hot, a battery temperature fault will occur. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 492 | 0b101 = Battery is in the normal temperature region |
| metin.ozkan@analog.com | 0:00d2a8670533 | 493 | 0b110 - 0b111 = reserved */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 494 | unsigned char tj_reg_stat : 1; /**< Maximum Junction Temperature Regulation Loop Status. Bit 3. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 495 | 0 = The maximum junction temperature regulation loop is not engaged |
| metin.ozkan@analog.com | 0:00d2a8670533 | 496 | 1 = The maximum junction temperature regulation loop has engaged to regulate the junction temperature to less than TJ-REG */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 497 | unsigned char vsys_min_stat : 1; /**< Minimum System Voltage Regulation Loop Status. Bit 4. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 498 | 0 = The minimum system voltage regulation loop is not enganged |
| metin.ozkan@analog.com | 0:00d2a8670533 | 499 | 1 = The minimum system voltage regulation loop is engaged to regulate VSYS ≥ VSYS-MIN */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 500 | unsigned char ichgin_lim_stat : 1; /**< Input Current Limit Loop Status. Bit 5. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 501 | 0 = The CHGIN current limit loop is not engaged |
| metin.ozkan@analog.com | 0:00d2a8670533 | 502 | 1 = The CHGIN current limit loop has engaged to regulate ICHGIN ≤ ICHGIN-LIM */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 503 | unsigned char vchgin_min_stat : 1; /**< Minimum Input Voltage Regulation Loop Status. Bit 6. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 504 | 0 = The minimum CHGIN voltage regulation loop is not engaged |
| metin.ozkan@analog.com | 0:00d2a8670533 | 505 | 1 = The minimum CHGIN voltage regulation loop has engaged to regulate VCHGIN ≥ VCHGIN-MIN */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 506 | unsigned char rsvd : 1; /**< Reserved. Bit 7. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 507 | Unutilized bit. Write to 0. Reads are don't care. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 508 | } bits; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 509 | } reg_stat_chg_a_t; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 510 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 511 | /** |
| metin.ozkan@analog.com | 0:00d2a8670533 | 512 | * @brief STAT_CHG_B |
| metin.ozkan@analog.com | 0:00d2a8670533 | 513 | * |
| metin.ozkan@analog.com | 0:00d2a8670533 | 514 | * Address : 0x03 |
| metin.ozkan@analog.com | 0:00d2a8670533 | 515 | */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 516 | typedef union { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 517 | unsigned char raw; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 518 | struct |
| metin.ozkan@analog.com | 0:00d2a8670533 | 519 | { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 520 | unsigned char time_sus : 1; /**< Time Suspend Indicator. Bit 0. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 521 | 0 = The charger's timers are either not active, or not suspended |
| metin.ozkan@analog.com | 0:00d2a8670533 | 522 | 1 = The charger's active timer is suspended due to one of three reasons: |
| metin.ozkan@analog.com | 0:00d2a8670533 | 523 | charge current dropped below 20% of IFAST-CHG while the charger state machine is in FAST CHARGE CC mode, |
| metin.ozkan@analog.com | 0:00d2a8670533 | 524 | the charger is in SUPPLEMENT mode, or the charger state machine is in BATTERY TEMPERATURE FAULT mode. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 525 | unsigned char chg : 1; /**< Quick Charger Status. Bit 1. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 526 | 0 = Charging is not happening |
| metin.ozkan@analog.com | 0:00d2a8670533 | 527 | 1 = Charging is happening */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 528 | unsigned char chgin_dtls : 2; /**< CHGIN Status Detail. Bit 3:2. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 529 | 0b00 = The CHGIN input voltage is below the UVLO threshold (VCHGIN < VUVLO) |
| metin.ozkan@analog.com | 0:00d2a8670533 | 530 | 0b01 = The CHGIN input voltage is above the OVP threshold (VCHGIN > VOVP) |
| metin.ozkan@analog.com | 0:00d2a8670533 | 531 | 0b10 = The CHGIN input is being debounced (no power accepted from CHGIN during debounce) |
| metin.ozkan@analog.com | 0:00d2a8670533 | 532 | 0b11 = The CHGIN input is okay and debounced */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 533 | unsigned char chg_dtls : 4; /**< Charger Details. Bit 7:4. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 534 | 0b0000 = Off |
| metin.ozkan@analog.com | 0:00d2a8670533 | 535 | 0b0001 = Prequalification mode |
| metin.ozkan@analog.com | 0:00d2a8670533 | 536 | 0b0010 = Fast-charge constant-current (CC) mode |
| metin.ozkan@analog.com | 0:00d2a8670533 | 537 | 0b0011 = JEITA modified fast-charge constant-current mode |
| metin.ozkan@analog.com | 0:00d2a8670533 | 538 | 0b0100 = Fast-charge constant-voltage (CV) mode |
| metin.ozkan@analog.com | 0:00d2a8670533 | 539 | 0b0101 = JEITA modified fast-charge constant-voltage mode |
| metin.ozkan@analog.com | 0:00d2a8670533 | 540 | 0b0110 = Top-off mode |
| metin.ozkan@analog.com | 0:00d2a8670533 | 541 | 0b0111 = JEITA modified top-off mode |
| metin.ozkan@analog.com | 0:00d2a8670533 | 542 | 0b1000 = Done |
| metin.ozkan@analog.com | 0:00d2a8670533 | 543 | 0b1001 = JEITA modified done (done was entered through the JEITA-modified fast-charge states) |
| metin.ozkan@analog.com | 0:00d2a8670533 | 544 | 0b1010 = Prequalification timer fault |
| metin.ozkan@analog.com | 0:00d2a8670533 | 545 | 0b1011 = Fast-charge timer fault |
| metin.ozkan@analog.com | 0:00d2a8670533 | 546 | 0b1100 = Battery temperature fault |
| metin.ozkan@analog.com | 0:00d2a8670533 | 547 | 0b1101 - 0b1111 = reserved */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 548 | } bits; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 549 | } reg_stat_chg_b_t; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 550 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 551 | /** |
| metin.ozkan@analog.com | 0:00d2a8670533 | 552 | * @brief INT_M_CHG Register |
| metin.ozkan@analog.com | 0:00d2a8670533 | 553 | * |
| metin.ozkan@analog.com | 0:00d2a8670533 | 554 | * Address : 0x07 |
| metin.ozkan@analog.com | 0:00d2a8670533 | 555 | */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 556 | typedef union { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 557 | unsigned char raw; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 558 | struct { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 559 | unsigned char thm_m : 1; /**< Setting this bit prevents the THM_I bit from causing hardware IRQs. Bit 0. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 560 | 0 = THM_I is not masked |
| metin.ozkan@analog.com | 0:00d2a8670533 | 561 | 1 = THM_I is masked */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 562 | unsigned char chg_m : 1; /**< Setting this bit prevents the CHG_I bit from causing hardware IRQs. Bit 1. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 563 | 0 = CHG_I is not masked |
| metin.ozkan@analog.com | 0:00d2a8670533 | 564 | 1 = CHG_I is masked */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 565 | unsigned char chgin_m : 1; /**< Setting this bit prevents the CHGIN_I bit from causing hardware IRQs. Bit 2. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 566 | 0 = CHGIN_I is not masked |
| metin.ozkan@analog.com | 0:00d2a8670533 | 567 | 1 = CHGIN_I is masked */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 568 | unsigned char tj_reg_m : 1; /**< Setting this bit prevents the TJREG_I bit from causing hardware IRQs. Bit 3. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 569 | 0 = TJREG_I is not masked |
| metin.ozkan@analog.com | 0:00d2a8670533 | 570 | 1 = TJREG_I is masked */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 571 | unsigned char chgin_ctrl_m : 1; /**< Setting this bit prevents the CHGIN_CTRL_I bit from causing hardware IRQs. Bit 4. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 572 | 0 = CHGIN_CTRL_I is not masked |
| metin.ozkan@analog.com | 0:00d2a8670533 | 573 | 1 = CHGIN_CTRL_I is masked */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 574 | unsigned char sys_ctrl_m : 1; /**< Setting this bit prevents the SYS_CTRL_I bit from causing hardware IRQs. Bit 5. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 575 | 0 = SYS_CTRL_I is not masked |
| metin.ozkan@analog.com | 0:00d2a8670533 | 576 | 1 = SYS_CTRL_I is masked */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 577 | unsigned char sys_cnfg_m : 1; /**< Setting this bit prevents the SYS_CNFG_I bit from causing hardware IRQs. Bit 6. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 578 | 0 = SYS_CNFG_I is not masked |
| metin.ozkan@analog.com | 0:00d2a8670533 | 579 | 1 = SYS_CNFG_I is masked |
| metin.ozkan@analog.com | 0:00d2a8670533 | 580 | since the last time this bit was read */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 581 | unsigned char dis_aicl : 1; /**< Active input current loop. Bit 7. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 582 | 0 = Active Input Current Loop Active. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 583 | 1 = Active Input Current Loop Disabled. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 584 | } bits; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 585 | } reg_int_m_chg_t; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 586 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 587 | /** |
| metin.ozkan@analog.com | 0:00d2a8670533 | 588 | * @brief CNFG_CHG_A |
| metin.ozkan@analog.com | 0:00d2a8670533 | 589 | * |
| metin.ozkan@analog.com | 0:00d2a8670533 | 590 | * Address : 0x20 |
| metin.ozkan@analog.com | 0:00d2a8670533 | 591 | */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 592 | typedef union { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 593 | unsigned char raw; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 594 | struct |
| metin.ozkan@analog.com | 0:00d2a8670533 | 595 | { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 596 | unsigned char thm_cold : 2; /**< Sets the TCOLD JEITA Temperature Threshold. Bit 1:0. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 597 | 0b00 = TCOLD = -10ºC |
| metin.ozkan@analog.com | 0:00d2a8670533 | 598 | 0b01 = TCOLD = -5ºC |
| metin.ozkan@analog.com | 0:00d2a8670533 | 599 | 0b10 = TCOLD = 0ºC |
| metin.ozkan@analog.com | 0:00d2a8670533 | 600 | 0b11 = TCOLD = 5ºC */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 601 | unsigned char thm_cool : 2; /**< Sets the TCOOL JEITA Temperature Threshold. Bit 3:2. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 602 | 0b00 = TCOOL = 0ºC |
| metin.ozkan@analog.com | 0:00d2a8670533 | 603 | 0b01 = TCOOL = 5ºC |
| metin.ozkan@analog.com | 0:00d2a8670533 | 604 | 0b10 = TCOOL = 10ºC |
| metin.ozkan@analog.com | 0:00d2a8670533 | 605 | 0b11 = TCOOL = 15ºC */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 606 | unsigned char thm_warm : 2; /**< Sets the TWARM JEITA Temperature Threshold. Bit 5:4. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 607 | 0b00 = TWARM = 35ºC |
| metin.ozkan@analog.com | 0:00d2a8670533 | 608 | 0b01 = TWARM = 40ºC |
| metin.ozkan@analog.com | 0:00d2a8670533 | 609 | 0b10 = TWARM = 45ºC |
| metin.ozkan@analog.com | 0:00d2a8670533 | 610 | 0b11 = TWARM = 50ºC */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 611 | unsigned char thm_hot : 2; /**< Sets the THOT JEITA Temperature Threshold. Bit 7:6. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 612 | 0b00 = THOT = 45ºC |
| metin.ozkan@analog.com | 0:00d2a8670533 | 613 | 0b01 = THOT = 50ºC |
| metin.ozkan@analog.com | 0:00d2a8670533 | 614 | 0b10 = THOT = 55ºC |
| metin.ozkan@analog.com | 0:00d2a8670533 | 615 | 0b11 = THOT = 60ºC */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 616 | } bits; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 617 | } reg_cnfg_chg_a_t; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 618 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 619 | /** |
| metin.ozkan@analog.com | 0:00d2a8670533 | 620 | * @brief CNFG_CHG_B |
| metin.ozkan@analog.com | 0:00d2a8670533 | 621 | * |
| metin.ozkan@analog.com | 0:00d2a8670533 | 622 | * Address : 0x21 |
| metin.ozkan@analog.com | 0:00d2a8670533 | 623 | */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 624 | typedef union { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 625 | unsigned char raw; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 626 | struct |
| metin.ozkan@analog.com | 0:00d2a8670533 | 627 | { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 628 | unsigned char chg_en : 1; /**< Charger Enable. Bit 0. Default value defined by OTP bit OTP_CHG_EN: |
| metin.ozkan@analog.com | 0:00d2a8670533 | 629 | 0 = the battery charger is disabled |
| metin.ozkan@analog.com | 0:00d2a8670533 | 630 | 1 = the battery charger is enabled */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 631 | unsigned char i_pq : 1; /**< Sets the prequalification charge current (IPQ) as a percentage of IFAST-CHG. Bit 1. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 632 | 0 = 10% 1 = 20% */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 633 | unsigned char ichgin_lim : 3; /**< CHGIN Input Current Limit (ICHGIN-LIM). Bit 4:2. When CNFG_SBB_TOP.ICHGIN_LIM_DEF = 0: |
| metin.ozkan@analog.com | 0:00d2a8670533 | 634 | 0b000 = 95mA 0b001 = 190mA |
| metin.ozkan@analog.com | 0:00d2a8670533 | 635 | 0b010 = 285mA 0b011 = 380mA |
| metin.ozkan@analog.com | 0:00d2a8670533 | 636 | 0b100 = 475mA 0b101 0b111 = Reserved. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 637 | unsigned char vchgin_min : 3; /**< Minimum CHGIN regulation voltage (VCHGIN-MIN). Bit 7:5. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 638 | 0b000 = 4.0V 0b001 = 4.1V |
| metin.ozkan@analog.com | 0:00d2a8670533 | 639 | 0b010 = 4.2V 0b011 = 4.3V |
| metin.ozkan@analog.com | 0:00d2a8670533 | 640 | 0b100 = 4.4V 0b101 = 4.5V |
| metin.ozkan@analog.com | 0:00d2a8670533 | 641 | 0b110 = 4.6V 0b111 = 4.7V */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 642 | } bits; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 643 | } reg_cnfg_chg_b_t; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 644 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 645 | /** |
| metin.ozkan@analog.com | 0:00d2a8670533 | 646 | * @brief CNFG_CHG_C |
| metin.ozkan@analog.com | 0:00d2a8670533 | 647 | * |
| metin.ozkan@analog.com | 0:00d2a8670533 | 648 | * Address : 0x22 |
| metin.ozkan@analog.com | 0:00d2a8670533 | 649 | */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 650 | typedef union { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 651 | unsigned char raw; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 652 | struct |
| metin.ozkan@analog.com | 0:00d2a8670533 | 653 | { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 654 | unsigned char t_topoff : 3; /**< Top-off timer value (tTO). Bit 2:0. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 655 | 0b000 = 0 minutes 0b001 = 5 minutes |
| metin.ozkan@analog.com | 0:00d2a8670533 | 656 | 0b010 = 10 minutes 0b011 = 15 minutes |
| metin.ozkan@analog.com | 0:00d2a8670533 | 657 | 0b100 = 20 minutes 0b101 = 25 minutes |
| metin.ozkan@analog.com | 0:00d2a8670533 | 658 | 0b110 = 30 minutes 0b111 = 35 minutes */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 659 | unsigned char i_term : 2; /**< Charger Termination Current (ITERM). Bit 4:3. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 660 | 00 = 5% 01 = 7.5% |
| metin.ozkan@analog.com | 0:00d2a8670533 | 661 | 10 = 10% 11 = 15% */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 662 | unsigned char chg_pq : 3; /**< Battery prequalification voltage threshold (VPQ). Bit 7:5. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 663 | 0b000 = 2.3V 0b001 = 2.4V |
| metin.ozkan@analog.com | 0:00d2a8670533 | 664 | 0b010 = 2.5V 0b011 = 2.6V |
| metin.ozkan@analog.com | 0:00d2a8670533 | 665 | 0b100 = 2.7V 0b101 = 2.8V |
| metin.ozkan@analog.com | 0:00d2a8670533 | 666 | 0b110 = 2.9V 0b111 = 3.0V */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 667 | } bits; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 668 | } reg_cnfg_chg_c_t; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 669 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 670 | /** |
| metin.ozkan@analog.com | 0:00d2a8670533 | 671 | * @brief CNFG_CHG_D |
| metin.ozkan@analog.com | 0:00d2a8670533 | 672 | * |
| metin.ozkan@analog.com | 0:00d2a8670533 | 673 | * Address : 0x23 |
| metin.ozkan@analog.com | 0:00d2a8670533 | 674 | */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 675 | typedef union { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 676 | unsigned char raw; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 677 | struct |
| metin.ozkan@analog.com | 0:00d2a8670533 | 678 | { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 679 | unsigned char vsys_reg : 5; /**< System voltage regulation (VSYS-REG). Bit 4:0. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 680 | 0x0 = 3.300V 0x1 = 3.350V |
| metin.ozkan@analog.com | 0:00d2a8670533 | 681 | 0x2 = 3.400V ... |
| metin.ozkan@analog.com | 0:00d2a8670533 | 682 | 0x1D = 4.750V 0x1E - 0x1F = 4.800V */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 683 | unsigned char tj_reg : 3; /**< Sets the die junction temperature regulation point, TJ-REG. Bit 7:5. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 684 | 0b000 = 60ºC 0b001 = 70ºC |
| metin.ozkan@analog.com | 0:00d2a8670533 | 685 | 0b010 = 80ºC 0b011 = 90ºC |
| metin.ozkan@analog.com | 0:00d2a8670533 | 686 | 0b100 - 0b111 = 100ºC */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 687 | } bits; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 688 | } reg_cnfg_chg_d_t; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 689 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 690 | /** |
| metin.ozkan@analog.com | 0:00d2a8670533 | 691 | * @brief CNFG_CHG_E |
| metin.ozkan@analog.com | 0:00d2a8670533 | 692 | * |
| metin.ozkan@analog.com | 0:00d2a8670533 | 693 | * Address : 0x24 |
| metin.ozkan@analog.com | 0:00d2a8670533 | 694 | */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 695 | typedef union { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 696 | unsigned char raw; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 697 | struct |
| metin.ozkan@analog.com | 0:00d2a8670533 | 698 | { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 699 | unsigned char t_fast_chg : 2; /**< Sets the fast-charge safety timer, tFC. Bit 1:0. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 700 | 0b00 = Timer disabled 0b01 = 3 hours |
| metin.ozkan@analog.com | 0:00d2a8670533 | 701 | 0b10 = 5 hours 0b11 = 7 hours */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 702 | unsigned char chg_cc : 6; /**< Sets the fast-charge constant current value, IFAST-CHG. Bit 7:2. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 703 | 0x0 = 7.5mA 0x1 = 15.0mA |
| metin.ozkan@analog.com | 0:00d2a8670533 | 704 | 0x2 = 22.5mA ... |
| metin.ozkan@analog.com | 0:00d2a8670533 | 705 | 0x26 = 292.5mA 0x27 - 0x3F = 300.0mA */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 706 | } bits; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 707 | } reg_cnfg_chg_e_t; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 708 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 709 | /** |
| metin.ozkan@analog.com | 0:00d2a8670533 | 710 | * @brief CNFG_CHG_F |
| metin.ozkan@analog.com | 0:00d2a8670533 | 711 | * |
| metin.ozkan@analog.com | 0:00d2a8670533 | 712 | * Address : 0x25 |
| metin.ozkan@analog.com | 0:00d2a8670533 | 713 | */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 714 | typedef union { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 715 | unsigned char raw; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 716 | struct |
| metin.ozkan@analog.com | 0:00d2a8670533 | 717 | { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 718 | unsigned char : 2; /**< Bit 1:0*/ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 719 | unsigned char chg_cc_jeita : 6; /**< Sets IFAST-CHG-JEITA for when the battery is either cool or warm as defined |
| metin.ozkan@analog.com | 0:00d2a8670533 | 720 | by the VCOOL and VWARM temperature thresholds. Bit 7:2. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 721 | 0x0 = 7.5mA 0x1 = 15.0mA |
| metin.ozkan@analog.com | 0:00d2a8670533 | 722 | 0x2 = 22.5mA ... |
| metin.ozkan@analog.com | 0:00d2a8670533 | 723 | 0x26 = 292.5mA 0x27 - 0x3F = 300.0mA */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 724 | } bits; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 725 | } reg_cnfg_chg_f_t; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 726 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 727 | /** |
| metin.ozkan@analog.com | 0:00d2a8670533 | 728 | * @brief CNFG_CHG_G |
| metin.ozkan@analog.com | 0:00d2a8670533 | 729 | * |
| metin.ozkan@analog.com | 0:00d2a8670533 | 730 | * Address : 0x26 |
| metin.ozkan@analog.com | 0:00d2a8670533 | 731 | */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 732 | typedef union { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 733 | unsigned char raw; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 734 | struct |
| metin.ozkan@analog.com | 0:00d2a8670533 | 735 | { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 736 | unsigned char fus_m : 1; /**< Forced USB Suspend Mask. Bit 0. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 737 | FUS is only active if the FUS_M bit is set to 0.*/ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 738 | unsigned char usbs : 1; /**< Setting this bit places CHGIN in USB suspend mode. Bit 1. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 739 | 0 = CHGIN is not suspended and may draw current from an adapter source |
| metin.ozkan@analog.com | 0:00d2a8670533 | 740 | 1 = CHGIN is suspended and may draw no current from an adapter source */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 741 | unsigned char chg_cv : 6; /**< Sets fast-charge battery regulation voltage, VFAST-CHG. Bit 7:2. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 742 | 0x0 = 3.600V 0x1 = 3.625V |
| metin.ozkan@analog.com | 0:00d2a8670533 | 743 | 0x2 = 3.650V ... |
| metin.ozkan@analog.com | 0:00d2a8670533 | 744 | 0x27 = 4.575V 0x28 - 0x3F = 4.600V */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 745 | } bits; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 746 | } reg_cnfg_chg_g_t; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 747 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 748 | /** |
| metin.ozkan@analog.com | 0:00d2a8670533 | 749 | * @brief CNFG_CHG_H |
| metin.ozkan@analog.com | 0:00d2a8670533 | 750 | * |
| metin.ozkan@analog.com | 0:00d2a8670533 | 751 | * Address : 0x27 |
| metin.ozkan@analog.com | 0:00d2a8670533 | 752 | */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 753 | typedef union { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 754 | unsigned char raw; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 755 | struct |
| metin.ozkan@analog.com | 0:00d2a8670533 | 756 | { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 757 | unsigned char chr_th_dis : 1; /**< Charger restart threshold disable. Bit 0. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 758 | unsigned char sys_bat_prt : 1; /**< VSYS_REG - CHG_CV clamp. Bit 1. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 759 | By default, the VSYS_REG has to be at least 200mV higher than the programmed CHG_CV. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 760 | If this bit is set (hardware protection is turned off), the software has to provide |
| metin.ozkan@analog.com | 0:00d2a8670533 | 761 | the protection (the SYS voltage has to be 200mV higher than the BATT voltage). |
| metin.ozkan@analog.com | 0:00d2a8670533 | 762 | If the VSYS_REG is lower than CHG_CV+200mV, the charger will reduce. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 763 | unsigned char chg_cv_jeita : 6; /**< Sets the modified VFAST-CHG-JEITA for when the battery is either cool or |
| metin.ozkan@analog.com | 0:00d2a8670533 | 764 | warm as defined by the VCOOL and VWARM temperature thresholds. Bit 7:2. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 765 | 0x0 = 3.600V 0x1 = 3.625V |
| metin.ozkan@analog.com | 0:00d2a8670533 | 766 | 0x2 = 3.650V ... |
| metin.ozkan@analog.com | 0:00d2a8670533 | 767 | 0x27 = 4.575V 0x28 - 0x3F = 4.600V */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 768 | } bits; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 769 | } reg_cnfg_chg_h_t; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 770 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 771 | /** |
| metin.ozkan@analog.com | 0:00d2a8670533 | 772 | * @brief CNFG_CHG_I |
| metin.ozkan@analog.com | 0:00d2a8670533 | 773 | * |
| metin.ozkan@analog.com | 0:00d2a8670533 | 774 | * Address : 0x28 |
| metin.ozkan@analog.com | 0:00d2a8670533 | 775 | */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 776 | typedef union { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 777 | unsigned char raw; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 778 | struct |
| metin.ozkan@analog.com | 0:00d2a8670533 | 779 | { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 780 | unsigned char mux_sel : 4; /**< Selects the analog channel to connect to AMUX. Bit 3:0. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 781 | 0b0000 = Multiplexer is disabled and AMUX is high-impedance. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 782 | 0b0001 = CHGIN voltage monitor. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 783 | 0b0010 = CHGIN current monitor. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 784 | 0b0011 = BATT voltage monitor. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 785 | 0b0100 = BATT charge current monitor. Valid only while battery charging is happening (CHG = 1). |
| metin.ozkan@analog.com | 0:00d2a8670533 | 786 | 0b0101 = BATT discharge current monitor normal measurement. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 787 | 0b0110 = BATT discharge current monitor nulling measurement. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 788 | 0b0111 = Reserved. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 789 | 0b1000 = Reserved. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 790 | 0b1001 = AGND voltage monitor (through 100Ω pull-down resistor) |
| metin.ozkan@analog.com | 0:00d2a8670533 | 791 | 0b1010 - 0b1111 = SYS voltage monitor */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 792 | unsigned char imon_dischg_scale : 4; /**< Selects the battery discharge current full-scale current value. Bit 7:4. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 793 | 0x0 = 8.2mA 0x1 = 40.5mA 0x2 = 72.3mA |
| metin.ozkan@analog.com | 0:00d2a8670533 | 794 | 0x3 = 103.4mA 0x4 = 134.1mA |
| metin.ozkan@analog.com | 0:00d2a8670533 | 795 | 0x5 = 164.1mA 0x6 = 193.7mA |
| metin.ozkan@analog.com | 0:00d2a8670533 | 796 | 0x7 = 222.7mA 0x8 = 251.2mA |
| metin.ozkan@analog.com | 0:00d2a8670533 | 797 | 0x9 = 279.3mA 0xA - 0xF = 300.0mA */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 798 | } bits; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 799 | } reg_cnfg_chg_i_t; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 800 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 801 | /** |
| metin.ozkan@analog.com | 0:00d2a8670533 | 802 | * @brief CNFG_SBB_TOP |
| metin.ozkan@analog.com | 0:00d2a8670533 | 803 | * |
| metin.ozkan@analog.com | 0:00d2a8670533 | 804 | * Address : 0x38 |
| metin.ozkan@analog.com | 0:00d2a8670533 | 805 | */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 806 | typedef union { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 807 | unsigned char raw; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 808 | struct |
| metin.ozkan@analog.com | 0:00d2a8670533 | 809 | { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 810 | unsigned char drv_sbb : 2; /**< SIMO Buck-Boost (all channels) Drive Strength Trim. Bit 1:0. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 811 | 0b00 = Fastest transition time |
| metin.ozkan@analog.com | 0:00d2a8670533 | 812 | 0b01 = A little slower than 0b00 |
| metin.ozkan@analog.com | 0:00d2a8670533 | 813 | 0b10 = A little slower than 0b01 |
| metin.ozkan@analog.com | 0:00d2a8670533 | 814 | 0b11 = A little slower than 0b10 */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 815 | unsigned char : 5; /**< Bit 6:2.*/ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 816 | unsigned char dis_lpm : 1; /**< Disables the automatic Low Power Mode for Each SIMO Channel. Bit 7. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 817 | 0b0 = Automatic Low Power Mode for each SIMO channel |
| metin.ozkan@analog.com | 0:00d2a8670533 | 818 | 0b1 = Disable LPM feature for each SIMO channel */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 819 | } bits; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 820 | } reg_cnfg_sbb_top_t; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 821 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 822 | /** |
| metin.ozkan@analog.com | 0:00d2a8670533 | 823 | * @brief CNFG_SBB0_A |
| metin.ozkan@analog.com | 0:00d2a8670533 | 824 | * |
| metin.ozkan@analog.com | 0:00d2a8670533 | 825 | * Address : 0x39 |
| metin.ozkan@analog.com | 0:00d2a8670533 | 826 | */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 827 | typedef union { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 828 | unsigned char raw; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 829 | struct |
| metin.ozkan@analog.com | 0:00d2a8670533 | 830 | { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 831 | unsigned char tv_sbb0 : 8; /**< SIMO Buck-Boost Channel 0 Target Output Voltage. Bit 7:0. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 832 | 0x00 = 0.500V 0x01 = 0.525V 0x02 = 0.550V |
| metin.ozkan@analog.com | 0:00d2a8670533 | 833 | 0x03 = 0.575V 0x04 = 0.600V 0x05 = 0.625V |
| metin.ozkan@analog.com | 0:00d2a8670533 | 834 | 0x06 = 0.650V 0x07 = 0.675V 0x08 = 0.700V |
| metin.ozkan@analog.com | 0:00d2a8670533 | 835 | ... |
| metin.ozkan@analog.com | 0:00d2a8670533 | 836 | 0xC5 = 5.425V 0xC6 = 5.450V 0xC7 = 5.475V |
| metin.ozkan@analog.com | 0:00d2a8670533 | 837 | 0xC8 to 0xFF = 5.500V */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 838 | } bits; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 839 | } reg_cnfg_sbb0_a_t; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 840 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 841 | /** |
| metin.ozkan@analog.com | 0:00d2a8670533 | 842 | * @brief CNFG_SBB0_B |
| metin.ozkan@analog.com | 0:00d2a8670533 | 843 | * |
| metin.ozkan@analog.com | 0:00d2a8670533 | 844 | * Address : 0x3A |
| metin.ozkan@analog.com | 0:00d2a8670533 | 845 | */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 846 | typedef union { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 847 | unsigned char raw; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 848 | struct |
| metin.ozkan@analog.com | 0:00d2a8670533 | 849 | { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 850 | unsigned char en_sbb0 : 3; /**< Enable Control for SIMO Buck-Boost Channel 0, |
| metin.ozkan@analog.com | 0:00d2a8670533 | 851 | selecting either an FPS slot the channel powers-up and powers-down in |
| metin.ozkan@analog.com | 0:00d2a8670533 | 852 | or whether the channel is forced on or off. Bit 2:0. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 853 | 0b000 = FPS slot 0 0b001 = FPS slot 1 |
| metin.ozkan@analog.com | 0:00d2a8670533 | 854 | 0b010 = FPS slot 2 0b011 = FPS slot 3 |
| metin.ozkan@analog.com | 0:00d2a8670533 | 855 | 0b100 = Off irrespective of FPS |
| metin.ozkan@analog.com | 0:00d2a8670533 | 856 | 0b101 = same as 0b100 0b110 = On irrespective of FPS |
| metin.ozkan@analog.com | 0:00d2a8670533 | 857 | 0b111 = same as 0b110 */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 858 | unsigned char ade_sbb0 : 1; /**< SIMO Buck-Boost Channel 0 Active-Discharge Enable. Bit 3. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 859 | 0 = The active discharge function is disabled. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 860 | When SBB0 is disabled, its discharge rate is a function of the output capacitance and the external load. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 861 | 1 = The active discharge function is enabled. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 862 | When SBB0 is disabled, an internal resistor (RAD_SBB0) is activated from SBB0 to PGND to help the output voltage discharge. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 863 | unsigned char ip_sbb0 : 2; /**< SIMO Buck-Boost Channel 0 Peak Current Limit. Bit 5:4 |
| metin.ozkan@analog.com | 0:00d2a8670533 | 864 | 0b00 = 1.000A 0b01 = 0.750A |
| metin.ozkan@analog.com | 0:00d2a8670533 | 865 | 0b10 = 0.500A 0b11 = 0.333A*/ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 866 | unsigned char op_mode0 : 2; /**< Operation mode of SBB0. Bit 6. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 867 | 0b00 = Automatic |
| metin.ozkan@analog.com | 0:00d2a8670533 | 868 | 0b01 = Buck mode |
| metin.ozkan@analog.com | 0:00d2a8670533 | 869 | 0b10 = Boost mode |
| metin.ozkan@analog.com | 0:00d2a8670533 | 870 | 0b11 = Buck-boost mode*/ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 871 | } bits; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 872 | } reg_cnfg_sbb0_b_t; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 873 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 874 | /** |
| metin.ozkan@analog.com | 0:00d2a8670533 | 875 | * @brief CNFG_SBB1_A |
| metin.ozkan@analog.com | 0:00d2a8670533 | 876 | * |
| metin.ozkan@analog.com | 0:00d2a8670533 | 877 | * Address : 0x3B |
| metin.ozkan@analog.com | 0:00d2a8670533 | 878 | */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 879 | typedef union { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 880 | unsigned char raw; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 881 | struct |
| metin.ozkan@analog.com | 0:00d2a8670533 | 882 | { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 883 | unsigned char tv_sbb1 : 8; /**< SIMO Buck-Boost Channel 1 Target Output Voltage. Bit 7:0. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 884 | 0x00 = 0.500V 0x01 = 0.525V 0x02 = 0.550V |
| metin.ozkan@analog.com | 0:00d2a8670533 | 885 | 0x03 = 0.575V 0x04 = 0.600V 0x05 = 0.625V |
| metin.ozkan@analog.com | 0:00d2a8670533 | 886 | 0x06 = 0.650V 0x07 = 0.675V 0x08 = 0.700V |
| metin.ozkan@analog.com | 0:00d2a8670533 | 887 | ... |
| metin.ozkan@analog.com | 0:00d2a8670533 | 888 | 0xC5 = 5.425V 0xC6 = 5.450V 0xC7 = 5.475V |
| metin.ozkan@analog.com | 0:00d2a8670533 | 889 | 0xC8 to 0xFF = 5.500V */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 890 | } bits; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 891 | } reg_cnfg_sbb1_a_t; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 892 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 893 | /** |
| metin.ozkan@analog.com | 0:00d2a8670533 | 894 | * @brief CNFG_SBB1_B |
| metin.ozkan@analog.com | 0:00d2a8670533 | 895 | * |
| metin.ozkan@analog.com | 0:00d2a8670533 | 896 | * Address : 0x3C |
| metin.ozkan@analog.com | 0:00d2a8670533 | 897 | */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 898 | typedef union { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 899 | unsigned char raw; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 900 | struct |
| metin.ozkan@analog.com | 0:00d2a8670533 | 901 | { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 902 | unsigned char en_sbb1 : 3; /**< Enable Control for SIMO Buck-Boost Channel 1, |
| metin.ozkan@analog.com | 0:00d2a8670533 | 903 | selecting either an FPS slot the channel powers-up and powers-down in |
| metin.ozkan@analog.com | 0:00d2a8670533 | 904 | or whether the channel is forced on or off. Bit 2:0. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 905 | 0b000 = FPS slot 0 0b001 = FPS slot 1 |
| metin.ozkan@analog.com | 0:00d2a8670533 | 906 | 0b010 = FPS slot 2 0b011 = FPS slot 3 |
| metin.ozkan@analog.com | 0:00d2a8670533 | 907 | 0b100 = Off irrespective of FPS |
| metin.ozkan@analog.com | 0:00d2a8670533 | 908 | 0b101 = same as 0b100 0b110 = On irrespective of FPS |
| metin.ozkan@analog.com | 0:00d2a8670533 | 909 | 0b111 = same as 0b110 */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 910 | unsigned char ade_sbb1 : 1; /**< SIMO Buck-Boost Channel 1 Active-Discharge Enable. Bit 3. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 911 | 0 = The active discharge function is disabled. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 912 | When SBB0 is disabled, its discharge rate is a function of the output capacitance and the external load. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 913 | 1 = The active discharge function is enabled. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 914 | When SBB0 is disabled, an internal resistor (RAD_SBB0) is activated from SBB0 to PGND to help the output voltage discharge. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 915 | unsigned char ip_sbb1 : 2; /**< SIMO Buck-Boost Channel 1 Peak Current Limit. Bit 5:4. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 916 | 0b00 = 1.000A 0b01 = 0.750A |
| metin.ozkan@analog.com | 0:00d2a8670533 | 917 | 0b10 = 0.500A 0b11 = 0.333A*/ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 918 | unsigned char op_mode1 : 2; /**< Operation mode of SBB1. Bit 7:6. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 919 | 0b00 = Automatic |
| metin.ozkan@analog.com | 0:00d2a8670533 | 920 | 0b01 = Buck mode |
| metin.ozkan@analog.com | 0:00d2a8670533 | 921 | 0b10 = Boost mode |
| metin.ozkan@analog.com | 0:00d2a8670533 | 922 | 0b11 = Buck-boost mode*/ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 923 | } bits; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 924 | } reg_cnfg_sbb1_b_t; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 925 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 926 | /** |
| metin.ozkan@analog.com | 0:00d2a8670533 | 927 | * @brief CNFG_SBB2_A |
| metin.ozkan@analog.com | 0:00d2a8670533 | 928 | * |
| metin.ozkan@analog.com | 0:00d2a8670533 | 929 | * Address : 0x3D |
| metin.ozkan@analog.com | 0:00d2a8670533 | 930 | */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 931 | typedef union { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 932 | unsigned char raw; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 933 | struct |
| metin.ozkan@analog.com | 0:00d2a8670533 | 934 | { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 935 | unsigned char tv_sbb2 : 8; /**< SIMO Buck-Boost Channel 2 Target Output Voltage. Bit 7:0. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 936 | 0x00 = 0.500V 0x01 = 0.525V 0x02 = 0.550V |
| metin.ozkan@analog.com | 0:00d2a8670533 | 937 | 0x03 = 0.575V 0x04 = 0.600V 0x05 = 0.625V |
| metin.ozkan@analog.com | 0:00d2a8670533 | 938 | 0x06 = 0.650V 0x07 = 0.675V 0x08 = 0.700V |
| metin.ozkan@analog.com | 0:00d2a8670533 | 939 | ... |
| metin.ozkan@analog.com | 0:00d2a8670533 | 940 | 0xC5 = 5.425V 0xC6 = 5.450V 0xC7 = 5.475V |
| metin.ozkan@analog.com | 0:00d2a8670533 | 941 | 0xC8 to 0xFF = 5.500V */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 942 | } bits; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 943 | } reg_cnfg_sbb2_a_t; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 944 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 945 | /** |
| metin.ozkan@analog.com | 0:00d2a8670533 | 946 | * @brief CNFG_SBB2_B |
| metin.ozkan@analog.com | 0:00d2a8670533 | 947 | * |
| metin.ozkan@analog.com | 0:00d2a8670533 | 948 | * Address : 0x3E |
| metin.ozkan@analog.com | 0:00d2a8670533 | 949 | */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 950 | typedef union { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 951 | unsigned char raw; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 952 | struct |
| metin.ozkan@analog.com | 0:00d2a8670533 | 953 | { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 954 | unsigned char en_sbb2 : 3; /**< Enable Control for SIMO Buck-Boost Channel 2, |
| metin.ozkan@analog.com | 0:00d2a8670533 | 955 | selecting either an FPS slot the channel powers-up and powers-down in |
| metin.ozkan@analog.com | 0:00d2a8670533 | 956 | or whether the channel is forced on or off. Bit 2:0. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 957 | 0b000 = FPS slot 0 0b001 = FPS slot 1 |
| metin.ozkan@analog.com | 0:00d2a8670533 | 958 | 0b010 = FPS slot 2 0b011 = FPS slot 3 |
| metin.ozkan@analog.com | 0:00d2a8670533 | 959 | 0b100 = Off irrespective of FPS |
| metin.ozkan@analog.com | 0:00d2a8670533 | 960 | 0b101 = same as 0b100 0b110 = On irrespective of FPS |
| metin.ozkan@analog.com | 0:00d2a8670533 | 961 | 0b111 = same as 0b110 */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 962 | unsigned char ade_sbb2 : 1; /**< SIMO Buck-Boost Channel 2 Active-Discharge Enable Bit 3. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 963 | 0 = The active discharge function is disabled. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 964 | When SBB0 is disabled, its discharge rate is a function of the output capacitance and the external load. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 965 | 1 = The active discharge function is enabled. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 966 | When SBB0 is disabled, an internal resistor (RAD_SBB0) is activated from SBB0 to PGND to help the output voltage discharge. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 967 | unsigned char ip_sbb2 : 2; /**< SIMO Buck-Boost Channel 2 Peak Current Limit. Bit 5:4. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 968 | 0b00 = 1.000A 0b01 = 0.750A |
| metin.ozkan@analog.com | 0:00d2a8670533 | 969 | 0b10 = 0.500A 0b11 = 0.333A*/ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 970 | unsigned char op_mode2 : 2; /**< Operation mode of SBB2. Bit 7:6. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 971 | 0b00 = Automatic |
| metin.ozkan@analog.com | 0:00d2a8670533 | 972 | 0b01 = Buck mode |
| metin.ozkan@analog.com | 0:00d2a8670533 | 973 | 0b10 = Boost mode |
| metin.ozkan@analog.com | 0:00d2a8670533 | 974 | 0b11 = Buck-boost mode*/ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 975 | } bits; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 976 | } reg_cnfg_sbb2_b_t; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 977 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 978 | /** |
| metin.ozkan@analog.com | 0:00d2a8670533 | 979 | * @brief CNFG_DVS_SBB0_A |
| metin.ozkan@analog.com | 0:00d2a8670533 | 980 | * |
| metin.ozkan@analog.com | 0:00d2a8670533 | 981 | * Address : 0x3F |
| metin.ozkan@analog.com | 0:00d2a8670533 | 982 | */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 983 | typedef union { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 984 | unsigned char raw; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 985 | struct |
| metin.ozkan@analog.com | 0:00d2a8670533 | 986 | { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 987 | unsigned char tv_sbb0_dvs : 8; /**< SIMO Buck-Boost Channel 0 Target Output Voltage. Bit 7:0. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 988 | 0x00 = 0.500V 0x01 = 0.525V 0x02 = 0.550V |
| metin.ozkan@analog.com | 0:00d2a8670533 | 989 | 0x03 = 0.575V 0x04 = 0.600V 0x05 = 0.625V |
| metin.ozkan@analog.com | 0:00d2a8670533 | 990 | 0x06 = 0.650V 0x07 = 0.675V 0x08 = 0.700V |
| metin.ozkan@analog.com | 0:00d2a8670533 | 991 | ... |
| metin.ozkan@analog.com | 0:00d2a8670533 | 992 | 0xC5 = 5.425V 0xC6 = 5.450V 0xC7 = 5.475V |
| metin.ozkan@analog.com | 0:00d2a8670533 | 993 | 0xC8 to 0xFF = 5.500V */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 994 | } bits; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 995 | } reg_cnfg_dvs_sbb0_a_t; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 996 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 997 | /** |
| metin.ozkan@analog.com | 0:00d2a8670533 | 998 | * @brief CNFG_LDO0_A |
| metin.ozkan@analog.com | 0:00d2a8670533 | 999 | * |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1000 | * Address : 0x48 |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1001 | */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1002 | typedef union { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1003 | unsigned char raw; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1004 | struct |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1005 | { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1006 | unsigned char tv_ldo0_6_0 : 7; /**< LDO0 Target Output Voltage. Bit 6:0. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1007 | 0x00 = 0.500V 0x01 = 0.525V 0x02 = 0.550V |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1008 | 0x03 = 0.575V 0x04 = 0.600V 0x05 = 0.625V |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1009 | 0x06 = 0.650V 0x07 = 0.675V 0x08 = 0.700V |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1010 | ... |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1011 | 0x7E = 3.650V |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1012 | 0x7F = 3.675V |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1013 | When TV_LDO[7] = 0, TV_LDO[6:0] sets the |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1014 | LDO's output voltage range from 0.5V to 3.675V. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1015 | When TV_LDO[7] = 1, TV_LDO[6:0] sets the |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1016 | LDO's output voltage from 1.825V to 5V. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1017 | unsigned char tv_ldo0_7 : 1; /**< LDO0 Output Voltage. Bit7. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1018 | This bit applies a 1.325V offset to the output voltage of the LDO0. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1019 | 0b0 = No Offset, 0b1 = 1.325V Offset |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1020 | */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1021 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1022 | } bits; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1023 | } reg_cnfg_ldo0_a_t; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1024 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1025 | /** |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1026 | * @brief CNFG_LDO0_B |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1027 | * |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1028 | * Address : 0x49 |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1029 | */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1030 | typedef union { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1031 | unsigned char raw; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1032 | struct |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1033 | { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1034 | unsigned char en_ldo0 : 3; /**< Enable Control for LDO0, |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1035 | selecting either an FPS slot the channel powers-up and |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1036 | powersdown in or whether the channel is forced on or off. Bit 2:0. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1037 | 0b000 = FPS slot 0 0b001 = FPS slot 1 |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1038 | 0b010 = FPS slot 2 0b011 = FPS slot 3 |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1039 | 0b100 = Off irrespective of FPS |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1040 | 0b101 = same as 0b100 0b110 = On irrespective of FPS |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1041 | 0b111 = same as 0b110 */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1042 | unsigned char ade_ldo0 : 1; /**< LDO0 Active-Discharge Enable. Bit 3. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1043 | 0 = The active discharge function is disabled. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1044 | 1 = The active discharge function is enabled.*/ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1045 | unsigned char ldo0_md : 1; /**< Operation Mode of LDO0. Bit 4. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1046 | 0b0 = Low dropout linear regulator (LDO) mode |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1047 | 0b1 = Load switch (LSW) mode*/ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1048 | unsigned char : 3; /**< */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1049 | } bits; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1050 | } reg_cnfg_ldo0_b_t; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1051 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1052 | /** |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1053 | * @brief CNFG_LDO1_A |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1054 | * |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1055 | * Address : 0x4A |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1056 | */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1057 | typedef union { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1058 | unsigned char raw; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1059 | struct |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1060 | { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1061 | unsigned char tv_ldo1_6_0 : 7; /**< LDO1 Target Output Voltage. Bit 6:0. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1062 | 0x00 = 0.500V 0x01 = 0.525V 0x02 = 0.550V |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1063 | 0x03 = 0.575V 0x04 = 0.600V 0x05 = 0.625V |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1064 | 0x06 = 0.650V 0x07 = 0.675V 0x08 = 0.700V |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1065 | ... |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1066 | 0x7E = 3.650V |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1067 | 0x7F = 3.675V |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1068 | When TV_LDO[7] = 0, TV_LDO[6:0] sets the |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1069 | LDO's output voltage range from 0.5V to 3.675V. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1070 | When TV_LDO[7] = 1, TV_LDO[6:0] sets the |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1071 | LDO's output voltage from 1.825V to 5V. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1072 | unsigned char tv_ldo1_7 : 1; /**< LDO1 Output Voltage. Bit7. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1073 | This bit applies a 1.325V offset to the output voltage of the LDO0. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1074 | 0b0 = No Offset, 0b1 = 1.325V Offset |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1075 | */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1076 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1077 | } bits; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1078 | } reg_cnfg_ldo1_a_t; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1079 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1080 | /** |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1081 | * @brief CNFG_LDO1_B |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1082 | * |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1083 | * Address : 0x4B |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1084 | */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1085 | typedef union { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1086 | unsigned char raw; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1087 | struct |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1088 | { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1089 | unsigned char en_ldo1 : 3; /**< Enable Control for LDO1, |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1090 | selecting either an FPS slot the channel powers-up and |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1091 | powersdown in or whether the channel is forced on or off. Bit 2:0. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1092 | 0b000 = FPS slot 0 0b001 = FPS slot 1 |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1093 | 0b010 = FPS slot 2 0b011 = FPS slot 3 |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1094 | 0b100 = Off irrespective of FPS |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1095 | 0b101 = same as 0b100 0b110 = On irrespective of FPS |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1096 | 0b111 = same as 0b110 */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1097 | unsigned char ade_ldo1 : 1; /**< LDO1 Active-Discharge Enable. Bit 3. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1098 | 0 = The active discharge function is disabled. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1099 | 1 = The active discharge function is enabled.*/ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1100 | unsigned char ldo1_md : 1; /**< Operation Mode of LDO1. Bit 4. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1101 | 0b0 = Low dropout linear regulator (LDO) mode |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1102 | 0b1 = Load switch (LSW) mode*/ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1103 | unsigned char : 3; /**< */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1104 | } bits; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1105 | } reg_cnfg_ldo1_b_t; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1106 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1107 | /*FUEL GAUGE REGISTERS*/ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1108 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1109 | /** |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1110 | * @brief Status |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1111 | * |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1112 | * Address : 0x00 |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1113 | */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1114 | typedef union { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1115 | uint16_t raw; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1116 | struct |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1117 | { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1118 | unsigned char imn : 1; /**< Minimum Isys Threshold Exceeded. Bit 0. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1119 | unsigned char por : 1; /**< Power-On Reset. Bit 1. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1120 | This bit is set to 1 when the device detects that a software or hardware POR event has occurred. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1121 | unsigned char spr_2 : 1; /**< Bit 2. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1122 | unsigned char bst : 1; /**< Battery Status. Bit 3. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1123 | Unutilized bit. Write to 0. Reads are don't care. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1124 | unsigned char isysmx : 1; /**< SYS current is over OCP limit. Bit 4. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1125 | Maximum SYS current threshold exceeded. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1126 | unsigned char spr_5 : 1; /**< Bit 5. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1127 | unsigned char thmhot : 1; /**< FG Control Charger Input Current Limit. Bit 6. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1128 | Set to 1 to indicate a Thermistor Hot to allow FG control charger input current limit. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1129 | ThmHot is set to 0 at power-up. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1130 | unsigned char dsoci : 1; /**< 1% SOC Change Alert. Bit 7. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1131 | This bit is set to 1 to indicate a 1% SOC change alert. dSOCi is set to 0 at power-up. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1132 | unsigned char vmn : 1; /**< Minimum VALRT Threshold Exceeded. Bit 8. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1133 | This bit is set to 1 whenever a VCELL register reading is below the minimum VALRT value. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1134 | This bit may or may not need to be cleared by system software to detect the next event. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1135 | See VS in the CONFIG register. Vmn is set to 0 at power-up. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1136 | unsigned char tmn : 1; /**< Minimum TALRT Threshold Exceeded. Bit 9. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1137 | This bit is set to 1 whenever a Temperature register reading is below the minimum TALRT value. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1138 | This bit may or may not need to be cleared by system software to detect the next event. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1139 | See TS in the CONFIG register. Tmn is set to 0 at power-up. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1140 | unsigned char smn : 1; /**< Minimum SOCALRT Threshold Exceeded. Bit 10. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1141 | This bit is set to 1 whenever SOC falls below the minimum SOCALRT value. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1142 | This bit may or may not need to be cleared by system software to detect the next event. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1143 | See SS in the CONFIG register and SACFG in the MiscCFG register. Smn is set to 0 at power-up.*/ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1144 | unsigned char bi : 1; /**< Battery Insertion. Bit 11. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1145 | This bit is set to 1 when the device detects that a battery has been inserted into the system by monitoring the AIN pin. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1146 | This bit must be cleared by system software to detect the next insertion event. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1147 | Bi is set to 0 at power-up. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1148 | unsigned char vmx : 1; /**< Maximum VALRT Threshold Exceeded. Bit 12. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1149 | This bit is set to 1 whenever a VCELL register reading is above the maximum VALRT value. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1150 | This bit may or may not need to be cleared by system software to detect the next event. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1151 | See VS in the CONFIG register. Vmx is set to 0 at power-up. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1152 | unsigned char tmx : 1; /**< Maximum TALRT Threshold Exceeded Bit 13. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1153 | This bit is set to 1 whenever a Temperature register reading is above the maximum TALRT value. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1154 | This bit may or may not need to be cleared by system software to detect the next event. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1155 | See TS in the CONFIG register. Tmx is set to 0 at power-up. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1156 | unsigned char smx : 1; /**< Maximum SOCALRT Threshold Exceeded. Bit 14. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1157 | This bit is set to 1 whenever SOC rises above the maximum SOCALRT value. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1158 | This bit may or may not need to be cleared by system software to detect the next event. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1159 | See SS in the CONFIG register and SACFG in the MiscCFG register. Smx is set to 0 at power-up. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1160 | unsigned char br : 1; /**< Battery Removal. Bit 15. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1161 | This bit is set to 1 when the device detects that a battery has been removed from the system. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1162 | This bit must be cleared by system software to detect the next removal event. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1163 | Br is set to 0 at power-up. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1164 | } bits; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1165 | } reg_status_t; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1166 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1167 | /** |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1168 | * @brief VAlrtTh |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1169 | * |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1170 | * Address : 0x01 |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1171 | */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1172 | typedef union { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1173 | uint16_t raw; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1174 | struct |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1175 | { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1176 | unsigned char min_voltage_alrt : 8; /**< Minimum voltage reading. Bit 7:0, |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1177 | An alert is generated if the VCell register reading falls below this value. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1178 | Register type: special Set Min=0x00 to disable. Units of LSB are 20mV. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1179 | unsigned char max_voltage_alrt : 8; /**< Maximum voltage reading. Bit 15:8. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1180 | An alert is generated if the VCell register reading exceeds this value. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1181 | Register type: special Set Max=0xFF to disable. Units of LSB are 20mV. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1182 | } bits; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1183 | } reg_valrt_th_t; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1184 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1185 | /** |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1186 | * @brief TAlrtTh |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1187 | * |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1188 | * Address : 0x02 |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1189 | */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1190 | typedef union { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1191 | uint16_t raw; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1192 | struct |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1193 | { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1194 | unsigned char min_temp_alrt : 8; /**< Sets an alert threshold for minimum temperature. Bit 7:0. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1195 | Register type: special Set Min=0x80 to disable. Units of LSB are 1˚C. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1196 | unsigned char max_temp_alrt : 8; /**< Sets an alert threshold for maximum temperature. Bit 15:8. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1197 | Register type: special Set Max=0x7F to disable. Units of LSB are 1˚C. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1198 | } bits; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1199 | } reg_talrt_th_t; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1200 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1201 | /** |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1202 | * @brief SAlrtTh |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1203 | * |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1204 | * Address : 0x03 |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1205 | */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1206 | typedef union { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1207 | uint16_t raw; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1208 | struct |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1209 | { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1210 | unsigned char min_soc_alrt : 8; /**< Sets an alert for minimum SOC. Bit 7:0. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1211 | Register type: special This may be used for charge/discharge termination, or |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1212 | for power-management near empty. Set Min=0x00 to disable. Units of LSB are 1%. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1213 | unsigned char max_soc_alrt : 8; /**< Sets an alert for maximum SOC. Bit 15:8. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1214 | Register type: special This may be used for charge/discharge termination, or |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1215 | for power-management near empty. Set Max=0xFF to disable. Units of LSB are 1%. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1216 | } bits; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1217 | } reg_salrt_th_t; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1218 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1219 | /** |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1220 | * @brief FullSocThr |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1221 | * |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1222 | * Address : 0x13 |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1223 | */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1224 | typedef union { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1225 | uint16_t raw; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1226 | struct |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1227 | { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1228 | uint16_t full_soc_thr : 16; /**< FullSOCThr comes from OTP if the OTP register is enabled. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1229 | Otherwise it POR’s to a default of 95%. Bit 15:0. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1230 | LSB unit is 1/256%. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1231 | } bits; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1232 | } reg_full_soc_thr_t; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1233 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1234 | /** |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1235 | * @brief DesignCap |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1236 | * |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1237 | * Address : 0x18 |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1238 | */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1239 | typedef union { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1240 | uint16_t raw; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1241 | struct |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1242 | { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1243 | uint16_t design_cap : 16; /**< Bit 15:0. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1244 | Register type: capacity. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1245 | } bits; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1246 | } reg_design_cap_t; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1247 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1248 | /** |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1249 | * @brief Config |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1250 | * |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1251 | * Address : 0x1D |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1252 | */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1253 | typedef union { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1254 | uint16_t raw; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1255 | struct |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1256 | { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1257 | unsigned char ber : 1; /**< Enable alert on battery removal. Bit 0. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1258 | When Ber = 1, a battery-removal condition, as detected by the AIN pin voltage, |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1259 | triggers an alert. Set to 0 at power-up. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1260 | unsigned char bei : 1; /**< Enable alert on battery insertion. Bit 1. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1261 | When Bei = 1, a battery-insertion condition, as detected by the AIN pin voltage, |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1262 | triggers an alert. Set to 0 at power-up. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1263 | unsigned char aen : 1; /**< Enable alert on fuel-gauge outputs. Bit 2. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1264 | When Aen = 1, violation of any of the alert threshold register values by temperature, voltage, |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1265 | or SOC triggers an alert. This bit affects the INTB pin (FG_INT) operation only. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1266 | The Smx, Smn, Tmx, Tmn, Vmx, and Vmn bits are not disabled. This bit is set to 0 at power-up.*/ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1267 | unsigned char fthrm : 1; /**< Force Thermistor Bias Switch. Bit 3. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1268 | Set FTHRM = 1 to always enable the thermistor bias switch. With a standard 10kOhm thermistor, |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1269 | this adds an additional ~200μA to the current drain of the circuit. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1270 | This bit is set to 0 at power-up. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1271 | unsigned char ethrm : 1; /**< Enable Thermistor. Bit 4. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1272 | Set to logic 1 to enable the automatic THRM output bias and AIN measurement every 1.4s. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1273 | This bit is set to 1 at power-up. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1274 | unsigned char spr_5 : 1; /**< I2C Charge Fail Enable. Bit 5. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1275 | Set to 1 to enable I2CChgFail interrupt to drive the INTB pin. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1276 | This bit is not accessible by the fuel gauge firmware. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1277 | unsigned char i2csh : 1; /**< I2C Shutdown. Bit 6. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1278 | Set to logic 1 to force the device to enter shutdown mode if both SDA and SCL are held low for |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1279 | more than timeout of the SHDNTIMER register. This also configures the device to wake up on a |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1280 | rising edge of either SDA or SCL. Set to 1 at power-up. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1281 | unsigned char shdn : 1; /**< Shutdown. Bit 7. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1282 | Write this bit to logic 1 to force a shutdown of the device after timeout of the SHDNTIMER register. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1283 | SHDN is reset to 0 at power-up and upon exiting shutdown mode. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1284 | unsigned char tex : 1; /**< Temperature External. Bit 8. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1285 | When set to 1, the fuel gauge requires external temperature measurements to be written from the host. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1286 | When set to 0, measurements on the AIN pin are converted to a temperature value and stored |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1287 | in the Temperature register instead. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1288 | unsigned char ten : 1; /**< Enable Temperature Channel. Bit 9. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1289 | Set to 1 and set ETHRM or FTHRM to 1 to enable measurements on the AIN pin. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1290 | Ten is set to 1 at power-up. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1291 | unsigned char ainsh : 1; /**< AIN Pin Shutdown. Bit 10. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1292 | Set to 1 to enable device shutdown when the battery is removed. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1293 | The IC enters shutdown if the AIN pin remains high (AIN reading > VTHRM - VDETR) for longer than |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1294 | the timeout of the SHDNTIMER register. This also configures the device to wake up when AIN is pulled |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1295 | low on cell insertion. AINSH is set to 0 at power-up. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1296 | unsigned char spr_11 : 1; /**< Fuel Gauge Charger Control. Bit 11. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1297 | Set to 1 to enable MaxCharge (fuel-gauge controlled charging). */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1298 | unsigned char vs : 1; /**< Voltage ALRT Sticky. Bit 12. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1299 | When VS = 1, voltage alerts can only be cleared through software. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1300 | When VS = 0, voltage alerts are cleared automatically when the threshold is no longer exceeded. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1301 | VS is set to 0 at power-up. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1302 | unsigned char ts : 1; /**< Temperature ALRT Sticky. Bit 13. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1303 | When TS = 1, temperature alerts can only be cleared through software. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1304 | When TS = 0, temperature alerts are cleared automatically when the threshold is no longer exceeded. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1305 | TS is set to 1 at power-up. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1306 | unsigned char ss : 1; /**< SOC ALRT Sticky. Bit 14. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1307 | When SS = 1, SOC alerts can only be cleared through software. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1308 | When SS = 0, SOC alerts are cleared automatically when the threshold is no longer exceeded. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1309 | SS is set to 0 at power-up. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1310 | unsigned char spr_15 : 1; /**< Fuel gauge Charger Fail Enable. Bit 15. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1311 | Set to 1 to enable FGCHGFAIL interrupt to drive the INTB pin. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1312 | This bit is not accessible by the fuel gauge firmware. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1313 | } bits; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1314 | } reg_config_t; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1315 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1316 | /** |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1317 | * @brief IChgTerm |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1318 | * |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1319 | * Address : 0x1E |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1320 | */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1321 | typedef union { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1322 | uint16_t raw; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1323 | struct |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1324 | { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1325 | uint16_t ichg_term : 16; /**< Program IChgTerm to the exact charge termination current used in the application. Bit 15:0. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1326 | Register type: current. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1327 | } bits; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1328 | } reg_ichg_term_t; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1329 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1330 | /** |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1331 | * @brief DevName |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1332 | * |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1333 | * Address : 0x21 |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1334 | */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1335 | typedef union { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1336 | uint16_t raw; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1337 | struct |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1338 | { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1339 | uint16_t dev_name : 16; /**< holds revision information. Bit 15:0. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1340 | } bits; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1341 | } reg_dev_name_t; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1342 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1343 | /** |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1344 | * @brief FilterCfg |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1345 | * Use of unsigned char resulted in error in register bit field values. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1346 | * Thus, uint16_t is here used to define the size of bit fields. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1347 | * Address : 0x29 |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1348 | */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1349 | typedef union { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1350 | uint16_t raw; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1351 | struct |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1352 | { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1353 | uint16_t ncurr : 4; /**< Sets the time constant for the AverageCurrent register. Bit 3:0. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1354 | The default POR value of 4h gives a time constant of 11.25 seconds. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1355 | The equation setting the period is:AverageCurrent time constant = 175.8ms × 2^(2+NCURR).*/ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1356 | uint16_t navgcell : 3; /**< Sets the time constant for the AverageVCELL register. Bit 6:4. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1357 | The default POR value of 2h gives a time constant of 45.0s. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1358 | The equation setting the period is:AverageVCELL time constant = 175.8ms × 2(6+NAVGVCELL). */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1359 | uint16_t nmix : 4; /**< Sets the time constant for the mixing algorithm. Bit 10:7. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1360 | The default POR value of Dh gives a time constant of 12.8 hours = 46080s. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1361 | The equation setting the period is:Mixing Period = 175.8ms × 2(5+NMIX). */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1362 | uint16_t rsvd : 3; /**< Bit 13:11. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1363 | uint16_t nempty : 2; /**< Sets the filtering for empty learning for both the I_Avgempty and QRTable registers. Bit 15:14. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1364 | Iavg_empty is learned with(NEMPTY+3) right shifts. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1365 | QRTable is learned with (NEMPTY + sizeof(Iavgempty) – sizeof (AvgCurrent)) right shifts. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1366 | } bits; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1367 | } reg_filter_cfg_t; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1368 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1369 | /** |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1370 | * @brief IAvgEmpty |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1371 | * |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1372 | * Address : 0x36 |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1373 | */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1374 | typedef union { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1375 | uint16_t raw; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1376 | struct |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1377 | { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1378 | uint16_t rsvd : 16; /**< Register type: current. Bit 15:0. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1379 | } bits; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1380 | } reg_iavg_empty_t; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1381 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1382 | /** |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1383 | * @brief VEmpty |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1384 | * |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1385 | * Address : 0x3A |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1386 | */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1387 | typedef union { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1388 | uint16_t raw; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1389 | struct |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1390 | { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1391 | unsigned char v_recover : 7; /**< Recovery Voltage. Sets the voltage level for clearing empty detection. Bit 6:0. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1392 | Once the cell voltage rises above this point, empty voltage detection is reenabled. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1393 | A 40mV resolution gives a 0 to 5.08V range. This value is written to 3.68V at power-up. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1394 | uint16_t v_empty : 9; /**< Empty Voltage. Sets the voltage level for detecting empty. Bit 15:7. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1395 | A 10mV resolution gives a 0 to 5.11V range. This value is written to 3.12V at power-up.*/ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1396 | } bits; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1397 | } reg_v_empty_t; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1398 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1399 | /** |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1400 | * @brief Config2 |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1401 | * |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1402 | * Address : 0xBB |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1403 | */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1404 | typedef union { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1405 | uint16_t raw; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1406 | struct |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1407 | { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1408 | unsigned char isys_ncurr : 4; /**< Sets the time constant for the AvgISys register. Bit 3:0. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1409 | The default POR value of 0100b gives a time constant of 5.625. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1410 | The equation setting the period is: AvgISys time constant = 45s x 2(ISysNCurr-7).*/ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1411 | unsigned char qcvqen : 1; /**< Set OCVQen=1 to enable automatic empty compensation based on VFOCV information. Bit 4. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1412 | unsigned char ldmdl : 1; /**< Host sets this bit to 1 in order to initiate firmware to finish processing a newly loaded model. Bit 5. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1413 | Firmware clears this bit to zero to indicate that model loading is finished. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1414 | unsigned char tairt_en : 1; /**< Set to 1 to enable temperature alert. Bit 6. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1415 | If TAlrtEn=0, the alert on is disabled. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1416 | unsigned char dsocen : 1; /**< Set to 1 to enable SOC 1% change alert. Bit 7. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1417 | If dSCOCen=0, the alert on is disabled.*/ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1418 | unsigned char thm_hotairt_en : 1; /**< Set to 1 to enable ThmHotAlrtEn alert. Bit 8. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1419 | If ThmHotAlrtEn = 0, the alert on is disabled.*/ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1420 | unsigned char thmhot_en : 1; /**< Set to 1 to enable ThmHot function by comparing Voltage/Temp condition with THMHOT (40h). Bit 9. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1421 | ThmHot function is FG Charger input current limit control. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1422 | unsigned char fc_thmhot : 1; /**< Set to 1 to enable thermistor hot forcedly, regardless of actually sense thermistor temperature. Bit 10. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1423 | unsigned char spr : 5; /**< Bit 15:11. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1424 | } bits; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1425 | } reg_config2_t; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1426 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1427 | /** |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1428 | * @brief Temp |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1429 | * |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1430 | * Address : 0x08 |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1431 | */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1432 | typedef union { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1433 | uint16_t raw; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1434 | struct |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1435 | { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1436 | uint16_t temp : 16; /**< This is the most recent trimmed temperature measurement. Bit 15:0. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1437 | Temperature is measured every 1.4 seconds. Register type: temperature.*/ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1438 | } bits; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1439 | } reg_temp_t; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1440 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1441 | /** |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1442 | * @brief Vcell |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1443 | * |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1444 | * Address : 0x09 |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1445 | */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1446 | typedef union { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1447 | uint16_t raw; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1448 | struct |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1449 | { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1450 | uint16_t vcell : 16; /**< This is the most recent trimmed cell voltage result. Bit 15:0. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1451 | It represents an FIR average of raw results. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1452 | The VOLT_Raw is sampled every 175.8ms and gain and offset trim are applied to calculate VCELL. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1453 | Register type: voltage.*/ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1454 | } bits; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1455 | } reg_vcell_t; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1456 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1457 | /** |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1458 | * @brief Current |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1459 | * |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1460 | * Address : 0x0A |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1461 | */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1462 | typedef union { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1463 | uint16_t raw; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1464 | struct |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1465 | { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1466 | uint16_t current : 16; /**< Register type: current. Bit 15:0. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1467 | } bits; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1468 | } reg_current_t; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1469 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1470 | /** |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1471 | * @brief AvgCurrent |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1472 | * |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1473 | * Address : 0x0B |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1474 | */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1475 | typedef union { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1476 | uint16_t raw; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1477 | struct |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1478 | { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1479 | uint16_t avg_current : 16; /**< This is the 0.7s to 6.4hr (configurable) IIR average of the current. Bit 15:0. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1480 | This register represents the upper 16 bits of the 32-bit shift register that filters current. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1481 | The average should be set equal to Current upon startup. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1482 | Register type: current. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1483 | } bits; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1484 | } reg_avg_current_t; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1485 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1486 | /** |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1487 | * @brief AvgTA |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1488 | * |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1489 | * Address : 0x16 |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1490 | */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1491 | typedef union { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1492 | uint16_t raw; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1493 | struct |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1494 | { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1495 | uint16_t avg_ta : 16; /**< This is the 6min to 12hr (configurable) IIR average of the Temperature. Bit 15:0. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1496 | The average is set equal to Temp upon startup. Register type: temperature. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1497 | } bits; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1498 | } reg_avg_ta_t; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1499 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1500 | /** |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1501 | * @brief AvgVCell |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1502 | * |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1503 | * Address : 0x19 |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1504 | */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1505 | typedef union { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1506 | uint16_t raw; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1507 | struct |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1508 | { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1509 | uint16_t avg_vcell : 16; /**< This reports the 12s to 24min (configurable) IIR average of VCELL. Bit 15:0. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1510 | The average is set equal to VCELL at startup. Register type: voltage. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1511 | } bits; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1512 | } reg_avg_vcell_t; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1513 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1514 | /** |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1515 | * @brief MaxMinTemp |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1516 | * |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1517 | * Address : 0x1A |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1518 | */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1519 | typedef union { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1520 | uint16_t raw; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1521 | struct |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1522 | { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1523 | unsigned char min_temp : 8; /**< Records the minimum Temperature. Bit 7:0. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1524 | Register type: special Two's complement 8-bit value with 1°C resolution. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1525 | unsigned char max_temp : 8; /**< Records the maximum Temperature. Bit 15:8. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1526 | Register type: special Two's complement 8-bit value with 1°C resolution. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1527 | } bits; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1528 | } reg_max_min_temp_t; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1529 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1530 | /** |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1531 | * @brief MaxMinVolt |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1532 | * |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1533 | * Address : 0x1B |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1534 | */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1535 | typedef union { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1536 | uint16_t raw; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1537 | struct |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1538 | { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1539 | unsigned char min_volt : 8; /**< Records the VCELL minimum voltage. Bit 7:0. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1540 | Register type: The maximum and minimum voltages are each stored as 8-bit values with a 20mV resolution. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1541 | unsigned char max_volt : 8; /**< Records the VCELL maximum voltage. Bit 15:8. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1542 | Register type: The maximum and minimum voltages are each stored as 8-bit values with a 20mV resolution. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1543 | } bits; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1544 | } reg_max_min_volt_t; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1545 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1546 | /** |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1547 | * @brief MaxMinCurr |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1548 | * |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1549 | * Address : 0x1C |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1550 | */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1551 | typedef union { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1552 | uint16_t raw; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1553 | struct |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1554 | { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1555 | unsigned char min_charge_curr : 8; /**< Records the minimum charge current. Bit 7:0. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1556 | Register type: Two's complement 8-bit values with 0.4mV/RSENSE resolution. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1557 | unsigned char max_charge_curr : 8; /**< Records the maximum charge current. Bit 15:8. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1558 | Register type: Two's complement 8-bit values with 0.4mV/RSENSE resolution. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1559 | } bits; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1560 | } reg_max_min_curr_t; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1561 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1562 | /** |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1563 | * @brief AIN0 |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1564 | * |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1565 | * Address : 0x27 |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1566 | */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1567 | typedef union { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1568 | uint16_t raw; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1569 | struct |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1570 | { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1571 | uint16_t ain0 : 16; /**< The TGain, TOff, and Curve register values are then applied to this ratio-metric reading to |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1572 | convert the result to temperature. Bit 15:0. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1573 | Register type: special The MAX77658 stores the result as a ratio-metric value |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1574 | from 0% to 100% in the AIN register with an LSB of 0.0122%. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1575 | } bits; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1576 | } reg_ain0_t; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1577 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1578 | /** |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1579 | * @brief Timer |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1580 | * |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1581 | * Address : 0x3E |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1582 | */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1583 | typedef union { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1584 | uint16_t raw; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1585 | struct |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1586 | { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1587 | uint16_t timer : 16; /**< Timer increments once every task period. Bit 15:0. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1588 | With default TaskPeriod, timer has units 0.1758 seconds. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1589 | Register type: special The Timer register LSB is 175.8ms, giving a full-scale range of 0 to 3.2 hours. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1590 | } bits; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1591 | } reg_timer_t; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1592 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1593 | /** |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1594 | * @brief ShdnTimer |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1595 | * |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1596 | * Address : 0x3F |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1597 | */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1598 | typedef union { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1599 | uint16_t raw; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1600 | struct |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1601 | { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1602 | uint16_t shdnctr : 13; /**< Shutdown Counter. Bit 12:0. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1603 | This register counts the total amount of elapsed time since the shutdown trigger event. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1604 | Register type: special. This counter value stops and resets to 0 when the shutdown timeout completes. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1605 | The counter LSB is 1.4s. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1606 | unsigned char shdn_thr : 3; /**< Sets the shutdown timeout period from a minimum of 45s to a maximum of 1.6h. Bit 15:13. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1607 | The default POR value of 7h gives a shutdown delay of 1.6h. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1608 | Register type: special The equation setting the period is: Shutdown Timeout Period = 175.8ms × 2(8+THR). */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1609 | } bits; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1610 | } reg_shdn_timer_t; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1611 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1612 | /** |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1613 | * @brief TimerH |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1614 | * |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1615 | * Address : 0xBE |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1616 | */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1617 | typedef union { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1618 | uint16_t raw; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1619 | struct |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1620 | { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1621 | uint16_t timerh : 16; /**< TIMERH is a 16-bit high-word extension to the TIMER register. Bit 15:0. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1622 | This extension allows time counting up to 24 years. This register can be enabled in the save & restore registers. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1623 | Register type: special A 3.2-hour LSb gives a full-scale range for the register of up to 23.94 years. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1624 | } bits; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1625 | } reg_timerh_t; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1626 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1627 | /** |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1628 | * @brief RepCap |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1629 | * |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1630 | * Address : 0x05 |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1631 | */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1632 | typedef union { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1633 | uint16_t raw; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1634 | struct |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1635 | { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1636 | uint16_t rep_cap : 16; /**< RepCap or reported capacity. Bit 15:0. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1637 | A filtered version of the AvCap register that prevents large jumps in the reported |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1638 | value caused by changes in the application such as abrupt changes in tempreature or |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1639 | load current. Register type: capacity. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1640 | } bits; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1641 | } reg_rep_cap_t; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1642 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1643 | /** |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1644 | * @brief RepSOC |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1645 | * |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1646 | * Address : 0x06 |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1647 | */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1648 | typedef union { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1649 | uint16_t raw; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1650 | struct |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1651 | { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1652 | uint16_t rep_soc : 16; /**< RepSOC is the complete calculation for State of Charge. Bit 15:0. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1653 | This includes all processing, including: ModelGauge Mixing, Empty Compensation. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1654 | Register type: percentage. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1655 | } bits; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1656 | } reg_rep_soc_t; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1657 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1658 | /** |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1659 | * @brief AvSOC |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1660 | * |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1661 | * Address : 0x0E |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1662 | */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1663 | typedef union { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1664 | uint16_t raw; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1665 | struct |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1666 | { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1667 | uint16_t av_soc : 16; /**< This register provides unfiltered results. Bit 15:0. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1668 | Jumps in the reported values can be caused by abrupt changes in load current or temperature. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1669 | See the Empty Compensation section for details. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1670 | This includes all processing, including: ModelGauge Mixing, Empty Compensation. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1671 | Register type: percentage. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1672 | } bits; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1673 | } reg_av_soc_t; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1674 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1675 | /** |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1676 | * @brief FullCapRep |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1677 | * |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1678 | * Address : 0x10 |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1679 | */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1680 | typedef union { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1681 | uint16_t raw; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1682 | struct |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1683 | { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1684 | uint16_t full_cap_rep : 16; /**< Most applications should only monitor FullCapRep, instead of FullCap or FullCapNom. Bit 15:0. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1685 | A new full-capacity value is calculated at the end of every charge cycle in the application. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1686 | Register type: capacity. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1687 | } bits; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1688 | } reg_full_cap_rep_t; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1689 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1690 | /** |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1691 | * @brief TTE |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1692 | * |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1693 | * Address : 0x11 |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1694 | */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1695 | typedef union { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1696 | uint16_t raw; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1697 | struct |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1698 | { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1699 | uint16_t tte : 16; /**< The TTE value is determined by relating AvCap with AvgCurrent. Bit 15:0. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1700 | The corresponding AvgCurrent filtering gives a delay in TTE but provides more stable results. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1701 | Register type: time. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1702 | } bits; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1703 | } reg_tte_t; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1704 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1705 | /** |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1706 | * @brief RCell |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1707 | * |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1708 | * Address : 0x14 |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1709 | */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1710 | typedef union { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1711 | uint16_t raw; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1712 | struct |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1713 | { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1714 | uint16_t rcell : 16; /**< This register provides the calculated internal resistance of the cell. Bit 15:0. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1715 | RCell is determined by comparing open-circuit voltage (VFOCV) against measured voltage (VCell) |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1716 | over a long time period while under load or charge current. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1717 | Register type: resistance. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1718 | } bits; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1719 | } reg_rcell_t; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1720 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1721 | /** |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1722 | * @brief Cycles |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1723 | * |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1724 | * Address : 0x17 |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1725 | */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1726 | typedef union { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1727 | uint16_t raw; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1728 | struct |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1729 | { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1730 | uint16_t cycles : 16; /**< This register provides the calculated internal resistance of the cell. Bit 15:0. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1731 | RCell is determined by comparing open-circuit voltage (VFOCV) against measured voltage (VCell) |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1732 | over a long time period while under load or charge current. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1733 | Register type: resistance. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1734 | } bits; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1735 | } reg_cycles_t; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1736 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1737 | /** |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1738 | * @brief AvCap |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1739 | * |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1740 | * Address : 0x1F |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1741 | */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1742 | typedef union { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1743 | uint16_t raw; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1744 | struct |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1745 | { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1746 | uint16_t av_cap : 16; /**< This is the remaining capacity with coulomb-counter + Voltage-Fuel-Gauge mixing, |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1747 | after accounting for capacity that is unavailable due to the discharge rate. Bit 15:0. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1748 | Register type: capacity. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1749 | } bits; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1750 | } reg_av_cap_t; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1751 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1752 | /** |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1753 | * @brief TTF |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1754 | * |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1755 | * Address : 0x20 |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1756 | */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1757 | typedef union { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1758 | uint16_t raw; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1759 | struct |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1760 | { |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1761 | uint16_t ttf : 16; /**< The TTF value is determined by learning the constant current and |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1762 | constant voltage portions of the charge cycle based on experience of prior charge cycles. Bit 15:0. |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1763 | Register type: time. */ |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1764 | } bits; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1765 | } reg_ttf_t; |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1766 | |
| metin.ozkan@analog.com | 0:00d2a8670533 | 1767 | #endif /* MAX77658_REGS_H_ */ |