strat des robots

Fork of CRAC-Strat_2017 by CRAC Team

Committer:
ClementBreteau
Date:
Fri May 19 17:14:07 2017 +0000
Revision:
17:d1594579eec6
Parent:
0:ad97421fb1fb
strat du robot, 19-05-2017, 19h

Who changed what in which revision?

UserRevisionLine numberNew contents of line
antbig 0:ad97421fb1fb 1
antbig 0:ad97421fb1fb 2 #ifndef MBED_DEVICE_H
antbig 0:ad97421fb1fb 3 #define MBED_DEVICE_H
antbig 0:ad97421fb1fb 4
antbig 0:ad97421fb1fb 5 #if defined(TARGET_LPC1768) || defined(TARGET_LPC2368)
antbig 0:ad97421fb1fb 6
antbig 0:ad97421fb1fb 7 #define DEVICE_PORTIN 1
antbig 0:ad97421fb1fb 8 #define DEVICE_PORTOUT 1
antbig 0:ad97421fb1fb 9 #define DEVICE_PORTINOUT 1
antbig 0:ad97421fb1fb 10
antbig 0:ad97421fb1fb 11 #define DEVICE_INTERRUPTIN 1
antbig 0:ad97421fb1fb 12
antbig 0:ad97421fb1fb 13 #define DEVICE_ANALOGIN 1
antbig 0:ad97421fb1fb 14 #define DEVICE_ANALOGOUT 1
antbig 0:ad97421fb1fb 15
antbig 0:ad97421fb1fb 16 #define DEVICE_SERIAL 1
antbig 0:ad97421fb1fb 17
antbig 0:ad97421fb1fb 18 #define DEVICE_I2C 1
antbig 0:ad97421fb1fb 19 #define DEVICE_I2CSLAVE 1
antbig 0:ad97421fb1fb 20
antbig 0:ad97421fb1fb 21 #define DEVICE_SPI 1
antbig 0:ad97421fb1fb 22 #define DEVICE_SPISLAVE 1
antbig 0:ad97421fb1fb 23
antbig 0:ad97421fb1fb 24 #define DEVICE_CAN 1
antbig 0:ad97421fb1fb 25
antbig 0:ad97421fb1fb 26 #define DEVICE_RTC 1
antbig 0:ad97421fb1fb 27
antbig 0:ad97421fb1fb 28 #define DEVICE_ETHERNET 1
antbig 0:ad97421fb1fb 29
antbig 0:ad97421fb1fb 30 #define DEVICE_PWMOUT 1
antbig 0:ad97421fb1fb 31
antbig 0:ad97421fb1fb 32 #elif defined(TARGET_LPC11U24)
antbig 0:ad97421fb1fb 33
antbig 0:ad97421fb1fb 34 #define DEVICE_PORTIN 1
antbig 0:ad97421fb1fb 35 #define DEVICE_PORTOUT 1
antbig 0:ad97421fb1fb 36 #define DEVICE_PORTINOUT 1
antbig 0:ad97421fb1fb 37
antbig 0:ad97421fb1fb 38 #define DEVICE_INTERRUPTIN 1
antbig 0:ad97421fb1fb 39
antbig 0:ad97421fb1fb 40 #define DEVICE_ANALOGIN 1
antbig 0:ad97421fb1fb 41 #define DEVICE_ANALOGOUT 0
antbig 0:ad97421fb1fb 42
antbig 0:ad97421fb1fb 43 #define DEVICE_SERIAL 1
antbig 0:ad97421fb1fb 44
antbig 0:ad97421fb1fb 45 #define DEVICE_I2C 1
antbig 0:ad97421fb1fb 46 #define DEVICE_I2CSLAVE 1
antbig 0:ad97421fb1fb 47
antbig 0:ad97421fb1fb 48 #define DEVICE_SPI 1
antbig 0:ad97421fb1fb 49 #define DEVICE_SPISLAVE 1
antbig 0:ad97421fb1fb 50
antbig 0:ad97421fb1fb 51 #define DEVICE_CAN 0
antbig 0:ad97421fb1fb 52
antbig 0:ad97421fb1fb 53 #define DEVICE_RTC 0
antbig 0:ad97421fb1fb 54
antbig 0:ad97421fb1fb 55 #define DEVICE_ETHERNET 0
antbig 0:ad97421fb1fb 56
antbig 0:ad97421fb1fb 57 #define DEVICE_PWMOUT 1
antbig 0:ad97421fb1fb 58
antbig 0:ad97421fb1fb 59 #endif
antbig 0:ad97421fb1fb 60
antbig 0:ad97421fb1fb 61 #endif
antbig 0:ad97421fb1fb 62