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mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_NUCLEO_F401RE/stm32f4xx_hal_tim_ex.h@77:869cf507173a, 2014-02-14 (annotated)

Committer:
emilmont
Date:
Fri Feb 14 14:36:43 2014 +0000
Revision:
77:869cf507173a
Child:
81:7d30d6019079
Release 77 of the mbed library



Main changes:

* Add target NUCLEO_F030R8

* Add target NUCLEO_F401RE

* Add target NUCLEO_F103RB

* Add target NUCLEO_L152RE

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 77:869cf507173a 1 /**
emilmont 77:869cf507173a 2 ******************************************************************************
emilmont 77:869cf507173a 3 * @file stm32f4xx_hal_tim_ex.h
emilmont 77:869cf507173a 4 * @author MCD Application Team
emilmont 77:869cf507173a 5 * @version V1.0.0RC2
emilmont 77:869cf507173a 6 * @date 04-February-2014
emilmont 77:869cf507173a 7 * @brief Header file of TIM HAL Extension module.
emilmont 77:869cf507173a 8 ******************************************************************************
emilmont 77:869cf507173a 9 * @attention
emilmont 77:869cf507173a 10 *
emilmont 77:869cf507173a 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
emilmont 77:869cf507173a 12 *
emilmont 77:869cf507173a 13 * Redistribution and use in source and binary forms, with or without modification,
emilmont 77:869cf507173a 14 * are permitted provided that the following conditions are met:
emilmont 77:869cf507173a 15 * 1. Redistributions of source code must retain the above copyright notice,
emilmont 77:869cf507173a 16 * this list of conditions and the following disclaimer.
emilmont 77:869cf507173a 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
emilmont 77:869cf507173a 18 * this list of conditions and the following disclaimer in the documentation
emilmont 77:869cf507173a 19 * and/or other materials provided with the distribution.
emilmont 77:869cf507173a 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
emilmont 77:869cf507173a 21 * may be used to endorse or promote products derived from this software
emilmont 77:869cf507173a 22 * without specific prior written permission.
emilmont 77:869cf507173a 23 *
emilmont 77:869cf507173a 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
emilmont 77:869cf507173a 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
emilmont 77:869cf507173a 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
emilmont 77:869cf507173a 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
emilmont 77:869cf507173a 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
emilmont 77:869cf507173a 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
emilmont 77:869cf507173a 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
emilmont 77:869cf507173a 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
emilmont 77:869cf507173a 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
emilmont 77:869cf507173a 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
emilmont 77:869cf507173a 34 *
emilmont 77:869cf507173a 35 ******************************************************************************
emilmont 77:869cf507173a 36 */
emilmont 77:869cf507173a 37
emilmont 77:869cf507173a 38 /* Define to prevent recursive inclusion -------------------------------------*/
emilmont 77:869cf507173a 39 #ifndef __STM32F4xx_HAL_TIM_EX_H
emilmont 77:869cf507173a 40 #define __STM32F4xx_HAL_TIM_EX_H
emilmont 77:869cf507173a 41
emilmont 77:869cf507173a 42 #ifdef __cplusplus
emilmont 77:869cf507173a 43 extern "C" {
emilmont 77:869cf507173a 44 #endif
emilmont 77:869cf507173a 45
emilmont 77:869cf507173a 46 /* Includes ------------------------------------------------------------------*/
emilmont 77:869cf507173a 47 #include "stm32f4xx_hal_def.h"
emilmont 77:869cf507173a 48
emilmont 77:869cf507173a 49 /** @addtogroup STM32F4xx_HAL
emilmont 77:869cf507173a 50 * @{
emilmont 77:869cf507173a 51 */
emilmont 77:869cf507173a 52
emilmont 77:869cf507173a 53 /** @addtogroup TIMEx
emilmont 77:869cf507173a 54 * @{
emilmont 77:869cf507173a 55 */
emilmont 77:869cf507173a 56
emilmont 77:869cf507173a 57 /* Exported types ------------------------------------------------------------*/
emilmont 77:869cf507173a 58
emilmont 77:869cf507173a 59 /**
emilmont 77:869cf507173a 60 * @brief TIM Hall sensor Configuration Structure definition
emilmont 77:869cf507173a 61 */
emilmont 77:869cf507173a 62
emilmont 77:869cf507173a 63 typedef struct
emilmont 77:869cf507173a 64 {
emilmont 77:869cf507173a 65
emilmont 77:869cf507173a 66 uint32_t IC1Polarity; /*!< Specifies the active edge of the input signal.
emilmont 77:869cf507173a 67 This parameter can be a value of @ref TIM_Input_Capture_Polarity */
emilmont 77:869cf507173a 68
emilmont 77:869cf507173a 69 uint32_t IC1Prescaler; /*!< Specifies the Input Capture Prescaler.
emilmont 77:869cf507173a 70 This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
emilmont 77:869cf507173a 71
emilmont 77:869cf507173a 72 uint32_t IC1Filter; /*!< Specifies the input capture filter.
emilmont 77:869cf507173a 73 This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
emilmont 77:869cf507173a 74 uint32_t Commutation_Delay; /*!< Specifies the pulse value to be loaded into the Capture Compare Register.
emilmont 77:869cf507173a 75 This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
emilmont 77:869cf507173a 76 } TIM_HallSensor_InitTypeDef;
emilmont 77:869cf507173a 77
emilmont 77:869cf507173a 78 /**
emilmont 77:869cf507173a 79 * @brief TIM Master configuration Structure definition
emilmont 77:869cf507173a 80 */
emilmont 77:869cf507173a 81 typedef struct {
emilmont 77:869cf507173a 82 uint32_t MasterOutputTrigger; /*!< Trigger output (TRGO) selection
emilmont 77:869cf507173a 83 This parameter can be a value of @ref TIM_Master_Mode_Selection */
emilmont 77:869cf507173a 84 uint32_t MasterSlaveMode; /*!< Master/slave mode selection
emilmont 77:869cf507173a 85 This parameter can be a value of @ref TIM_Master_Slave_Mode */
emilmont 77:869cf507173a 86 }TIM_MasterConfigTypeDef;
emilmont 77:869cf507173a 87
emilmont 77:869cf507173a 88 /**
emilmont 77:869cf507173a 89 * @brief TIM Break and Dead time configuration Structure definition
emilmont 77:869cf507173a 90 */
emilmont 77:869cf507173a 91 typedef struct
emilmont 77:869cf507173a 92 {
emilmont 77:869cf507173a 93 uint32_t OffStateRunMode; /*!< TIM off state in run mode
emilmont 77:869cf507173a 94 This parameter can be a value of @ref TIM_OSSR_Off_State_Selection_for_Run_mode_state */
emilmont 77:869cf507173a 95 uint32_t OffStateIDLEMode; /*!< TIM off state in IDLE mode
emilmont 77:869cf507173a 96 This parameter can be a value of @ref TIM_OSSI_Off_State_Selection_for_Idle_mode_state */
emilmont 77:869cf507173a 97 uint32_t LockLevel; /*!< TIM Lock level
emilmont 77:869cf507173a 98 This parameter can be a value of @ref TIM_Lock_level */
emilmont 77:869cf507173a 99 uint32_t DeadTime; /*!< TIM dead Time
emilmont 77:869cf507173a 100 This parameter can be a number between Min_Data = 0x00 and Max_Data = 0xFF */
emilmont 77:869cf507173a 101 uint32_t BreakState; /*!< TIM Break State
emilmont 77:869cf507173a 102 This parameter can be a value of @ref TIM_Break_Input_enable_disable */
emilmont 77:869cf507173a 103 uint32_t BreakPolarity; /*!< TIM Break input polarity
emilmont 77:869cf507173a 104 This parameter can be a value of @ref TIM_Break_Polarity */
emilmont 77:869cf507173a 105 uint32_t AutomaticOutput; /*!< TIM Automatic Output Enable state
emilmont 77:869cf507173a 106 This parameter can be a value of @ref TIM_AOE_Bit_Set_Reset */
emilmont 77:869cf507173a 107 }TIM_BreakDeadTimeConfigTypeDef;
emilmont 77:869cf507173a 108
emilmont 77:869cf507173a 109 /* Exported constants --------------------------------------------------------*/
emilmont 77:869cf507173a 110 /** @defgroup TIMEx_Exported_Constants
emilmont 77:869cf507173a 111 * @{
emilmont 77:869cf507173a 112 */
emilmont 77:869cf507173a 113
emilmont 77:869cf507173a 114 /** @defgroup TIMEx_Remap
emilmont 77:869cf507173a 115 * @{
emilmont 77:869cf507173a 116 */
emilmont 77:869cf507173a 117
emilmont 77:869cf507173a 118 #define TIM_TIM2_TIM8_TRGO (0x00000000)
emilmont 77:869cf507173a 119 #define TIM_TIM2_ETH_PTP (0x00000400)
emilmont 77:869cf507173a 120 #define TIM_TIM2_USBFS_SOF (0x00000800)
emilmont 77:869cf507173a 121 #define TIM_TIM2_USBHS_SOF (0x00000C00)
emilmont 77:869cf507173a 122 #define TIM_TIM5_GPIO (0x00000000)
emilmont 77:869cf507173a 123 #define TIM_TIM5_LSI (0x00000040)
emilmont 77:869cf507173a 124 #define TIM_TIM5_LSE (0x00000080)
emilmont 77:869cf507173a 125 #define TIM_TIM5_RTC (0x000000C0)
emilmont 77:869cf507173a 126 #define TIM_TIM11_GPIO (0x00000000)
emilmont 77:869cf507173a 127 #define TIM_TIM11_HSE (0x00000002)
emilmont 77:869cf507173a 128
emilmont 77:869cf507173a 129 #define IS_TIM_REMAP(TIM_REMAP) (((TIM_REMAP) == TIM_TIM2_TIM8_TRGO)||\
emilmont 77:869cf507173a 130 ((TIM_REMAP) == TIM_TIM2_ETH_PTP)||\
emilmont 77:869cf507173a 131 ((TIM_REMAP) == TIM_TIM2_USBFS_SOF)||\
emilmont 77:869cf507173a 132 ((TIM_REMAP) == TIM_TIM2_USBHS_SOF)||\
emilmont 77:869cf507173a 133 ((TIM_REMAP) == TIM_TIM5_GPIO)||\
emilmont 77:869cf507173a 134 ((TIM_REMAP) == TIM_TIM5_LSI)||\
emilmont 77:869cf507173a 135 ((TIM_REMAP) == TIM_TIM5_LSE)||\
emilmont 77:869cf507173a 136 ((TIM_REMAP) == TIM_TIM5_RTC)||\
emilmont 77:869cf507173a 137 ((TIM_REMAP) == TIM_TIM11_GPIO)||\
emilmont 77:869cf507173a 138 ((TIM_REMAP) == TIM_TIM11_HSE))
emilmont 77:869cf507173a 139
emilmont 77:869cf507173a 140 /**
emilmont 77:869cf507173a 141 * @}
emilmont 77:869cf507173a 142 */
emilmont 77:869cf507173a 143
emilmont 77:869cf507173a 144 /**
emilmont 77:869cf507173a 145 * @}
emilmont 77:869cf507173a 146 */
emilmont 77:869cf507173a 147
emilmont 77:869cf507173a 148 /* Exported macro ------------------------------------------------------------*/
emilmont 77:869cf507173a 149
emilmont 77:869cf507173a 150 /* Exported functions --------------------------------------------------------*/
emilmont 77:869cf507173a 151
emilmont 77:869cf507173a 152 /* Timer Hall Sensor functions **********************************************/
emilmont 77:869cf507173a 153 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef* htim, TIM_HallSensor_InitTypeDef* sConfig);
emilmont 77:869cf507173a 154 HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef* htim);
emilmont 77:869cf507173a 155
emilmont 77:869cf507173a 156 void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef* htim);
emilmont 77:869cf507173a 157 void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef* htim);
emilmont 77:869cf507173a 158
emilmont 77:869cf507173a 159 /* Blocking mode: Polling */
emilmont 77:869cf507173a 160 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef* htim);
emilmont 77:869cf507173a 161 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef* htim);
emilmont 77:869cf507173a 162 /* Non-Blocking mode: Interrupt */
emilmont 77:869cf507173a 163 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef* htim);
emilmont 77:869cf507173a 164 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef* htim);
emilmont 77:869cf507173a 165 /* Non-Blocking mode: DMA */
emilmont 77:869cf507173a 166 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef* htim, uint32_t *pData, uint16_t Length);
emilmont 77:869cf507173a 167 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef* htim);
emilmont 77:869cf507173a 168
emilmont 77:869cf507173a 169 /* Timer Complementary Output Compare functions *****************************/
emilmont 77:869cf507173a 170 /* Blocking mode: Polling */
emilmont 77:869cf507173a 171 HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef* htim, uint32_t Channel);
emilmont 77:869cf507173a 172 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef* htim, uint32_t Channel);
emilmont 77:869cf507173a 173
emilmont 77:869cf507173a 174 /* Non-Blocking mode: Interrupt */
emilmont 77:869cf507173a 175 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef* htim, uint32_t Channel);
emilmont 77:869cf507173a 176 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef* htim, uint32_t Channel);
emilmont 77:869cf507173a 177
emilmont 77:869cf507173a 178 /* Non-Blocking mode: DMA */
emilmont 77:869cf507173a 179 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef* htim, uint32_t Channel, uint32_t *pData, uint16_t Length);
emilmont 77:869cf507173a 180 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef* htim, uint32_t Channel);
emilmont 77:869cf507173a 181
emilmont 77:869cf507173a 182 /* Timer Complementary PWM functions ****************************************/
emilmont 77:869cf507173a 183 /* Blocking mode: Polling */
emilmont 77:869cf507173a 184 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef* htim, uint32_t Channel);
emilmont 77:869cf507173a 185 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef* htim, uint32_t Channel);
emilmont 77:869cf507173a 186
emilmont 77:869cf507173a 187 /* Non-Blocking mode: Interrupt */
emilmont 77:869cf507173a 188 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef* htim, uint32_t Channel);
emilmont 77:869cf507173a 189 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef* htim, uint32_t Channel);
emilmont 77:869cf507173a 190 /* Non-Blocking mode: DMA */
emilmont 77:869cf507173a 191 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef* htim, uint32_t Channel, uint32_t *pData, uint16_t Length);
emilmont 77:869cf507173a 192 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef* htim, uint32_t Channel);
emilmont 77:869cf507173a 193
emilmont 77:869cf507173a 194 /* Timer Complementary One Pulse functions **********************************/
emilmont 77:869cf507173a 195 /* Blocking mode: Polling */
emilmont 77:869cf507173a 196 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef* htim, uint32_t OutputChannel);
emilmont 77:869cf507173a 197 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef* htim, uint32_t OutputChannel);
emilmont 77:869cf507173a 198
emilmont 77:869cf507173a 199 /* Non-Blocking mode: Interrupt */
emilmont 77:869cf507173a 200 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef* htim, uint32_t OutputChannel);
emilmont 77:869cf507173a 201 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef* htim, uint32_t OutputChannel);
emilmont 77:869cf507173a 202
emilmont 77:869cf507173a 203 /* Extnsion Control functions ************************************************/
emilmont 77:869cf507173a 204 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent(TIM_HandleTypeDef* htim, uint32_t InputTrigger, uint32_t CommutationSource);
emilmont 77:869cf507173a 205 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_IT(TIM_HandleTypeDef* htim, uint32_t InputTrigger, uint32_t CommutationSource);
emilmont 77:869cf507173a 206 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_DMA(TIM_HandleTypeDef* htim, uint32_t InputTrigger, uint32_t CommutationSource);
emilmont 77:869cf507173a 207 HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef* htim, TIM_MasterConfigTypeDef * sMasterConfig);
emilmont 77:869cf507173a 208 HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef* htim, TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig);
emilmont 77:869cf507173a 209 HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef* htim, uint32_t Remap);
emilmont 77:869cf507173a 210
emilmont 77:869cf507173a 211 /* Extension Callback *********************************************************/
emilmont 77:869cf507173a 212 __weak void HAL_TIMEx_CommutationCallback(TIM_HandleTypeDef* htim);
emilmont 77:869cf507173a 213 __weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef* htim);
emilmont 77:869cf507173a 214 void HAL_TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma);
emilmont 77:869cf507173a 215
emilmont 77:869cf507173a 216 /* Extension Peripheral State functions **************************************/
emilmont 77:869cf507173a 217 HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef* htim);
emilmont 77:869cf507173a 218
emilmont 77:869cf507173a 219 /**
emilmont 77:869cf507173a 220 * @}
emilmont 77:869cf507173a 221 */
emilmont 77:869cf507173a 222
emilmont 77:869cf507173a 223 /**
emilmont 77:869cf507173a 224 * @}
emilmont 77:869cf507173a 225 */
emilmont 77:869cf507173a 226
emilmont 77:869cf507173a 227 #ifdef __cplusplus
emilmont 77:869cf507173a 228 }
emilmont 77:869cf507173a 229 #endif
emilmont 77:869cf507173a 230
emilmont 77:869cf507173a 231 #endif /* __STM32F4xx_HAL_TIM_EX_H */
emilmont 77:869cf507173a 232
emilmont 77:869cf507173a 233 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/