mbed - The official Mbed 2 C/C++ SDK provides the softwa…

Users » mbed_official » Code » mbed

mbed official / mbed

The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Dependents: hello SerialTestv11 SerialTestv12 Sierpinski ... more

mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_NUCLEO_L152RE/stm32l1xx_pwr.h@89:552587b429a1, 2014-09-12 (annotated)

Committer:: bogdanm
Date:: Fri Sep 12 16:41:52 2014 +0100
Revision:: 89:552587b429a1
Parent:: 81:7d30d6019079

Release 89 of the mbed library



Main changes:



- low power optimizations for Nordic targets

- code structure changes for Freescale K64F targets

- bug fixes in various backends

Who changed what in which revision?

User	Revision	Line number	New contents of line
emilmont	77:869cf507173a	1	/**
emilmont	77:869cf507173a	2	******************************************************************************
emilmont	77:869cf507173a	3	* @file stm32l1xx_pwr.h
emilmont	77:869cf507173a	4	* @author MCD Application Team
emilmont	77:869cf507173a	5	* @version V1.3.0
emilmont	77:869cf507173a	6	* @date 31-January-2014
emilmont	77:869cf507173a	7	* @brief This file contains all the functions prototypes for the PWR firmware
emilmont	77:869cf507173a	8	* library.
emilmont	77:869cf507173a	9	******************************************************************************
emilmont	77:869cf507173a	10	* @attention
emilmont	77:869cf507173a	11	*
bogdanm	81:7d30d6019079	12	* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
emilmont	77:869cf507173a	13	*
bogdanm	81:7d30d6019079	14	* Redistribution and use in source and binary forms, with or without modification,
bogdanm	81:7d30d6019079	15	* are permitted provided that the following conditions are met:
bogdanm	81:7d30d6019079	16	* 1. Redistributions of source code must retain the above copyright notice,
bogdanm	81:7d30d6019079	17	* this list of conditions and the following disclaimer.
bogdanm	81:7d30d6019079	18	* 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm	81:7d30d6019079	19	* this list of conditions and the following disclaimer in the documentation
bogdanm	81:7d30d6019079	20	* and/or other materials provided with the distribution.
bogdanm	81:7d30d6019079	21	* 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm	81:7d30d6019079	22	* may be used to endorse or promote products derived from this software
bogdanm	81:7d30d6019079	23	* without specific prior written permission.
emilmont	77:869cf507173a	24	*
bogdanm	81:7d30d6019079	25	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm	81:7d30d6019079	26	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm	81:7d30d6019079	27	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm	81:7d30d6019079	28	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm	81:7d30d6019079	29	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm	81:7d30d6019079	30	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm	81:7d30d6019079	31	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm	81:7d30d6019079	32	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm	81:7d30d6019079	33	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm	81:7d30d6019079	34	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
emilmont	77:869cf507173a	35	*
emilmont	77:869cf507173a	36	******************************************************************************
emilmont	77:869cf507173a	37	*/
emilmont	77:869cf507173a	38
emilmont	77:869cf507173a	39	/* Define to prevent recursive inclusion -------------------------------------*/
emilmont	77:869cf507173a	40	#ifndef __STM32L1xx_PWR_H
emilmont	77:869cf507173a	41	#define __STM32L1xx_PWR_H
emilmont	77:869cf507173a	42
emilmont	77:869cf507173a	43	#ifdef __cplusplus
emilmont	77:869cf507173a	44	extern "C" {
emilmont	77:869cf507173a	45	#endif
emilmont	77:869cf507173a	46
emilmont	77:869cf507173a	47	/* Includes ------------------------------------------------------------------*/
emilmont	77:869cf507173a	48	#include "stm32l1xx.h"
emilmont	77:869cf507173a	49
emilmont	77:869cf507173a	50	/** @addtogroup STM32L1xx_StdPeriph_Driver
emilmont	77:869cf507173a	51	* @{
emilmont	77:869cf507173a	52	*/
emilmont	77:869cf507173a	53
emilmont	77:869cf507173a	54	/** @addtogroup PWR
emilmont	77:869cf507173a	55	* @{
emilmont	77:869cf507173a	56	*/
emilmont	77:869cf507173a	57
emilmont	77:869cf507173a	58	/* Exported types ------------------------------------------------------------*/
emilmont	77:869cf507173a	59	/* Exported constants --------------------------------------------------------*/
emilmont	77:869cf507173a	60
emilmont	77:869cf507173a	61	/** @defgroup PWR_Exported_Constants
emilmont	77:869cf507173a	62	* @{
emilmont	77:869cf507173a	63	*/
emilmont	77:869cf507173a	64
emilmont	77:869cf507173a	65	/** @defgroup PWR_PVD_detection_level
emilmont	77:869cf507173a	66	* @{
emilmont	77:869cf507173a	67	*/
emilmont	77:869cf507173a	68
emilmont	77:869cf507173a	69	#define PWR_PVDLevel_0 PWR_CR_PLS_LEV0
emilmont	77:869cf507173a	70	#define PWR_PVDLevel_1 PWR_CR_PLS_LEV1
emilmont	77:869cf507173a	71	#define PWR_PVDLevel_2 PWR_CR_PLS_LEV2
emilmont	77:869cf507173a	72	#define PWR_PVDLevel_3 PWR_CR_PLS_LEV3
emilmont	77:869cf507173a	73	#define PWR_PVDLevel_4 PWR_CR_PLS_LEV4
emilmont	77:869cf507173a	74	#define PWR_PVDLevel_5 PWR_CR_PLS_LEV5
emilmont	77:869cf507173a	75	#define PWR_PVDLevel_6 PWR_CR_PLS_LEV6
emilmont	77:869cf507173a	76	#define PWR_PVDLevel_7 PWR_CR_PLS_LEV7 /* External input analog voltage
emilmont	77:869cf507173a	77	(Compare internally to VREFINT) */
emilmont	77:869cf507173a	78	#define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLevel_0) \|\| ((LEVEL) == PWR_PVDLevel_1)\|\| \
emilmont	77:869cf507173a	79	((LEVEL) == PWR_PVDLevel_2) \|\| ((LEVEL) == PWR_PVDLevel_3)\|\| \
emilmont	77:869cf507173a	80	((LEVEL) == PWR_PVDLevel_4) \|\| ((LEVEL) == PWR_PVDLevel_5)\|\| \
emilmont	77:869cf507173a	81	((LEVEL) == PWR_PVDLevel_6) \|\| ((LEVEL) == PWR_PVDLevel_7))
emilmont	77:869cf507173a	82	/**
emilmont	77:869cf507173a	83	* @}
emilmont	77:869cf507173a	84	*/
emilmont	77:869cf507173a	85
emilmont	77:869cf507173a	86	/** @defgroup PWR_WakeUp_Pins
emilmont	77:869cf507173a	87	* @{
emilmont	77:869cf507173a	88	*/
emilmont	77:869cf507173a	89
emilmont	77:869cf507173a	90	#define PWR_WakeUpPin_1 ((uint32_t)0x00000000)
emilmont	77:869cf507173a	91	#define PWR_WakeUpPin_2 ((uint32_t)0x00000004)
emilmont	77:869cf507173a	92	#define PWR_WakeUpPin_3 ((uint32_t)0x00000008)
emilmont	77:869cf507173a	93	#define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WakeUpPin_1) \|\| \
emilmont	77:869cf507173a	94	((PIN) == PWR_WakeUpPin_2) \|\| \
emilmont	77:869cf507173a	95	((PIN) == PWR_WakeUpPin_3))
emilmont	77:869cf507173a	96	/**
emilmont	77:869cf507173a	97	* @}
emilmont	77:869cf507173a	98	*/
emilmont	77:869cf507173a	99
emilmont	77:869cf507173a	100
emilmont	77:869cf507173a	101	/** @defgroup PWR_Voltage_Scaling_Ranges
emilmont	77:869cf507173a	102	* @{
emilmont	77:869cf507173a	103	*/
emilmont	77:869cf507173a	104
emilmont	77:869cf507173a	105	#define PWR_VoltageScaling_Range1 PWR_CR_VOS_0
emilmont	77:869cf507173a	106	#define PWR_VoltageScaling_Range2 PWR_CR_VOS_1
emilmont	77:869cf507173a	107	#define PWR_VoltageScaling_Range3 PWR_CR_VOS
emilmont	77:869cf507173a	108
emilmont	77:869cf507173a	109	#define IS_PWR_VOLTAGE_SCALING_RANGE(RANGE) (((RANGE) == PWR_VoltageScaling_Range1) \|\| \
emilmont	77:869cf507173a	110	((RANGE) == PWR_VoltageScaling_Range2) \|\| \
emilmont	77:869cf507173a	111	((RANGE) == PWR_VoltageScaling_Range3))
emilmont	77:869cf507173a	112	/**
emilmont	77:869cf507173a	113	* @}
emilmont	77:869cf507173a	114	*/
emilmont	77:869cf507173a	115
emilmont	77:869cf507173a	116	/** @defgroup PWR_Regulator_state_is_Sleep_STOP_mode
emilmont	77:869cf507173a	117	* @{
emilmont	77:869cf507173a	118	*/
emilmont	77:869cf507173a	119
emilmont	77:869cf507173a	120	#define PWR_Regulator_ON ((uint32_t)0x00000000)
emilmont	77:869cf507173a	121	#define PWR_Regulator_LowPower PWR_CR_LPSDSR
emilmont	77:869cf507173a	122	#define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_Regulator_ON) \|\| \
emilmont	77:869cf507173a	123	((REGULATOR) == PWR_Regulator_LowPower))
emilmont	77:869cf507173a	124	/**
emilmont	77:869cf507173a	125	* @}
emilmont	77:869cf507173a	126	*/
emilmont	77:869cf507173a	127
emilmont	77:869cf507173a	128	/** @defgroup PWR_SLEEP_mode_entry
emilmont	77:869cf507173a	129	* @{
emilmont	77:869cf507173a	130	*/
emilmont	77:869cf507173a	131
emilmont	77:869cf507173a	132	#define PWR_SLEEPEntry_WFI ((uint8_t)0x01)
emilmont	77:869cf507173a	133	#define PWR_SLEEPEntry_WFE ((uint8_t)0x02)
emilmont	77:869cf507173a	134	#define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPEntry_WFI) \|\| ((ENTRY) == PWR_SLEEPEntry_WFE))
emilmont	77:869cf507173a	135
emilmont	77:869cf507173a	136	/**
emilmont	77:869cf507173a	137	* @}
emilmont	77:869cf507173a	138	*/
emilmont	77:869cf507173a	139
emilmont	77:869cf507173a	140	/** @defgroup PWR_STOP_mode_entry
emilmont	77:869cf507173a	141	* @{
emilmont	77:869cf507173a	142	*/
emilmont	77:869cf507173a	143
emilmont	77:869cf507173a	144	#define PWR_STOPEntry_WFI ((uint8_t)0x01)
emilmont	77:869cf507173a	145	#define PWR_STOPEntry_WFE ((uint8_t)0x02)
emilmont	77:869cf507173a	146	#define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPEntry_WFI) \|\| ((ENTRY) == PWR_STOPEntry_WFE))
emilmont	77:869cf507173a	147
emilmont	77:869cf507173a	148	/**
emilmont	77:869cf507173a	149	* @}
emilmont	77:869cf507173a	150	*/
emilmont	77:869cf507173a	151
emilmont	77:869cf507173a	152	/** @defgroup PWR_Flag
emilmont	77:869cf507173a	153	* @{
emilmont	77:869cf507173a	154	*/
emilmont	77:869cf507173a	155
emilmont	77:869cf507173a	156	#define PWR_FLAG_WU PWR_CSR_WUF
emilmont	77:869cf507173a	157	#define PWR_FLAG_SB PWR_CSR_SBF
emilmont	77:869cf507173a	158	#define PWR_FLAG_PVDO PWR_CSR_PVDO
emilmont	77:869cf507173a	159	#define PWR_FLAG_VREFINTRDY PWR_CSR_VREFINTRDYF
emilmont	77:869cf507173a	160	#define PWR_FLAG_VOS PWR_CSR_VOSF
emilmont	77:869cf507173a	161	#define PWR_FLAG_REGLP PWR_CSR_REGLPF
emilmont	77:869cf507173a	162
emilmont	77:869cf507173a	163	#define IS_PWR_GET_FLAG(FLAG) (((FLAG) == PWR_FLAG_WU) \|\| ((FLAG) == PWR_FLAG_SB) \|\| \
emilmont	77:869cf507173a	164	((FLAG) == PWR_FLAG_PVDO) \|\| ((FLAG) == PWR_FLAG_VREFINTRDY) \|\| \
emilmont	77:869cf507173a	165	((FLAG) == PWR_FLAG_VOS) \|\| ((FLAG) == PWR_FLAG_REGLP))
emilmont	77:869cf507173a	166
emilmont	77:869cf507173a	167	#define IS_PWR_CLEAR_FLAG(FLAG) (((FLAG) == PWR_FLAG_WU) \|\| ((FLAG) == PWR_FLAG_SB))
emilmont	77:869cf507173a	168	/**
emilmont	77:869cf507173a	169	* @}
emilmont	77:869cf507173a	170	*/
emilmont	77:869cf507173a	171
emilmont	77:869cf507173a	172	/**
emilmont	77:869cf507173a	173	* @}
emilmont	77:869cf507173a	174	*/
emilmont	77:869cf507173a	175
emilmont	77:869cf507173a	176	/* Exported macro ------------------------------------------------------------*/
emilmont	77:869cf507173a	177	/* Exported functions ------------------------------------------------------- */
emilmont	77:869cf507173a	178
emilmont	77:869cf507173a	179	/* Function used to set the PWR configuration to the default reset state ******/
emilmont	77:869cf507173a	180	void PWR_DeInit(void);
emilmont	77:869cf507173a	181
emilmont	77:869cf507173a	182	/* RTC Domain Access function *************************************************/
emilmont	77:869cf507173a	183	void PWR_RTCAccessCmd(FunctionalState NewState);
emilmont	77:869cf507173a	184
emilmont	77:869cf507173a	185	/* PVD configuration functions ************************************************/
emilmont	77:869cf507173a	186	void PWR_PVDLevelConfig(uint32_t PWR_PVDLevel);
emilmont	77:869cf507173a	187	void PWR_PVDCmd(FunctionalState NewState);
emilmont	77:869cf507173a	188
emilmont	77:869cf507173a	189	/* WakeUp pins configuration functions ****************************************/
emilmont	77:869cf507173a	190	void PWR_WakeUpPinCmd(uint32_t PWR_WakeUpPin, FunctionalState NewState);
emilmont	77:869cf507173a	191
emilmont	77:869cf507173a	192	/* Ultra Low Power mode configuration functions *******************************/
emilmont	77:869cf507173a	193	void PWR_FastWakeUpCmd(FunctionalState NewState);
emilmont	77:869cf507173a	194	void PWR_UltraLowPowerCmd(FunctionalState NewState);
emilmont	77:869cf507173a	195
emilmont	77:869cf507173a	196	/* Voltage Scaling configuration functions ************************************/
emilmont	77:869cf507173a	197	void PWR_VoltageScalingConfig(uint32_t PWR_VoltageScaling);
emilmont	77:869cf507173a	198
emilmont	77:869cf507173a	199	/* Low Power modes configuration functions ************************************/
emilmont	77:869cf507173a	200	void PWR_EnterLowPowerRunMode(FunctionalState NewState);
emilmont	77:869cf507173a	201	void PWR_EnterSleepMode(uint32_t PWR_Regulator, uint8_t PWR_SLEEPEntry);
emilmont	77:869cf507173a	202	void PWR_EnterSTOPMode(uint32_t PWR_Regulator, uint8_t PWR_STOPEntry);
emilmont	77:869cf507173a	203	void PWR_EnterSTANDBYMode(void);
emilmont	77:869cf507173a	204
emilmont	77:869cf507173a	205	/* Flags management functions *************************************************/
emilmont	77:869cf507173a	206	FlagStatus PWR_GetFlagStatus(uint32_t PWR_FLAG);
emilmont	77:869cf507173a	207	void PWR_ClearFlag(uint32_t PWR_FLAG);
emilmont	77:869cf507173a	208
emilmont	77:869cf507173a	209	#ifdef __cplusplus
emilmont	77:869cf507173a	210	}
emilmont	77:869cf507173a	211	#endif
emilmont	77:869cf507173a	212
emilmont	77:869cf507173a	213	#endif /* __STM32L1xx_PWR_H */
emilmont	77:869cf507173a	214
emilmont	77:869cf507173a	215	/**
emilmont	77:869cf507173a	216	* @}
emilmont	77:869cf507173a	217	*/
emilmont	77:869cf507173a	218
emilmont	77:869cf507173a	219	/**
emilmont	77:869cf507173a	220	* @}
emilmont	77:869cf507173a	221	*/
emilmont	77:869cf507173a	222
emilmont	77:869cf507173a	223	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/