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TARGET_NUCLEO_F401RE/stm32f4xx_hal_i2c.h@89:552587b429a1, 2014-09-12 (annotated)

Committer:: bogdanm
Date:: Fri Sep 12 16:41:52 2014 +0100
Revision:: 89:552587b429a1
Parent:: 85:024bf7f99721
Child:: 90:cb3d968589d8

Release 89 of the mbed library



Main changes:



- low power optimizations for Nordic targets

- code structure changes for Freescale K64F targets

- bug fixes in various backends

Who changed what in which revision?

User	Revision	Line number	New contents of line
emilmont	77:869cf507173a	1	/**
emilmont	77:869cf507173a	2	******************************************************************************
emilmont	77:869cf507173a	3	* @file stm32f4xx_hal_i2c.h
emilmont	77:869cf507173a	4	* @author MCD Application Team
bogdanm	85:024bf7f99721	5	* @version V1.1.0RC2
bogdanm	85:024bf7f99721	6	* @date 14-May-2014
emilmont	77:869cf507173a	7	* @brief Header file of I2C HAL module.
emilmont	77:869cf507173a	8	******************************************************************************
emilmont	77:869cf507173a	9	* @attention
emilmont	77:869cf507173a	10	*
emilmont	77:869cf507173a	11	* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
emilmont	77:869cf507173a	12	*
emilmont	77:869cf507173a	13	* Redistribution and use in source and binary forms, with or without modification,
emilmont	77:869cf507173a	14	* are permitted provided that the following conditions are met:
emilmont	77:869cf507173a	15	* 1. Redistributions of source code must retain the above copyright notice,
emilmont	77:869cf507173a	16	* this list of conditions and the following disclaimer.
emilmont	77:869cf507173a	17	* 2. Redistributions in binary form must reproduce the above copyright notice,
emilmont	77:869cf507173a	18	* this list of conditions and the following disclaimer in the documentation
emilmont	77:869cf507173a	19	* and/or other materials provided with the distribution.
emilmont	77:869cf507173a	20	* 3. Neither the name of STMicroelectronics nor the names of its contributors
emilmont	77:869cf507173a	21	* may be used to endorse or promote products derived from this software
emilmont	77:869cf507173a	22	* without specific prior written permission.
emilmont	77:869cf507173a	23	*
emilmont	77:869cf507173a	24	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
emilmont	77:869cf507173a	25	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
emilmont	77:869cf507173a	26	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
emilmont	77:869cf507173a	27	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
emilmont	77:869cf507173a	28	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
emilmont	77:869cf507173a	29	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
emilmont	77:869cf507173a	30	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
emilmont	77:869cf507173a	31	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
emilmont	77:869cf507173a	32	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
emilmont	77:869cf507173a	33	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
emilmont	77:869cf507173a	34	*
emilmont	77:869cf507173a	35	******************************************************************************
emilmont	77:869cf507173a	36	*/
emilmont	77:869cf507173a	37
emilmont	77:869cf507173a	38	/* Define to prevent recursive inclusion -------------------------------------*/
emilmont	77:869cf507173a	39	#ifndef __STM32F4xx_HAL_I2C_H
emilmont	77:869cf507173a	40	#define __STM32F4xx_HAL_I2C_H
emilmont	77:869cf507173a	41
emilmont	77:869cf507173a	42	#ifdef __cplusplus
emilmont	77:869cf507173a	43	extern "C" {
emilmont	77:869cf507173a	44	#endif
emilmont	77:869cf507173a	45
emilmont	77:869cf507173a	46	/* Includes ------------------------------------------------------------------*/
emilmont	77:869cf507173a	47	#include "stm32f4xx_hal_def.h"
emilmont	77:869cf507173a	48
emilmont	77:869cf507173a	49	/** @addtogroup STM32F4xx_HAL_Driver
emilmont	77:869cf507173a	50	* @{
emilmont	77:869cf507173a	51	*/
emilmont	77:869cf507173a	52
emilmont	77:869cf507173a	53	/** @addtogroup I2C
emilmont	77:869cf507173a	54	* @{
emilmont	77:869cf507173a	55	*/
emilmont	77:869cf507173a	56
emilmont	77:869cf507173a	57	/* Exported types ------------------------------------------------------------*/
emilmont	77:869cf507173a	58
emilmont	77:869cf507173a	59	/**
emilmont	77:869cf507173a	60	* @brief I2C Configuration Structure definition
emilmont	77:869cf507173a	61	*/
emilmont	77:869cf507173a	62	typedef struct
emilmont	77:869cf507173a	63	{
emilmont	77:869cf507173a	64	uint32_t ClockSpeed; /*!< Specifies the clock frequency.
emilmont	77:869cf507173a	65	This parameter must be set to a value lower than 400kHz */
emilmont	77:869cf507173a	66
emilmont	77:869cf507173a	67	uint32_t DutyCycle; /*!< Specifies the I2C fast mode duty cycle.
emilmont	77:869cf507173a	68	This parameter can be a value of @ref I2C_duty_cycle_in_fast_mode */
emilmont	77:869cf507173a	69
emilmont	77:869cf507173a	70	uint32_t OwnAddress1; /*!< Specifies the first device own address.
emilmont	77:869cf507173a	71	This parameter can be a 7-bit or 10-bit address. */
emilmont	77:869cf507173a	72
emilmont	77:869cf507173a	73	uint32_t AddressingMode; /*!< Specifies if 7-bit or 10-bit addressing mode is selected.
emilmont	77:869cf507173a	74	This parameter can be a value of @ref I2C_addressing_mode */
emilmont	77:869cf507173a	75
emilmont	77:869cf507173a	76	uint32_t DualAddressMode; /*!< Specifies if dual addressing mode is selected.
emilmont	77:869cf507173a	77	This parameter can be a value of @ref I2C_dual_addressing_mode */
emilmont	77:869cf507173a	78
emilmont	77:869cf507173a	79	uint32_t OwnAddress2; /*!< Specifies the second device own address if dual addressing mode is selected
emilmont	77:869cf507173a	80	This parameter can be a 7-bit address. */
emilmont	77:869cf507173a	81
emilmont	77:869cf507173a	82	uint32_t GeneralCallMode; /*!< Specifies if general call mode is selected.
bogdanm	85:024bf7f99721	83	This parameter can be a value of @ref I2C_general_call_addressing_mode */
emilmont	77:869cf507173a	84
emilmont	77:869cf507173a	85	uint32_t NoStretchMode; /*!< Specifies if nostretch mode is selected.
emilmont	77:869cf507173a	86	This parameter can be a value of @ref I2C_nostretch_mode */
emilmont	77:869cf507173a	87
emilmont	77:869cf507173a	88	}I2C_InitTypeDef;
emilmont	77:869cf507173a	89
emilmont	77:869cf507173a	90	/**
emilmont	77:869cf507173a	91	* @brief HAL State structures definition
emilmont	77:869cf507173a	92	*/
emilmont	77:869cf507173a	93	typedef enum
emilmont	77:869cf507173a	94	{
emilmont	77:869cf507173a	95	HAL_I2C_STATE_RESET = 0x00, /!< I2C not yet initialized or disabled /
emilmont	77:869cf507173a	96	HAL_I2C_STATE_READY = 0x01, /!< I2C initialized and ready for use /
emilmont	77:869cf507173a	97	HAL_I2C_STATE_BUSY = 0x02, /!< I2C internal process is ongoing /
emilmont	77:869cf507173a	98	HAL_I2C_STATE_BUSY_TX = 0x12, /!< Data Transmission process is ongoing /
emilmont	77:869cf507173a	99	HAL_I2C_STATE_BUSY_RX = 0x22, /!< Data Reception process is ongoing /
emilmont	77:869cf507173a	100	HAL_I2C_STATE_MEM_BUSY_TX = 0x32, /!< Memory Data Transmission process is ongoing /
emilmont	77:869cf507173a	101	HAL_I2C_STATE_MEM_BUSY_RX = 0x42, /!< Memory Data Reception process is ongoing /
emilmont	77:869cf507173a	102	HAL_I2C_STATE_TIMEOUT = 0x03, /!< I2C timeout state /
emilmont	77:869cf507173a	103	HAL_I2C_STATE_ERROR = 0x04 /!< I2C error state /
emilmont	77:869cf507173a	104
emilmont	77:869cf507173a	105	}HAL_I2C_StateTypeDef;
emilmont	77:869cf507173a	106
emilmont	77:869cf507173a	107	/**
emilmont	77:869cf507173a	108	* @brief HAL I2C Error Code structure definition
emilmont	77:869cf507173a	109	*/
emilmont	77:869cf507173a	110	typedef enum
emilmont	77:869cf507173a	111	{
emilmont	77:869cf507173a	112	HAL_I2C_ERROR_NONE = 0x00, /!< No error /
emilmont	77:869cf507173a	113	HAL_I2C_ERROR_BERR = 0x01, /!< BERR error /
emilmont	77:869cf507173a	114	HAL_I2C_ERROR_ARLO = 0x02, /!< ARLO error /
emilmont	77:869cf507173a	115	HAL_I2C_ERROR_AF = 0x04, /!< AF error /
emilmont	77:869cf507173a	116	HAL_I2C_ERROR_OVR = 0x08, /!< OVR error /
emilmont	77:869cf507173a	117	HAL_I2C_ERROR_DMA = 0x10, /!< DMA transfer error /
emilmont	77:869cf507173a	118	HAL_I2C_ERROR_TIMEOUT = 0x20 /!< Timeout error /
emilmont	77:869cf507173a	119
emilmont	77:869cf507173a	120	}HAL_I2C_ErrorTypeDef;
emilmont	77:869cf507173a	121
emilmont	77:869cf507173a	122	/**
emilmont	77:869cf507173a	123	* @brief I2C handle Structure definition
emilmont	77:869cf507173a	124	*/
emilmont	77:869cf507173a	125	typedef struct
emilmont	77:869cf507173a	126	{
emilmont	77:869cf507173a	127	I2C_TypeDef Instance; /!< I2C registers base address */
emilmont	77:869cf507173a	128
emilmont	77:869cf507173a	129	I2C_InitTypeDef Init; /!< I2C communication parameters /
emilmont	77:869cf507173a	130
emilmont	77:869cf507173a	131	uint8_t pBuffPtr; /!< Pointer to I2C transfer buffer */
emilmont	77:869cf507173a	132
emilmont	77:869cf507173a	133	uint16_t XferSize; /!< I2C transfer size /
emilmont	77:869cf507173a	134
emilmont	77:869cf507173a	135	__IO uint16_t XferCount; /!< I2C transfer counter /
emilmont	77:869cf507173a	136
emilmont	77:869cf507173a	137	DMA_HandleTypeDef hdmatx; /!< I2C Tx DMA handle parameters */
emilmont	77:869cf507173a	138
emilmont	77:869cf507173a	139	DMA_HandleTypeDef hdmarx; /!< I2C Rx DMA handle parameters */
emilmont	77:869cf507173a	140
emilmont	77:869cf507173a	141	HAL_LockTypeDef Lock; /!< I2C locking object /
emilmont	77:869cf507173a	142
emilmont	77:869cf507173a	143	__IO HAL_I2C_StateTypeDef State; /!< I2C communication state /
emilmont	77:869cf507173a	144
emilmont	77:869cf507173a	145	__IO HAL_I2C_ErrorTypeDef ErrorCode; /* I2C Error code */
emilmont	77:869cf507173a	146
emilmont	77:869cf507173a	147	}I2C_HandleTypeDef;
emilmont	77:869cf507173a	148
emilmont	77:869cf507173a	149	/* Exported constants --------------------------------------------------------*/
emilmont	77:869cf507173a	150
emilmont	77:869cf507173a	151	/** @defgroup I2C_Exported_Constants
emilmont	77:869cf507173a	152	* @{
emilmont	77:869cf507173a	153	*/
emilmont	77:869cf507173a	154
emilmont	77:869cf507173a	155	/** @defgroup I2C_duty_cycle_in_fast_mode
emilmont	77:869cf507173a	156	* @{
emilmont	77:869cf507173a	157	*/
emilmont	77:869cf507173a	158	#define I2C_DUTYCYCLE_2 ((uint32_t)0x00000000)
emilmont	77:869cf507173a	159	#define I2C_DUTYCYCLE_16_9 I2C_CCR_DUTY
emilmont	77:869cf507173a	160
emilmont	77:869cf507173a	161	#define IS_I2C_DUTY_CYCLE(CYCLE) (((CYCLE) == I2C_DUTYCYCLE_2) \|\| \
emilmont	77:869cf507173a	162	((CYCLE) == I2C_DUTYCYCLE_16_9))
emilmont	77:869cf507173a	163	/**
emilmont	77:869cf507173a	164	* @}
emilmont	77:869cf507173a	165	*/
emilmont	77:869cf507173a	166
emilmont	77:869cf507173a	167	/** @defgroup I2C_addressing_mode
emilmont	77:869cf507173a	168	* @{
emilmont	77:869cf507173a	169	*/
emilmont	77:869cf507173a	170	#define I2C_ADDRESSINGMODE_7BIT ((uint32_t)0x00004000)
emilmont	77:869cf507173a	171	#define I2C_ADDRESSINGMODE_10BIT (I2C_OAR1_ADDMODE \| ((uint32_t)0x00004000))
emilmont	77:869cf507173a	172
emilmont	77:869cf507173a	173	#define IS_I2C_ADDRESSING_MODE(ADDRESS) (((ADDRESS) == I2C_ADDRESSINGMODE_7BIT) \|\| \
emilmont	77:869cf507173a	174	((ADDRESS) == I2C_ADDRESSINGMODE_10BIT))
emilmont	77:869cf507173a	175	/**
emilmont	77:869cf507173a	176	* @}
emilmont	77:869cf507173a	177	*/
emilmont	77:869cf507173a	178
emilmont	77:869cf507173a	179	/** @defgroup I2C_dual_addressing_mode
emilmont	77:869cf507173a	180	* @{
emilmont	77:869cf507173a	181	*/
emilmont	77:869cf507173a	182	#define I2C_DUALADDRESS_DISABLED ((uint32_t)0x00000000)
emilmont	77:869cf507173a	183	#define I2C_DUALADDRESS_ENABLED I2C_OAR2_ENDUAL
emilmont	77:869cf507173a	184
emilmont	77:869cf507173a	185	#define IS_I2C_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == I2C_DUALADDRESS_DISABLED) \|\| \
emilmont	77:869cf507173a	186	((ADDRESS) == I2C_DUALADDRESS_ENABLED))
emilmont	77:869cf507173a	187	/**
emilmont	77:869cf507173a	188	* @}
emilmont	77:869cf507173a	189	*/
emilmont	77:869cf507173a	190
emilmont	77:869cf507173a	191	/** @defgroup I2C_general_call_addressing_mode
emilmont	77:869cf507173a	192	* @{
emilmont	77:869cf507173a	193	*/
emilmont	77:869cf507173a	194	#define I2C_GENERALCALL_DISABLED ((uint32_t)0x00000000)
emilmont	77:869cf507173a	195	#define I2C_GENERALCALL_ENABLED I2C_CR1_ENGC
emilmont	77:869cf507173a	196
emilmont	77:869cf507173a	197	#define IS_I2C_GENERAL_CALL(CALL) (((CALL) == I2C_GENERALCALL_DISABLED) \|\| \
emilmont	77:869cf507173a	198	((CALL) == I2C_GENERALCALL_ENABLED))
emilmont	77:869cf507173a	199	/**
emilmont	77:869cf507173a	200	* @}
emilmont	77:869cf507173a	201	*/
emilmont	77:869cf507173a	202
emilmont	77:869cf507173a	203	/** @defgroup I2C_nostretch_mode
emilmont	77:869cf507173a	204	* @{
emilmont	77:869cf507173a	205	*/
emilmont	77:869cf507173a	206	#define I2C_NOSTRETCH_DISABLED ((uint32_t)0x00000000)
emilmont	77:869cf507173a	207	#define I2C_NOSTRETCH_ENABLED I2C_CR1_NOSTRETCH
emilmont	77:869cf507173a	208
emilmont	77:869cf507173a	209	#define IS_I2C_NO_STRETCH(STRETCH) (((STRETCH) == I2C_NOSTRETCH_DISABLED) \|\| \
emilmont	77:869cf507173a	210	((STRETCH) == I2C_NOSTRETCH_ENABLED))
emilmont	77:869cf507173a	211	/**
emilmont	77:869cf507173a	212	* @}
emilmont	77:869cf507173a	213	*/
emilmont	77:869cf507173a	214
emilmont	77:869cf507173a	215	/** @defgroup I2C_Memory_Address_Size
emilmont	77:869cf507173a	216	* @{
emilmont	77:869cf507173a	217	*/
emilmont	77:869cf507173a	218	#define I2C_MEMADD_SIZE_8BIT ((uint32_t)0x00000001)
emilmont	77:869cf507173a	219	#define I2C_MEMADD_SIZE_16BIT ((uint32_t)0x00000010)
emilmont	77:869cf507173a	220
emilmont	77:869cf507173a	221	#define IS_I2C_MEMADD_SIZE(SIZE) (((SIZE) == I2C_MEMADD_SIZE_8BIT) \|\| \
emilmont	77:869cf507173a	222	((SIZE) == I2C_MEMADD_SIZE_16BIT))
emilmont	77:869cf507173a	223	/**
emilmont	77:869cf507173a	224	* @}
emilmont	77:869cf507173a	225	*/
emilmont	77:869cf507173a	226
emilmont	77:869cf507173a	227	/** @defgroup I2C_Interrupt_configuration_definition
emilmont	77:869cf507173a	228	* @{
emilmont	77:869cf507173a	229	*/
emilmont	77:869cf507173a	230	#define I2C_IT_BUF I2C_CR2_ITBUFEN
emilmont	77:869cf507173a	231	#define I2C_IT_EVT I2C_CR2_ITEVTEN
emilmont	77:869cf507173a	232	#define I2C_IT_ERR I2C_CR2_ITERREN
emilmont	77:869cf507173a	233	/**
emilmont	77:869cf507173a	234	* @}
emilmont	77:869cf507173a	235	*/
emilmont	77:869cf507173a	236
emilmont	77:869cf507173a	237	/** @defgroup I2C_Flag_definition
emilmont	77:869cf507173a	238	* @{
emilmont	77:869cf507173a	239	*/
emilmont	77:869cf507173a	240	#define I2C_FLAG_SMBALERT ((uint32_t)0x00018000)
emilmont	77:869cf507173a	241	#define I2C_FLAG_TIMEOUT ((uint32_t)0x00014000)
emilmont	77:869cf507173a	242	#define I2C_FLAG_PECERR ((uint32_t)0x00011000)
emilmont	77:869cf507173a	243	#define I2C_FLAG_OVR ((uint32_t)0x00010800)
emilmont	77:869cf507173a	244	#define I2C_FLAG_AF ((uint32_t)0x00010400)
emilmont	77:869cf507173a	245	#define I2C_FLAG_ARLO ((uint32_t)0x00010200)
emilmont	77:869cf507173a	246	#define I2C_FLAG_BERR ((uint32_t)0x00010100)
emilmont	77:869cf507173a	247	#define I2C_FLAG_TXE ((uint32_t)0x00010080)
emilmont	77:869cf507173a	248	#define I2C_FLAG_RXNE ((uint32_t)0x00010040)
emilmont	77:869cf507173a	249	#define I2C_FLAG_STOPF ((uint32_t)0x00010010)
emilmont	77:869cf507173a	250	#define I2C_FLAG_ADD10 ((uint32_t)0x00010008)
emilmont	77:869cf507173a	251	#define I2C_FLAG_BTF ((uint32_t)0x00010004)
emilmont	77:869cf507173a	252	#define I2C_FLAG_ADDR ((uint32_t)0x00010002)
emilmont	77:869cf507173a	253	#define I2C_FLAG_SB ((uint32_t)0x00010001)
emilmont	77:869cf507173a	254	#define I2C_FLAG_DUALF ((uint32_t)0x00100080)
emilmont	77:869cf507173a	255	#define I2C_FLAG_SMBHOST ((uint32_t)0x00100040)
emilmont	77:869cf507173a	256	#define I2C_FLAG_SMBDEFAULT ((uint32_t)0x00100020)
emilmont	77:869cf507173a	257	#define I2C_FLAG_GENCALL ((uint32_t)0x00100010)
emilmont	77:869cf507173a	258	#define I2C_FLAG_TRA ((uint32_t)0x00100004)
emilmont	77:869cf507173a	259	#define I2C_FLAG_BUSY ((uint32_t)0x00100002)
emilmont	77:869cf507173a	260	#define I2C_FLAG_MSL ((uint32_t)0x00100001)
emilmont	77:869cf507173a	261	/**
emilmont	77:869cf507173a	262	* @}
emilmont	77:869cf507173a	263	*/
emilmont	77:869cf507173a	264
emilmont	77:869cf507173a	265	/**
emilmont	77:869cf507173a	266	* @}
emilmont	77:869cf507173a	267	*/
emilmont	77:869cf507173a	268
emilmont	77:869cf507173a	269	/* Exported macro ------------------------------------------------------------*/
emilmont	77:869cf507173a	270
bogdanm	85:024bf7f99721	271	/** @brief Reset I2C handle state
bogdanm	85:024bf7f99721	272	* @param __HANDLE__: specifies the I2C Handle.
bogdanm	85:024bf7f99721	273	* This parameter can be I2C where x: 1, 2, or 3 to select the I2C peripheral.
bogdanm	85:024bf7f99721	274	* @retval None
bogdanm	85:024bf7f99721	275	*/
bogdanm	85:024bf7f99721	276	#define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2C_STATE_RESET)
bogdanm	85:024bf7f99721	277
emilmont	77:869cf507173a	278	/** @brief Enable or disable the specified I2C interrupts.
emilmont	77:869cf507173a	279	* @param __HANDLE__: specifies the I2C Handle.
emilmont	77:869cf507173a	280	* This parameter can be I2C where x: 1, 2, or 3 to select the I2C peripheral.
emilmont	77:869cf507173a	281	* @param __INTERRUPT__: specifies the interrupt source to enable or disable.
emilmont	77:869cf507173a	282	* This parameter can be one of the following values:
emilmont	77:869cf507173a	283	* @arg I2C_IT_BUF: Buffer interrupt enable
emilmont	77:869cf507173a	284	* @arg I2C_IT_EVT: Event interrupt enable
emilmont	77:869cf507173a	285	* @arg I2C_IT_ERR: Error interrupt enable
emilmont	77:869cf507173a	286	* @retval None
emilmont	77:869cf507173a	287	*/
emilmont	77:869cf507173a	288
emilmont	77:869cf507173a	289	#define __HAL_I2C_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 \|= (__INTERRUPT__))
emilmont	77:869cf507173a	290	#define __HAL_I2C_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 &= (~(__INTERRUPT__)))
emilmont	77:869cf507173a	291
emilmont	77:869cf507173a	292	/** @brief Checks if the specified I2C interrupt source is enabled or disabled.
emilmont	77:869cf507173a	293	* @param __HANDLE__: specifies the I2C Handle.
emilmont	77:869cf507173a	294	* This parameter can be I2C where x: 1, 2, or 3 to select the I2C peripheral.
emilmont	77:869cf507173a	295	* @param __INTERRUPT__: specifies the I2C interrupt source to check.
emilmont	77:869cf507173a	296	* This parameter can be one of the following values:
emilmont	77:869cf507173a	297	* @arg I2C_IT_BUF: Buffer interrupt enable
emilmont	77:869cf507173a	298	* @arg I2C_IT_EVT: Event interrupt enable
emilmont	77:869cf507173a	299	* @arg I2C_IT_ERR: Error interrupt enable
emilmont	77:869cf507173a	300	* @retval The new state of __INTERRUPT__ (TRUE or FALSE).
emilmont	77:869cf507173a	301	*/
emilmont	77:869cf507173a	302	#define __HAL_I2C_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
emilmont	77:869cf507173a	303
emilmont	77:869cf507173a	304	/** @brief Checks whether the specified I2C flag is set or not.
emilmont	77:869cf507173a	305	* @param __HANDLE__: specifies the I2C Handle.
emilmont	77:869cf507173a	306	* This parameter can be I2C where x: 1, 2, or 3 to select the I2C peripheral.
emilmont	77:869cf507173a	307	* @param __FLAG__: specifies the flag to check.
emilmont	77:869cf507173a	308	* This parameter can be one of the following values:
emilmont	77:869cf507173a	309	* @arg I2C_FLAG_SMBALERT: SMBus Alert flag
emilmont	77:869cf507173a	310	* @arg I2C_FLAG_TIMEOUT: Timeout or Tlow error flag
emilmont	77:869cf507173a	311	* @arg I2C_FLAG_PECERR: PEC error in reception flag
emilmont	77:869cf507173a	312	* @arg I2C_FLAG_OVR: Overrun/Underrun flag
emilmont	77:869cf507173a	313	* @arg I2C_FLAG_AF: Acknowledge failure flag
emilmont	77:869cf507173a	314	* @arg I2C_FLAG_ARLO: Arbitration lost flag
emilmont	77:869cf507173a	315	* @arg I2C_FLAG_BERR: Bus error flag
emilmont	77:869cf507173a	316	* @arg I2C_FLAG_TXE: Data register empty flag
emilmont	77:869cf507173a	317	* @arg I2C_FLAG_RXNE: Data register not empty flag
emilmont	77:869cf507173a	318	* @arg I2C_FLAG_STOPF: Stop detection flag
emilmont	77:869cf507173a	319	* @arg I2C_FLAG_ADD10: 10-bit header sent flag
emilmont	77:869cf507173a	320	* @arg I2C_FLAG_BTF: Byte transfer finished flag
emilmont	77:869cf507173a	321	* @arg I2C_FLAG_ADDR: Address sent flag
emilmont	77:869cf507173a	322	* Address matched flag
emilmont	77:869cf507173a	323	* @arg I2C_FLAG_SB: Start bit flag
emilmont	77:869cf507173a	324	* @arg I2C_FLAG_DUALF: Dual flag
emilmont	77:869cf507173a	325	* @arg I2C_FLAG_SMBHOST: SMBus host header
emilmont	77:869cf507173a	326	* @arg I2C_FLAG_SMBDEFAULT: SMBus default header
emilmont	77:869cf507173a	327	* @arg I2C_FLAG_GENCALL: General call header flag
emilmont	77:869cf507173a	328	* @arg I2C_FLAG_TRA: Transmitter/Receiver flag
emilmont	77:869cf507173a	329	* @arg I2C_FLAG_BUSY: Bus busy flag
emilmont	77:869cf507173a	330	* @arg I2C_FLAG_MSL: Master/Slave flag
emilmont	77:869cf507173a	331	* @retval The new state of __FLAG__ (TRUE or FALSE).
emilmont	77:869cf507173a	332	*/
emilmont	77:869cf507173a	333	#define I2C_FLAG_MASK ((uint32_t)0x0000FFFF)
emilmont	77:869cf507173a	334	#define __HAL_I2C_GET_FLAG(__HANDLE__, __FLAG__) ((((uint8_t)((__FLAG__) >> 16)) == 0x01)?((((__HANDLE__)->Instance->SR1) & ((__FLAG__) & I2C_FLAG_MASK)) == ((__FLAG__) & I2C_FLAG_MASK)): \
emilmont	77:869cf507173a	335	((((__HANDLE__)->Instance->SR2) & ((__FLAG__) & I2C_FLAG_MASK)) == ((__FLAG__) & I2C_FLAG_MASK)))
emilmont	77:869cf507173a	336
emilmont	77:869cf507173a	337	/** @brief Clears the I2C pending flags which are cleared by writing 0 in a specific bit.
emilmont	77:869cf507173a	338	* @param __HANDLE__: specifies the I2C Handle.
emilmont	77:869cf507173a	339	* This parameter can be I2C where x: 1, 2, or 3 to select the I2C peripheral.
emilmont	77:869cf507173a	340	* @param __FLAG__: specifies the flag to clear.
emilmont	77:869cf507173a	341	* This parameter can be any combination of the following values:
emilmont	77:869cf507173a	342	* @arg I2C_FLAG_SMBALERT: SMBus Alert flag
emilmont	77:869cf507173a	343	* @arg I2C_FLAG_TIMEOUT: Timeout or Tlow error flag
emilmont	77:869cf507173a	344	* @arg I2C_FLAG_PECERR: PEC error in reception flag
emilmont	77:869cf507173a	345	* @arg I2C_FLAG_OVR: Overrun/Underrun flag (Slave mode)
emilmont	77:869cf507173a	346	* @arg I2C_FLAG_AF: Acknowledge failure flag
emilmont	77:869cf507173a	347	* @arg I2C_FLAG_ARLO: Arbitration lost flag (Master mode)
emilmont	77:869cf507173a	348	* @arg I2C_FLAG_BERR: Bus error flag
emilmont	77:869cf507173a	349	* @retval None
emilmont	77:869cf507173a	350	*/
emilmont	77:869cf507173a	351	#define __HAL_I2C_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR1 &= ~((__FLAG__) & I2C_FLAG_MASK))
emilmont	77:869cf507173a	352
emilmont	77:869cf507173a	353	/** @brief Clears the I2C ADDR pending flag.
emilmont	77:869cf507173a	354	* @param __HANDLE__: specifies the I2C Handle.
emilmont	77:869cf507173a	355	* This parameter can be I2C where x: 1, 2, or 3 to select the I2C peripheral.
emilmont	77:869cf507173a	356	* @retval None
emilmont	77:869cf507173a	357	*/
emilmont	77:869cf507173a	358
emilmont	77:869cf507173a	359	#define __HAL_I2C_CLEAR_ADDRFLAG(__HANDLE__) do{(__HANDLE__)->Instance->SR1;\
emilmont	77:869cf507173a	360	(__HANDLE__)->Instance->SR2;}while(0)
emilmont	77:869cf507173a	361
emilmont	77:869cf507173a	362	/** @brief Clears the I2C STOPF pending flag.
emilmont	77:869cf507173a	363	* @param __HANDLE__: specifies the I2C Handle.
emilmont	77:869cf507173a	364	* This parameter can be I2C where x: 1, 2, or 3 to select the I2C peripheral.
emilmont	77:869cf507173a	365	* @retval None
emilmont	77:869cf507173a	366	*/
emilmont	77:869cf507173a	367	#define __HAL_I2C_CLEAR_STOPFLAG(__HANDLE__) do{(__HANDLE__)->Instance->SR1;\
emilmont	77:869cf507173a	368	(__HANDLE__)->Instance->CR1 \|= I2C_CR1_PE;}while(0)
emilmont	77:869cf507173a	369
emilmont	77:869cf507173a	370	#define __HAL_I2C_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 \|= I2C_CR1_PE)
emilmont	77:869cf507173a	371	#define __HAL_I2C_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~I2C_CR1_PE)
emilmont	77:869cf507173a	372
emilmont	77:869cf507173a	373	#define __HAL_I2C_FREQRANGE(__PCLK__) ((__PCLK__)/1000000)
emilmont	77:869cf507173a	374	#define __HAL_I2C_RISE_TIME(__FREQRANGE__, __SPEED__) (((__SPEED__) <= 100000) ? ((__FREQRANGE__) + 1) : ((((__FREQRANGE__) * 300) / 1000) + 1))
emilmont	77:869cf507173a	375	#define __HAL_I2C_SPEED_STANDARD(__PCLK__, __SPEED__) (((((__PCLK__)/((__SPEED__) << 1)) & I2C_CCR_CCR) < 4)? 4:((__PCLK__) / ((__SPEED__) << 1)))
emilmont	77:869cf507173a	376	#define __HAL_I2C_SPEED_FAST(__PCLK__, __SPEED__, __DUTYCYCLE__) (((__DUTYCYCLE__) == I2C_DUTYCYCLE_2)? ((__PCLK__) / ((__SPEED__) * 3)) : (((__PCLK__) / ((__SPEED__) * 25)) \| I2C_DUTYCYCLE_16_9))
emilmont	77:869cf507173a	377	#define __HAL_I2C_SPEED(__PCLK__, __SPEED__, __DUTYCYCLE__) (((__SPEED__) <= 100000)? (__HAL_I2C_SPEED_STANDARD((__PCLK__), (__SPEED__))) : \
emilmont	77:869cf507173a	378	((__HAL_I2C_SPEED_FAST((__PCLK__), (__SPEED__), (__DUTYCYCLE__)) & I2C_CCR_CCR) == 0)? 1 : \
emilmont	77:869cf507173a	379	((__HAL_I2C_SPEED_FAST((__PCLK__), (__SPEED__), (__DUTYCYCLE__))) \| I2C_CCR_FS))
emilmont	77:869cf507173a	380
emilmont	77:869cf507173a	381	#define __HAL_I2C_7BIT_ADD_WRITE(__ADDRESS__) ((uint8_t)((__ADDRESS__) & (~I2C_OAR1_ADD0)))
emilmont	77:869cf507173a	382	#define __HAL_I2C_7BIT_ADD_READ(__ADDRESS__) ((uint8_t)((__ADDRESS__) \| I2C_OAR1_ADD0))
emilmont	77:869cf507173a	383
emilmont	77:869cf507173a	384	#define __HAL_I2C_10BIT_ADDRESS(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)(0x00FF))))
emilmont	77:869cf507173a	385	#define __HAL_I2C_10BIT_HEADER_WRITE(__ADDRESS__) ((uint8_t)((uint16_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)(0x0300))) >> 7) \| (uint16_t)(0xF0))))
emilmont	77:869cf507173a	386	#define __HAL_I2C_10BIT_HEADER_READ(__ADDRESS__) ((uint8_t)((uint16_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)(0x0300))) >> 7) \| (uint16_t)(0xF1))))
emilmont	77:869cf507173a	387
emilmont	77:869cf507173a	388	#define __HAL_I2C_MEM_ADD_MSB(__ADDRESS__) ((uint8_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)(0xFF00))) >> 8)))
emilmont	77:869cf507173a	389	#define __HAL_I2C_MEM_ADD_LSB(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)(0x00FF))))
emilmont	77:869cf507173a	390
emilmont	77:869cf507173a	391	#define IS_I2C_CLOCK_SPEED(SPEED) (((SPEED) > 0) && ((SPEED) <= 400000))
emilmont	77:869cf507173a	392	#define IS_I2C_OWN_ADDRESS1(ADDRESS1) (((ADDRESS1) & (uint32_t)(0xFFFFFC00)) == 0)
emilmont	77:869cf507173a	393	#define IS_I2C_OWN_ADDRESS2(ADDRESS2) (((ADDRESS2) & (uint32_t)(0xFFFFFF01)) == 0)
emilmont	77:869cf507173a	394
emilmont	77:869cf507173a	395	/* Include I2C HAL Extension module */
emilmont	77:869cf507173a	396	#include "stm32f4xx_hal_i2c_ex.h"
emilmont	77:869cf507173a	397
emilmont	77:869cf507173a	398	/* Exported functions --------------------------------------------------------*/
emilmont	77:869cf507173a	399	/* Initialization/de-initialization functions **********************************/
emilmont	77:869cf507173a	400	HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c);
emilmont	77:869cf507173a	401	HAL_StatusTypeDef HAL_I2C_DeInit (I2C_HandleTypeDef *hi2c);
bogdanm	81:7d30d6019079	402	void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c);
bogdanm	81:7d30d6019079	403	void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c);
emilmont	77:869cf507173a	404
emilmont	77:869cf507173a	405	/* I/O operation functions *****************************************************/
emilmont	77:869cf507173a	406	/******* Blocking mode: Polling */
emilmont	77:869cf507173a	407	HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size, uint32_t Timeout);
emilmont	77:869cf507173a	408	HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size, uint32_t Timeout);
emilmont	77:869cf507173a	409	HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size, uint32_t Timeout);
emilmont	77:869cf507173a	410	HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size, uint32_t Timeout);
emilmont	77:869cf507173a	411	HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size, uint32_t Timeout);
emilmont	77:869cf507173a	412	HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size, uint32_t Timeout);
emilmont	77:869cf507173a	413	HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout);
emilmont	77:869cf507173a	414
emilmont	77:869cf507173a	415	/******* Non-Blocking mode: Interrupt */
emilmont	77:869cf507173a	416	HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size);
emilmont	77:869cf507173a	417	HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size);
emilmont	77:869cf507173a	418	HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size);
emilmont	77:869cf507173a	419	HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size);
emilmont	77:869cf507173a	420	HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size);
emilmont	77:869cf507173a	421	HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size);
emilmont	77:869cf507173a	422
emilmont	77:869cf507173a	423	/******* Non-Blocking mode: DMA */
emilmont	77:869cf507173a	424	HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size);
emilmont	77:869cf507173a	425	HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size);
emilmont	77:869cf507173a	426	HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size);
emilmont	77:869cf507173a	427	HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size);
emilmont	77:869cf507173a	428	HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size);
emilmont	77:869cf507173a	429	HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size);
emilmont	77:869cf507173a	430
emilmont	77:869cf507173a	431	/******* I2C IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */
emilmont	77:869cf507173a	432	void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c);
emilmont	77:869cf507173a	433	void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c);
bogdanm	81:7d30d6019079	434	void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c);
bogdanm	81:7d30d6019079	435	void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c);
bogdanm	81:7d30d6019079	436	void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c);
bogdanm	81:7d30d6019079	437	void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c);
bogdanm	81:7d30d6019079	438	void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c);
bogdanm	81:7d30d6019079	439	void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c);
bogdanm	81:7d30d6019079	440	void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c);
emilmont	77:869cf507173a	441
emilmont	77:869cf507173a	442	/* Peripheral Control and State functions **************************************/
emilmont	77:869cf507173a	443	HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c);
emilmont	77:869cf507173a	444	uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c);
emilmont	77:869cf507173a	445
emilmont	77:869cf507173a	446	/**
emilmont	77:869cf507173a	447	* @}
emilmont	77:869cf507173a	448	*/
emilmont	77:869cf507173a	449
emilmont	77:869cf507173a	450	/**
emilmont	77:869cf507173a	451	* @}
emilmont	77:869cf507173a	452	*/
emilmont	77:869cf507173a	453
emilmont	77:869cf507173a	454	#ifdef __cplusplus
emilmont	77:869cf507173a	455	}
emilmont	77:869cf507173a	456	#endif
emilmont	77:869cf507173a	457
emilmont	77:869cf507173a	458
emilmont	77:869cf507173a	459	#endif /* __STM32F4xx_HAL_I2C_H */
emilmont	77:869cf507173a	460
emilmont	77:869cf507173a	461	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/