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Last commit 20 Feb 2019 by 
mbed official
targets/cmsis/TARGET_NORDIC/TARGET_MCU_NRF51822/cmsis_nvic.c@395:bfce16e86ea4, 2014-11-10 (annotated)
- Committer:
- mbed_official
- Date:
- Mon Nov 10 07:45:06 2014 +0000
- Revision:
- 395:bfce16e86ea4
- Parent:
- 358:9d7ef901f004
Synchronized with git revision 8adfd82aa1bf8859ec08537ee7bcd4aaaec1769b
Full URL: https://github.com/mbedmicro/mbed/commit/8adfd82aa1bf8859ec08537ee7bcd4aaaec1769b/
Targets: LPC176X - Add repeater pinmode
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| mbed_official | 358:9d7ef901f004 | 1 | /* mbed Microcontroller Library |
| mbed_official | 358:9d7ef901f004 | 2 | * CMSIS-style functionality to support dynamic vectors |
| mbed_official | 358:9d7ef901f004 | 3 | ******************************************************************************* |
| mbed_official | 358:9d7ef901f004 | 4 | * Copyright (c) 2011 ARM Limited. All rights reserved. |
| mbed_official | 358:9d7ef901f004 | 5 | * All rights reserved. |
| mbed_official | 358:9d7ef901f004 | 6 | * |
| mbed_official | 358:9d7ef901f004 | 7 | * Redistribution and use in source and binary forms, with or without |
| mbed_official | 358:9d7ef901f004 | 8 | * modification, are permitted provided that the following conditions are met: |
| mbed_official | 85:e1a8e879a6a9 | 9 | * |
| mbed_official | 358:9d7ef901f004 | 10 | * 1. Redistributions of source code must retain the above copyright notice, |
| mbed_official | 358:9d7ef901f004 | 11 | * this list of conditions and the following disclaimer. |
| mbed_official | 358:9d7ef901f004 | 12 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| mbed_official | 358:9d7ef901f004 | 13 | * this list of conditions and the following disclaimer in the documentation |
| mbed_official | 358:9d7ef901f004 | 14 | * and/or other materials provided with the distribution. |
| mbed_official | 358:9d7ef901f004 | 15 | * 3. Neither the name of ARM Limited nor the names of its contributors |
| mbed_official | 358:9d7ef901f004 | 16 | * may be used to endorse or promote products derived from this software |
| mbed_official | 358:9d7ef901f004 | 17 | * without specific prior written permission. |
| mbed_official | 358:9d7ef901f004 | 18 | * |
| mbed_official | 358:9d7ef901f004 | 19 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| mbed_official | 358:9d7ef901f004 | 20 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| mbed_official | 358:9d7ef901f004 | 21 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| mbed_official | 358:9d7ef901f004 | 22 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| mbed_official | 358:9d7ef901f004 | 23 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| mbed_official | 358:9d7ef901f004 | 24 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| mbed_official | 358:9d7ef901f004 | 25 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| mbed_official | 358:9d7ef901f004 | 26 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| mbed_official | 358:9d7ef901f004 | 27 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| mbed_official | 358:9d7ef901f004 | 28 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| mbed_official | 358:9d7ef901f004 | 29 | ******************************************************************************* |
| mbed_official | 358:9d7ef901f004 | 30 | */ |
| mbed_official | 85:e1a8e879a6a9 | 31 | #include "cmsis_nvic.h" |
| mbed_official | 85:e1a8e879a6a9 | 32 | |
| mbed_official | 85:e1a8e879a6a9 | 33 | /* In the M0, there is no VTOR. In the LPC range such as the LPC11U, |
| mbed_official | 85:e1a8e879a6a9 | 34 | * whilst the vector table may only be something like 48 entries (192 bytes, 0xC0), |
| mbed_official | 85:e1a8e879a6a9 | 35 | * the SYSMEMREMAP register actually remaps the memory from 0x10000000-0x100001FF |
| mbed_official | 85:e1a8e879a6a9 | 36 | * to adress 0x0-0x1FF. In this case, RAM can be addressed at both 0x10000000 and 0x0 |
| mbed_official | 85:e1a8e879a6a9 | 37 | * |
| mbed_official | 85:e1a8e879a6a9 | 38 | * If we just copy the vectors to RAM and switch the SYSMEMMAP, any accesses to FLASH |
| mbed_official | 85:e1a8e879a6a9 | 39 | * above the vector table before 0x200 will actually go to RAM. So we need to provide |
| mbed_official | 85:e1a8e879a6a9 | 40 | * a solution where the compiler gets the right results based on the memory map |
| mbed_official | 85:e1a8e879a6a9 | 41 | * |
| mbed_official | 85:e1a8e879a6a9 | 42 | * Option 1 - We allocate and copy 0x200 of RAM rather than just the table |
| mbed_official | 85:e1a8e879a6a9 | 43 | * - const data and instructions before 0x200 will be copied to and fetched/exec from RAM |
| mbed_official | 85:e1a8e879a6a9 | 44 | * - RAM overhead: 0x200 - 0xC0 = 320 bytes, FLASH overhead: 0 |
| mbed_official | 85:e1a8e879a6a9 | 45 | * |
| mbed_official | 85:e1a8e879a6a9 | 46 | * Option 2 - We pad the flash to 0x200 to ensure the compiler doesn't allocate anything there |
| mbed_official | 85:e1a8e879a6a9 | 47 | * - No flash accesses will go to ram, as there will be nothing there |
| mbed_official | 85:e1a8e879a6a9 | 48 | * - RAM only needs to be allocated for the vectors, as all other ram addresses are normal |
| mbed_official | 85:e1a8e879a6a9 | 49 | * - RAM overhead: 0, FLASH overhead: 320 bytes |
| mbed_official | 85:e1a8e879a6a9 | 50 | * |
| mbed_official | 85:e1a8e879a6a9 | 51 | * Option 2 is the one to go for, as RAM is the most valuable resource |
| mbed_official | 85:e1a8e879a6a9 | 52 | */ |
| mbed_official | 85:e1a8e879a6a9 | 53 | |
| mbed_official | 85:e1a8e879a6a9 | 54 | |
| mbed_official | 85:e1a8e879a6a9 | 55 | #define NVIC_RAM_VECTOR_ADDRESS (0x10000000) // Location of vectors in RAM |
| mbed_official | 85:e1a8e879a6a9 | 56 | #define NVIC_FLASH_VECTOR_ADDRESS (0x0) // Initial vector position in flash |
| mbed_official | 85:e1a8e879a6a9 | 57 | /* |
| mbed_official | 85:e1a8e879a6a9 | 58 | void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) { |
| mbed_official | 85:e1a8e879a6a9 | 59 | uint32_t *vectors = (uint32_t*)SCB->VTOR; |
| mbed_official | 85:e1a8e879a6a9 | 60 | uint32_t i; |
| mbed_official | 85:e1a8e879a6a9 | 61 | |
| mbed_official | 85:e1a8e879a6a9 | 62 | // Copy and switch to dynamic vectors if the first time called |
| mbed_official | 85:e1a8e879a6a9 | 63 | if (SCB->VTOR == NVIC_FLASH_VECTOR_ADDRESS) { |
| mbed_official | 85:e1a8e879a6a9 | 64 | uint32_t *old_vectors = vectors; |
| mbed_official | 85:e1a8e879a6a9 | 65 | vectors = (uint32_t*)NVIC_RAM_VECTOR_ADDRESS; |
| mbed_official | 85:e1a8e879a6a9 | 66 | for (i=0; i<NVIC_NUM_VECTORS; i++) { |
| mbed_official | 85:e1a8e879a6a9 | 67 | vectors[i] = old_vectors[i]; |
| mbed_official | 85:e1a8e879a6a9 | 68 | } |
| mbed_official | 85:e1a8e879a6a9 | 69 | SCB->VTOR = (uint32_t)NVIC_RAM_VECTOR_ADDRESS; |
| mbed_official | 85:e1a8e879a6a9 | 70 | } |
| mbed_official | 85:e1a8e879a6a9 | 71 | vectors[IRQn + 16] = vector; |
| mbed_official | 85:e1a8e879a6a9 | 72 | } |
| mbed_official | 85:e1a8e879a6a9 | 73 | |
| mbed_official | 85:e1a8e879a6a9 | 74 | uint32_t NVIC_GetVector(IRQn_Type IRQn) { |
| mbed_official | 85:e1a8e879a6a9 | 75 | uint32_t *vectors = (uint32_t*)SCB->VTOR; |
| mbed_official | 85:e1a8e879a6a9 | 76 | return vectors[IRQn + 16]; |
| mbed_official | 85:e1a8e879a6a9 | 77 | }*/ |
| mbed_official | 85:e1a8e879a6a9 | 78 | |
| mbed_official | 85:e1a8e879a6a9 | 79 | void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) { |
| mbed_official | 104:a6a92e2e5a92 | 80 | // int i; |
| mbed_official | 85:e1a8e879a6a9 | 81 | // Space for dynamic vectors, initialised to allocate in R/W |
| mbed_official | 85:e1a8e879a6a9 | 82 | static volatile uint32_t* vectors = (uint32_t*)NVIC_RAM_VECTOR_ADDRESS; |
| mbed_official | 85:e1a8e879a6a9 | 83 | /* |
| mbed_official | 85:e1a8e879a6a9 | 84 | // Copy and switch to dynamic vectors if first time called |
| mbed_official | 85:e1a8e879a6a9 | 85 | if((LPC_SYSCON->SYSMEMREMAP & 0x3) != 0x1) { |
| mbed_official | 85:e1a8e879a6a9 | 86 | uint32_t *old_vectors = (uint32_t *)0; // FLASH vectors are at 0x0 |
| mbed_official | 85:e1a8e879a6a9 | 87 | for(i = 0; i < NVIC_NUM_VECTORS; i++) { |
| mbed_official | 85:e1a8e879a6a9 | 88 | vectors[i] = old_vectors[i]; |
| mbed_official | 85:e1a8e879a6a9 | 89 | } |
| mbed_official | 85:e1a8e879a6a9 | 90 | LPC_SYSCON->SYSMEMREMAP = 0x1; // Remaps 0x0-0x1FF FLASH block to RAM block |
| mbed_official | 85:e1a8e879a6a9 | 91 | }*/ |
| mbed_official | 85:e1a8e879a6a9 | 92 | |
| mbed_official | 85:e1a8e879a6a9 | 93 | // Set the vector |
| mbed_official | 85:e1a8e879a6a9 | 94 | vectors[IRQn + 16] = vector; |
| mbed_official | 85:e1a8e879a6a9 | 95 | } |
| mbed_official | 85:e1a8e879a6a9 | 96 | |
| mbed_official | 85:e1a8e879a6a9 | 97 | uint32_t NVIC_GetVector(IRQn_Type IRQn) { |
| mbed_official | 85:e1a8e879a6a9 | 98 | // We can always read vectors at 0x0, as the addresses are remapped |
| mbed_official | 85:e1a8e879a6a9 | 99 | uint32_t *vectors = (uint32_t*)0; |
| mbed_official | 85:e1a8e879a6a9 | 100 | |
| mbed_official | 85:e1a8e879a6a9 | 101 | // Return the vector |
| mbed_official | 85:e1a8e879a6a9 | 102 | return vectors[IRQn + 16]; |
| mbed_official | 85:e1a8e879a6a9 | 103 | } |
