Chihiro H / Mbed 2 deprecated Microchip23LC1024_demo

Microchip SPI SRAM 23LC1024 demo

Dependencies:   mbed

main.cpp@3:b585283f5932, 2015-11-09 (annotated)

Committer:
discypus
Date:
Mon Nov 09 12:40:31 2015 +0000
Revision:
3:b585283f5932
Parent:
2:e0d7ea47d2a5 
????? status -> mode?????????????????

Who changed what in which revision?

UserRevisionLine numberNew contents of line
discypus 0:9750a875cbda 1 /*
discypus 0:9750a875cbda 2 * sample for Microchip 23LC1024 (SRAM, SPI 20MHz)
discypus 0:9750a875cbda 3 */
discypus 0:9750a875cbda 4
discypus 0:9750a875cbda 5 #include "mbed.h"
discypus 0:9750a875cbda 6
discypus 3:b585283f5932 7 #define DWT_CONTROL ((volatile uint32_t *)0xE0001000)
discypus 3:b585283f5932 8 #define DWT_CYCCNT ((volatile uint32_t *)0xE0001004)
discypus 3:b585283f5932 9 #define SCB_DEMCR ((volatile uint32_t *)0xE000EDFC)
discypus 3:b585283f5932 10
discypus 3:b585283f5932 11 static inline void enableDwtCyccnt()
discypus 3:b585283f5932 12 {
discypus 3:b585283f5932 13 // const uint32_t NOCYCCNT = 1u << 25; // 1:CYCCNT is NOT support
discypus 3:b585283f5932 14 const uint32_t TRCENA = 1u << 24; // enable DWT
discypus 3:b585283f5932 15 const uint32_t CYCCNTENA = 1u << 0; // enable counter
discypus 3:b585283f5932 16
discypus 3:b585283f5932 17 // if (*DWT_CONTROL & NOCYCCNT) { // F401REではsetされていたが、動作する。
discypus 3:b585283f5932 18 *SCB_DEMCR |= TRCENA;
discypus 3:b585283f5932 19 *DWT_CONTROL |= CYCCNTENA;
discypus 3:b585283f5932 20 *DWT_CYCCNT = 0; // reset the counter
discypus 3:b585283f5932 21 // } else {
discypus 3:b585283f5932 22 // NOT supported DWT_CYCCNT
discypus 3:b585283f5932 23 // pc.printf("NOT supported DWT_CYCCNT\r\n");
discypus 3:b585283f5932 24 // }
discypus 3:b585283f5932 25 }
discypus 3:b585283f5932 26 static inline uint32_t getDwtCyccnt(void)
discypus 3:b585283f5932 27 {
discypus 3:b585283f5932 28 return *DWT_CYCCNT;
discypus 3:b585283f5932 29 }
discypus 3:b585283f5932 30
discypus 0:9750a875cbda 31 /** Serial port for DEBUG */
discypus 0:9750a875cbda 32 Serial pc(USBTX, USBRX);
discypus 0:9750a875cbda 33
discypus 0:9750a875cbda 34 DigitalIn user_button(USER_BUTTON);
discypus 0:9750a875cbda 35
discypus 0:9750a875cbda 36 /** */
discypus 0:9750a875cbda 37 SPI spi(SPI_MOSI, SPI_MISO, SPI_SCK);
discypus 0:9750a875cbda 38
discypus 0:9750a875cbda 39 /** */
discypus 0:9750a875cbda 40 DigitalOut cs(SPI_CS);
discypus 0:9750a875cbda 41
discypus 0:9750a875cbda 42 /**
discypus 0:9750a875cbda 43 * USERボタンが押されるまで待つ。
discypus 0:9750a875cbda 44 */
discypus 0:9750a875cbda 45 void
discypus 0:9750a875cbda 46 wait_until_user_button_pressed() {
discypus 0:9750a875cbda 47 while (user_button) {
discypus 0:9750a875cbda 48 __nop();
discypus 0:9750a875cbda 49 }
discypus 0:9750a875cbda 50 pc.printf("USER button is pressed\r\n");
discypus 0:9750a875cbda 51 wait(0.2);
discypus 0:9750a875cbda 52 }
discypus 0:9750a875cbda 53
discypus 3:b585283f5932 54 /**
discypus 3:b585283f5932 55 * 動作確認のために、spiオブジェクトを直接使って読み書きする。
discypus 3:b585283f5932 56 * @pre SPI初期化ずみであること。
discypus 3:b585283f5932 57 */
discypus 3:b585283f5932 58 void
discypus 3:b585283f5932 59 try_single_byte_access() {
discypus 3:b585283f5932 60 const uint32_t address = 0u;
discypus 3:b585283f5932 61 const uint8_t address_high = (address >> (8 * 2)) & 0xFFu;
discypus 3:b585283f5932 62 const uint8_t address_mid = (address >> (8 * 1)) & 0xFFu;
discypus 3:b585283f5932 63 const uint8_t address_low = (address >> (8 * 0)) & 0xFFu;
discypus 3:b585283f5932 64
discypus 3:b585283f5932 65 const uint8_t command_write = 0x02u;
discypus 3:b585283f5932 66 const uint8_t command_read = 0x03u;
discypus 3:b585283f5932 67
discypus 3:b585283f5932 68 const uint8_t data = 0x55;
discypus 3:b585283f5932 69
discypus 3:b585283f5932 70 static uint32_t cpuCounter[100] = {};
discypus 3:b585283f5932 71 size_t counterIndex = 0;
discypus 3:b585283f5932 72 enableDwtCyccnt();
discypus 3:b585283f5932 73
discypus 3:b585283f5932 74 // 1byte write
discypus 3:b585283f5932 75 cpuCounter[counterIndex++] = getDwtCyccnt();
discypus 3:b585283f5932 76 cs = 0; cpuCounter[counterIndex++] = getDwtCyccnt();
discypus 3:b585283f5932 77 spi.write(command_write); cpuCounter[counterIndex++] = getDwtCyccnt();
discypus 3:b585283f5932 78 spi.write(address_high); cpuCounter[counterIndex++] = getDwtCyccnt();
discypus 3:b585283f5932 79 spi.write(address_mid); cpuCounter[counterIndex++] = getDwtCyccnt();
discypus 3:b585283f5932 80 spi.write(address_low); cpuCounter[counterIndex++] = getDwtCyccnt();
discypus 3:b585283f5932 81 spi.write(data); cpuCounter[counterIndex++] = getDwtCyccnt(); // 3:CS Hold Time 50ns(min)=1cycle(20MHz)
discypus 3:b585283f5932 82 cs = 1; cpuCounter[counterIndex++] = getDwtCyccnt();
discypus 3:b585283f5932 83
discypus 3:b585283f5932 84 // 1byte read
discypus 3:b585283f5932 85 cs = 0; cpuCounter[counterIndex++] = getDwtCyccnt(); // 2:CS setup time 25ns(min)
discypus 3:b585283f5932 86 spi.write(command_read); cpuCounter[counterIndex++] = getDwtCyccnt();
discypus 3:b585283f5932 87 spi.write(address_high); cpuCounter[counterIndex++] = getDwtCyccnt();
discypus 3:b585283f5932 88 spi.write(address_mid); cpuCounter[counterIndex++] = getDwtCyccnt();
discypus 3:b585283f5932 89 spi.write(address_low); cpuCounter[counterIndex++] = getDwtCyccnt();
discypus 3:b585283f5932 90 const uint8_t value = spi.write(0); cpuCounter[counterIndex++] = getDwtCyccnt(); // 3:CS Hold Time 50ns(min)
discypus 3:b585283f5932 91 cs = 1; cpuCounter[counterIndex++] = getDwtCyccnt();
discypus 3:b585283f5932 92
discypus 3:b585283f5932 93 pc.printf("single byte access test: result\r\n");
discypus 3:b585283f5932 94 pc.printf(" write: %02x -> read: %02x\r\n", data, value);
discypus 3:b585283f5932 95
discypus 3:b585283f5932 96 pc.printf("CPU Cycle counter\r\n");
discypus 3:b585283f5932 97 for (int i = 1; i < counterIndex; i++) {
discypus 3:b585283f5932 98 const float ns = (cpuCounter[i] - cpuCounter[i - 1]) / (float)SystemCoreClock * 1.0e9;
discypus 3:b585283f5932 99 pc.printf(" %02d = %.3f\r\n", i, ns);
discypus 3:b585283f5932 100 }
discypus 3:b585283f5932 101 }
discypus 3:b585283f5932 102
discypus 0:9750a875cbda 103 /*
discypus 1:4b45ee2c9b51 104 * SPI COMMAND (Microchip 23LC1024, 23K256 SPI SRAM)
discypus 0:9750a875cbda 105 */
discypus 3:b585283f5932 106 enum Microchip23LC1024Commnd {
discypus 0:9750a875cbda 107 READ = 0x03u,
discypus 0:9750a875cbda 108 WRITE = 0x02u,
discypus 0:9750a875cbda 109 EDIO = 0x3bu,
discypus 0:9750a875cbda 110 EQIO = 0x38u,
discypus 0:9750a875cbda 111 RSTIO = 0xffu,
discypus 3:b585283f5932 112 RDMR = 0x05u,
discypus 3:b585283f5932 113 WRMR = 0x01u,
discypus 0:9750a875cbda 114 };
discypus 0:9750a875cbda 115
discypus 1:4b45ee2c9b51 116 /** SRAM Mode (Microchip 23LC1024, 23K256 SPI SRAM) */
discypus 3:b585283f5932 117 enum Microchip23LC1024Mode {
discypus 0:9750a875cbda 118 MODE_MASK = 0xc0u,
discypus 0:9750a875cbda 119 BYTE = 0x00u,
discypus 0:9750a875cbda 120 SEQUENTIAL = 0x40u, // default operation
discypus 0:9750a875cbda 121 PAGE = 0x80u,
discypus 1:4b45ee2c9b51 122 RESERVED = 0xC0u,
discypus 0:9750a875cbda 123 };
discypus 0:9750a875cbda 124
discypus 0:9750a875cbda 125 /**
discypus 0:9750a875cbda 126 * assert CS
discypus 0:9750a875cbda 127 */
discypus 0:9750a875cbda 128 inline void
discypus 0:9750a875cbda 129 assert_CS() {
discypus 0:9750a875cbda 130 cs = 0;
discypus 0:9750a875cbda 131 }
discypus 0:9750a875cbda 132
discypus 0:9750a875cbda 133 /**
discypus 0:9750a875cbda 134 * negate CS
discypus 0:9750a875cbda 135 */
discypus 0:9750a875cbda 136 inline void
discypus 0:9750a875cbda 137 negate_CS() {
discypus 0:9750a875cbda 138 cs = 1;
discypus 0:9750a875cbda 139 }
discypus 0:9750a875cbda 140
discypus 0:9750a875cbda 141 /**
discypus 3:b585283f5932 142 * モードレジスタ読みだし
discypus 0:9750a875cbda 143 * @return レジスタ値
discypus 0:9750a875cbda 144 */
discypus 0:9750a875cbda 145 inline uint8_t
discypus 3:b585283f5932 146 read_mode_register() {
discypus 0:9750a875cbda 147 assert_CS();
discypus 3:b585283f5932 148 spi.write(RDMR);
discypus 3:b585283f5932 149 const uint8_t mode = spi.write(0x00);
discypus 0:9750a875cbda 150 negate_CS();
discypus 0:9750a875cbda 151
discypus 3:b585283f5932 152 return mode;
discypus 0:9750a875cbda 153 }
discypus 0:9750a875cbda 154
discypus 0:9750a875cbda 155 /**
discypus 3:b585283f5932 156 * モードレジスタ書き込み
discypus 3:b585283f5932 157 * @param[in] mode
discypus 0:9750a875cbda 158 */
discypus 0:9750a875cbda 159 inline void
discypus 3:b585283f5932 160 write_mode_register(const uint8_t mode) {
discypus 0:9750a875cbda 161 assert_CS();
discypus 3:b585283f5932 162 spi.write(WRMR);
discypus 3:b585283f5932 163 spi.write(mode);
discypus 0:9750a875cbda 164 negate_CS();
discypus 0:9750a875cbda 165 }
discypus 0:9750a875cbda 166
discypus 0:9750a875cbda 167 /**
discypus 0:9750a875cbda 168 * モードを切り替える。
discypus 0:9750a875cbda 169 * @param[in] mode モード
discypus 0:9750a875cbda 170 * @return 切替前のモード
discypus 3:b585283f5932 171 * @invariant レジスタ中のモード以外のフラグは変更しない。
discypus 0:9750a875cbda 172 */
discypus 0:9750a875cbda 173 inline uint8_t
discypus 0:9750a875cbda 174 change_mode(const unsigned int next_mode) {
discypus 3:b585283f5932 175 const uint8_t previous_register = read_mode_register();
discypus 3:b585283f5932 176 const uint8_t previous_mode = previous_register & MODE_MASK;
discypus 0:9750a875cbda 177 if (next_mode != previous_mode) {
discypus 3:b585283f5932 178 const uint8_t next_register = (previous_register & ~MODE_MASK) | uint8_t(next_mode);
discypus 3:b585283f5932 179 write_mode_register(next_register);
discypus 0:9750a875cbda 180 }
discypus 0:9750a875cbda 181 return previous_mode;
discypus 0:9750a875cbda 182 }
discypus 0:9750a875cbda 183
discypus 0:9750a875cbda 184 /**
discypus 0:9750a875cbda 185 * 1byte read
discypus 2:e0d7ea47d2a5 186 * @param[in] address アドレス 24bit
discypus 0:9750a875cbda 187 * @return データ
discypus 0:9750a875cbda 188 */
discypus 0:9750a875cbda 189 uint8_t
discypus 0:9750a875cbda 190 read_byte(const uint32_t address) {
discypus 0:9750a875cbda 191 const uint8_t address_high = (address >> (8 * 2)) & 0xFFu;
discypus 0:9750a875cbda 192 const uint8_t address_mid = (address >> (8 * 1)) & 0xFFu;
discypus 0:9750a875cbda 193 const uint8_t address_low = (address >> (8 * 0)) & 0xFFu;
discypus 0:9750a875cbda 194
discypus 0:9750a875cbda 195 assert_CS();
discypus 0:9750a875cbda 196 spi.write(READ);
discypus 0:9750a875cbda 197 spi.write(address_high);
discypus 0:9750a875cbda 198 spi.write(address_mid);
discypus 0:9750a875cbda 199 spi.write(address_low);
discypus 0:9750a875cbda 200 const uint8_t data = spi.write(0);
discypus 0:9750a875cbda 201 negate_CS();
discypus 0:9750a875cbda 202
discypus 0:9750a875cbda 203 return data;
discypus 0:9750a875cbda 204 }
discypus 0:9750a875cbda 205
discypus 0:9750a875cbda 206 /**
discypus 0:9750a875cbda 207 * 1byte write
discypus 2:e0d7ea47d2a5 208 * @param[in] address アドレス 24bit
discypus 0:9750a875cbda 209 * @param[in] data データ
discypus 0:9750a875cbda 210 */
discypus 0:9750a875cbda 211 void
discypus 0:9750a875cbda 212 write_byte(const uint32_t address, const uint8_t data) {
discypus 0:9750a875cbda 213 const uint8_t address_high = (address >> (8 * 2)) & 0xFFu;
discypus 0:9750a875cbda 214 const uint8_t address_mid = (address >> (8 * 1)) & 0xFFu;
discypus 0:9750a875cbda 215 const uint8_t address_low = (address >> (8 * 0)) & 0xFFu;
discypus 0:9750a875cbda 216
discypus 0:9750a875cbda 217 assert_CS();
discypus 0:9750a875cbda 218 spi.write(WRITE);
discypus 0:9750a875cbda 219 spi.write(address_high);
discypus 0:9750a875cbda 220 spi.write(address_mid);
discypus 0:9750a875cbda 221 spi.write(address_low);
discypus 0:9750a875cbda 222 spi.write(data);
discypus 0:9750a875cbda 223 negate_CS();
discypus 0:9750a875cbda 224 }
discypus 0:9750a875cbda 225
discypus 0:9750a875cbda 226 /**
discypus 0:9750a875cbda 227 * 連続読み出し
discypus 2:e0d7ea47d2a5 228 * @pre sequentialモードかpageモードに切り替えていること。
discypus 0:9750a875cbda 229 */
discypus 0:9750a875cbda 230 void
discypus 0:9750a875cbda 231 read_bytes(const uint32_t address, uint8_t __restrict data[], const uint32_t size) {
discypus 0:9750a875cbda 232 const uint8_t address_high = (address >> (8 * 2)) & 0xFFu;
discypus 0:9750a875cbda 233 const uint8_t address_mid = (address >> (8 * 1)) & 0xFFu;
discypus 0:9750a875cbda 234 const uint8_t address_low = (address >> (8 * 0)) & 0xFFu;
discypus 0:9750a875cbda 235
discypus 0:9750a875cbda 236 assert_CS();
discypus 0:9750a875cbda 237 spi.write(READ);
discypus 0:9750a875cbda 238 spi.write(address_high);
discypus 0:9750a875cbda 239 spi.write(address_mid);
discypus 0:9750a875cbda 240 spi.write(address_low);
discypus 0:9750a875cbda 241 for (uint32_t i = 0; i < size; ++i) {
discypus 0:9750a875cbda 242 data[i] = spi.write(0x00);
discypus 0:9750a875cbda 243 }
discypus 0:9750a875cbda 244 negate_CS();
discypus 0:9750a875cbda 245 }
discypus 0:9750a875cbda 246
discypus 0:9750a875cbda 247 /**
discypus 0:9750a875cbda 248 * 連続書き込み
discypus 2:e0d7ea47d2a5 249 * @pre sequentialモードかpageモードに切り替えていること。
discypus 0:9750a875cbda 250 */
discypus 0:9750a875cbda 251 void
discypus 0:9750a875cbda 252 write_bytes(const uint32_t address, const uint8_t __restrict data[], const uint32_t size) {
discypus 0:9750a875cbda 253 const uint8_t address_high = (address >> (8 * 2)) & 0xFFu;
discypus 0:9750a875cbda 254 const uint8_t address_mid = (address >> (8 * 1)) & 0xFFu;
discypus 0:9750a875cbda 255 const uint8_t address_low = (address >> (8 * 0)) & 0xFFu;
discypus 0:9750a875cbda 256
discypus 0:9750a875cbda 257 assert_CS();
discypus 0:9750a875cbda 258 spi.write(WRITE);
discypus 0:9750a875cbda 259 spi.write(address_high);
discypus 0:9750a875cbda 260 spi.write(address_mid);
discypus 0:9750a875cbda 261 spi.write(address_low);
discypus 0:9750a875cbda 262 for (uint32_t i = 0; i < size; ++i) {
discypus 0:9750a875cbda 263 spi.write(data[i]);
discypus 0:9750a875cbda 264 }
discypus 0:9750a875cbda 265 negate_CS();
discypus 0:9750a875cbda 266 }
discypus 0:9750a875cbda 267
discypus 0:9750a875cbda 268 /*
discypus 0:9750a875cbda 269 *
discypus 0:9750a875cbda 270 */
discypus 0:9750a875cbda 271
discypus 0:9750a875cbda 272
discypus 0:9750a875cbda 273 /** 動作確認用 SPI buffer */
discypus 0:9750a875cbda 274 uint8_t buf[256] = {};
discypus 0:9750a875cbda 275
discypus 0:9750a875cbda 276 /**
discypus 2:e0d7ea47d2a5 277 * byteアクセスを複数回実行して、照合する
discypus 0:9750a875cbda 278 */
discypus 0:9750a875cbda 279 void
discypus 0:9750a875cbda 280 try_byte_access() {
discypus 0:9750a875cbda 281 const uint8_t size = 16;
discypus 0:9750a875cbda 282
discypus 0:9750a875cbda 283 // write data
discypus 0:9750a875cbda 284 for (int i = 0; i < size; i++) {
discypus 0:9750a875cbda 285 write_byte(i, i);
discypus 0:9750a875cbda 286 }
discypus 0:9750a875cbda 287
discypus 0:9750a875cbda 288 // read data
discypus 0:9750a875cbda 289 for (int i = 0; i < size; i++) {
discypus 0:9750a875cbda 290 buf[i] = read_byte(i);
discypus 0:9750a875cbda 291 }
discypus 0:9750a875cbda 292
discypus 0:9750a875cbda 293 // show data (to SERIAL)
discypus 0:9750a875cbda 294 pc.printf("byte access test: result\r\n");
discypus 0:9750a875cbda 295 for (int i = 0; i < size; i++) {
discypus 0:9750a875cbda 296 pc.printf(" %04x : %02x %s\r\n", i, buf[i], (buf[i] ==i)?"OK":"BAD");
discypus 0:9750a875cbda 297 }
discypus 0:9750a875cbda 298 }
discypus 0:9750a875cbda 299
discypus 0:9750a875cbda 300 /**
discypus 2:e0d7ea47d2a5 301 * pageアクセスを実行して、照合する
discypus 0:9750a875cbda 302 */
discypus 0:9750a875cbda 303 void
discypus 0:9750a875cbda 304 try_page_access() {
discypus 0:9750a875cbda 305 const uint32_t address = 0x1000;
discypus 2:e0d7ea47d2a5 306 const uint32_t page_size = 32;
discypus 0:9750a875cbda 307
discypus 0:9750a875cbda 308 // write
discypus 2:e0d7ea47d2a5 309 for (uint32_t i = 0; i < page_size; ++i) {
discypus 0:9750a875cbda 310 buf[i] = i;
discypus 0:9750a875cbda 311 }
discypus 2:e0d7ea47d2a5 312 write_bytes(address, buf, page_size);
discypus 0:9750a875cbda 313
discypus 0:9750a875cbda 314 // read
discypus 2:e0d7ea47d2a5 315 for (uint32_t i = 0; i < page_size; ++i) {
discypus 0:9750a875cbda 316 buf[i] = 0;
discypus 0:9750a875cbda 317 }
discypus 0:9750a875cbda 318
discypus 2:e0d7ea47d2a5 319 read_bytes(address, buf, page_size);
discypus 0:9750a875cbda 320
discypus 0:9750a875cbda 321 // show data (to SERIAL)
discypus 0:9750a875cbda 322 pc.printf("page access test: result\r\n");
discypus 2:e0d7ea47d2a5 323 for (int i = 0; i < page_size; i++) {
discypus 0:9750a875cbda 324 pc.printf(" %04x : %02x %s\r\n", address + i, buf[i], (buf[i] ==i)?"OK":"BAD");
discypus 0:9750a875cbda 325 }
discypus 0:9750a875cbda 326 }
discypus 0:9750a875cbda 327
discypus 0:9750a875cbda 328 /**
discypus 2:e0d7ea47d2a5 329 * sequentialアクセスを実行して、照合する
discypus 0:9750a875cbda 330 */
discypus 0:9750a875cbda 331 void
discypus 0:9750a875cbda 332 try_sequential_access() {
discypus 0:9750a875cbda 333 const uint32_t address = 0x2000;
discypus 0:9750a875cbda 334 const uint32_t size = 256;
discypus 0:9750a875cbda 335
discypus 0:9750a875cbda 336 // write
discypus 0:9750a875cbda 337 for (uint32_t i = 0; i < size; ++i) {
discypus 0:9750a875cbda 338 buf[i] = i;
discypus 0:9750a875cbda 339 }
discypus 0:9750a875cbda 340
discypus 0:9750a875cbda 341 write_bytes(address, buf, size);
discypus 0:9750a875cbda 342
discypus 0:9750a875cbda 343 // read
discypus 0:9750a875cbda 344 for (uint32_t i = 0; i < size; ++i) {
discypus 0:9750a875cbda 345 buf[i] = 0;
discypus 0:9750a875cbda 346 }
discypus 0:9750a875cbda 347
discypus 0:9750a875cbda 348 read_bytes(address, buf, size);
discypus 0:9750a875cbda 349
discypus 0:9750a875cbda 350 // show data (to SERIAL)
discypus 0:9750a875cbda 351 pc.printf("sequential access test: result\r\n");
discypus 0:9750a875cbda 352 for (int i = 0; i < size; i++) {
discypus 0:9750a875cbda 353 pc.printf(" %04x : %02x %s\r\n", address + i, buf[i], (buf[i] ==i)?"OK":"BAD");
discypus 0:9750a875cbda 354 }
discypus 0:9750a875cbda 355 }
discypus 0:9750a875cbda 356
discypus 0:9750a875cbda 357 /**
discypus 0:9750a875cbda 358 * 動作確認用。TODO: テストコードにすること。
discypus 0:9750a875cbda 359 */
discypus 0:9750a875cbda 360 int
discypus 0:9750a875cbda 361 main()
discypus 0:9750a875cbda 362 {
discypus 0:9750a875cbda 363 pc.baud(115200);
discypus 0:9750a875cbda 364 pc.printf("CPU SystemCoreClock is %.2f MHz\r\n", (float)SystemCoreClock/1.0e6f);
discypus 0:9750a875cbda 365
discypus 0:9750a875cbda 366 // initialize SPI
discypus 0:9750a875cbda 367 spi.format(8, 0); // 8bit, mode=0
discypus 0:9750a875cbda 368 spi.frequency(20 * 1000 * 1000); // max 20MHz
discypus 0:9750a875cbda 369 negate_CS();
discypus 0:9750a875cbda 370
discypus 3:b585283f5932 371 // read mode
discypus 3:b585283f5932 372 pc.printf("\r\nread mode register\r\n");
discypus 3:b585283f5932 373 const uint8_t mode = read_mode_register();
discypus 3:b585283f5932 374 pc.printf(" mode register = %02x\r\n", mode);
discypus 3:b585283f5932 375
discypus 0:9750a875cbda 376 // test
discypus 0:9750a875cbda 377 pc.printf("\r\npush user button to start: try_single_byte_access\r\n");
discypus 0:9750a875cbda 378 wait_until_user_button_pressed();
discypus 0:9750a875cbda 379 try_single_byte_access();
discypus 0:9750a875cbda 380
discypus 1:4b45ee2c9b51 381 pc.printf("\r\npush user button to start: try_sequential_access (default)\r\n");
discypus 1:4b45ee2c9b51 382 wait_until_user_button_pressed();
discypus 1:4b45ee2c9b51 383 try_sequential_access();
discypus 1:4b45ee2c9b51 384
discypus 0:9750a875cbda 385 pc.printf("\r\npush user button to start: try_byte_access\r\n");
discypus 0:9750a875cbda 386 wait_until_user_button_pressed();
discypus 1:4b45ee2c9b51 387 change_mode(BYTE);
discypus 0:9750a875cbda 388 try_byte_access();
discypus 0:9750a875cbda 389
discypus 0:9750a875cbda 390 pc.printf("\r\npush user button to start: try_page_access\r\n");
discypus 0:9750a875cbda 391 wait_until_user_button_pressed();
discypus 1:4b45ee2c9b51 392 change_mode(PAGE);
discypus 0:9750a875cbda 393 try_page_access();
discypus 0:9750a875cbda 394
discypus 0:9750a875cbda 395 pc.printf("\r\npush user button to start: try_sequential_access\r\n");
discypus 0:9750a875cbda 396 wait_until_user_button_pressed();
discypus 1:4b45ee2c9b51 397 change_mode(SEQUENTIAL);
discypus 0:9750a875cbda 398 try_sequential_access();
discypus 0:9750a875cbda 399
discypus 0:9750a875cbda 400 pc.printf("\r\nTEST END\r\n\r\n");
discypus 0:9750a875cbda 401
discypus 0:9750a875cbda 402 for(;;) {
discypus 0:9750a875cbda 403 }
discypus 0:9750a875cbda 404 }