For the LPC1768, the datasheet says the maximum SPI rate for the SPS peripheral is 33 MHz. The firmware uses CCLK (96 mhz) for the SPS clock, and the minimum prescale is 2, so the max SPI rate could be 48mhz (but the peripheral limit is 33 mhz). I tested unconnected SPI speeds (megabits/second mbs) with spi.write() of 1024 bytes.
SPS clock write DMA
4MHz 2.6 mbs 3.3
8MHz 3.9 mbs 6.6
12MHz 4.9 mbs 9.8
16MHz 5.0 mbs 12.9
24MHz 6.1 mbs 19.1
32MHz 6.6 mbs 19.1
With a logic analyzer, I measured the mbed's SPI CLK frequency, and CLK rates matched the spi.frequecy() request up to 24 mhz. My analyzer can only sample up to 50mhz.
(EDIT) added DMA. DMA should be added to SPI library, many devices could profit from high speed SPI block transfers (wiznet Ethernet, SPI SD, SPI serial flash, ...) Other MCUs utilize DMA/FIFOs. For some comparative results visit
https://github.com/manitou48/DUEZoo/blob/master/SPIperf.txt
DMA timed from modifications to the following
https://developer.mbed.org/users/okini3939/code/SPIRAM_23LC1024_DMA/
Hello,
I would like to know the maximum frequency that can be used with the SPI bus. Where can I find this information?
Thank you.