MPU9150.cpp

00001 #include "MPU9150.h"
00002 
00003 /** Default constructor, uses default I2C address.
00004  * @see MPU9150_DEFAULT_ADDRESS
00005  */
00006 MPU9150::MPU9150() {
00007     devAddr = MPU9150_DEFAULT_ADDRESS;
00008 }
00009 
00010 /** Specific address constructor.
00011  * @param address I2C address
00012  * @see MPU9150_DEFAULT_ADDRESS
00013  * @see MPU9150_ADDRESS_AD0_LOW
00014  * @see MPU9150_ADDRESS_AD0_HIGH
00015  */
00016 MPU9150::MPU9150(uint8_t address) {
00017     devAddr = address;
00018 }
00019 
00020 /** Power on and prepare for general usage.
00021  * This will activate the device and take it out of sleep mode (which must be done
00022  * after start-up). This function also sets both the accelerometer and the gyroscope
00023  * to their most sensitive settings, namely +/- 2g and +/- 250 degrees/sec, and sets
00024  * the clock source to use the X Gyro for reference, which is slightly better than
00025  * the default internal clock source.
00026  */
00027 void MPU9150::initialize() {
00028     setClockSource(MPU9150_CLOCK_PLL_XGYRO);
00029     setFullScaleGyroRange(MPU9150_GYRO_FS_250);
00030     setFullScaleAccelRange(MPU9150_ACCEL_FS_2);
00031     setSleepEnabled(false); // thanks to Jack Elston for pointing this one out!
00032 }
00033 
00034 /** Verify the I2C connection.
00035  * Make sure the device is connected and responds as expected.
00036  * @return True if connection is valid, false otherwise
00037  */
00038 bool MPU9150::testConnection() {
00039     return getDeviceID() == 0x34;
00040 }
00041 
00042 // AUX_VDDIO register (InvenSense demo code calls this RA_*G_OFFS_TC)
00043 
00044 /** Get the auxiliary I2C supply voltage level.
00045  * When set to 1, the auxiliary I2C bus high logic level is VDD. When cleared to
00046  * 0, the auxiliary I2C bus high logic level is VLOGIC. This does not apply to
00047  * the MPU-6000, which does not have a VLOGIC pin.
00048  * @return I2C supply voltage level (0=VLOGIC, 1=VDD)
00049  */
00050 uint8_t MPU9150::getAuxVDDIOLevel() {
00051     I2Cdev::readBit(devAddr, MPU9150_RA_YG_OFFS_TC, MPU9150_TC_PWR_MODE_BIT, buffer);
00052     return buffer[0];
00053 }
00054 /** Set the auxiliary I2C supply voltage level.
00055  * When set to 1, the auxiliary I2C bus high logic level is VDD. When cleared to
00056  * 0, the auxiliary I2C bus high logic level is VLOGIC. This does not apply to
00057  * the MPU-6000, which does not have a VLOGIC pin.
00058  * @param level I2C supply voltage level (0=VLOGIC, 1=VDD)
00059  */
00060 void MPU9150::setAuxVDDIOLevel(uint8_t level) {
00061     I2Cdev::writeBit(devAddr, MPU9150_RA_YG_OFFS_TC, MPU9150_TC_PWR_MODE_BIT, level);
00062 }
00063 
00064 // SMPLRT_DIV register
00065 
00066 /** Get gyroscope output rate divider.
00067  * The sensor register output, FIFO output, DMP sampling, Motion detection, Zero
00068  * Motion detection, and Free Fall detection are all based on the Sample Rate.
00069  * The Sample Rate is generated by dividing the gyroscope output rate by
00070  * SMPLRT_DIV:
00071  *
00072  * Sample Rate = Gyroscope Output Rate / (1 + SMPLRT_DIV)
00073  *
00074  * where Gyroscope Output Rate = 8kHz when the DLPF is disabled (DLPF_CFG = 0 or
00075  * 7), and 1kHz when the DLPF is enabled (see Register 26).
00076  *
00077  * Note: The accelerometer output rate is 1kHz. This means that for a Sample
00078  * Rate greater than 1kHz, the same accelerometer sample may be output to the
00079  * FIFO, DMP, and sensor registers more than once.
00080  *
00081  * For a diagram of the gyroscope and accelerometer signal paths, see Section 8
00082  * of the MPU-6000/MPU-9150 Product Specification document.
00083  *
00084  * @return Current sample rate
00085  * @see MPU9150_RA_SMPLRT_DIV
00086  */
00087 uint8_t MPU9150::getRate() {
00088     I2Cdev::readByte(devAddr, MPU9150_RA_SMPLRT_DIV, buffer);
00089     return buffer[0];
00090 }
00091 /** Set gyroscope sample rate divider.
00092  * @param rate New sample rate divider
00093  * @see getRate()
00094  * @see MPU9150_RA_SMPLRT_DIV
00095  */
00096 void MPU9150::setRate(uint8_t rate) {
00097     I2Cdev::writeByte(devAddr, MPU9150_RA_SMPLRT_DIV, rate);
00098 }
00099 
00100 // CONFIG register
00101 
00102 /** Get external FSYNC configuration.
00103  * Configures the external Frame Synchronization (FSYNC) pin sampling. An
00104  * external signal connected to the FSYNC pin can be sampled by configuring
00105  * EXT_SYNC_SET. Signal changes to the FSYNC pin are latched so that short
00106  * strobes may be captured. The latched FSYNC signal will be sampled at the
00107  * Sampling Rate, as defined in register 25. After sampling, the latch will
00108  * reset to the current FSYNC signal state.
00109  *
00110  * The sampled value will be reported in place of the least significant bit in
00111  * a sensor data register determined by the value of EXT_SYNC_SET according to
00112  * the following table.
00113  *
00114  * <pre>
00115  * EXT_SYNC_SET | FSYNC Bit Location
00116  * -------------+-------------------
00117  * 0            | Input disabled
00118  * 1            | TEMP_OUT_L[0]
00119  * 2            | GYRO_XOUT_L[0]
00120  * 3            | GYRO_YOUT_L[0]
00121  * 4            | GYRO_ZOUT_L[0]
00122  * 5            | ACCEL_XOUT_L[0]
00123  * 6            | ACCEL_YOUT_L[0]
00124  * 7            | ACCEL_ZOUT_L[0]
00125  * </pre>
00126  *
00127  * @return FSYNC configuration value
00128  */
00129 uint8_t MPU9150::getExternalFrameSync() {
00130     I2Cdev::readBits(devAddr, MPU9150_RA_CONFIG, MPU9150_CFG_EXT_SYNC_SET_BIT, MPU9150_CFG_EXT_SYNC_SET_LENGTH, buffer);
00131     return buffer[0];
00132 }
00133 /** Set external FSYNC configuration.
00134  * @see getExternalFrameSync()
00135  * @see MPU9150_RA_CONFIG
00136  * @param sync New FSYNC configuration value
00137  */
00138 void MPU9150::setExternalFrameSync(uint8_t sync) {
00139     I2Cdev::writeBits(devAddr, MPU9150_RA_CONFIG, MPU9150_CFG_EXT_SYNC_SET_BIT, MPU9150_CFG_EXT_SYNC_SET_LENGTH, sync);
00140 }
00141 /** Get digital low-pass filter configuration.
00142  * The DLPF_CFG parameter sets the digital low pass filter configuration. It
00143  * also determines the internal sampling rate used by the device as shown in
00144  * the table below.
00145  *
00146  * Note: The accelerometer output rate is 1kHz. This means that for a Sample
00147  * Rate greater than 1kHz, the same accelerometer sample may be output to the
00148  * FIFO, DMP, and sensor registers more than once.
00149  *
00150  * <pre>
00151  *          |   ACCELEROMETER    |           GYROSCOPE
00152  * DLPF_CFG | Bandwidth | Delay  | Bandwidth | Delay  | Sample Rate
00153  * ---------+-----------+--------+-----------+--------+-------------
00154  * 0        | 260Hz     | 0ms    | 256Hz     | 0.98ms | 8kHz
00155  * 1        | 184Hz     | 2.0ms  | 188Hz     | 1.9ms  | 1kHz
00156  * 2        | 94Hz      | 3.0ms  | 98Hz      | 2.8ms  | 1kHz
00157  * 3        | 44Hz      | 4.9ms  | 42Hz      | 4.8ms  | 1kHz
00158  * 4        | 21Hz      | 8.5ms  | 20Hz      | 8.3ms  | 1kHz
00159  * 5        | 10Hz      | 13.8ms | 10Hz      | 13.4ms | 1kHz
00160  * 6        | 5Hz       | 19.0ms | 5Hz       | 18.6ms | 1kHz
00161  * 7        |   -- Reserved --   |   -- Reserved --   | Reserved
00162  * </pre>
00163  *
00164  * @return DLFP configuration
00165  * @see MPU9150_RA_CONFIG
00166  * @see MPU9150_CFG_DLPF_CFG_BIT
00167  * @see MPU9150_CFG_DLPF_CFG_LENGTH
00168  */
00169 uint8_t MPU9150::getDLPFMode() {
00170     I2Cdev::readBits(devAddr, MPU9150_RA_CONFIG, MPU9150_CFG_DLPF_CFG_BIT, MPU9150_CFG_DLPF_CFG_LENGTH, buffer);
00171     return buffer[0];
00172 }
00173 /** Set digital low-pass filter configuration.
00174  * @param mode New DLFP configuration setting
00175  * @see getDLPFBandwidth()
00176  * @see MPU9150_DLPF_BW_256
00177  * @see MPU9150_RA_CONFIG
00178  * @see MPU9150_CFG_DLPF_CFG_BIT
00179  * @see MPU9150_CFG_DLPF_CFG_LENGTH
00180  */
00181 void MPU9150::setDLPFMode(uint8_t mode) {
00182     I2Cdev::writeBits(devAddr, MPU9150_RA_CONFIG, MPU9150_CFG_DLPF_CFG_BIT, MPU9150_CFG_DLPF_CFG_LENGTH, mode);
00183 }
00184 
00185 // GYRO_CONFIG register
00186 
00187 /** Get full-scale gyroscope range.
00188  * The FS_SEL parameter allows setting the full-scale range of the gyro sensors,
00189  * as described in the table below.
00190  *
00191  * <pre>
00192  * 0 = +/- 250 degrees/sec
00193  * 1 = +/- 500 degrees/sec
00194  * 2 = +/- 1000 degrees/sec
00195  * 3 = +/- 2000 degrees/sec
00196  * </pre>
00197  *
00198  * @return Current full-scale gyroscope range setting
00199  * @see MPU9150_GYRO_FS_250
00200  * @see MPU9150_RA_GYRO_CONFIG
00201  * @see MPU9150_GCONFIG_FS_SEL_BIT
00202  * @see MPU9150_GCONFIG_FS_SEL_LENGTH
00203  */
00204 uint8_t MPU9150::getFullScaleGyroRange() {
00205     I2Cdev::readBits(devAddr, MPU9150_RA_GYRO_CONFIG, MPU9150_GCONFIG_FS_SEL_BIT, MPU9150_GCONFIG_FS_SEL_LENGTH, buffer);
00206     return buffer[0];
00207 }
00208 /** Set full-scale gyroscope range.
00209  * @param range New full-scale gyroscope range value
00210  * @see getFullScaleRange()
00211  * @see MPU9150_GYRO_FS_250
00212  * @see MPU9150_RA_GYRO_CONFIG
00213  * @see MPU9150_GCONFIG_FS_SEL_BIT
00214  * @see MPU9150_GCONFIG_FS_SEL_LENGTH
00215  */
00216 void MPU9150::setFullScaleGyroRange(uint8_t range) {
00217     I2Cdev::writeBits(devAddr, MPU9150_RA_GYRO_CONFIG, MPU9150_GCONFIG_FS_SEL_BIT, MPU9150_GCONFIG_FS_SEL_LENGTH, range);
00218 }
00219 
00220 // ACCEL_CONFIG register
00221 
00222 /** Get self-test enabled setting for accelerometer X axis.
00223  * @return Self-test enabled value
00224  * @see MPU9150_RA_ACCEL_CONFIG
00225  */
00226 bool MPU9150::getAccelXSelfTest() {
00227     I2Cdev::readBit(devAddr, MPU9150_RA_ACCEL_CONFIG, MPU9150_ACONFIG_XA_ST_BIT, buffer);
00228     return buffer[0];
00229 }
00230 /** Get self-test enabled setting for accelerometer X axis.
00231  * @param enabled Self-test enabled value
00232  * @see MPU9150_RA_ACCEL_CONFIG
00233  */
00234 void MPU9150::setAccelXSelfTest(bool enabled) {
00235     I2Cdev::writeBit(devAddr, MPU9150_RA_ACCEL_CONFIG, MPU9150_ACONFIG_XA_ST_BIT, enabled);
00236 }
00237 /** Get self-test enabled value for accelerometer Y axis.
00238  * @return Self-test enabled value
00239  * @see MPU9150_RA_ACCEL_CONFIG
00240  */
00241 bool MPU9150::getAccelYSelfTest() {
00242     I2Cdev::readBit(devAddr, MPU9150_RA_ACCEL_CONFIG, MPU9150_ACONFIG_YA_ST_BIT, buffer);
00243     return buffer[0];
00244 }
00245 /** Get self-test enabled value for accelerometer Y axis.
00246  * @param enabled Self-test enabled value
00247  * @see MPU9150_RA_ACCEL_CONFIG
00248  */
00249 void MPU9150::setAccelYSelfTest(bool enabled) {
00250     I2Cdev::writeBit(devAddr, MPU9150_RA_ACCEL_CONFIG, MPU9150_ACONFIG_YA_ST_BIT, enabled);
00251 }
00252 /** Get self-test enabled value for accelerometer Z axis.
00253  * @return Self-test enabled value
00254  * @see MPU9150_RA_ACCEL_CONFIG
00255  */
00256 bool MPU9150::getAccelZSelfTest() {
00257     I2Cdev::readBit(devAddr, MPU9150_RA_ACCEL_CONFIG, MPU9150_ACONFIG_ZA_ST_BIT, buffer);
00258     return buffer[0];
00259 }
00260 /** Set self-test enabled value for accelerometer Z axis.
00261  * @param enabled Self-test enabled value
00262  * @see MPU9150_RA_ACCEL_CONFIG
00263  */
00264 void MPU9150::setAccelZSelfTest(bool enabled) {
00265     I2Cdev::writeBit(devAddr, MPU9150_RA_ACCEL_CONFIG, MPU9150_ACONFIG_ZA_ST_BIT, enabled);
00266 }
00267 /** Get full-scale accelerometer range.
00268  * The FS_SEL parameter allows setting the full-scale range of the accelerometer
00269  * sensors, as described in the table below.
00270  *
00271  * <pre>
00272  * 0 = +/- 2g
00273  * 1 = +/- 4g
00274  * 2 = +/- 8g
00275  * 3 = +/- 16g
00276  * </pre>
00277  *
00278  * @return Current full-scale accelerometer range setting
00279  * @see MPU9150_ACCEL_FS_2
00280  * @see MPU9150_RA_ACCEL_CONFIG
00281  * @see MPU9150_ACONFIG_AFS_SEL_BIT
00282  * @see MPU9150_ACONFIG_AFS_SEL_LENGTH
00283  */
00284 uint8_t MPU9150::getFullScaleAccelRange() {
00285     I2Cdev::readBits(devAddr, MPU9150_RA_ACCEL_CONFIG, MPU9150_ACONFIG_AFS_SEL_BIT, MPU9150_ACONFIG_AFS_SEL_LENGTH, buffer);
00286     return buffer[0];
00287 }
00288 /** Set full-scale accelerometer range.
00289  * @param range New full-scale accelerometer range setting
00290  * @see getFullScaleAccelRange()
00291  */
00292 void MPU9150::setFullScaleAccelRange(uint8_t range) {
00293     I2Cdev::writeBits(devAddr, MPU9150_RA_ACCEL_CONFIG, MPU9150_ACONFIG_AFS_SEL_BIT, MPU9150_ACONFIG_AFS_SEL_LENGTH, range);
00294 }
00295 /** Get the high-pass filter configuration.
00296  * The DHPF is a filter module in the path leading to motion detectors (Free
00297  * Fall, Motion threshold, and Zero Motion). The high pass filter output is not
00298  * available to the data registers (see Figure in Section 8 of the MPU-6000/
00299  * MPU-9150 Product Specification document).
00300  *
00301  * The high pass filter has three modes:
00302  *
00303  * <pre>
00304  *    Reset: The filter output settles to zero within one sample. This
00305  *           effectively disables the high pass filter. This mode may be toggled
00306  *           to quickly settle the filter.
00307  *
00308  *    On:    The high pass filter will pass signals above the cut off frequency.
00309  *
00310  *    Hold:  When triggered, the filter holds the present sample. The filter
00311  *           output will be the difference between the input sample and the held
00312  *           sample.
00313  * </pre>
00314  *
00315  * <pre>
00316  * ACCEL_HPF | Filter Mode | Cut-off Frequency
00317  * ----------+-------------+------------------
00318  * 0         | Reset       | None
00319  * 1         | On          | 5Hz
00320  * 2         | On          | 2.5Hz
00321  * 3         | On          | 1.25Hz
00322  * 4         | On          | 0.63Hz
00323  * 7         | Hold        | None
00324  * </pre>
00325  *
00326  * @return Current high-pass filter configuration
00327  * @see MPU9150_DHPF_RESET
00328  * @see MPU9150_RA_ACCEL_CONFIG
00329  */
00330 uint8_t MPU9150::getDHPFMode() {
00331     I2Cdev::readBits(devAddr, MPU9150_RA_ACCEL_CONFIG, MPU9150_ACONFIG_ACCEL_HPF_BIT, MPU9150_ACONFIG_ACCEL_HPF_LENGTH, buffer);
00332     return buffer[0];
00333 }
00334 /** Set the high-pass filter configuration.
00335  * @param bandwidth New high-pass filter configuration
00336  * @see setDHPFMode()
00337  * @see MPU9150_DHPF_RESET
00338  * @see MPU9150_RA_ACCEL_CONFIG
00339  */
00340 void MPU9150::setDHPFMode(uint8_t bandwidth) {
00341     I2Cdev::writeBits(devAddr, MPU9150_RA_ACCEL_CONFIG, MPU9150_ACONFIG_ACCEL_HPF_BIT, MPU9150_ACONFIG_ACCEL_HPF_LENGTH, bandwidth);
00342 }
00343 
00344 // FF_THR register
00345 
00346 /** Get free-fall event acceleration threshold.
00347  * This register configures the detection threshold for Free Fall event
00348  * detection. The unit of FF_THR is 1LSB = 2mg. Free Fall is detected when the
00349  * absolute value of the accelerometer measurements for the three axes are each
00350  * less than the detection threshold. This condition increments the Free Fall
00351  * duration counter (Register 30). The Free Fall interrupt is triggered when the
00352  * Free Fall duration counter reaches the time specified in FF_DUR.
00353  *
00354  * For more details on the Free Fall detection interrupt, see Section 8.2 of the
00355  * MPU-6000/MPU-9150 Product Specification document as well as Registers 56 and
00356  * 58 of this document.
00357  *
00358  * @return Current free-fall acceleration threshold value (LSB = 2mg)
00359  * @see MPU9150_RA_FF_THR
00360  */
00361 uint8_t MPU9150::getFreefallDetectionThreshold() {
00362     I2Cdev::readByte(devAddr, MPU9150_RA_FF_THR, buffer);
00363     return buffer[0];
00364 }
00365 /** Get free-fall event acceleration threshold.
00366  * @param threshold New free-fall acceleration threshold value (LSB = 2mg)
00367  * @see getFreefallDetectionThreshold()
00368  * @see MPU9150_RA_FF_THR
00369  */
00370 void MPU9150::setFreefallDetectionThreshold(uint8_t threshold) {
00371     I2Cdev::writeByte(devAddr, MPU9150_RA_FF_THR, threshold);
00372 }
00373 
00374 // FF_DUR register
00375 
00376 /** Get free-fall event duration threshold.
00377  * This register configures the duration counter threshold for Free Fall event
00378  * detection. The duration counter ticks at 1kHz, therefore FF_DUR has a unit
00379  * of 1 LSB = 1 ms.
00380  *
00381  * The Free Fall duration counter increments while the absolute value of the
00382  * accelerometer measurements are each less than the detection threshold
00383  * (Register 29). The Free Fall interrupt is triggered when the Free Fall
00384  * duration counter reaches the time specified in this register.
00385  *
00386  * For more details on the Free Fall detection interrupt, see Section 8.2 of
00387  * the MPU-6000/MPU-9150 Product Specification document as well as Registers 56
00388  * and 58 of this document.
00389  *
00390  * @return Current free-fall duration threshold value (LSB = 1ms)
00391  * @see MPU9150_RA_FF_DUR
00392  */
00393 uint8_t MPU9150::getFreefallDetectionDuration() {
00394     I2Cdev::readByte(devAddr, MPU9150_RA_FF_DUR, buffer);
00395     return buffer[0];
00396 }
00397 /** Get free-fall event duration threshold.
00398  * @param duration New free-fall duration threshold value (LSB = 1ms)
00399  * @see getFreefallDetectionDuration()
00400  * @see MPU9150_RA_FF_DUR
00401  */
00402 void MPU9150::setFreefallDetectionDuration(uint8_t duration) {
00403     I2Cdev::writeByte(devAddr, MPU9150_RA_FF_DUR, duration);
00404 }
00405 
00406 // MOT_THR register
00407 
00408 /** Get motion detection event acceleration threshold.
00409  * This register configures the detection threshold for Motion interrupt
00410  * generation. The unit of MOT_THR is 1LSB = 2mg. Motion is detected when the
00411  * absolute value of any of the accelerometer measurements exceeds this Motion
00412  * detection threshold. This condition increments the Motion detection duration
00413  * counter (Register 32). The Motion detection interrupt is triggered when the
00414  * Motion Detection counter reaches the time count specified in MOT_DUR
00415  * (Register 32).
00416  *
00417  * The Motion interrupt will indicate the axis and polarity of detected motion
00418  * in MOT_DETECT_STATUS (Register 97).
00419  *
00420  * For more details on the Motion detection interrupt, see Section 8.3 of the
00421  * MPU-6000/MPU-9150 Product Specification document as well as Registers 56 and
00422  * 58 of this document.
00423  *
00424  * @return Current motion detection acceleration threshold value (LSB = 2mg)
00425  * @see MPU9150_RA_MOT_THR
00426  */
00427 uint8_t MPU9150::getMotionDetectionThreshold() {
00428     I2Cdev::readByte(devAddr, MPU9150_RA_MOT_THR, buffer);
00429     return buffer[0];
00430 }
00431 /** Set free-fall event acceleration threshold.
00432  * @param threshold New motion detection acceleration threshold value (LSB = 2mg)
00433  * @see getMotionDetectionThreshold()
00434  * @see MPU9150_RA_MOT_THR
00435  */
00436 void MPU9150::setMotionDetectionThreshold(uint8_t threshold) {
00437     I2Cdev::writeByte(devAddr, MPU9150_RA_MOT_THR, threshold);
00438 }
00439 
00440 // MOT_DUR register
00441 
00442 /** Get motion detection event duration threshold.
00443  * This register configures the duration counter threshold for Motion interrupt
00444  * generation. The duration counter ticks at 1 kHz, therefore MOT_DUR has a unit
00445  * of 1LSB = 1ms. The Motion detection duration counter increments when the
00446  * absolute value of any of the accelerometer measurements exceeds the Motion
00447  * detection threshold (Register 31). The Motion detection interrupt is
00448  * triggered when the Motion detection counter reaches the time count specified
00449  * in this register.
00450  *
00451  * For more details on the Motion detection interrupt, see Section 8.3 of the
00452  * MPU-6000/MPU-9150 Product Specification document.
00453  *
00454  * @return Current motion detection duration threshold value (LSB = 1ms)
00455  * @see MPU9150_RA_MOT_DUR
00456  */
00457 uint8_t MPU9150::getMotionDetectionDuration() {
00458     I2Cdev::readByte(devAddr, MPU9150_RA_MOT_DUR, buffer);
00459     return buffer[0];
00460 }
00461 /** Set motion detection event duration threshold.
00462  * @param duration New motion detection duration threshold value (LSB = 1ms)
00463  * @see getMotionDetectionDuration()
00464  * @see MPU9150_RA_MOT_DUR
00465  */
00466 void MPU9150::setMotionDetectionDuration(uint8_t duration) {
00467     I2Cdev::writeByte(devAddr, MPU9150_RA_MOT_DUR, duration);
00468 }
00469 
00470 // ZRMOT_THR register
00471 
00472 /** Get zero motion detection event acceleration threshold.
00473  * This register configures the detection threshold for Zero Motion interrupt
00474  * generation. The unit of ZRMOT_THR is 1LSB = 2mg. Zero Motion is detected when
00475  * the absolute value of the accelerometer measurements for the 3 axes are each
00476  * less than the detection threshold. This condition increments the Zero Motion
00477  * duration counter (Register 34). The Zero Motion interrupt is triggered when
00478  * the Zero Motion duration counter reaches the time count specified in
00479  * ZRMOT_DUR (Register 34).
00480  *
00481  * Unlike Free Fall or Motion detection, Zero Motion detection triggers an
00482  * interrupt both when Zero Motion is first detected and when Zero Motion is no
00483  * longer detected.
00484  *
00485  * When a zero motion event is detected, a Zero Motion Status will be indicated
00486  * in the MOT_DETECT_STATUS register (Register 97). When a motion-to-zero-motion
00487  * condition is detected, the status bit is set to 1. When a zero-motion-to-
00488  * motion condition is detected, the status bit is set to 0.
00489  *
00490  * For more details on the Zero Motion detection interrupt, see Section 8.4 of
00491  * the MPU-6000/MPU-9150 Product Specification document as well as Registers 56
00492  * and 58 of this document.
00493  *
00494  * @return Current zero motion detection acceleration threshold value (LSB = 2mg)
00495  * @see MPU9150_RA_ZRMOT_THR
00496  */
00497 uint8_t MPU9150::getZeroMotionDetectionThreshold() {
00498     I2Cdev::readByte(devAddr, MPU9150_RA_ZRMOT_THR, buffer);
00499     return buffer[0];
00500 }
00501 /** Set zero motion detection event acceleration threshold.
00502  * @param threshold New zero motion detection acceleration threshold value (LSB = 2mg)
00503  * @see getZeroMotionDetectionThreshold()
00504  * @see MPU9150_RA_ZRMOT_THR
00505  */
00506 void MPU9150::setZeroMotionDetectionThreshold(uint8_t threshold) {
00507     I2Cdev::writeByte(devAddr, MPU9150_RA_ZRMOT_THR, threshold);
00508 }
00509 
00510 // ZRMOT_DUR register
00511 
00512 /** Get zero motion detection event duration threshold.
00513  * This register configures the duration counter threshold for Zero Motion
00514  * interrupt generation. The duration counter ticks at 16 Hz, therefore
00515  * ZRMOT_DUR has a unit of 1 LSB = 64 ms. The Zero Motion duration counter
00516  * increments while the absolute value of the accelerometer measurements are
00517  * each less than the detection threshold (Register 33). The Zero Motion
00518  * interrupt is triggered when the Zero Motion duration counter reaches the time
00519  * count specified in this register.
00520  *
00521  * For more details on the Zero Motion detection interrupt, see Section 8.4 of
00522  * the MPU-6000/MPU-9150 Product Specification document, as well as Registers 56
00523  * and 58 of this document.
00524  *
00525  * @return Current zero motion detection duration threshold value (LSB = 64ms)
00526  * @see MPU9150_RA_ZRMOT_DUR
00527  */
00528 uint8_t MPU9150::getZeroMotionDetectionDuration() {
00529     I2Cdev::readByte(devAddr, MPU9150_RA_ZRMOT_DUR, buffer);
00530     return buffer[0];
00531 }
00532 /** Set zero motion detection event duration threshold.
00533  * @param duration New zero motion detection duration threshold value (LSB = 1ms)
00534  * @see getZeroMotionDetectionDuration()
00535  * @see MPU9150_RA_ZRMOT_DUR
00536  */
00537 void MPU9150::setZeroMotionDetectionDuration(uint8_t duration) {
00538     I2Cdev::writeByte(devAddr, MPU9150_RA_ZRMOT_DUR, duration);
00539 }
00540 
00541 // FIFO_EN register
00542 
00543 /** Get temperature FIFO enabled value.
00544  * When set to 1, this bit enables TEMP_OUT_H and TEMP_OUT_L (Registers 65 and
00545  * 66) to be written into the FIFO buffer.
00546  * @return Current temperature FIFO enabled value
00547  * @see MPU9150_RA_FIFO_EN
00548  */
00549 bool MPU9150::getTempFIFOEnabled() {
00550     I2Cdev::readBit(devAddr, MPU9150_RA_FIFO_EN, MPU9150_TEMP_FIFO_EN_BIT, buffer);
00551     return buffer[0];
00552 }
00553 /** Set temperature FIFO enabled value.
00554  * @param enabled New temperature FIFO enabled value
00555  * @see getTempFIFOEnabled()
00556  * @see MPU9150_RA_FIFO_EN
00557  */
00558 void MPU9150::setTempFIFOEnabled(bool enabled) {
00559     I2Cdev::writeBit(devAddr, MPU9150_RA_FIFO_EN, MPU9150_TEMP_FIFO_EN_BIT, enabled);
00560 }
00561 /** Get gyroscope X-axis FIFO enabled value.
00562  * When set to 1, this bit enables GYRO_XOUT_H and GYRO_XOUT_L (Registers 67 and
00563  * 68) to be written into the FIFO buffer.
00564  * @return Current gyroscope X-axis FIFO enabled value
00565  * @see MPU9150_RA_FIFO_EN
00566  */
00567 bool MPU9150::getXGyroFIFOEnabled() {
00568     I2Cdev::readBit(devAddr, MPU9150_RA_FIFO_EN, MPU9150_XG_FIFO_EN_BIT, buffer);
00569     return buffer[0];
00570 }
00571 /** Set gyroscope X-axis FIFO enabled value.
00572  * @param enabled New gyroscope X-axis FIFO enabled value
00573  * @see getXGyroFIFOEnabled()
00574  * @see MPU9150_RA_FIFO_EN
00575  */
00576 void MPU9150::setXGyroFIFOEnabled(bool enabled) {
00577     I2Cdev::writeBit(devAddr, MPU9150_RA_FIFO_EN, MPU9150_XG_FIFO_EN_BIT, enabled);
00578 }
00579 /** Get gyroscope Y-axis FIFO enabled value.
00580  * When set to 1, this bit enables GYRO_YOUT_H and GYRO_YOUT_L (Registers 69 and
00581  * 70) to be written into the FIFO buffer.
00582  * @return Current gyroscope Y-axis FIFO enabled value
00583  * @see MPU9150_RA_FIFO_EN
00584  */
00585 bool MPU9150::getYGyroFIFOEnabled() {
00586     I2Cdev::readBit(devAddr, MPU9150_RA_FIFO_EN, MPU9150_YG_FIFO_EN_BIT, buffer);
00587     return buffer[0];
00588 }
00589 /** Set gyroscope Y-axis FIFO enabled value.
00590  * @param enabled New gyroscope Y-axis FIFO enabled value
00591  * @see getYGyroFIFOEnabled()
00592  * @see MPU9150_RA_FIFO_EN
00593  */
00594 void MPU9150::setYGyroFIFOEnabled(bool enabled) {
00595     I2Cdev::writeBit(devAddr, MPU9150_RA_FIFO_EN, MPU9150_YG_FIFO_EN_BIT, enabled);
00596 }
00597 /** Get gyroscope Z-axis FIFO enabled value.
00598  * When set to 1, this bit enables GYRO_ZOUT_H and GYRO_ZOUT_L (Registers 71 and
00599  * 72) to be written into the FIFO buffer.
00600  * @return Current gyroscope Z-axis FIFO enabled value
00601  * @see MPU9150_RA_FIFO_EN
00602  */
00603 bool MPU9150::getZGyroFIFOEnabled() {
00604     I2Cdev::readBit(devAddr, MPU9150_RA_FIFO_EN, MPU9150_ZG_FIFO_EN_BIT, buffer);
00605     return buffer[0];
00606 }
00607 /** Set gyroscope Z-axis FIFO enabled value.
00608  * @param enabled New gyroscope Z-axis FIFO enabled value
00609  * @see getZGyroFIFOEnabled()
00610  * @see MPU9150_RA_FIFO_EN
00611  */
00612 void MPU9150::setZGyroFIFOEnabled(bool enabled) {
00613     I2Cdev::writeBit(devAddr, MPU9150_RA_FIFO_EN, MPU9150_ZG_FIFO_EN_BIT, enabled);
00614 }
00615 /** Get accelerometer FIFO enabled value.
00616  * When set to 1, this bit enables ACCEL_XOUT_H, ACCEL_XOUT_L, ACCEL_YOUT_H,
00617  * ACCEL_YOUT_L, ACCEL_ZOUT_H, and ACCEL_ZOUT_L (Registers 59 to 64) to be
00618  * written into the FIFO buffer.
00619  * @return Current accelerometer FIFO enabled value
00620  * @see MPU9150_RA_FIFO_EN
00621  */
00622 bool MPU9150::getAccelFIFOEnabled() {
00623     I2Cdev::readBit(devAddr, MPU9150_RA_FIFO_EN, MPU9150_ACCEL_FIFO_EN_BIT, buffer);
00624     return buffer[0];
00625 }
00626 /** Set accelerometer FIFO enabled value.
00627  * @param enabled New accelerometer FIFO enabled value
00628  * @see getAccelFIFOEnabled()
00629  * @see MPU9150_RA_FIFO_EN
00630  */
00631 void MPU9150::setAccelFIFOEnabled(bool enabled) {
00632     I2Cdev::writeBit(devAddr, MPU9150_RA_FIFO_EN, MPU9150_ACCEL_FIFO_EN_BIT, enabled);
00633 }
00634 /** Get Slave 2 FIFO enabled value.
00635  * When set to 1, this bit enables EXT_SENS_DATA registers (Registers 73 to 96)
00636  * associated with Slave 2 to be written into the FIFO buffer.
00637  * @return Current Slave 2 FIFO enabled value
00638  * @see MPU9150_RA_FIFO_EN
00639  */
00640 bool MPU9150::getSlave2FIFOEnabled() {
00641     I2Cdev::readBit(devAddr, MPU9150_RA_FIFO_EN, MPU9150_SLV2_FIFO_EN_BIT, buffer);
00642     return buffer[0];
00643 }
00644 /** Set Slave 2 FIFO enabled value.
00645  * @param enabled New Slave 2 FIFO enabled value
00646  * @see getSlave2FIFOEnabled()
00647  * @see MPU9150_RA_FIFO_EN
00648  */
00649 void MPU9150::setSlave2FIFOEnabled(bool enabled) {
00650     I2Cdev::writeBit(devAddr, MPU9150_RA_FIFO_EN, MPU9150_SLV2_FIFO_EN_BIT, enabled);
00651 }
00652 /** Get Slave 1 FIFO enabled value.
00653  * When set to 1, this bit enables EXT_SENS_DATA registers (Registers 73 to 96)
00654  * associated with Slave 1 to be written into the FIFO buffer.
00655  * @return Current Slave 1 FIFO enabled value
00656  * @see MPU9150_RA_FIFO_EN
00657  */
00658 bool MPU9150::getSlave1FIFOEnabled() {
00659     I2Cdev::readBit(devAddr, MPU9150_RA_FIFO_EN, MPU9150_SLV1_FIFO_EN_BIT, buffer);
00660     return buffer[0];
00661 }
00662 /** Set Slave 1 FIFO enabled value.
00663  * @param enabled New Slave 1 FIFO enabled value
00664  * @see getSlave1FIFOEnabled()
00665  * @see MPU9150_RA_FIFO_EN
00666  */
00667 void MPU9150::setSlave1FIFOEnabled(bool enabled) {
00668     I2Cdev::writeBit(devAddr, MPU9150_RA_FIFO_EN, MPU9150_SLV1_FIFO_EN_BIT, enabled);
00669 }
00670 /** Get Slave 0 FIFO enabled value.
00671  * When set to 1, this bit enables EXT_SENS_DATA registers (Registers 73 to 96)
00672  * associated with Slave 0 to be written into the FIFO buffer.
00673  * @return Current Slave 0 FIFO enabled value
00674  * @see MPU9150_RA_FIFO_EN
00675  */
00676 bool MPU9150::getSlave0FIFOEnabled() {
00677     I2Cdev::readBit(devAddr, MPU9150_RA_FIFO_EN, MPU9150_SLV0_FIFO_EN_BIT, buffer);
00678     return buffer[0];
00679 }
00680 /** Set Slave 0 FIFO enabled value.
00681  * @param enabled New Slave 0 FIFO enabled value
00682  * @see getSlave0FIFOEnabled()
00683  * @see MPU9150_RA_FIFO_EN
00684  */
00685 void MPU9150::setSlave0FIFOEnabled(bool enabled) {
00686     I2Cdev::writeBit(devAddr, MPU9150_RA_FIFO_EN, MPU9150_SLV0_FIFO_EN_BIT, enabled);
00687 }
00688 
00689 // I2C_MST_CTRL register
00690 
00691 /** Get multi-master enabled value.
00692  * Multi-master capability allows multiple I2C masters to operate on the same
00693  * bus. In circuits where multi-master capability is required, set MULT_MST_EN
00694  * to 1. This will increase current drawn by approximately 30uA.
00695  *
00696  * In circuits where multi-master capability is required, the state of the I2C
00697  * bus must always be monitored by each separate I2C Master. Before an I2C
00698  * Master can assume arbitration of the bus, it must first confirm that no other
00699  * I2C Master has arbitration of the bus. When MULT_MST_EN is set to 1, the
00700  * MPU-60X0's bus arbitration detection logic is turned on, enabling it to
00701  * detect when the bus is available.
00702  *
00703  * @return Current multi-master enabled value
00704  * @see MPU9150_RA_I2C_MST_CTRL
00705  */
00706 bool MPU9150::getMultiMasterEnabled() {
00707     I2Cdev::readBit(devAddr, MPU9150_RA_I2C_MST_CTRL, MPU9150_MULT_MST_EN_BIT, buffer);
00708     return buffer[0];
00709 }
00710 /** Set multi-master enabled value.
00711  * @param enabled New multi-master enabled value
00712  * @see getMultiMasterEnabled()
00713  * @see MPU9150_RA_I2C_MST_CTRL
00714  */
00715 void MPU9150::setMultiMasterEnabled(bool enabled) {
00716     I2Cdev::writeBit(devAddr, MPU9150_RA_I2C_MST_CTRL, MPU9150_MULT_MST_EN_BIT, enabled);
00717 }
00718 /** Get wait-for-external-sensor-data enabled value.
00719  * When the WAIT_FOR_ES bit is set to 1, the Data Ready interrupt will be
00720  * delayed until External Sensor data from the Slave Devices are loaded into the
00721  * EXT_SENS_DATA registers. This is used to ensure that both the internal sensor
00722  * data (i.e. from gyro and accel) and external sensor data have been loaded to
00723  * their respective data registers (i.e. the data is synced) when the Data Ready
00724  * interrupt is triggered.
00725  *
00726  * @return Current wait-for-external-sensor-data enabled value
00727  * @see MPU9150_RA_I2C_MST_CTRL
00728  */
00729 bool MPU9150::getWaitForExternalSensorEnabled() {
00730     I2Cdev::readBit(devAddr, MPU9150_RA_I2C_MST_CTRL, MPU9150_WAIT_FOR_ES_BIT, buffer);
00731     return buffer[0];
00732 }
00733 /** Set wait-for-external-sensor-data enabled value.
00734  * @param enabled New wait-for-external-sensor-data enabled value
00735  * @see getWaitForExternalSensorEnabled()
00736  * @see MPU9150_RA_I2C_MST_CTRL
00737  */
00738 void MPU9150::setWaitForExternalSensorEnabled(bool enabled) {
00739     I2Cdev::writeBit(devAddr, MPU9150_RA_I2C_MST_CTRL, MPU9150_WAIT_FOR_ES_BIT, enabled);
00740 }
00741 /** Get Slave 3 FIFO enabled value.
00742  * When set to 1, this bit enables EXT_SENS_DATA registers (Registers 73 to 96)
00743  * associated with Slave 3 to be written into the FIFO buffer.
00744  * @return Current Slave 3 FIFO enabled value
00745  * @see MPU9150_RA_MST_CTRL
00746  */
00747 bool MPU9150::getSlave3FIFOEnabled() {
00748     I2Cdev::readBit(devAddr, MPU9150_RA_I2C_MST_CTRL, MPU9150_SLV_3_FIFO_EN_BIT, buffer);
00749     return buffer[0];
00750 }
00751 /** Set Slave 3 FIFO enabled value.
00752  * @param enabled New Slave 3 FIFO enabled value
00753  * @see getSlave3FIFOEnabled()
00754  * @see MPU9150_RA_MST_CTRL
00755  */
00756 void MPU9150::setSlave3FIFOEnabled(bool enabled) {
00757     I2Cdev::writeBit(devAddr, MPU9150_RA_I2C_MST_CTRL, MPU9150_SLV_3_FIFO_EN_BIT, enabled);
00758 }
00759 /** Get slave read/write transition enabled value.
00760  * The I2C_MST_P_NSR bit configures the I2C Master's transition from one slave
00761  * read to the next slave read. If the bit equals 0, there will be a restart
00762  * between reads. If the bit equals 1, there will be a stop followed by a start
00763  * of the following read. When a write transaction follows a read transaction,
00764  * the stop followed by a start of the successive write will be always used.
00765  *
00766  * @return Current slave read/write transition enabled value
00767  * @see MPU9150_RA_I2C_MST_CTRL
00768  */
00769 bool MPU9150::getSlaveReadWriteTransitionEnabled() {
00770     I2Cdev::readBit(devAddr, MPU9150_RA_I2C_MST_CTRL, MPU9150_I2C_MST_P_NSR_BIT, buffer);
00771     return buffer[0];
00772 }
00773 /** Set slave read/write transition enabled value.
00774  * @param enabled New slave read/write transition enabled value
00775  * @see getSlaveReadWriteTransitionEnabled()
00776  * @see MPU9150_RA_I2C_MST_CTRL
00777  */
00778 void MPU9150::setSlaveReadWriteTransitionEnabled(bool enabled) {
00779     I2Cdev::writeBit(devAddr, MPU9150_RA_I2C_MST_CTRL, MPU9150_I2C_MST_P_NSR_BIT, enabled);
00780 }
00781 /** Get I2C master clock speed.
00782  * I2C_MST_CLK is a 4 bit unsigned value which configures a divider on the
00783  * MPU-60X0 internal 8MHz clock. It sets the I2C master clock speed according to
00784  * the following table:
00785  *
00786  * <pre>
00787  * I2C_MST_CLK | I2C Master Clock Speed | 8MHz Clock Divider
00788  * ------------+------------------------+-------------------
00789  * 0           | 348kHz                 | 23
00790  * 1           | 333kHz                 | 24
00791  * 2           | 320kHz                 | 25
00792  * 3           | 308kHz                 | 26
00793  * 4           | 296kHz                 | 27
00794  * 5           | 286kHz                 | 28
00795  * 6           | 276kHz                 | 29
00796  * 7           | 267kHz                 | 30
00797  * 8           | 258kHz                 | 31
00798  * 9           | 500kHz                 | 16
00799  * 10          | 471kHz                 | 17
00800  * 11          | 444kHz                 | 18
00801  * 12          | 421kHz                 | 19
00802  * 13          | 400kHz                 | 20
00803  * 14          | 381kHz                 | 21
00804  * 15          | 364kHz                 | 22
00805  * </pre>
00806  *
00807  * @return Current I2C master clock speed
00808  * @see MPU9150_RA_I2C_MST_CTRL
00809  */
00810 uint8_t MPU9150::getMasterClockSpeed() {
00811     I2Cdev::readBits(devAddr, MPU9150_RA_I2C_MST_CTRL, MPU9150_I2C_MST_CLK_BIT, MPU9150_I2C_MST_CLK_LENGTH, buffer);
00812     return buffer[0];
00813 }
00814 /** Set I2C master clock speed.
00815  * @reparam speed Current I2C master clock speed
00816  * @see MPU9150_RA_I2C_MST_CTRL
00817  */
00818 void MPU9150::setMasterClockSpeed(uint8_t speed) {
00819     I2Cdev::writeBits(devAddr, MPU9150_RA_I2C_MST_CTRL, MPU9150_I2C_MST_CLK_BIT, MPU9150_I2C_MST_CLK_LENGTH, speed);
00820 }
00821 
00822 // I2C_SLV* registers (Slave 0-3)
00823 
00824 /** Get the I2C address of the specified slave (0-3).
00825  * Note that Bit 7 (MSB) controls read/write mode. If Bit 7 is set, it's a read
00826  * operation, and if it is cleared, then it's a write operation. The remaining
00827  * bits (6-0) are the 7-bit device address of the slave device.
00828  *
00829  * In read mode, the result of the read is placed in the lowest available
00830  * EXT_SENS_DATA register. For further information regarding the allocation of
00831  * read results, please refer to the EXT_SENS_DATA register description
00832  * (Registers 73 - 96).
00833  *
00834  * The MPU-9150 supports a total of five slaves, but Slave 4 has unique
00835  * characteristics, and so it has its own functions (getSlave4* and setSlave4*).
00836  *
00837  * I2C data transactions are performed at the Sample Rate, as defined in
00838  * Register 25. The user is responsible for ensuring that I2C data transactions
00839  * to and from each enabled Slave can be completed within a single period of the
00840  * Sample Rate.
00841  *
00842  * The I2C slave access rate can be reduced relative to the Sample Rate. This
00843  * reduced access rate is determined by I2C_MST_DLY (Register 52). Whether a
00844  * slave's access rate is reduced relative to the Sample Rate is determined by
00845  * I2C_MST_DELAY_CTRL (Register 103).
00846  *
00847  * The processing order for the slaves is fixed. The sequence followed for
00848  * processing the slaves is Slave 0, Slave 1, Slave 2, Slave 3 and Slave 4. If a
00849  * particular Slave is disabled it will be skipped.
00850  *
00851  * Each slave can either be accessed at the sample rate or at a reduced sample
00852  * rate. In a case where some slaves are accessed at the Sample Rate and some
00853  * slaves are accessed at the reduced rate, the sequence of accessing the slaves
00854  * (Slave 0 to Slave 4) is still followed. However, the reduced rate slaves will
00855  * be skipped if their access rate dictates that they should not be accessed
00856  * during that particular cycle. For further information regarding the reduced
00857  * access rate, please refer to Register 52. Whether a slave is accessed at the
00858  * Sample Rate or at the reduced rate is determined by the Delay Enable bits in
00859  * Register 103.
00860  *
00861  * @param num Slave number (0-3)
00862  * @return Current address for specified slave
00863  * @see MPU9150_RA_I2C_SLV0_ADDR
00864  */
00865 uint8_t MPU9150::getSlaveAddress(uint8_t num) {
00866     if (num > 3) return 0;
00867     I2Cdev::readByte(devAddr, MPU9150_RA_I2C_SLV0_ADDR + num*3, buffer);
00868     return buffer[0];
00869 }
00870 /** Set the I2C address of the specified slave (0-3).
00871  * @param num Slave number (0-3)
00872  * @param address New address for specified slave
00873  * @see getSlaveAddress()
00874  * @see MPU9150_RA_I2C_SLV0_ADDR
00875  */
00876 void MPU9150::setSlaveAddress(uint8_t num, uint8_t address) {
00877     if (num > 3) return;
00878     I2Cdev::writeByte(devAddr, MPU9150_RA_I2C_SLV0_ADDR + num*3, address);
00879 }
00880 /** Get the active internal register for the specified slave (0-3).
00881  * Read/write operations for this slave will be done to whatever internal
00882  * register address is stored in this MPU register.
00883  *
00884  * The MPU-9150 supports a total of five slaves, but Slave 4 has unique
00885  * characteristics, and so it has its own functions.
00886  *
00887  * @param num Slave number (0-3)
00888  * @return Current active register for specified slave
00889  * @see MPU9150_RA_I2C_SLV0_REG
00890  */
00891 uint8_t MPU9150::getSlaveRegister(uint8_t num) {
00892     if (num > 3) return 0;
00893     I2Cdev::readByte(devAddr, MPU9150_RA_I2C_SLV0_REG + num*3, buffer);
00894     return buffer[0];
00895 }
00896 /** Set the active internal register for the specified slave (0-3).
00897  * @param num Slave number (0-3)
00898  * @param reg New active register for specified slave
00899  * @see getSlaveRegister()
00900  * @see MPU9150_RA_I2C_SLV0_REG
00901  */
00902 void MPU9150::setSlaveRegister(uint8_t num, uint8_t reg) {
00903     if (num > 3) return;
00904     I2Cdev::writeByte(devAddr, MPU9150_RA_I2C_SLV0_REG + num*3, reg);
00905 }
00906 /** Get the enabled value for the specified slave (0-3).
00907  * When set to 1, this bit enables Slave 0 for data transfer operations. When
00908  * cleared to 0, this bit disables Slave 0 from data transfer operations.
00909  * @param num Slave number (0-3)
00910  * @return Current enabled value for specified slave
00911  * @see MPU9150_RA_I2C_SLV0_CTRL
00912  */
00913 bool MPU9150::getSlaveEnabled(uint8_t num) {
00914     if (num > 3) return 0;
00915     I2Cdev::readBit(devAddr, MPU9150_RA_I2C_SLV0_CTRL + num*3, MPU9150_I2C_SLV_EN_BIT, buffer);
00916     return buffer[0];
00917 }
00918 /** Set the enabled value for the specified slave (0-3).
00919  * @param num Slave number (0-3)
00920  * @param enabled New enabled value for specified slave
00921  * @see getSlaveEnabled()
00922  * @see MPU9150_RA_I2C_SLV0_CTRL
00923  */
00924 void MPU9150::setSlaveEnabled(uint8_t num, bool enabled) {
00925     if (num > 3) return;
00926     I2Cdev::writeBit(devAddr, MPU9150_RA_I2C_SLV0_CTRL + num*3, MPU9150_I2C_SLV_EN_BIT, enabled);
00927 }
00928 /** Get word pair byte-swapping enabled for the specified slave (0-3).
00929  * When set to 1, this bit enables byte swapping. When byte swapping is enabled,
00930  * the high and low bytes of a word pair are swapped. Please refer to
00931  * I2C_SLV0_GRP for the pairing convention of the word pairs. When cleared to 0,
00932  * bytes transferred to and from Slave 0 will be written to EXT_SENS_DATA
00933  * registers in the order they were transferred.
00934  *
00935  * @param num Slave number (0-3)
00936  * @return Current word pair byte-swapping enabled value for specified slave
00937  * @see MPU9150_RA_I2C_SLV0_CTRL
00938  */
00939 bool MPU9150::getSlaveWordByteSwap(uint8_t num) {
00940     if (num > 3) return 0;
00941     I2Cdev::readBit(devAddr, MPU9150_RA_I2C_SLV0_CTRL + num*3, MPU9150_I2C_SLV_BYTE_SW_BIT, buffer);
00942     return buffer[0];
00943 }
00944 /** Set word pair byte-swapping enabled for the specified slave (0-3).
00945  * @param num Slave number (0-3)
00946  * @param enabled New word pair byte-swapping enabled value for specified slave
00947  * @see getSlaveWordByteSwap()
00948  * @see MPU9150_RA_I2C_SLV0_CTRL
00949  */
00950 void MPU9150::setSlaveWordByteSwap(uint8_t num, bool enabled) {
00951     if (num > 3) return;
00952     I2Cdev::writeBit(devAddr, MPU9150_RA_I2C_SLV0_CTRL + num*3, MPU9150_I2C_SLV_BYTE_SW_BIT, enabled);
00953 }
00954 /** Get write mode for the specified slave (0-3).
00955  * When set to 1, the transaction will read or write data only. When cleared to
00956  * 0, the transaction will write a register address prior to reading or writing
00957  * data. This should equal 0 when specifying the register address within the
00958  * Slave device to/from which the ensuing data transaction will take place.
00959  *
00960  * @param num Slave number (0-3)
00961  * @return Current write mode for specified slave (0 = register address + data, 1 = data only)
00962  * @see MPU9150_RA_I2C_SLV0_CTRL
00963  */
00964 bool MPU9150::getSlaveWriteMode(uint8_t num) {
00965     if (num > 3) return 0;
00966     I2Cdev::readBit(devAddr, MPU9150_RA_I2C_SLV0_CTRL + num*3, MPU9150_I2C_SLV_REG_DIS_BIT, buffer);
00967     return buffer[0];
00968 }
00969 /** Set write mode for the specified slave (0-3).
00970  * @param num Slave number (0-3)
00971  * @param mode New write mode for specified slave (0 = register address + data, 1 = data only)
00972  * @see getSlaveWriteMode()
00973  * @see MPU9150_RA_I2C_SLV0_CTRL
00974  */
00975 void MPU9150::setSlaveWriteMode(uint8_t num, bool mode) {
00976     if (num > 3) return;
00977     I2Cdev::writeBit(devAddr, MPU9150_RA_I2C_SLV0_CTRL + num*3, MPU9150_I2C_SLV_REG_DIS_BIT, mode);
00978 }
00979 /** Get word pair grouping order offset for the specified slave (0-3).
00980  * This sets specifies the grouping order of word pairs received from registers.
00981  * When cleared to 0, bytes from register addresses 0 and 1, 2 and 3, etc (even,
00982  * then odd register addresses) are paired to form a word. When set to 1, bytes
00983  * from register addresses are paired 1 and 2, 3 and 4, etc. (odd, then even
00984  * register addresses) are paired to form a word.
00985  *
00986  * @param num Slave number (0-3)
00987  * @return Current word pair grouping order offset for specified slave
00988  * @see MPU9150_RA_I2C_SLV0_CTRL
00989  */
00990 bool MPU9150::getSlaveWordGroupOffset(uint8_t num) {
00991     if (num > 3) return 0;
00992     I2Cdev::readBit(devAddr, MPU9150_RA_I2C_SLV0_CTRL + num*3, MPU9150_I2C_SLV_GRP_BIT, buffer);
00993     return buffer[0];
00994 }
00995 /** Set word pair grouping order offset for the specified slave (0-3).
00996  * @param num Slave number (0-3)
00997  * @param enabled New word pair grouping order offset for specified slave
00998  * @see getSlaveWordGroupOffset()
00999  * @see MPU9150_RA_I2C_SLV0_CTRL
01000  */
01001 void MPU9150::setSlaveWordGroupOffset(uint8_t num, bool enabled) {
01002     if (num > 3) return;
01003     I2Cdev::writeBit(devAddr, MPU9150_RA_I2C_SLV0_CTRL + num*3, MPU9150_I2C_SLV_GRP_BIT, enabled);
01004 }
01005 /** Get number of bytes to read for the specified slave (0-3).
01006  * Specifies the number of bytes transferred to and from Slave 0. Clearing this
01007  * bit to 0 is equivalent to disabling the register by writing 0 to I2C_SLV0_EN.
01008  * @param num Slave number (0-3)
01009  * @return Number of bytes to read for specified slave
01010  * @see MPU9150_RA_I2C_SLV0_CTRL
01011  */
01012 uint8_t MPU9150::getSlaveDataLength(uint8_t num) {
01013     if (num > 3) return 0;
01014     I2Cdev::readBits(devAddr, MPU9150_RA_I2C_SLV0_CTRL + num*3, MPU9150_I2C_SLV_LEN_BIT, MPU9150_I2C_SLV_LEN_LENGTH, buffer);
01015     return buffer[0];
01016 }
01017 /** Set number of bytes to read for the specified slave (0-3).
01018  * @param num Slave number (0-3)
01019  * @param length Number of bytes to read for specified slave
01020  * @see getSlaveDataLength()
01021  * @see MPU9150_RA_I2C_SLV0_CTRL
01022  */
01023 void MPU9150::setSlaveDataLength(uint8_t num, uint8_t length) {
01024     if (num > 3) return;
01025     I2Cdev::writeBits(devAddr, MPU9150_RA_I2C_SLV0_CTRL + num*3, MPU9150_I2C_SLV_LEN_BIT, MPU9150_I2C_SLV_LEN_LENGTH, length);
01026 }
01027 
01028 // I2C_SLV* registers (Slave 4)
01029 
01030 /** Get the I2C address of Slave 4.
01031  * Note that Bit 7 (MSB) controls read/write mode. If Bit 7 is set, it's a read
01032  * operation, and if it is cleared, then it's a write operation. The remaining
01033  * bits (6-0) are the 7-bit device address of the slave device.
01034  *
01035  * @return Current address for Slave 4
01036  * @see getSlaveAddress()
01037  * @see MPU9150_RA_I2C_SLV4_ADDR
01038  */
01039 uint8_t MPU9150::getSlave4Address() {
01040     I2Cdev::readByte(devAddr, MPU9150_RA_I2C_SLV4_ADDR, buffer);
01041     return buffer[0];
01042 }
01043 /** Set the I2C address of Slave 4.
01044  * @param address New address for Slave 4
01045  * @see getSlave4Address()
01046  * @see MPU9150_RA_I2C_SLV4_ADDR
01047  */
01048 void MPU9150::setSlave4Address(uint8_t address) {
01049     I2Cdev::writeByte(devAddr, MPU9150_RA_I2C_SLV4_ADDR, address);
01050 }
01051 /** Get the active internal register for the Slave 4.
01052  * Read/write operations for this slave will be done to whatever internal
01053  * register address is stored in this MPU register.
01054  *
01055  * @return Current active register for Slave 4
01056  * @see MPU9150_RA_I2C_SLV4_REG
01057  */
01058 uint8_t MPU9150::getSlave4Register() {
01059     I2Cdev::readByte(devAddr, MPU9150_RA_I2C_SLV4_REG, buffer);
01060     return buffer[0];
01061 }
01062 /** Set the active internal register for Slave 4.
01063  * @param reg New active register for Slave 4
01064  * @see getSlave4Register()
01065  * @see MPU9150_RA_I2C_SLV4_REG
01066  */
01067 void MPU9150::setSlave4Register(uint8_t reg) {
01068     I2Cdev::writeByte(devAddr, MPU9150_RA_I2C_SLV4_REG, reg);
01069 }
01070 /** Set new byte to write to Slave 4.
01071  * This register stores the data to be written into the Slave 4. If I2C_SLV4_RW
01072  * is set 1 (set to read), this register has no effect.
01073  * @param data New byte to write to Slave 4
01074  * @see MPU9150_RA_I2C_SLV4_DO
01075  */
01076 void MPU9150::setSlave4OutputByte(uint8_t data) {
01077     I2Cdev::writeByte(devAddr, MPU9150_RA_I2C_SLV4_DO, data);
01078 }
01079 /** Get the enabled value for the Slave 4.
01080  * When set to 1, this bit enables Slave 4 for data transfer operations. When
01081  * cleared to 0, this bit disables Slave 4 from data transfer operations.
01082  * @return Current enabled value for Slave 4
01083  * @see MPU9150_RA_I2C_SLV4_CTRL
01084  */
01085 bool MPU9150::getSlave4Enabled() {
01086     I2Cdev::readBit(devAddr, MPU9150_RA_I2C_SLV4_CTRL, MPU9150_I2C_SLV4_EN_BIT, buffer);
01087     return buffer[0];
01088 }
01089 /** Set the enabled value for Slave 4.
01090  * @param enabled New enabled value for Slave 4
01091  * @see getSlave4Enabled()
01092  * @see MPU9150_RA_I2C_SLV4_CTRL
01093  */
01094 void MPU9150::setSlave4Enabled(bool enabled) {
01095     I2Cdev::writeBit(devAddr, MPU9150_RA_I2C_SLV4_CTRL, MPU9150_I2C_SLV4_EN_BIT, enabled);
01096 }
01097 /** Get the enabled value for Slave 4 transaction interrupts.
01098  * When set to 1, this bit enables the generation of an interrupt signal upon
01099  * completion of a Slave 4 transaction. When cleared to 0, this bit disables the
01100  * generation of an interrupt signal upon completion of a Slave 4 transaction.
01101  * The interrupt status can be observed in Register 54.
01102  *
01103  * @return Current enabled value for Slave 4 transaction interrupts.
01104  * @see MPU9150_RA_I2C_SLV4_CTRL
01105  */
01106 bool MPU9150::getSlave4InterruptEnabled() {
01107     I2Cdev::readBit(devAddr, MPU9150_RA_I2C_SLV4_CTRL, MPU9150_I2C_SLV4_INT_EN_BIT, buffer);
01108     return buffer[0];
01109 }
01110 /** Set the enabled value for Slave 4 transaction interrupts.
01111  * @param enabled New enabled value for Slave 4 transaction interrupts.
01112  * @see getSlave4InterruptEnabled()
01113  * @see MPU9150_RA_I2C_SLV4_CTRL
01114  */
01115 void MPU9150::setSlave4InterruptEnabled(bool enabled) {
01116     I2Cdev::writeBit(devAddr, MPU9150_RA_I2C_SLV4_CTRL, MPU9150_I2C_SLV4_INT_EN_BIT, enabled);
01117 }
01118 /** Get write mode for Slave 4.
01119  * When set to 1, the transaction will read or write data only. When cleared to
01120  * 0, the transaction will write a register address prior to reading or writing
01121  * data. This should equal 0 when specifying the register address within the
01122  * Slave device to/from which the ensuing data transaction will take place.
01123  *
01124  * @return Current write mode for Slave 4 (0 = register address + data, 1 = data only)
01125  * @see MPU9150_RA_I2C_SLV4_CTRL
01126  */
01127 bool MPU9150::getSlave4WriteMode() {
01128     I2Cdev::readBit(devAddr, MPU9150_RA_I2C_SLV4_CTRL, MPU9150_I2C_SLV4_REG_DIS_BIT, buffer);
01129     return buffer[0];
01130 }
01131 /** Set write mode for the Slave 4.
01132  * @param mode New write mode for Slave 4 (0 = register address + data, 1 = data only)
01133  * @see getSlave4WriteMode()
01134  * @see MPU9150_RA_I2C_SLV4_CTRL
01135  */
01136 void MPU9150::setSlave4WriteMode(bool mode) {
01137     I2Cdev::writeBit(devAddr, MPU9150_RA_I2C_SLV4_CTRL, MPU9150_I2C_SLV4_REG_DIS_BIT, mode);
01138 }
01139 /** Get Slave 4 master delay value.
01140  * This configures the reduced access rate of I2C slaves relative to the Sample
01141  * Rate. When a slave's access rate is decreased relative to the Sample Rate,
01142  * the slave is accessed every:
01143  *
01144  *     1 / (1 + I2C_MST_DLY) samples
01145  *
01146  * This base Sample Rate in turn is determined by SMPLRT_DIV (register 25) and
01147  * DLPF_CFG (register 26). Whether a slave's access rate is reduced relative to
01148  * the Sample Rate is determined by I2C_MST_DELAY_CTRL (register 103). For
01149  * further information regarding the Sample Rate, please refer to register 25.
01150  *
01151  * @return Current Slave 4 master delay value
01152  * @see MPU9150_RA_I2C_SLV4_CTRL
01153  */
01154 uint8_t MPU9150::getSlave4MasterDelay() {
01155     I2Cdev::readBits(devAddr, MPU9150_RA_I2C_SLV4_CTRL, MPU9150_I2C_SLV4_MST_DLY_BIT, MPU9150_I2C_SLV4_MST_DLY_LENGTH, buffer);
01156     return buffer[0];
01157 }
01158 /** Set Slave 4 master delay value.
01159  * @param delay New Slave 4 master delay value
01160  * @see getSlave4MasterDelay()
01161  * @see MPU9150_RA_I2C_SLV4_CTRL
01162  */
01163 void MPU9150::setSlave4MasterDelay(uint8_t delay) {
01164     I2Cdev::writeBits(devAddr, MPU9150_RA_I2C_SLV4_CTRL, MPU9150_I2C_SLV4_MST_DLY_BIT, MPU9150_I2C_SLV4_MST_DLY_LENGTH, delay);
01165 }
01166 /** Get last available byte read from Slave 4.
01167  * This register stores the data read from Slave 4. This field is populated
01168  * after a read transaction.
01169  * @return Last available byte read from to Slave 4
01170  * @see MPU9150_RA_I2C_SLV4_DI
01171  */
01172 uint8_t MPU9150::getSlate4InputByte() {
01173     I2Cdev::readByte(devAddr, MPU9150_RA_I2C_SLV4_DI, buffer);
01174     return buffer[0];
01175 }
01176 
01177 // I2C_MST_STATUS register
01178 
01179 /** Get FSYNC interrupt status.
01180  * This bit reflects the status of the FSYNC interrupt from an external device
01181  * into the MPU-60X0. This is used as a way to pass an external interrupt
01182  * through the MPU-60X0 to the host application processor. When set to 1, this
01183  * bit will cause an interrupt if FSYNC_INT_EN is asserted in INT_PIN_CFG
01184  * (Register 55).
01185  * @return FSYNC interrupt status
01186  * @see MPU9150_RA_I2C_MST_STATUS
01187  */
01188 bool MPU9150::getPassthroughStatus() {
01189     I2Cdev::readBit(devAddr, MPU9150_RA_I2C_MST_STATUS, MPU9150_MST_PASS_THROUGH_BIT, buffer);
01190     return buffer[0];
01191 }
01192 /** Get Slave 4 transaction done status.
01193  * Automatically sets to 1 when a Slave 4 transaction has completed. This
01194  * triggers an interrupt if the I2C_MST_INT_EN bit in the INT_ENABLE register
01195  * (Register 56) is asserted and if the SLV_4_DONE_INT bit is asserted in the
01196  * I2C_SLV4_CTRL register (Register 52).
01197  * @return Slave 4 transaction done status
01198  * @see MPU9150_RA_I2C_MST_STATUS
01199  */
01200 bool MPU9150::getSlave4IsDone() {
01201     I2Cdev::readBit(devAddr, MPU9150_RA_I2C_MST_STATUS, MPU9150_MST_I2C_SLV4_DONE_BIT, buffer);
01202     return buffer[0];
01203 }
01204 /** Get master arbitration lost status.
01205  * This bit automatically sets to 1 when the I2C Master has lost arbitration of
01206  * the auxiliary I2C bus (an error condition). This triggers an interrupt if the
01207  * I2C_MST_INT_EN bit in the INT_ENABLE register (Register 56) is asserted.
01208  * @return Master arbitration lost status
01209  * @see MPU9150_RA_I2C_MST_STATUS
01210  */
01211 bool MPU9150::getLostArbitration() {
01212     I2Cdev::readBit(devAddr, MPU9150_RA_I2C_MST_STATUS, MPU9150_MST_I2C_LOST_ARB_BIT, buffer);
01213     return buffer[0];
01214 }
01215 /** Get Slave 4 NACK status.
01216  * This bit automatically sets to 1 when the I2C Master receives a NACK in a
01217  * transaction with Slave 4. This triggers an interrupt if the I2C_MST_INT_EN
01218  * bit in the INT_ENABLE register (Register 56) is asserted.
01219  * @return Slave 4 NACK interrupt status
01220  * @see MPU9150_RA_I2C_MST_STATUS
01221  */
01222 bool MPU9150::getSlave4Nack() {
01223     I2Cdev::readBit(devAddr, MPU9150_RA_I2C_MST_STATUS, MPU9150_MST_I2C_SLV4_NACK_BIT, buffer);
01224     return buffer[0];
01225 }
01226 /** Get Slave 3 NACK status.
01227  * This bit automatically sets to 1 when the I2C Master receives a NACK in a
01228  * transaction with Slave 3. This triggers an interrupt if the I2C_MST_INT_EN
01229  * bit in the INT_ENABLE register (Register 56) is asserted.
01230  * @return Slave 3 NACK interrupt status
01231  * @see MPU9150_RA_I2C_MST_STATUS
01232  */
01233 bool MPU9150::getSlave3Nack() {
01234     I2Cdev::readBit(devAddr, MPU9150_RA_I2C_MST_STATUS, MPU9150_MST_I2C_SLV3_NACK_BIT, buffer);
01235     return buffer[0];
01236 }
01237 /** Get Slave 2 NACK status.
01238  * This bit automatically sets to 1 when the I2C Master receives a NACK in a
01239  * transaction with Slave 2. This triggers an interrupt if the I2C_MST_INT_EN
01240  * bit in the INT_ENABLE register (Register 56) is asserted.
01241  * @return Slave 2 NACK interrupt status
01242  * @see MPU9150_RA_I2C_MST_STATUS
01243  */
01244 bool MPU9150::getSlave2Nack() {
01245     I2Cdev::readBit(devAddr, MPU9150_RA_I2C_MST_STATUS, MPU9150_MST_I2C_SLV2_NACK_BIT, buffer);
01246     return buffer[0];
01247 }
01248 /** Get Slave 1 NACK status.
01249  * This bit automatically sets to 1 when the I2C Master receives a NACK in a
01250  * transaction with Slave 1. This triggers an interrupt if the I2C_MST_INT_EN
01251  * bit in the INT_ENABLE register (Register 56) is asserted.
01252  * @return Slave 1 NACK interrupt status
01253  * @see MPU9150_RA_I2C_MST_STATUS
01254  */
01255 bool MPU9150::getSlave1Nack() {
01256     I2Cdev::readBit(devAddr, MPU9150_RA_I2C_MST_STATUS, MPU9150_MST_I2C_SLV1_NACK_BIT, buffer);
01257     return buffer[0];
01258 }
01259 /** Get Slave 0 NACK status.
01260  * This bit automatically sets to 1 when the I2C Master receives a NACK in a
01261  * transaction with Slave 0. This triggers an interrupt if the I2C_MST_INT_EN
01262  * bit in the INT_ENABLE register (Register 56) is asserted.
01263  * @return Slave 0 NACK interrupt status
01264  * @see MPU9150_RA_I2C_MST_STATUS
01265  */
01266 bool MPU9150::getSlave0Nack() {
01267     I2Cdev::readBit(devAddr, MPU9150_RA_I2C_MST_STATUS, MPU9150_MST_I2C_SLV0_NACK_BIT, buffer);
01268     return buffer[0];
01269 }
01270 
01271 // INT_PIN_CFG register
01272 
01273 /** Get interrupt logic level mode.
01274  * Will be set 0 for active-high, 1 for active-low.
01275  * @return Current interrupt mode (0=active-high, 1=active-low)
01276  * @see MPU9150_RA_INT_PIN_CFG
01277  * @see MPU9150_INTCFG_INT_LEVEL_BIT
01278  */
01279 bool MPU9150::getInterruptMode() {
01280     I2Cdev::readBit(devAddr, MPU9150_RA_INT_PIN_CFG, MPU9150_INTCFG_INT_LEVEL_BIT, buffer);
01281     return buffer[0];
01282 }
01283 /** Set interrupt logic level mode.
01284  * @param mode New interrupt mode (0=active-high, 1=active-low)
01285  * @see getInterruptMode()
01286  * @see MPU9150_RA_INT_PIN_CFG
01287  * @see MPU9150_INTCFG_INT_LEVEL_BIT
01288  */
01289 void MPU9150::setInterruptMode(bool mode) {
01290    I2Cdev::writeBit(devAddr, MPU9150_RA_INT_PIN_CFG, MPU9150_INTCFG_INT_LEVEL_BIT, mode);
01291 }
01292 /** Get interrupt drive mode.
01293  * Will be set 0 for push-pull, 1 for open-drain.
01294  * @return Current interrupt drive mode (0=push-pull, 1=open-drain)
01295  * @see MPU9150_RA_INT_PIN_CFG
01296  * @see MPU9150_INTCFG_INT_OPEN_BIT
01297  */
01298 bool MPU9150::getInterruptDrive() {
01299     I2Cdev::readBit(devAddr, MPU9150_RA_INT_PIN_CFG, MPU9150_INTCFG_INT_OPEN_BIT, buffer);
01300     return buffer[0];
01301 }
01302 /** Set interrupt drive mode.
01303  * @param drive New interrupt drive mode (0=push-pull, 1=open-drain)
01304  * @see getInterruptDrive()
01305  * @see MPU9150_RA_INT_PIN_CFG
01306  * @see MPU9150_INTCFG_INT_OPEN_BIT
01307  */
01308 void MPU9150::setInterruptDrive(bool drive) {
01309     I2Cdev::writeBit(devAddr, MPU9150_RA_INT_PIN_CFG, MPU9150_INTCFG_INT_OPEN_BIT, drive);
01310 }
01311 /** Get interrupt latch mode.
01312  * Will be set 0 for 50us-pulse, 1 for latch-until-int-cleared.
01313  * @return Current latch mode (0=50us-pulse, 1=latch-until-int-cleared)
01314  * @see MPU9150_RA_INT_PIN_CFG
01315  * @see MPU9150_INTCFG_LATCH_INT_EN_BIT
01316  */
01317 bool MPU9150::getInterruptLatch() {
01318     I2Cdev::readBit(devAddr, MPU9150_RA_INT_PIN_CFG, MPU9150_INTCFG_LATCH_INT_EN_BIT, buffer);
01319     return buffer[0];
01320 }
01321 /** Set interrupt latch mode.
01322  * @param latch New latch mode (0=50us-pulse, 1=latch-until-int-cleared)
01323  * @see getInterruptLatch()
01324  * @see MPU9150_RA_INT_PIN_CFG
01325  * @see MPU9150_INTCFG_LATCH_INT_EN_BIT
01326  */
01327 void MPU9150::setInterruptLatch(bool latch) {
01328     I2Cdev::writeBit(devAddr, MPU9150_RA_INT_PIN_CFG, MPU9150_INTCFG_LATCH_INT_EN_BIT, latch);
01329 }
01330 /** Get interrupt latch clear mode.
01331  * Will be set 0 for status-read-only, 1 for any-register-read.
01332  * @return Current latch clear mode (0=status-read-only, 1=any-register-read)
01333  * @see MPU9150_RA_INT_PIN_CFG
01334  * @see MPU9150_INTCFG_INT_RD_CLEAR_BIT
01335  */
01336 bool MPU9150::getInterruptLatchClear() {
01337     I2Cdev::readBit(devAddr, MPU9150_RA_INT_PIN_CFG, MPU9150_INTCFG_INT_RD_CLEAR_BIT, buffer);
01338     return buffer[0];
01339 }
01340 /** Set interrupt latch clear mode.
01341  * @param clear New latch clear mode (0=status-read-only, 1=any-register-read)
01342  * @see getInterruptLatchClear()
01343  * @see MPU9150_RA_INT_PIN_CFG
01344  * @see MPU9150_INTCFG_INT_RD_CLEAR_BIT
01345  */
01346 void MPU9150::setInterruptLatchClear(bool clear) {
01347     I2Cdev::writeBit(devAddr, MPU9150_RA_INT_PIN_CFG, MPU9150_INTCFG_INT_RD_CLEAR_BIT, clear);
01348 }
01349 /** Get FSYNC interrupt logic level mode.
01350  * @return Current FSYNC interrupt mode (0=active-high, 1=active-low)
01351  * @see getFSyncInterruptMode()
01352  * @see MPU9150_RA_INT_PIN_CFG
01353  * @see MPU9150_INTCFG_FSYNC_INT_LEVEL_BIT
01354  */
01355 bool MPU9150::getFSyncInterruptLevel() {
01356     I2Cdev::readBit(devAddr, MPU9150_RA_INT_PIN_CFG, MPU9150_INTCFG_FSYNC_INT_LEVEL_BIT, buffer);
01357     return buffer[0];
01358 }
01359 /** Set FSYNC interrupt logic level mode.
01360  * @param mode New FSYNC interrupt mode (0=active-high, 1=active-low)
01361  * @see getFSyncInterruptMode()
01362  * @see MPU9150_RA_INT_PIN_CFG
01363  * @see MPU9150_INTCFG_FSYNC_INT_LEVEL_BIT
01364  */
01365 void MPU9150::setFSyncInterruptLevel(bool level) {
01366     I2Cdev::writeBit(devAddr, MPU9150_RA_INT_PIN_CFG, MPU9150_INTCFG_FSYNC_INT_LEVEL_BIT, level);
01367 }
01368 /** Get FSYNC pin interrupt enabled setting.
01369  * Will be set 0 for disabled, 1 for enabled.
01370  * @return Current interrupt enabled setting
01371  * @see MPU9150_RA_INT_PIN_CFG
01372  * @see MPU9150_INTCFG_FSYNC_INT_EN_BIT
01373  */
01374 bool MPU9150::getFSyncInterruptEnabled() {
01375     I2Cdev::readBit(devAddr, MPU9150_RA_INT_PIN_CFG, MPU9150_INTCFG_FSYNC_INT_EN_BIT, buffer);
01376     return buffer[0];
01377 }
01378 /** Set FSYNC pin interrupt enabled setting.
01379  * @param enabled New FSYNC pin interrupt enabled setting
01380  * @see getFSyncInterruptEnabled()
01381  * @see MPU9150_RA_INT_PIN_CFG
01382  * @see MPU9150_INTCFG_FSYNC_INT_EN_BIT
01383  */
01384 void MPU9150::setFSyncInterruptEnabled(bool enabled) {
01385     I2Cdev::writeBit(devAddr, MPU9150_RA_INT_PIN_CFG, MPU9150_INTCFG_FSYNC_INT_EN_BIT, enabled);
01386 }
01387 /** Get I2C bypass enabled status.
01388  * When this bit is equal to 1 and I2C_MST_EN (Register 106 bit[5]) is equal to
01389  * 0, the host application processor will be able to directly access the
01390  * auxiliary I2C bus of the MPU-60X0. When this bit is equal to 0, the host
01391  * application processor will not be able to directly access the auxiliary I2C
01392  * bus of the MPU-60X0 regardless of the state of I2C_MST_EN (Register 106
01393  * bit[5]).
01394  * @return Current I2C bypass enabled status
01395  * @see MPU9150_RA_INT_PIN_CFG
01396  * @see MPU9150_INTCFG_I2C_BYPASS_EN_BIT
01397  */
01398 bool MPU9150::getI2CBypassEnabled() {
01399     I2Cdev::readBit(devAddr, MPU9150_RA_INT_PIN_CFG, MPU9150_INTCFG_I2C_BYPASS_EN_BIT, buffer);
01400     return buffer[0];
01401 }
01402 /** Set I2C bypass enabled status.
01403  * When this bit is equal to 1 and I2C_MST_EN (Register 106 bit[5]) is equal to
01404  * 0, the host application processor will be able to directly access the
01405  * auxiliary I2C bus of the MPU-60X0. When this bit is equal to 0, the host
01406  * application processor will not be able to directly access the auxiliary I2C
01407  * bus of the MPU-60X0 regardless of the state of I2C_MST_EN (Register 106
01408  * bit[5]).
01409  * @param enabled New I2C bypass enabled status
01410  * @see MPU9150_RA_INT_PIN_CFG
01411  * @see MPU9150_INTCFG_I2C_BYPASS_EN_BIT
01412  */
01413 void MPU9150::setI2CBypassEnabled(bool enabled) {
01414     I2Cdev::writeBit(devAddr, MPU9150_RA_INT_PIN_CFG, MPU9150_INTCFG_I2C_BYPASS_EN_BIT, enabled);
01415 }
01416 /** Get reference clock output enabled status.
01417  * When this bit is equal to 1, a reference clock output is provided at the
01418  * CLKOUT pin. When this bit is equal to 0, the clock output is disabled. For
01419  * further information regarding CLKOUT, please refer to the MPU-60X0 Product
01420  * Specification document.
01421  * @return Current reference clock output enabled status
01422  * @see MPU9150_RA_INT_PIN_CFG
01423  * @see MPU9150_INTCFG_CLKOUT_EN_BIT
01424  */
01425 bool MPU9150::getClockOutputEnabled() {
01426     I2Cdev::readBit(devAddr, MPU9150_RA_INT_PIN_CFG, MPU9150_INTCFG_CLKOUT_EN_BIT, buffer);
01427     return buffer[0];
01428 }
01429 /** Set reference clock output enabled status.
01430  * When this bit is equal to 1, a reference clock output is provided at the
01431  * CLKOUT pin. When this bit is equal to 0, the clock output is disabled. For
01432  * further information regarding CLKOUT, please refer to the MPU-60X0 Product
01433  * Specification document.
01434  * @param enabled New reference clock output enabled status
01435  * @see MPU9150_RA_INT_PIN_CFG
01436  * @see MPU9150_INTCFG_CLKOUT_EN_BIT
01437  */
01438 void MPU9150::setClockOutputEnabled(bool enabled) {
01439     I2Cdev::writeBit(devAddr, MPU9150_RA_INT_PIN_CFG, MPU9150_INTCFG_CLKOUT_EN_BIT, enabled);
01440 }
01441 
01442 // INT_ENABLE register
01443 
01444 /** Get full interrupt enabled status.
01445  * Full register byte for all interrupts, for quick reading. Each bit will be
01446  * set 0 for disabled, 1 for enabled.
01447  * @return Current interrupt enabled status
01448  * @see MPU9150_RA_INT_ENABLE
01449  * @see MPU9150_INTERRUPT_FF_BIT
01450  **/
01451 uint8_t MPU9150::getIntEnabled() {
01452     I2Cdev::readByte(devAddr, MPU9150_RA_INT_ENABLE, buffer);
01453     return buffer[0];
01454 }
01455 /** Set full interrupt enabled status.
01456  * Full register byte for all interrupts, for quick reading. Each bit should be
01457  * set 0 for disabled, 1 for enabled.
01458  * @param enabled New interrupt enabled status
01459  * @see getIntFreefallEnabled()
01460  * @see MPU9150_RA_INT_ENABLE
01461  * @see MPU9150_INTERRUPT_FF_BIT
01462  **/
01463 void MPU9150::setIntEnabled(uint8_t enabled) {
01464     I2Cdev::writeByte(devAddr, MPU9150_RA_INT_ENABLE, enabled);
01465 }
01466 /** Get Free Fall interrupt enabled status.
01467  * Will be set 0 for disabled, 1 for enabled.
01468  * @return Current interrupt enabled status
01469  * @see MPU9150_RA_INT_ENABLE
01470  * @see MPU9150_INTERRUPT_FF_BIT
01471  **/
01472 bool MPU9150::getIntFreefallEnabled() {
01473     I2Cdev::readBit(devAddr, MPU9150_RA_INT_ENABLE, MPU9150_INTERRUPT_FF_BIT, buffer);
01474     return buffer[0];
01475 }
01476 /** Set Free Fall interrupt enabled status.
01477  * @param enabled New interrupt enabled status
01478  * @see getIntFreefallEnabled()
01479  * @see MPU9150_RA_INT_ENABLE
01480  * @see MPU9150_INTERRUPT_FF_BIT
01481  **/
01482 void MPU9150::setIntFreefallEnabled(bool enabled) {
01483     I2Cdev::writeBit(devAddr, MPU9150_RA_INT_ENABLE, MPU9150_INTERRUPT_FF_BIT, enabled);
01484 }
01485 /** Get Motion Detection interrupt enabled status.
01486  * Will be set 0 for disabled, 1 for enabled.
01487  * @return Current interrupt enabled status
01488  * @see MPU9150_RA_INT_ENABLE
01489  * @see MPU9150_INTERRUPT_MOT_BIT
01490  **/
01491 bool MPU9150::getIntMotionEnabled() {
01492     I2Cdev::readBit(devAddr, MPU9150_RA_INT_ENABLE, MPU9150_INTERRUPT_MOT_BIT, buffer);
01493     return buffer[0];
01494 }
01495 /** Set Motion Detection interrupt enabled status.
01496  * @param enabled New interrupt enabled status
01497  * @see getIntMotionEnabled()
01498  * @see MPU9150_RA_INT_ENABLE
01499  * @see MPU9150_INTERRUPT_MOT_BIT
01500  **/
01501 void MPU9150::setIntMotionEnabled(bool enabled) {
01502     I2Cdev::writeBit(devAddr, MPU9150_RA_INT_ENABLE, MPU9150_INTERRUPT_MOT_BIT, enabled);
01503 }
01504 /** Get Zero Motion Detection interrupt enabled status.
01505  * Will be set 0 for disabled, 1 for enabled.
01506  * @return Current interrupt enabled status
01507  * @see MPU9150_RA_INT_ENABLE
01508  * @see MPU9150_INTERRUPT_ZMOT_BIT
01509  **/
01510 bool MPU9150::getIntZeroMotionEnabled() {
01511     I2Cdev::readBit(devAddr, MPU9150_RA_INT_ENABLE, MPU9150_INTERRUPT_ZMOT_BIT, buffer);
01512     return buffer[0];
01513 }
01514 /** Set Zero Motion Detection interrupt enabled status.
01515  * @param enabled New interrupt enabled status
01516  * @see getIntZeroMotionEnabled()
01517  * @see MPU9150_RA_INT_ENABLE
01518  * @see MPU9150_INTERRUPT_ZMOT_BIT
01519  **/
01520 void MPU9150::setIntZeroMotionEnabled(bool enabled) {
01521     I2Cdev::writeBit(devAddr, MPU9150_RA_INT_ENABLE, MPU9150_INTERRUPT_ZMOT_BIT, enabled);
01522 }
01523 /** Get FIFO Buffer Overflow interrupt enabled status.
01524  * Will be set 0 for disabled, 1 for enabled.
01525  * @return Current interrupt enabled status
01526  * @see MPU9150_RA_INT_ENABLE
01527  * @see MPU9150_INTERRUPT_FIFO_OFLOW_BIT
01528  **/
01529 bool MPU9150::getIntFIFOBufferOverflowEnabled() {
01530     I2Cdev::readBit(devAddr, MPU9150_RA_INT_ENABLE, MPU9150_INTERRUPT_FIFO_OFLOW_BIT, buffer);
01531     return buffer[0];
01532 }
01533 /** Set FIFO Buffer Overflow interrupt enabled status.
01534  * @param enabled New interrupt enabled status
01535  * @see getIntFIFOBufferOverflowEnabled()
01536  * @see MPU9150_RA_INT_ENABLE
01537  * @see MPU9150_INTERRUPT_FIFO_OFLOW_BIT
01538  **/
01539 void MPU9150::setIntFIFOBufferOverflowEnabled(bool enabled) {
01540     I2Cdev::writeBit(devAddr, MPU9150_RA_INT_ENABLE, MPU9150_INTERRUPT_FIFO_OFLOW_BIT, enabled);
01541 }
01542 /** Get I2C Master interrupt enabled status.
01543  * This enables any of the I2C Master interrupt sources to generate an
01544  * interrupt. Will be set 0 for disabled, 1 for enabled.
01545  * @return Current interrupt enabled status
01546  * @see MPU9150_RA_INT_ENABLE
01547  * @see MPU9150_INTERRUPT_I2C_MST_INT_BIT
01548  **/
01549 bool MPU9150::getIntI2CMasterEnabled() {
01550     I2Cdev::readBit(devAddr, MPU9150_RA_INT_ENABLE, MPU9150_INTERRUPT_I2C_MST_INT_BIT, buffer);
01551     return buffer[0];
01552 }
01553 /** Set I2C Master interrupt enabled status.
01554  * @param enabled New interrupt enabled status
01555  * @see getIntI2CMasterEnabled()
01556  * @see MPU9150_RA_INT_ENABLE
01557  * @see MPU9150_INTERRUPT_I2C_MST_INT_BIT
01558  **/
01559 void MPU9150::setIntI2CMasterEnabled(bool enabled) {
01560     I2Cdev::writeBit(devAddr, MPU9150_RA_INT_ENABLE, MPU9150_INTERRUPT_I2C_MST_INT_BIT, enabled);
01561 }
01562 /** Get Data Ready interrupt enabled setting.
01563  * This event occurs each time a write operation to all of the sensor registers
01564  * has been completed. Will be set 0 for disabled, 1 for enabled.
01565  * @return Current interrupt enabled status
01566  * @see MPU9150_RA_INT_ENABLE
01567  * @see MPU9150_INTERRUPT_DATA_RDY_BIT
01568  */
01569 bool MPU9150::getIntDataReadyEnabled() {
01570     I2Cdev::readBit(devAddr, MPU9150_RA_INT_ENABLE, MPU9150_INTERRUPT_DATA_RDY_BIT, buffer);
01571     return buffer[0];
01572 }
01573 /** Set Data Ready interrupt enabled status.
01574  * @param enabled New interrupt enabled status
01575  * @see getIntDataReadyEnabled()
01576  * @see MPU9150_RA_INT_CFG
01577  * @see MPU9150_INTERRUPT_DATA_RDY_BIT
01578  */
01579 void MPU9150::setIntDataReadyEnabled(bool enabled) {
01580     I2Cdev::writeBit(devAddr, MPU9150_RA_INT_ENABLE, MPU9150_INTERRUPT_DATA_RDY_BIT, enabled);
01581 }
01582 
01583 // INT_STATUS register
01584 
01585 /** Get full set of interrupt status bits.
01586  * These bits clear to 0 after the register has been read. Very useful
01587  * for getting multiple INT statuses, since each single bit read clears
01588  * all of them because it has to read the whole byte.
01589  * @return Current interrupt status
01590  * @see MPU9150_RA_INT_STATUS
01591  */
01592 uint8_t MPU9150::getIntStatus() {
01593     I2Cdev::readByte(devAddr, MPU9150_RA_INT_STATUS, buffer);
01594     return buffer[0];
01595 }
01596 /** Get Free Fall interrupt status.
01597  * This bit automatically sets to 1 when a Free Fall interrupt has been
01598  * generated. The bit clears to 0 after the register has been read.
01599  * @return Current interrupt status
01600  * @see MPU9150_RA_INT_STATUS
01601  * @see MPU9150_INTERRUPT_FF_BIT
01602  */
01603 bool MPU9150::getIntFreefallStatus() {
01604     I2Cdev::readBit(devAddr, MPU9150_RA_INT_STATUS, MPU9150_INTERRUPT_FF_BIT, buffer);
01605     return buffer[0];
01606 }
01607 /** Get Motion Detection interrupt status.
01608  * This bit automatically sets to 1 when a Motion Detection interrupt has been
01609  * generated. The bit clears to 0 after the register has been read.
01610  * @return Current interrupt status
01611  * @see MPU9150_RA_INT_STATUS
01612  * @see MPU9150_INTERRUPT_MOT_BIT
01613  */
01614 bool MPU9150::getIntMotionStatus() {
01615     I2Cdev::readBit(devAddr, MPU9150_RA_INT_STATUS, MPU9150_INTERRUPT_MOT_BIT, buffer);
01616     return buffer[0];
01617 }
01618 /** Get Zero Motion Detection interrupt status.
01619  * This bit automatically sets to 1 when a Zero Motion Detection interrupt has
01620  * been generated. The bit clears to 0 after the register has been read.
01621  * @return Current interrupt status
01622  * @see MPU9150_RA_INT_STATUS
01623  * @see MPU9150_INTERRUPT_ZMOT_BIT
01624  */
01625 bool MPU9150::getIntZeroMotionStatus() {
01626     I2Cdev::readBit(devAddr, MPU9150_RA_INT_STATUS, MPU9150_INTERRUPT_ZMOT_BIT, buffer);
01627     return buffer[0];
01628 }
01629 /** Get FIFO Buffer Overflow interrupt status.
01630  * This bit automatically sets to 1 when a Free Fall interrupt has been
01631  * generated. The bit clears to 0 after the register has been read.
01632  * @return Current interrupt status
01633  * @see MPU9150_RA_INT_STATUS
01634  * @see MPU9150_INTERRUPT_FIFO_OFLOW_BIT
01635  */
01636 bool MPU9150::getIntFIFOBufferOverflowStatus() {
01637     I2Cdev::readBit(devAddr, MPU9150_RA_INT_STATUS, MPU9150_INTERRUPT_FIFO_OFLOW_BIT, buffer);
01638     return buffer[0];
01639 }
01640 /** Get I2C Master interrupt status.
01641  * This bit automatically sets to 1 when an I2C Master interrupt has been
01642  * generated. For a list of I2C Master interrupts, please refer to Register 54.
01643  * The bit clears to 0 after the register has been read.
01644  * @return Current interrupt status
01645  * @see MPU9150_RA_INT_STATUS
01646  * @see MPU9150_INTERRUPT_I2C_MST_INT_BIT
01647  */
01648 bool MPU9150::getIntI2CMasterStatus() {
01649     I2Cdev::readBit(devAddr, MPU9150_RA_INT_STATUS, MPU9150_INTERRUPT_I2C_MST_INT_BIT, buffer);
01650     return buffer[0];
01651 }
01652 /** Get Data Ready interrupt status.
01653  * This bit automatically sets to 1 when a Data Ready interrupt has been
01654  * generated. The bit clears to 0 after the register has been read.
01655  * @return Current interrupt status
01656  * @see MPU9150_RA_INT_STATUS
01657  * @see MPU9150_INTERRUPT_DATA_RDY_BIT
01658  */
01659 bool MPU9150::getIntDataReadyStatus() {
01660     I2Cdev::readBit(devAddr, MPU9150_RA_INT_STATUS, MPU9150_INTERRUPT_DATA_RDY_BIT, buffer);
01661     return buffer[0];
01662 }
01663 
01664 // ACCEL_*OUT_* registers
01665 
01666 /** Get raw 9-axis motion sensor readings (accel/gyro/compass).
01667  * FUNCTION NOT FULLY IMPLEMENTED YET.
01668  * @param ax 16-bit signed integer container for accelerometer X-axis value
01669  * @param ay 16-bit signed integer container for accelerometer Y-axis value
01670  * @param az 16-bit signed integer container for accelerometer Z-axis value
01671  * @param gx 16-bit signed integer container for gyroscope X-axis value
01672  * @param gy 16-bit signed integer container for gyroscope Y-axis value
01673  * @param gz 16-bit signed integer container for gyroscope Z-axis value
01674  * @param mx 16-bit signed integer container for magnetometer X-axis value
01675  * @param my 16-bit signed integer container for magnetometer Y-axis value
01676  * @param mz 16-bit signed integer container for magnetometer Z-axis value
01677  * @see getMotion6()
01678  * @see getAcceleration()
01679  * @see getRotation()
01680  * @see MPU9150_RA_ACCEL_XOUT_H
01681  */
01682 void MPU9150::getMotion9(int16_t* ax, int16_t* ay, int16_t* az, int16_t* gx, int16_t* gy, int16_t* gz, int16_t* mx, int16_t* my, int16_t* mz) {
01683 
01684     //get accel and gyro
01685     getMotion6(ax, ay, az, gx, gy, gz);
01686 
01687     //read mag
01688     I2Cdev::writeByte(devAddr, MPU9150_RA_INT_PIN_CFG, 0x02); //set i2c bypass enable pin to true to access magnetometer
01689     wait_ms(10);
01690     I2Cdev::writeByte(MPU9150_RA_MAG_ADDRESS, 0x0A, 0x01); //enable the magnetometer
01691     wait_ms(10);
01692     I2Cdev::readBytes(MPU9150_RA_MAG_ADDRESS, MPU9150_RA_MAG_XOUT_L, 6, buffer);
01693     *mx = (((int16_t)buffer[0]) << 8) | buffer[1];
01694     *my = (((int16_t)buffer[2]) << 8) | buffer[3];
01695     *mz = (((int16_t)buffer[4]) << 8) | buffer[5];
01696 }
01697 /** Get raw 6-axis motion sensor readings (accel/gyro).
01698  * Retrieves all currently available motion sensor values.
01699  * @param ax 16-bit signed integer container for accelerometer X-axis value
01700  * @param ay 16-bit signed integer container for accelerometer Y-axis value
01701  * @param az 16-bit signed integer container for accelerometer Z-axis value
01702  * @param gx 16-bit signed integer container for gyroscope X-axis value
01703  * @param gy 16-bit signed integer container for gyroscope Y-axis value
01704  * @param gz 16-bit signed integer container for gyroscope Z-axis value
01705  * @see getAcceleration()
01706  * @see getRotation()
01707  * @see MPU9150_RA_ACCEL_XOUT_H
01708  */
01709 void MPU9150::getMotion6(int16_t* ax, int16_t* ay, int16_t* az, int16_t* gx, int16_t* gy, int16_t* gz) {
01710     I2Cdev::readBytes(devAddr, MPU9150_RA_ACCEL_XOUT_H, 14, buffer);
01711     *ax = (((int16_t)buffer[0]) << 8) | buffer[1];
01712     *ay = (((int16_t)buffer[2]) << 8) | buffer[3];
01713     *az = (((int16_t)buffer[4]) << 8) | buffer[5];
01714     *gx = (((int16_t)buffer[8]) << 8) | buffer[9];
01715     *gy = (((int16_t)buffer[10]) << 8) | buffer[11];
01716     *gz = (((int16_t)buffer[12]) << 8) | buffer[13];
01717 }
01718 /** Get 3-axis accelerometer readings.
01719  * These registers store the most recent accelerometer measurements.
01720  * Accelerometer measurements are written to these registers at the Sample Rate
01721  * as defined in Register 25.
01722  *
01723  * The accelerometer measurement registers, along with the temperature
01724  * measurement registers, gyroscope measurement registers, and external sensor
01725  * data registers, are composed of two sets of registers: an internal register
01726  * set and a user-facing read register set.
01727  *
01728  * The data within the accelerometer sensors' internal register set is always
01729  * updated at the Sample Rate. Meanwhile, the user-facing read register set
01730  * duplicates the internal register set's data values whenever the serial
01731  * interface is idle. This guarantees that a burst read of sensor registers will
01732  * read measurements from the same sampling instant. Note that if burst reads
01733  * are not used, the user is responsible for ensuring a set of single byte reads
01734  * correspond to a single sampling instant by checking the Data Ready interrupt.
01735  *
01736  * Each 16-bit accelerometer measurement has a full scale defined in ACCEL_FS
01737  * (Register 28). For each full scale setting, the accelerometers' sensitivity
01738  * per LSB in ACCEL_xOUT is shown in the table below:
01739  *
01740  * <pre>
01741  * AFS_SEL | Full Scale Range | LSB Sensitivity
01742  * --------+------------------+----------------
01743  * 0       | +/- 2g           | 8192 LSB/mg
01744  * 1       | +/- 4g           | 4096 LSB/mg
01745  * 2       | +/- 8g           | 2048 LSB/mg
01746  * 3       | +/- 16g          | 1024 LSB/mg
01747  * </pre>
01748  *
01749  * @param x 16-bit signed integer container for X-axis acceleration
01750  * @param y 16-bit signed integer container for Y-axis acceleration
01751  * @param z 16-bit signed integer container for Z-axis acceleration
01752  * @see MPU9150_RA_GYRO_XOUT_H
01753  */
01754 void MPU9150::getAcceleration(int16_t* x, int16_t* y, int16_t* z) {
01755     I2Cdev::readBytes(devAddr, MPU9150_RA_ACCEL_XOUT_H, 6, buffer);
01756     *x = (((int16_t)buffer[0]) << 8) | buffer[1];
01757     *y = (((int16_t)buffer[2]) << 8) | buffer[3];
01758     *z = (((int16_t)buffer[4]) << 8) | buffer[5];
01759 }
01760 /** Get X-axis accelerometer reading.
01761  * @return X-axis acceleration measurement in 16-bit 2's complement format
01762  * @see getMotion6()
01763  * @see MPU9150_RA_ACCEL_XOUT_H
01764  */
01765 int16_t MPU9150::getAccelerationX() {
01766     I2Cdev::readBytes(devAddr, MPU9150_RA_ACCEL_XOUT_H, 2, buffer);
01767     return (((int16_t)buffer[0]) << 8) | buffer[1];
01768 }
01769 /** Get Y-axis accelerometer reading.
01770  * @return Y-axis acceleration measurement in 16-bit 2's complement format
01771  * @see getMotion6()
01772  * @see MPU9150_RA_ACCEL_YOUT_H
01773  */
01774 int16_t MPU9150::getAccelerationY() {
01775     I2Cdev::readBytes(devAddr, MPU9150_RA_ACCEL_YOUT_H, 2, buffer);
01776     return (((int16_t)buffer[0]) << 8) | buffer[1];
01777 }
01778 /** Get Z-axis accelerometer reading.
01779  * @return Z-axis acceleration measurement in 16-bit 2's complement format
01780  * @see getMotion6()
01781  * @see MPU9150_RA_ACCEL_ZOUT_H
01782  */
01783 int16_t MPU9150::getAccelerationZ() {
01784     I2Cdev::readBytes(devAddr, MPU9150_RA_ACCEL_ZOUT_H, 2, buffer);
01785     return (((int16_t)buffer[0]) << 8) | buffer[1];
01786 }
01787 
01788 // TEMP_OUT_* registers
01789 
01790 /** Get current internal temperature.
01791  * @return Temperature reading in 16-bit 2's complement format
01792  * @see MPU9150_RA_TEMP_OUT_H
01793  */
01794 int16_t MPU9150::getTemperature() {
01795     I2Cdev::readBytes(devAddr, MPU9150_RA_TEMP_OUT_H, 2, buffer);
01796     return (((int16_t)buffer[0]) << 8) | buffer[1];
01797 }
01798 
01799 // GYRO_*OUT_* registers
01800 
01801 /** Get 3-axis gyroscope readings.
01802  * These gyroscope measurement registers, along with the accelerometer
01803  * measurement registers, temperature measurement registers, and external sensor
01804  * data registers, are composed of two sets of registers: an internal register
01805  * set and a user-facing read register set.
01806  * The data within the gyroscope sensors' internal register set is always
01807  * updated at the Sample Rate. Meanwhile, the user-facing read register set
01808  * duplicates the internal register set's data values whenever the serial
01809  * interface is idle. This guarantees that a burst read of sensor registers will
01810  * read measurements from the same sampling instant. Note that if burst reads
01811  * are not used, the user is responsible for ensuring a set of single byte reads
01812  * correspond to a single sampling instant by checking the Data Ready interrupt.
01813  *
01814  * Each 16-bit gyroscope measurement has a full scale defined in FS_SEL
01815  * (Register 27). For each full scale setting, the gyroscopes' sensitivity per
01816  * LSB in GYRO_xOUT is shown in the table below:
01817  *
01818  * <pre>
01819  * FS_SEL | Full Scale Range   | LSB Sensitivity
01820  * -------+--------------------+----------------
01821  * 0      | +/- 250 degrees/s  | 131 LSB/deg/s
01822  * 1      | +/- 500 degrees/s  | 65.5 LSB/deg/s
01823  * 2      | +/- 1000 degrees/s | 32.8 LSB/deg/s
01824  * 3      | +/- 2000 degrees/s | 16.4 LSB/deg/s
01825  * </pre>
01826  *
01827  * @param x 16-bit signed integer container for X-axis rotation
01828  * @param y 16-bit signed integer container for Y-axis rotation
01829  * @param z 16-bit signed integer container for Z-axis rotation
01830  * @see getMotion6()
01831  * @see MPU9150_RA_GYRO_XOUT_H
01832  */
01833 void MPU9150::getRotation(int16_t* x, int16_t* y, int16_t* z) {
01834     I2Cdev::readBytes(devAddr, MPU9150_RA_GYRO_XOUT_H, 6, buffer);
01835     *x = (((int16_t)buffer[0]) << 8) | buffer[1];
01836     *y = (((int16_t)buffer[2]) << 8) | buffer[3];
01837     *z = (((int16_t)buffer[4]) << 8) | buffer[5];
01838 }
01839 /** Get X-axis gyroscope reading.
01840  * @return X-axis rotation measurement in 16-bit 2's complement format
01841  * @see getMotion6()
01842  * @see MPU9150_RA_GYRO_XOUT_H
01843  */
01844 int16_t MPU9150::getRotationX() {
01845     I2Cdev::readBytes(devAddr, MPU9150_RA_GYRO_XOUT_H, 2, buffer);
01846     return (((int16_t)buffer[0]) << 8) | buffer[1];
01847 }
01848 /** Get Y-axis gyroscope reading.
01849  * @return Y-axis rotation measurement in 16-bit 2's complement format
01850  * @see getMotion6()
01851  * @see MPU9150_RA_GYRO_YOUT_H
01852  */
01853 int16_t MPU9150::getRotationY() {
01854     I2Cdev::readBytes(devAddr, MPU9150_RA_GYRO_YOUT_H, 2, buffer);
01855     return (((int16_t)buffer[0]) << 8) | buffer[1];
01856 }
01857 /** Get Z-axis gyroscope reading.
01858  * @return Z-axis rotation measurement in 16-bit 2's complement format
01859  * @see getMotion6()
01860  * @see MPU9150_RA_GYRO_ZOUT_H
01861  */
01862 int16_t MPU9150::getRotationZ() {
01863     I2Cdev::readBytes(devAddr, MPU9150_RA_GYRO_ZOUT_H, 2, buffer);
01864     return (((int16_t)buffer[0]) << 8) | buffer[1];
01865 }
01866 
01867 // EXT_SENS_DATA_* registers
01868 
01869 /** Read single byte from external sensor data register.
01870  * These registers store data read from external sensors by the Slave 0, 1, 2,
01871  * and 3 on the auxiliary I2C interface. Data read by Slave 4 is stored in
01872  * I2C_SLV4_DI (Register 53).
01873  *
01874  * External sensor data is written to these registers at the Sample Rate as
01875  * defined in Register 25. This access rate can be reduced by using the Slave
01876  * Delay Enable registers (Register 103).
01877  *
01878  * External sensor data registers, along with the gyroscope measurement
01879  * registers, accelerometer measurement registers, and temperature measurement
01880  * registers, are composed of two sets of registers: an internal register set
01881  * and a user-facing read register set.
01882  *
01883  * The data within the external sensors' internal register set is always updated
01884  * at the Sample Rate (or the reduced access rate) whenever the serial interface
01885  * is idle. This guarantees that a burst read of sensor registers will read
01886  * measurements from the same sampling instant. Note that if burst reads are not
01887  * used, the user is responsible for ensuring a set of single byte reads
01888  * correspond to a single sampling instant by checking the Data Ready interrupt.
01889  *
01890  * Data is placed in these external sensor data registers according to
01891  * I2C_SLV0_CTRL, I2C_SLV1_CTRL, I2C_SLV2_CTRL, and I2C_SLV3_CTRL (Registers 39,
01892  * 42, 45, and 48). When more than zero bytes are read (I2C_SLVx_LEN > 0) from
01893  * an enabled slave (I2C_SLVx_EN = 1), the slave is read at the Sample Rate (as
01894  * defined in Register 25) or delayed rate (if specified in Register 52 and
01895  * 103). During each Sample cycle, slave reads are performed in order of Slave
01896  * number. If all slaves are enabled with more than zero bytes to be read, the
01897  * order will be Slave 0, followed by Slave 1, Slave 2, and Slave 3.
01898  *
01899  * Each enabled slave will have EXT_SENS_DATA registers associated with it by
01900  * number of bytes read (I2C_SLVx_LEN) in order of slave number, starting from
01901  * EXT_SENS_DATA_00. Note that this means enabling or disabling a slave may
01902  * change the higher numbered slaves' associated registers. Furthermore, if
01903  * fewer total bytes are being read from the external sensors as a result of
01904  * such a change, then the data remaining in the registers which no longer have
01905  * an associated slave device (i.e. high numbered registers) will remain in
01906  * these previously allocated registers unless reset.
01907  *
01908  * If the sum of the read lengths of all SLVx transactions exceed the number of
01909  * available EXT_SENS_DATA registers, the excess bytes will be dropped. There
01910  * are 24 EXT_SENS_DATA registers and hence the total read lengths between all
01911  * the slaves cannot be greater than 24 or some bytes will be lost.
01912  *
01913  * Note: Slave 4's behavior is distinct from that of Slaves 0-3. For further
01914  * information regarding the characteristics of Slave 4, please refer to
01915  * Registers 49 to 53.
01916  *
01917  * EXAMPLE:
01918  * Suppose that Slave 0 is enabled with 4 bytes to be read (I2C_SLV0_EN = 1 and
01919  * I2C_SLV0_LEN = 4) while Slave 1 is enabled with 2 bytes to be read so that
01920  * I2C_SLV1_EN = 1 and I2C_SLV1_LEN = 2. In such a situation, EXT_SENS_DATA _00
01921  * through _03 will be associated with Slave 0, while EXT_SENS_DATA _04 and 05
01922  * will be associated with Slave 1. If Slave 2 is enabled as well, registers
01923  * starting from EXT_SENS_DATA_06 will be allocated to Slave 2.
01924  *
01925  * If Slave 2 is disabled while Slave 3 is enabled in this same situation, then
01926  * registers starting from EXT_SENS_DATA_06 will be allocated to Slave 3
01927  * instead.
01928  *
01929  * REGISTER ALLOCATION FOR DYNAMIC DISABLE VS. NORMAL DISABLE:
01930  * If a slave is disabled at any time, the space initially allocated to the
01931  * slave in the EXT_SENS_DATA register, will remain associated with that slave.
01932  * This is to avoid dynamic adjustment of the register allocation.
01933  *
01934  * The allocation of the EXT_SENS_DATA registers is recomputed only when (1) all
01935  * slaves are disabled, or (2) the I2C_MST_RST bit is set (Register 106).
01936  *
01937  * This above is also true if one of the slaves gets NACKed and stops
01938  * functioning.
01939  *
01940  * @param position Starting position (0-23)
01941  * @return Byte read from register
01942  */
01943 uint8_t MPU9150::getExternalSensorByte(int position) {
01944     I2Cdev::readByte(devAddr, MPU9150_RA_EXT_SENS_DATA_00 + position, buffer);
01945     return buffer[0];
01946 }
01947 /** Read word (2 bytes) from external sensor data registers.
01948  * @param position Starting position (0-21)
01949  * @return Word read from register
01950  * @see getExternalSensorByte()
01951  */
01952 uint16_t MPU9150::getExternalSensorWord(int position) {
01953     I2Cdev::readBytes(devAddr, MPU9150_RA_EXT_SENS_DATA_00 + position, 2, buffer);
01954     return (((uint16_t)buffer[0]) << 8) | buffer[1];
01955 }
01956 /** Read double word (4 bytes) from external sensor data registers.
01957  * @param position Starting position (0-20)
01958  * @return Double word read from registers
01959  * @see getExternalSensorByte()
01960  */
01961 uint32_t MPU9150::getExternalSensorDWord(int position) {
01962     I2Cdev::readBytes(devAddr, MPU9150_RA_EXT_SENS_DATA_00 + position, 4, buffer);
01963     return (((uint32_t)buffer[0]) << 24) | (((uint32_t)buffer[1]) << 16) | (((uint16_t)buffer[2]) << 8) | buffer[3];
01964 }
01965 
01966 // MOT_DETECT_STATUS register
01967 
01968 /** Get X-axis negative motion detection interrupt status.
01969  * @return Motion detection status
01970  * @see MPU9150_RA_MOT_DETECT_STATUS
01971  * @see MPU9150_MOTION_MOT_XNEG_BIT
01972  */
01973 bool MPU9150::getXNegMotionDetected() {
01974     I2Cdev::readBit(devAddr, MPU9150_RA_MOT_DETECT_STATUS, MPU9150_MOTION_MOT_XNEG_BIT, buffer);
01975     return buffer[0];
01976 }
01977 /** Get X-axis positive motion detection interrupt status.
01978  * @return Motion detection status
01979  * @see MPU9150_RA_MOT_DETECT_STATUS
01980  * @see MPU9150_MOTION_MOT_XPOS_BIT
01981  */
01982 bool MPU9150::getXPosMotionDetected() {
01983     I2Cdev::readBit(devAddr, MPU9150_RA_MOT_DETECT_STATUS, MPU9150_MOTION_MOT_XPOS_BIT, buffer);
01984     return buffer[0];
01985 }
01986 /** Get Y-axis negative motion detection interrupt status.
01987  * @return Motion detection status
01988  * @see MPU9150_RA_MOT_DETECT_STATUS
01989  * @see MPU9150_MOTION_MOT_YNEG_BIT
01990  */
01991 bool MPU9150::getYNegMotionDetected() {
01992     I2Cdev::readBit(devAddr, MPU9150_RA_MOT_DETECT_STATUS, MPU9150_MOTION_MOT_YNEG_BIT, buffer);
01993     return buffer[0];
01994 }
01995 /** Get Y-axis positive motion detection interrupt status.
01996  * @return Motion detection status
01997  * @see MPU9150_RA_MOT_DETECT_STATUS
01998  * @see MPU9150_MOTION_MOT_YPOS_BIT
01999  */
02000 bool MPU9150::getYPosMotionDetected() {
02001     I2Cdev::readBit(devAddr, MPU9150_RA_MOT_DETECT_STATUS, MPU9150_MOTION_MOT_YPOS_BIT, buffer);
02002     return buffer[0];
02003 }
02004 /** Get Z-axis negative motion detection interrupt status.
02005  * @return Motion detection status
02006  * @see MPU9150_RA_MOT_DETECT_STATUS
02007  * @see MPU9150_MOTION_MOT_ZNEG_BIT
02008  */
02009 bool MPU9150::getZNegMotionDetected() {
02010     I2Cdev::readBit(devAddr, MPU9150_RA_MOT_DETECT_STATUS, MPU9150_MOTION_MOT_ZNEG_BIT, buffer);
02011     return buffer[0];
02012 }
02013 /** Get Z-axis positive motion detection interrupt status.
02014  * @return Motion detection status
02015  * @see MPU9150_RA_MOT_DETECT_STATUS
02016  * @see MPU9150_MOTION_MOT_ZPOS_BIT
02017  */
02018 bool MPU9150::getZPosMotionDetected() {
02019     I2Cdev::readBit(devAddr, MPU9150_RA_MOT_DETECT_STATUS, MPU9150_MOTION_MOT_ZPOS_BIT, buffer);
02020     return buffer[0];
02021 }
02022 /** Get zero motion detection interrupt status.
02023  * @return Motion detection status
02024  * @see MPU9150_RA_MOT_DETECT_STATUS
02025  * @see MPU9150_MOTION_MOT_ZRMOT_BIT
02026  */
02027 bool MPU9150::getZeroMotionDetected() {
02028     I2Cdev::readBit(devAddr, MPU9150_RA_MOT_DETECT_STATUS, MPU9150_MOTION_MOT_ZRMOT_BIT, buffer);
02029     return buffer[0];
02030 }
02031 
02032 // I2C_SLV*_DO register
02033 
02034 /** Write byte to Data Output container for specified slave.
02035  * This register holds the output data written into Slave when Slave is set to
02036  * write mode. For further information regarding Slave control, please
02037  * refer to Registers 37 to 39 and immediately following.
02038  * @param num Slave number (0-3)
02039  * @param data Byte to write
02040  * @see MPU9150_RA_I2C_SLV0_DO
02041  */
02042 void MPU9150::setSlaveOutputByte(uint8_t num, uint8_t data) {
02043     if (num > 3) return;
02044     I2Cdev::writeByte(devAddr, MPU9150_RA_I2C_SLV0_DO + num, data);
02045 }
02046 
02047 // I2C_MST_DELAY_CTRL register
02048 
02049 /** Get external data shadow delay enabled status.
02050  * This register is used to specify the timing of external sensor data
02051  * shadowing. When DELAY_ES_SHADOW is set to 1, shadowing of external
02052  * sensor data is delayed until all data has been received.
02053  * @return Current external data shadow delay enabled status.
02054  * @see MPU9150_RA_I2C_MST_DELAY_CTRL
02055  * @see MPU9150_DELAYCTRL_DELAY_ES_SHADOW_BIT
02056  */
02057 bool MPU9150::getExternalShadowDelayEnabled() {
02058     I2Cdev::readBit(devAddr, MPU9150_RA_I2C_MST_DELAY_CTRL, MPU9150_DELAYCTRL_DELAY_ES_SHADOW_BIT, buffer);
02059     return buffer[0];
02060 }
02061 /** Set external data shadow delay enabled status.
02062  * @param enabled New external data shadow delay enabled status.
02063  * @see getExternalShadowDelayEnabled()
02064  * @see MPU9150_RA_I2C_MST_DELAY_CTRL
02065  * @see MPU9150_DELAYCTRL_DELAY_ES_SHADOW_BIT
02066  */
02067 void MPU9150::setExternalShadowDelayEnabled(bool enabled) {
02068     I2Cdev::writeBit(devAddr, MPU9150_RA_I2C_MST_DELAY_CTRL, MPU9150_DELAYCTRL_DELAY_ES_SHADOW_BIT, enabled);
02069 }
02070 /** Get slave delay enabled status.
02071  * When a particular slave delay is enabled, the rate of access for the that
02072  * slave device is reduced. When a slave's access rate is decreased relative to
02073  * the Sample Rate, the slave is accessed every:
02074  *
02075  *     1 / (1 + I2C_MST_DLY) Samples
02076  *
02077  * This base Sample Rate in turn is determined by SMPLRT_DIV (register  * 25)
02078  * and DLPF_CFG (register 26).
02079  *
02080  * For further information regarding I2C_MST_DLY, please refer to register 52.
02081  * For further information regarding the Sample Rate, please refer to register 25.
02082  *
02083  * @param num Slave number (0-4)
02084  * @return Current slave delay enabled status.
02085  * @see MPU9150_RA_I2C_MST_DELAY_CTRL
02086  * @see MPU9150_DELAYCTRL_I2C_SLV0_DLY_EN_BIT
02087  */
02088 bool MPU9150::getSlaveDelayEnabled(uint8_t num) {
02089     // MPU9150_DELAYCTRL_I2C_SLV4_DLY_EN_BIT is 4, SLV3 is 3, etc.
02090     if (num > 4) return 0;
02091     I2Cdev::readBit(devAddr, MPU9150_RA_I2C_MST_DELAY_CTRL, num, buffer);
02092     return buffer[0];
02093 }
02094 /** Set slave delay enabled status.
02095  * @param num Slave number (0-4)
02096  * @param enabled New slave delay enabled status.
02097  * @see MPU9150_RA_I2C_MST_DELAY_CTRL
02098  * @see MPU9150_DELAYCTRL_I2C_SLV0_DLY_EN_BIT
02099  */
02100 void MPU9150::setSlaveDelayEnabled(uint8_t num, bool enabled) {
02101     I2Cdev::writeBit(devAddr, MPU9150_RA_I2C_MST_DELAY_CTRL, num, enabled);
02102 }
02103 
02104 // SIGNAL_PATH_RESET register
02105 
02106 /** Reset gyroscope signal path.
02107  * The reset will revert the signal path analog to digital converters and
02108  * filters to their power up configurations.
02109  * @see MPU9150_RA_SIGNAL_PATH_RESET
02110  * @see MPU9150_PATHRESET_GYRO_RESET_BIT
02111  */
02112 void MPU9150::resetGyroscopePath() {
02113     I2Cdev::writeBit(devAddr, MPU9150_RA_SIGNAL_PATH_RESET, MPU9150_PATHRESET_GYRO_RESET_BIT, true);
02114 }
02115 /** Reset accelerometer signal path.
02116  * The reset will revert the signal path analog to digital converters and
02117  * filters to their power up configurations.
02118  * @see MPU9150_RA_SIGNAL_PATH_RESET
02119  * @see MPU9150_PATHRESET_ACCEL_RESET_BIT
02120  */
02121 void MPU9150::resetAccelerometerPath() {
02122     I2Cdev::writeBit(devAddr, MPU9150_RA_SIGNAL_PATH_RESET, MPU9150_PATHRESET_ACCEL_RESET_BIT, true);
02123 }
02124 /** Reset temperature sensor signal path.
02125  * The reset will revert the signal path analog to digital converters and
02126  * filters to their power up configurations.
02127  * @see MPU9150_RA_SIGNAL_PATH_RESET
02128  * @see MPU9150_PATHRESET_TEMP_RESET_BIT
02129  */
02130 void MPU9150::resetTemperaturePath() {
02131     I2Cdev::writeBit(devAddr, MPU9150_RA_SIGNAL_PATH_RESET, MPU9150_PATHRESET_TEMP_RESET_BIT, true);
02132 }
02133 
02134 // MOT_DETECT_CTRL register
02135 
02136 /** Get accelerometer power-on delay.
02137  * The accelerometer data path provides samples to the sensor registers, Motion
02138  * detection, Zero Motion detection, and Free Fall detection modules. The
02139  * signal path contains filters which must be flushed on wake-up with new
02140  * samples before the detection modules begin operations. The default wake-up
02141  * delay, of 4ms can be lengthened by up to 3ms. This additional delay is
02142  * specified in ACCEL_ON_DELAY in units of 1 LSB = 1 ms. The user may select
02143  * any value above zero unless instructed otherwise by InvenSense. Please refer
02144  * to Section 8 of the MPU-6000/MPU-9150 Product Specification document for
02145  * further information regarding the detection modules.
02146  * @return Current accelerometer power-on delay
02147  * @see MPU9150_RA_MOT_DETECT_CTRL
02148  * @see MPU9150_DETECT_ACCEL_ON_DELAY_BIT
02149  */
02150 uint8_t MPU9150::getAccelerometerPowerOnDelay() {
02151     I2Cdev::readBits(devAddr, MPU9150_RA_MOT_DETECT_CTRL, MPU9150_DETECT_ACCEL_ON_DELAY_BIT, MPU9150_DETECT_ACCEL_ON_DELAY_LENGTH, buffer);
02152     return buffer[0];
02153 }
02154 /** Set accelerometer power-on delay.
02155  * @param delay New accelerometer power-on delay (0-3)
02156  * @see getAccelerometerPowerOnDelay()
02157  * @see MPU9150_RA_MOT_DETECT_CTRL
02158  * @see MPU9150_DETECT_ACCEL_ON_DELAY_BIT
02159  */
02160 void MPU9150::setAccelerometerPowerOnDelay(uint8_t delay) {
02161     I2Cdev::writeBits(devAddr, MPU9150_RA_MOT_DETECT_CTRL, MPU9150_DETECT_ACCEL_ON_DELAY_BIT, MPU9150_DETECT_ACCEL_ON_DELAY_LENGTH, delay);
02162 }
02163 /** Get Free Fall detection counter decrement configuration.
02164  * Detection is registered by the Free Fall detection module after accelerometer
02165  * measurements meet their respective threshold conditions over a specified
02166  * number of samples. When the threshold conditions are met, the corresponding
02167  * detection counter increments by 1. The user may control the rate at which the
02168  * detection counter decrements when the threshold condition is not met by
02169  * configuring FF_COUNT. The decrement rate can be set according to the
02170  * following table:
02171  *
02172  * <pre>
02173  * FF_COUNT | Counter Decrement
02174  * ---------+------------------
02175  * 0        | Reset
02176  * 1        | 1
02177  * 2        | 2
02178  * 3        | 4
02179  * </pre>
02180  *
02181  * When FF_COUNT is configured to 0 (reset), any non-qualifying sample will
02182  * reset the counter to 0. For further information on Free Fall detection,
02183  * please refer to Registers 29 to 32.
02184  *
02185  * @return Current decrement configuration
02186  * @see MPU9150_RA_MOT_DETECT_CTRL
02187  * @see MPU9150_DETECT_FF_COUNT_BIT
02188  */
02189 uint8_t MPU9150::getFreefallDetectionCounterDecrement() {
02190     I2Cdev::readBits(devAddr, MPU9150_RA_MOT_DETECT_CTRL, MPU9150_DETECT_FF_COUNT_BIT, MPU9150_DETECT_FF_COUNT_LENGTH, buffer);
02191     return buffer[0];
02192 }
02193 /** Set Free Fall detection counter decrement configuration.
02194  * @param decrement New decrement configuration value
02195  * @see getFreefallDetectionCounterDecrement()
02196  * @see MPU9150_RA_MOT_DETECT_CTRL
02197  * @see MPU9150_DETECT_FF_COUNT_BIT
02198  */
02199 void MPU9150::setFreefallDetectionCounterDecrement(uint8_t decrement) {
02200     I2Cdev::writeBits(devAddr, MPU9150_RA_MOT_DETECT_CTRL, MPU9150_DETECT_FF_COUNT_BIT, MPU9150_DETECT_FF_COUNT_LENGTH, decrement);
02201 }
02202 /** Get Motion detection counter decrement configuration.
02203  * Detection is registered by the Motion detection module after accelerometer
02204  * measurements meet their respective threshold conditions over a specified
02205  * number of samples. When the threshold conditions are met, the corresponding
02206  * detection counter increments by 1. The user may control the rate at which the
02207  * detection counter decrements when the threshold condition is not met by
02208  * configuring MOT_COUNT. The decrement rate can be set according to the
02209  * following table:
02210  *
02211  * <pre>
02212  * MOT_COUNT | Counter Decrement
02213  * ----------+------------------
02214  * 0         | Reset
02215  * 1         | 1
02216  * 2         | 2
02217  * 3         | 4
02218  * </pre>
02219  *
02220  * When MOT_COUNT is configured to 0 (reset), any non-qualifying sample will
02221  * reset the counter to 0. For further information on Motion detection,
02222  * please refer to Registers 29 to 32.
02223  *
02224  */
02225 uint8_t MPU9150::getMotionDetectionCounterDecrement() {
02226     I2Cdev::readBits(devAddr, MPU9150_RA_MOT_DETECT_CTRL, MPU9150_DETECT_MOT_COUNT_BIT, MPU9150_DETECT_MOT_COUNT_LENGTH, buffer);
02227     return buffer[0];
02228 }
02229 /** Set Motion detection counter decrement configuration.
02230  * @param decrement New decrement configuration value
02231  * @see getMotionDetectionCounterDecrement()
02232  * @see MPU9150_RA_MOT_DETECT_CTRL
02233  * @see MPU9150_DETECT_MOT_COUNT_BIT
02234  */
02235 void MPU9150::setMotionDetectionCounterDecrement(uint8_t decrement) {
02236     I2Cdev::writeBits(devAddr, MPU9150_RA_MOT_DETECT_CTRL, MPU9150_DETECT_MOT_COUNT_BIT, MPU9150_DETECT_MOT_COUNT_LENGTH, decrement);
02237 }
02238 
02239 // USER_CTRL register
02240 
02241 /** Get FIFO enabled status.
02242  * When this bit is set to 0, the FIFO buffer is disabled. The FIFO buffer
02243  * cannot be written to or read from while disabled. The FIFO buffer's state
02244  * does not change unless the MPU-60X0 is power cycled.
02245  * @return Current FIFO enabled status
02246  * @see MPU9150_RA_USER_CTRL
02247  * @see MPU9150_USERCTRL_FIFO_EN_BIT
02248  */
02249 bool MPU9150::getFIFOEnabled() {
02250     I2Cdev::readBit(devAddr, MPU9150_RA_USER_CTRL, MPU9150_USERCTRL_FIFO_EN_BIT, buffer);
02251     return buffer[0];
02252 }
02253 /** Set FIFO enabled status.
02254  * @param enabled New FIFO enabled status
02255  * @see getFIFOEnabled()
02256  * @see MPU9150_RA_USER_CTRL
02257  * @see MPU9150_USERCTRL_FIFO_EN_BIT
02258  */
02259 void MPU9150::setFIFOEnabled(bool enabled) {
02260     I2Cdev::writeBit(devAddr, MPU9150_RA_USER_CTRL, MPU9150_USERCTRL_FIFO_EN_BIT, enabled);
02261 }
02262 /** Get I2C Master Mode enabled status.
02263  * When this mode is enabled, the MPU-60X0 acts as the I2C Master to the
02264  * external sensor slave devices on the auxiliary I2C bus. When this bit is
02265  * cleared to 0, the auxiliary I2C bus lines (AUX_DA and AUX_CL) are logically
02266  * driven by the primary I2C bus (SDA and SCL). This is a precondition to
02267  * enabling Bypass Mode. For further information regarding Bypass Mode, please
02268  * refer to Register 55.
02269  * @return Current I2C Master Mode enabled status
02270  * @see MPU9150_RA_USER_CTRL
02271  * @see MPU9150_USERCTRL_I2C_MST_EN_BIT
02272  */
02273 bool MPU9150::getI2CMasterModeEnabled() {
02274     I2Cdev::readBit(devAddr, MPU9150_RA_USER_CTRL, MPU9150_USERCTRL_I2C_MST_EN_BIT, buffer);
02275     return buffer[0];
02276 }
02277 /** Set I2C Master Mode enabled status.
02278  * @param enabled New I2C Master Mode enabled status
02279  * @see getI2CMasterModeEnabled()
02280  * @see MPU9150_RA_USER_CTRL
02281  * @see MPU9150_USERCTRL_I2C_MST_EN_BIT
02282  */
02283 void MPU9150::setI2CMasterModeEnabled(bool enabled) {
02284     I2Cdev::writeBit(devAddr, MPU9150_RA_USER_CTRL, MPU9150_USERCTRL_I2C_MST_EN_BIT, enabled);
02285 }
02286 /** Switch from I2C to SPI mode (MPU-6000 only)
02287  * If this is set, the primary SPI interface will be enabled in place of the
02288  * disabled primary I2C interface.
02289  */
02290 void MPU9150::switchSPIEnabled(bool enabled) {
02291     I2Cdev::writeBit(devAddr, MPU9150_RA_USER_CTRL, MPU9150_USERCTRL_I2C_IF_DIS_BIT, enabled);
02292 }
02293 /** Reset the FIFO.
02294  * This bit resets the FIFO buffer when set to 1 while FIFO_EN equals 0. This
02295  * bit automatically clears to 0 after the reset has been triggered.
02296  * @see MPU9150_RA_USER_CTRL
02297  * @see MPU9150_USERCTRL_FIFO_RESET_BIT
02298  */
02299 void MPU9150::resetFIFO() {
02300     I2Cdev::writeBit(devAddr, MPU9150_RA_USER_CTRL, MPU9150_USERCTRL_FIFO_RESET_BIT, true);
02301 }
02302 /** Reset the I2C Master.
02303  * This bit resets the I2C Master when set to 1 while I2C_MST_EN equals 0.
02304  * This bit automatically clears to 0 after the reset has been triggered.
02305  * @see MPU9150_RA_USER_CTRL
02306  * @see MPU9150_USERCTRL_I2C_MST_RESET_BIT
02307  */
02308 void MPU9150::resetI2CMaster() {
02309     I2Cdev::writeBit(devAddr, MPU9150_RA_USER_CTRL, MPU9150_USERCTRL_I2C_MST_RESET_BIT, true);
02310 }
02311 /** Reset all sensor registers and signal paths.
02312  * When set to 1, this bit resets the signal paths for all sensors (gyroscopes,
02313  * accelerometers, and temperature sensor). This operation will also clear the
02314  * sensor registers. This bit automatically clears to 0 after the reset has been
02315  * triggered.
02316  *
02317  * When resetting only the signal path (and not the sensor registers), please
02318  * use Register 104, SIGNAL_PATH_RESET.
02319  *
02320  * @see MPU9150_RA_USER_CTRL
02321  * @see MPU9150_USERCTRL_SIG_COND_RESET_BIT
02322  */
02323 void MPU9150::resetSensors() {
02324     I2Cdev::writeBit(devAddr, MPU9150_RA_USER_CTRL, MPU9150_USERCTRL_SIG_COND_RESET_BIT, true);
02325 }
02326 
02327 // PWR_MGMT_1 register
02328 
02329 /** Trigger a full device reset.
02330  * A small delay of ~50ms may be desirable after triggering a reset.
02331  * @see MPU9150_RA_PWR_MGMT_1
02332  * @see MPU9150_PWR1_DEVICE_RESET_BIT
02333  */
02334 void MPU9150::reset() {
02335     I2Cdev::writeBit(devAddr, MPU9150_RA_PWR_MGMT_1, MPU9150_PWR1_DEVICE_RESET_BIT, true);
02336 }
02337 /** Get sleep mode status.
02338  * Setting the SLEEP bit in the register puts the device into very low power
02339  * sleep mode. In this mode, only the serial interface and internal registers
02340  * remain active, allowing for a very low standby current. Clearing this bit
02341  * puts the device back into normal mode. To save power, the individual standby
02342  * selections for each of the gyros should be used if any gyro axis is not used
02343  * by the application.
02344  * @return Current sleep mode enabled status
02345  * @see MPU9150_RA_PWR_MGMT_1
02346  * @see MPU9150_PWR1_SLEEP_BIT
02347  */
02348 bool MPU9150::getSleepEnabled() {
02349     I2Cdev::readBit(devAddr, MPU9150_RA_PWR_MGMT_1, MPU9150_PWR1_SLEEP_BIT, buffer);
02350     return buffer[0];
02351 }
02352 /** Set sleep mode status.
02353  * @param enabled New sleep mode enabled status
02354  * @see getSleepEnabled()
02355  * @see MPU9150_RA_PWR_MGMT_1
02356  * @see MPU9150_PWR1_SLEEP_BIT
02357  */
02358 void MPU9150::setSleepEnabled(bool enabled) {
02359     I2Cdev::writeBit(devAddr, MPU9150_RA_PWR_MGMT_1, MPU9150_PWR1_SLEEP_BIT, enabled);
02360 }
02361 /** Get wake cycle enabled status.
02362  * When this bit is set to 1 and SLEEP is disabled, the MPU-60X0 will cycle
02363  * between sleep mode and waking up to take a single sample of data from active
02364  * sensors at a rate determined by LP_WAKE_CTRL (register 108).
02365  * @return Current sleep mode enabled status
02366  * @see MPU9150_RA_PWR_MGMT_1
02367  * @see MPU9150_PWR1_CYCLE_BIT
02368  */
02369 bool MPU9150::getWakeCycleEnabled() {
02370     I2Cdev::readBit(devAddr, MPU9150_RA_PWR_MGMT_1, MPU9150_PWR1_CYCLE_BIT, buffer);
02371     return buffer[0];
02372 }
02373 /** Set wake cycle enabled status.
02374  * @param enabled New sleep mode enabled status
02375  * @see getWakeCycleEnabled()
02376  * @see MPU9150_RA_PWR_MGMT_1
02377  * @see MPU9150_PWR1_CYCLE_BIT
02378  */
02379 void MPU9150::setWakeCycleEnabled(bool enabled) {
02380     I2Cdev::writeBit(devAddr, MPU9150_RA_PWR_MGMT_1, MPU9150_PWR1_CYCLE_BIT, enabled);
02381 }
02382 /** Get temperature sensor enabled status.
02383  * Control the usage of the internal temperature sensor.
02384  *
02385  * Note: this register stores the *disabled* value, but for consistency with the
02386  * rest of the code, the function is named and used with standard true/false
02387  * values to indicate whether the sensor is enabled or disabled, respectively.
02388  *
02389  * @return Current temperature sensor enabled status
02390  * @see MPU9150_RA_PWR_MGMT_1
02391  * @see MPU9150_PWR1_TEMP_DIS_BIT
02392  */
02393 bool MPU9150::getTempSensorEnabled() {
02394     I2Cdev::readBit(devAddr, MPU9150_RA_PWR_MGMT_1, MPU9150_PWR1_TEMP_DIS_BIT, buffer);
02395     return buffer[0] == 0; // 1 is actually disabled here
02396 }
02397 /** Set temperature sensor enabled status.
02398  * Note: this register stores the *disabled* value, but for consistency with the
02399  * rest of the code, the function is named and used with standard true/false
02400  * values to indicate whether the sensor is enabled or disabled, respectively.
02401  *
02402  * @param enabled New temperature sensor enabled status
02403  * @see getTempSensorEnabled()
02404  * @see MPU9150_RA_PWR_MGMT_1
02405  * @see MPU9150_PWR1_TEMP_DIS_BIT
02406  */
02407 void MPU9150::setTempSensorEnabled(bool enabled) {
02408     // 1 is actually disabled here
02409     I2Cdev::writeBit(devAddr, MPU9150_RA_PWR_MGMT_1, MPU9150_PWR1_TEMP_DIS_BIT, !enabled);
02410 }
02411 /** Get clock source setting.
02412  * @return Current clock source setting
02413  * @see MPU9150_RA_PWR_MGMT_1
02414  * @see MPU9150_PWR1_CLKSEL_BIT
02415  * @see MPU9150_PWR1_CLKSEL_LENGTH
02416  */
02417 uint8_t MPU9150::getClockSource() {
02418     I2Cdev::readBits(devAddr, MPU9150_RA_PWR_MGMT_1, MPU9150_PWR1_CLKSEL_BIT, MPU9150_PWR1_CLKSEL_LENGTH, buffer);
02419     return buffer[0];
02420 }
02421 /** Set clock source setting.
02422  * An internal 8MHz oscillator, gyroscope based clock, or external sources can
02423  * be selected as the MPU-60X0 clock source. When the internal 8 MHz oscillator
02424  * or an external source is chosen as the clock source, the MPU-60X0 can operate
02425  * in low power modes with the gyroscopes disabled.
02426  *
02427  * Upon power up, the MPU-60X0 clock source defaults to the internal oscillator.
02428  * However, it is highly recommended that the device be configured to use one of
02429  * the gyroscopes (or an external clock source) as the clock reference for
02430  * improved stability. The clock source can be selected according to the following table:
02431  *
02432  * <pre>
02433  * CLK_SEL | Clock Source
02434  * --------+--------------------------------------
02435  * 0       | Internal oscillator
02436  * 1       | PLL with X Gyro reference
02437  * 2       | PLL with Y Gyro reference
02438  * 3       | PLL with Z Gyro reference
02439  * 4       | PLL with external 32.768kHz reference
02440  * 5       | PLL with external 19.2MHz reference
02441  * 6       | Reserved
02442  * 7       | Stops the clock and keeps the timing generator in reset
02443  * </pre>
02444  *
02445  * @param source New clock source setting
02446  * @see getClockSource()
02447  * @see MPU9150_RA_PWR_MGMT_1
02448  * @see MPU9150_PWR1_CLKSEL_BIT
02449  * @see MPU9150_PWR1_CLKSEL_LENGTH
02450  */
02451 void MPU9150::setClockSource(uint8_t source) {
02452     I2Cdev::writeBits(devAddr, MPU9150_RA_PWR_MGMT_1, MPU9150_PWR1_CLKSEL_BIT, MPU9150_PWR1_CLKSEL_LENGTH, source);
02453 }
02454 
02455 // PWR_MGMT_2 register
02456 
02457 /** Get wake frequency in Accel-Only Low Power Mode.
02458  * The MPU-60X0 can be put into Accerlerometer Only Low Power Mode by setting
02459  * PWRSEL to 1 in the Power Management 1 register (Register 107). In this mode,
02460  * the device will power off all devices except for the primary I2C interface,
02461  * waking only the accelerometer at fixed intervals to take a single
02462  * measurement. The frequency of wake-ups can be configured with LP_WAKE_CTRL
02463  * as shown below:
02464  *
02465  * <pre>
02466  * LP_WAKE_CTRL | Wake-up Frequency
02467  * -------------+------------------
02468  * 0            | 1.25 Hz
02469  * 1            | 2.5 Hz
02470  * 2            | 5 Hz
02471  * 3            | 10 Hz
02472  * <pre>
02473  *
02474  * For further information regarding the MPU-60X0's power modes, please refer to
02475  * Register 107.
02476  *
02477  * @return Current wake frequency
02478  * @see MPU9150_RA_PWR_MGMT_2
02479  */
02480 uint8_t MPU9150::getWakeFrequency() {
02481     I2Cdev::readBits(devAddr, MPU9150_RA_PWR_MGMT_2, MPU9150_PWR2_LP_WAKE_CTRL_BIT, MPU9150_PWR2_LP_WAKE_CTRL_LENGTH, buffer);
02482     return buffer[0];
02483 }
02484 /** Set wake frequency in Accel-Only Low Power Mode.
02485  * @param frequency New wake frequency
02486  * @see MPU9150_RA_PWR_MGMT_2
02487  */
02488 void MPU9150::setWakeFrequency(uint8_t frequency) {
02489     I2Cdev::writeBits(devAddr, MPU9150_RA_PWR_MGMT_2, MPU9150_PWR2_LP_WAKE_CTRL_BIT, MPU9150_PWR2_LP_WAKE_CTRL_LENGTH, frequency);
02490 }
02491 
02492 /** Get X-axis accelerometer standby enabled status.
02493  * If enabled, the X-axis will not gather or report data (or use power).
02494  * @return Current X-axis standby enabled status
02495  * @see MPU9150_RA_PWR_MGMT_2
02496  * @see MPU9150_PWR2_STBY_XA_BIT
02497  */
02498 bool MPU9150::getStandbyXAccelEnabled() {
02499     I2Cdev::readBit(devAddr, MPU9150_RA_PWR_MGMT_2, MPU9150_PWR2_STBY_XA_BIT, buffer);
02500     return buffer[0];
02501 }
02502 /** Set X-axis accelerometer standby enabled status.
02503  * @param New X-axis standby enabled status
02504  * @see getStandbyXAccelEnabled()
02505  * @see MPU9150_RA_PWR_MGMT_2
02506  * @see MPU9150_PWR2_STBY_XA_BIT
02507  */
02508 void MPU9150::setStandbyXAccelEnabled(bool enabled) {
02509     I2Cdev::writeBit(devAddr, MPU9150_RA_PWR_MGMT_2, MPU9150_PWR2_STBY_XA_BIT, enabled);
02510 }
02511 /** Get Y-axis accelerometer standby enabled status.
02512  * If enabled, the Y-axis will not gather or report data (or use power).
02513  * @return Current Y-axis standby enabled status
02514  * @see MPU9150_RA_PWR_MGMT_2
02515  * @see MPU9150_PWR2_STBY_YA_BIT
02516  */
02517 bool MPU9150::getStandbyYAccelEnabled() {
02518     I2Cdev::readBit(devAddr, MPU9150_RA_PWR_MGMT_2, MPU9150_PWR2_STBY_YA_BIT, buffer);
02519     return buffer[0];
02520 }
02521 /** Set Y-axis accelerometer standby enabled status.
02522  * @param New Y-axis standby enabled status
02523  * @see getStandbyYAccelEnabled()
02524  * @see MPU9150_RA_PWR_MGMT_2
02525  * @see MPU9150_PWR2_STBY_YA_BIT
02526  */
02527 void MPU9150::setStandbyYAccelEnabled(bool enabled) {
02528     I2Cdev::writeBit(devAddr, MPU9150_RA_PWR_MGMT_2, MPU9150_PWR2_STBY_YA_BIT, enabled);
02529 }
02530 /** Get Z-axis accelerometer standby enabled status.
02531  * If enabled, the Z-axis will not gather or report data (or use power).
02532  * @return Current Z-axis standby enabled status
02533  * @see MPU9150_RA_PWR_MGMT_2
02534  * @see MPU9150_PWR2_STBY_ZA_BIT
02535  */
02536 bool MPU9150::getStandbyZAccelEnabled() {
02537     I2Cdev::readBit(devAddr, MPU9150_RA_PWR_MGMT_2, MPU9150_PWR2_STBY_ZA_BIT, buffer);
02538     return buffer[0];
02539 }
02540 /** Set Z-axis accelerometer standby enabled status.
02541  * @param New Z-axis standby enabled status
02542  * @see getStandbyZAccelEnabled()
02543  * @see MPU9150_RA_PWR_MGMT_2
02544  * @see MPU9150_PWR2_STBY_ZA_BIT
02545  */
02546 void MPU9150::setStandbyZAccelEnabled(bool enabled) {
02547     I2Cdev::writeBit(devAddr, MPU9150_RA_PWR_MGMT_2, MPU9150_PWR2_STBY_ZA_BIT, enabled);
02548 }
02549 /** Get X-axis gyroscope standby enabled status.
02550  * If enabled, the X-axis will not gather or report data (or use power).
02551  * @return Current X-axis standby enabled status
02552  * @see MPU9150_RA_PWR_MGMT_2
02553  * @see MPU9150_PWR2_STBY_XG_BIT
02554  */
02555 bool MPU9150::getStandbyXGyroEnabled() {
02556     I2Cdev::readBit(devAddr, MPU9150_RA_PWR_MGMT_2, MPU9150_PWR2_STBY_XG_BIT, buffer);
02557     return buffer[0];
02558 }
02559 /** Set X-axis gyroscope standby enabled status.
02560  * @param New X-axis standby enabled status
02561  * @see getStandbyXGyroEnabled()
02562  * @see MPU9150_RA_PWR_MGMT_2
02563  * @see MPU9150_PWR2_STBY_XG_BIT
02564  */
02565 void MPU9150::setStandbyXGyroEnabled(bool enabled) {
02566     I2Cdev::writeBit(devAddr, MPU9150_RA_PWR_MGMT_2, MPU9150_PWR2_STBY_XG_BIT, enabled);
02567 }
02568 /** Get Y-axis gyroscope standby enabled status.
02569  * If enabled, the Y-axis will not gather or report data (or use power).
02570  * @return Current Y-axis standby enabled status
02571  * @see MPU9150_RA_PWR_MGMT_2
02572  * @see MPU9150_PWR2_STBY_YG_BIT
02573  */
02574 bool MPU9150::getStandbyYGyroEnabled() {
02575     I2Cdev::readBit(devAddr, MPU9150_RA_PWR_MGMT_2, MPU9150_PWR2_STBY_YG_BIT, buffer);
02576     return buffer[0];
02577 }
02578 /** Set Y-axis gyroscope standby enabled status.
02579  * @param New Y-axis standby enabled status
02580  * @see getStandbyYGyroEnabled()
02581  * @see MPU9150_RA_PWR_MGMT_2
02582  * @see MPU9150_PWR2_STBY_YG_BIT
02583  */
02584 void MPU9150::setStandbyYGyroEnabled(bool enabled) {
02585     I2Cdev::writeBit(devAddr, MPU9150_RA_PWR_MGMT_2, MPU9150_PWR2_STBY_YG_BIT, enabled);
02586 }
02587 /** Get Z-axis gyroscope standby enabled status.
02588  * If enabled, the Z-axis will not gather or report data (or use power).
02589  * @return Current Z-axis standby enabled status
02590  * @see MPU9150_RA_PWR_MGMT_2
02591  * @see MPU9150_PWR2_STBY_ZG_BIT
02592  */
02593 bool MPU9150::getStandbyZGyroEnabled() {
02594     I2Cdev::readBit(devAddr, MPU9150_RA_PWR_MGMT_2, MPU9150_PWR2_STBY_ZG_BIT, buffer);
02595     return buffer[0];
02596 }
02597 /** Set Z-axis gyroscope standby enabled status.
02598  * @param New Z-axis standby enabled status
02599  * @see getStandbyZGyroEnabled()
02600  * @see MPU9150_RA_PWR_MGMT_2
02601  * @see MPU9150_PWR2_STBY_ZG_BIT
02602  */
02603 void MPU9150::setStandbyZGyroEnabled(bool enabled) {
02604     I2Cdev::writeBit(devAddr, MPU9150_RA_PWR_MGMT_2, MPU9150_PWR2_STBY_ZG_BIT, enabled);
02605 }
02606 
02607 // FIFO_COUNT* registers
02608 
02609 /** Get current FIFO buffer size.
02610  * This value indicates the number of bytes stored in the FIFO buffer. This
02611  * number is in turn the number of bytes that can be read from the FIFO buffer
02612  * and it is directly proportional to the number of samples available given the
02613  * set of sensor data bound to be stored in the FIFO (register 35 and 36).
02614  * @return Current FIFO buffer size
02615  */
02616 uint16_t MPU9150::getFIFOCount() {
02617     I2Cdev::readBytes(devAddr, MPU9150_RA_FIFO_COUNTH, 2, buffer);
02618     return (((uint16_t)buffer[0]) << 8) | buffer[1];
02619 }
02620 
02621 // FIFO_R_W register
02622 
02623 /** Get byte from FIFO buffer.
02624  * This register is used to read and write data from the FIFO buffer. Data is
02625  * written to the FIFO in order of register number (from lowest to highest). If
02626  * all the FIFO enable flags (see below) are enabled and all External Sensor
02627  * Data registers (Registers 73 to 96) are associated with a Slave device, the
02628  * contents of registers 59 through 96 will be written in order at the Sample
02629  * Rate.
02630  *
02631  * The contents of the sensor data registers (Registers 59 to 96) are written
02632  * into the FIFO buffer when their corresponding FIFO enable flags are set to 1
02633  * in FIFO_EN (Register 35). An additional flag for the sensor data registers
02634  * associated with I2C Slave 3 can be found in I2C_MST_CTRL (Register 36).
02635  *
02636  * If the FIFO buffer has overflowed, the status bit FIFO_OFLOW_INT is
02637  * automatically set to 1. This bit is located in INT_STATUS (Register 58).
02638  * When the FIFO buffer has overflowed, the oldest data will be lost and new
02639  * data will be written to the FIFO.
02640  *
02641  * If the FIFO buffer is empty, reading this register will return the last byte
02642  * that was previously read from the FIFO until new data is available. The user
02643  * should check FIFO_COUNT to ensure that the FIFO buffer is not read when
02644  * empty.
02645  *
02646  * @return Byte from FIFO buffer
02647  */
02648 uint8_t MPU9150::getFIFOByte() {
02649     I2Cdev::readByte(devAddr, MPU9150_RA_FIFO_R_W, buffer);
02650     return buffer[0];
02651 }
02652 void MPU9150::getFIFOBytes(uint8_t *data, uint8_t length) {
02653     I2Cdev::readBytes(devAddr, MPU9150_RA_FIFO_R_W, length, data);
02654 }
02655 /** Write byte to FIFO buffer.
02656  * @see getFIFOByte()
02657  * @see MPU9150_RA_FIFO_R_W
02658  */
02659 void MPU9150::setFIFOByte(uint8_t data) {
02660     I2Cdev::writeByte(devAddr, MPU9150_RA_FIFO_R_W, data);
02661 }
02662 
02663 // WHO_AM_I register
02664 
02665 /** Get Device ID.
02666  * This register is used to verify the identity of the device (0b110100, 0x34).
02667  * @return Device ID (6 bits only! should be 0x34)
02668  * @see MPU9150_RA_WHO_AM_I
02669  * @see MPU9150_WHO_AM_I_BIT
02670  * @see MPU9150_WHO_AM_I_LENGTH
02671  */
02672 uint8_t MPU9150::getDeviceID() {
02673     I2Cdev::readBits(devAddr, MPU9150_RA_WHO_AM_I, MPU9150_WHO_AM_I_BIT, MPU9150_WHO_AM_I_LENGTH, buffer);
02674     return buffer[0];
02675 }
02676 /** Set Device ID.
02677  * Write a new ID into the WHO_AM_I register (no idea why this should ever be
02678  * necessary though).
02679  * @param id New device ID to set.
02680  * @see getDeviceID()
02681  * @see MPU9150_RA_WHO_AM_I
02682  * @see MPU9150_WHO_AM_I_BIT
02683  * @see MPU9150_WHO_AM_I_LENGTH
02684  */
02685 void MPU9150::setDeviceID(uint8_t id) {
02686     I2Cdev::writeBits(devAddr, MPU9150_RA_WHO_AM_I, MPU9150_WHO_AM_I_BIT, MPU9150_WHO_AM_I_LENGTH, id);
02687 }
02688 
02689 // ======== UNDOCUMENTED/DMP REGISTERS/METHODS ========
02690 
02691 // XG_OFFS_TC register
02692 
02693 uint8_t MPU9150::getOTPBankValid() {
02694     I2Cdev::readBit(devAddr, MPU9150_RA_XG_OFFS_TC, MPU9150_TC_OTP_BNK_VLD_BIT, buffer);
02695     return buffer[0];
02696 }
02697 void MPU9150::setOTPBankValid(bool enabled) {
02698     I2Cdev::writeBit(devAddr, MPU9150_RA_XG_OFFS_TC, MPU9150_TC_OTP_BNK_VLD_BIT, enabled);
02699 }
02700 int8_t MPU9150::getXGyroOffsetTC() {
02701     I2Cdev::readBits(devAddr, MPU9150_RA_XG_OFFS_TC, MPU9150_TC_OFFSET_BIT, MPU9150_TC_OFFSET_LENGTH, buffer);
02702     return buffer[0];
02703 }
02704 void MPU9150::setXGyroOffsetTC(int8_t offset) {
02705     I2Cdev::writeBits(devAddr, MPU9150_RA_XG_OFFS_TC, MPU9150_TC_OFFSET_BIT, MPU9150_TC_OFFSET_LENGTH, offset);
02706 }
02707 
02708 // YG_OFFS_TC register
02709 
02710 int8_t MPU9150::getYGyroOffsetTC() {
02711     I2Cdev::readBits(devAddr, MPU9150_RA_YG_OFFS_TC, MPU9150_TC_OFFSET_BIT, MPU9150_TC_OFFSET_LENGTH, buffer);
02712     return buffer[0];
02713 }
02714 void MPU9150::setYGyroOffsetTC(int8_t offset) {
02715     I2Cdev::writeBits(devAddr, MPU9150_RA_YG_OFFS_TC, MPU9150_TC_OFFSET_BIT, MPU9150_TC_OFFSET_LENGTH, offset);
02716 }
02717 
02718 // ZG_OFFS_TC register
02719 
02720 int8_t MPU9150::getZGyroOffsetTC() {
02721     I2Cdev::readBits(devAddr, MPU9150_RA_ZG_OFFS_TC, MPU9150_TC_OFFSET_BIT, MPU9150_TC_OFFSET_LENGTH, buffer);
02722     return buffer[0];
02723 }
02724 void MPU9150::setZGyroOffsetTC(int8_t offset) {
02725     I2Cdev::writeBits(devAddr, MPU9150_RA_ZG_OFFS_TC, MPU9150_TC_OFFSET_BIT, MPU9150_TC_OFFSET_LENGTH, offset);
02726 }
02727 
02728 // X_FINE_GAIN register
02729 
02730 int8_t MPU9150::getXFineGain() {
02731     I2Cdev::readByte(devAddr, MPU9150_RA_X_FINE_GAIN, buffer);
02732     return buffer[0];
02733 }
02734 void MPU9150::setXFineGain(int8_t gain) {
02735     I2Cdev::writeByte(devAddr, MPU9150_RA_X_FINE_GAIN, gain);
02736 }
02737 
02738 // Y_FINE_GAIN register
02739 
02740 int8_t MPU9150::getYFineGain() {
02741     I2Cdev::readByte(devAddr, MPU9150_RA_Y_FINE_GAIN, buffer);
02742     return buffer[0];
02743 }
02744 void MPU9150::setYFineGain(int8_t gain) {
02745     I2Cdev::writeByte(devAddr, MPU9150_RA_Y_FINE_GAIN, gain);
02746 }
02747 
02748 // Z_FINE_GAIN register
02749 
02750 int8_t MPU9150::getZFineGain() {
02751     I2Cdev::readByte(devAddr, MPU9150_RA_Z_FINE_GAIN, buffer);
02752     return buffer[0];
02753 }
02754 void MPU9150::setZFineGain(int8_t gain) {
02755     I2Cdev::writeByte(devAddr, MPU9150_RA_Z_FINE_GAIN, gain);
02756 }
02757 
02758 // XA_OFFS_* registers
02759 
02760 int16_t MPU9150::getXAccelOffset() {
02761     I2Cdev::readBytes(devAddr, MPU9150_RA_XA_OFFS_H, 2, buffer);
02762     return (((int16_t)buffer[0]) << 8) | buffer[1];
02763 }
02764 void MPU9150::setXAccelOffset(int16_t offset) {
02765     I2Cdev::writeWord(devAddr, MPU9150_RA_XA_OFFS_H, offset);
02766 }
02767 
02768 // YA_OFFS_* register
02769 
02770 int16_t MPU9150::getYAccelOffset() {
02771     I2Cdev::readBytes(devAddr, MPU9150_RA_YA_OFFS_H, 2, buffer);
02772     return (((int16_t)buffer[0]) << 8) | buffer[1];
02773 }
02774 void MPU9150::setYAccelOffset(int16_t offset) {
02775     I2Cdev::writeWord(devAddr, MPU9150_RA_YA_OFFS_H, offset);
02776 }
02777 
02778 // ZA_OFFS_* register
02779 
02780 int16_t MPU9150::getZAccelOffset() {
02781     I2Cdev::readBytes(devAddr, MPU9150_RA_ZA_OFFS_H, 2, buffer);
02782     return (((int16_t)buffer[0]) << 8) | buffer[1];
02783 }
02784 void MPU9150::setZAccelOffset(int16_t offset) {
02785     I2Cdev::writeWord(devAddr, MPU9150_RA_ZA_OFFS_H, offset);
02786 }
02787 
02788 // XG_OFFS_USR* registers
02789 
02790 int16_t MPU9150::getXGyroOffset() {
02791     I2Cdev::readBytes(devAddr, MPU9150_RA_XG_OFFS_USRH, 2, buffer);
02792     return (((int16_t)buffer[0]) << 8) | buffer[1];
02793 }
02794 void MPU9150::setXGyroOffset(int16_t offset) {
02795     I2Cdev::writeWord(devAddr, MPU9150_RA_XG_OFFS_USRH, offset);
02796 }
02797 
02798 // YG_OFFS_USR* register
02799 
02800 int16_t MPU9150::getYGyroOffset() {
02801     I2Cdev::readBytes(devAddr, MPU9150_RA_YG_OFFS_USRH, 2, buffer);
02802     return (((int16_t)buffer[0]) << 8) | buffer[1];
02803 }
02804 void MPU9150::setYGyroOffset(int16_t offset) {
02805     I2Cdev::writeWord(devAddr, MPU9150_RA_YG_OFFS_USRH, offset);
02806 }
02807 
02808 // ZG_OFFS_USR* register
02809 
02810 int16_t MPU9150::getZGyroOffset() {
02811     I2Cdev::readBytes(devAddr, MPU9150_RA_ZG_OFFS_USRH, 2, buffer);
02812     return (((int16_t)buffer[0]) << 8) | buffer[1];
02813 }
02814 void MPU9150::setZGyroOffset(int16_t offset) {
02815     I2Cdev::writeWord(devAddr, MPU9150_RA_ZG_OFFS_USRH, offset);
02816 }
02817 
02818 // INT_ENABLE register (DMP functions)
02819 
02820 bool MPU9150::getIntPLLReadyEnabled() {
02821     I2Cdev::readBit(devAddr, MPU9150_RA_INT_ENABLE, MPU9150_INTERRUPT_PLL_RDY_INT_BIT, buffer);
02822     return buffer[0];
02823 }
02824 void MPU9150::setIntPLLReadyEnabled(bool enabled) {
02825     I2Cdev::writeBit(devAddr, MPU9150_RA_INT_ENABLE, MPU9150_INTERRUPT_PLL_RDY_INT_BIT, enabled);
02826 }
02827 bool MPU9150::getIntDMPEnabled() {
02828     I2Cdev::readBit(devAddr, MPU9150_RA_INT_ENABLE, MPU9150_INTERRUPT_DMP_INT_BIT, buffer);
02829     return buffer[0];
02830 }
02831 void MPU9150::setIntDMPEnabled(bool enabled) {
02832     I2Cdev::writeBit(devAddr, MPU9150_RA_INT_ENABLE, MPU9150_INTERRUPT_DMP_INT_BIT, enabled);
02833 }
02834 
02835 // DMP_INT_STATUS
02836 
02837 bool MPU9150::getDMPInt5Status() {
02838     I2Cdev::readBit(devAddr, MPU9150_RA_DMP_INT_STATUS, MPU9150_DMPINT_5_BIT, buffer);
02839     return buffer[0];
02840 }
02841 bool MPU9150::getDMPInt4Status() {
02842     I2Cdev::readBit(devAddr, MPU9150_RA_DMP_INT_STATUS, MPU9150_DMPINT_4_BIT, buffer);
02843     return buffer[0];
02844 }
02845 bool MPU9150::getDMPInt3Status() {
02846     I2Cdev::readBit(devAddr, MPU9150_RA_DMP_INT_STATUS, MPU9150_DMPINT_3_BIT, buffer);
02847     return buffer[0];
02848 }
02849 bool MPU9150::getDMPInt2Status() {
02850     I2Cdev::readBit(devAddr, MPU9150_RA_DMP_INT_STATUS, MPU9150_DMPINT_2_BIT, buffer);
02851     return buffer[0];
02852 }
02853 bool MPU9150::getDMPInt1Status() {
02854     I2Cdev::readBit(devAddr, MPU9150_RA_DMP_INT_STATUS, MPU9150_DMPINT_1_BIT, buffer);
02855     return buffer[0];
02856 }
02857 bool MPU9150::getDMPInt0Status() {
02858     I2Cdev::readBit(devAddr, MPU9150_RA_DMP_INT_STATUS, MPU9150_DMPINT_0_BIT, buffer);
02859     return buffer[0];
02860 }
02861 
02862 // INT_STATUS register (DMP functions)
02863 
02864 bool MPU9150::getIntPLLReadyStatus() {
02865     I2Cdev::readBit(devAddr, MPU9150_RA_INT_STATUS, MPU9150_INTERRUPT_PLL_RDY_INT_BIT, buffer);
02866     return buffer[0];
02867 }
02868 bool MPU9150::getIntDMPStatus() {
02869     I2Cdev::readBit(devAddr, MPU9150_RA_INT_STATUS, MPU9150_INTERRUPT_DMP_INT_BIT, buffer);
02870     return buffer[0];
02871 }
02872 
02873 // USER_CTRL register (DMP functions)
02874 
02875 bool MPU9150::getDMPEnabled() {
02876     I2Cdev::readBit(devAddr, MPU9150_RA_USER_CTRL, MPU9150_USERCTRL_DMP_EN_BIT, buffer);
02877     return buffer[0];
02878 }
02879 void MPU9150::setDMPEnabled(bool enabled) {
02880     I2Cdev::writeBit(devAddr, MPU9150_RA_USER_CTRL, MPU9150_USERCTRL_DMP_EN_BIT, enabled);
02881 }
02882 void MPU9150::resetDMP() {
02883     I2Cdev::writeBit(devAddr, MPU9150_RA_USER_CTRL, MPU9150_USERCTRL_DMP_RESET_BIT, true);
02884 }
02885 
02886 // BANK_SEL register
02887 
02888 void MPU9150::setMemoryBank(uint8_t bank, bool prefetchEnabled, bool userBank) {
02889     bank &= 0x1F;
02890     if (userBank) bank |= 0x20;
02891     if (prefetchEnabled) bank |= 0x40;
02892     I2Cdev::writeByte(devAddr, MPU9150_RA_BANK_SEL, bank);
02893 }
02894 
02895 // MEM_START_ADDR register
02896 
02897 void MPU9150::setMemoryStartAddress(uint8_t address) {
02898     I2Cdev::writeByte(devAddr, MPU9150_RA_MEM_START_ADDR, address);
02899 }
02900 
02901 // MEM_R_W register
02902 
02903 uint8_t MPU9150::readMemoryByte() {
02904     I2Cdev::readByte(devAddr, MPU9150_RA_MEM_R_W, buffer);
02905     return buffer[0];
02906 }
02907 void MPU9150::writeMemoryByte(uint8_t data) {
02908     I2Cdev::writeByte(devAddr, MPU9150_RA_MEM_R_W, data);
02909 }
02910 void MPU9150::readMemoryBlock(uint8_t *data, uint16_t dataSize, uint8_t bank, uint8_t address) {
02911     setMemoryBank(bank);
02912     setMemoryStartAddress(address);
02913     uint8_t chunkSize;
02914     for (uint16_t i = 0; i < dataSize;) {
02915         // determine correct chunk size according to bank position and data size
02916         chunkSize = MPU9150_DMP_MEMORY_CHUNK_SIZE;
02917 
02918         // make sure we don't go past the data size
02919         if (i + chunkSize > dataSize) chunkSize = dataSize - i;
02920 
02921         // make sure this chunk doesn't go past the bank boundary (256 bytes)
02922         if (chunkSize > 256 - address) chunkSize = 256 - address;
02923 
02924         // read the chunk of data as specified
02925         I2Cdev::readBytes(devAddr, MPU9150_RA_MEM_R_W, chunkSize, data + i);
02926 
02927         // increase byte index by [chunkSize]
02928         i += chunkSize;
02929 
02930         // uint8_t automatically wraps to 0 at 256
02931         address += chunkSize;
02932 
02933         // if we aren't done, update bank (if necessary) and address
02934         if (i < dataSize) {
02935             if (address == 0) bank++;
02936             setMemoryBank(bank);
02937             setMemoryStartAddress(address);
02938         }
02939     }
02940 }
02941 bool MPU9150::writeMemoryBlock(const uint8_t *data, uint16_t dataSize, uint8_t bank, uint8_t address, bool verify, bool useProgMem) {
02942     setMemoryBank(bank);
02943     setMemoryStartAddress(address);
02944     uint8_t chunkSize;
02945     uint8_t *verifyBuffer;
02946     uint8_t *progBuffer;
02947     uint16_t i;
02948     uint8_t j;
02949     if (verify) verifyBuffer = (uint8_t *)malloc(MPU9150_DMP_MEMORY_CHUNK_SIZE);
02950     if (useProgMem) progBuffer = (uint8_t *)malloc(MPU9150_DMP_MEMORY_CHUNK_SIZE);
02951     for (i = 0; i < dataSize;) {
02952         // determine correct chunk size according to bank position and data size
02953         chunkSize = MPU9150_DMP_MEMORY_CHUNK_SIZE;
02954 
02955         // make sure we don't go past the data size
02956         if (i + chunkSize > dataSize) chunkSize = dataSize - i;
02957 
02958         // make sure this chunk doesn't go past the bank boundary (256 bytes)
02959         if (chunkSize > 256 - address) chunkSize = 256 - address;
02960 
02961         if (useProgMem) {
02962             // write the chunk of data as specified
02963             for (j = 0; j < chunkSize; j++) progBuffer[j] = pgm_read_byte(data + i + j);
02964         } else {
02965             // write the chunk of data as specified
02966             progBuffer = (uint8_t *)data + i;
02967         }
02968 
02969         I2Cdev::writeBytes(devAddr, MPU9150_RA_MEM_R_W, chunkSize, progBuffer);
02970 
02971         // verify data if needed
02972         if (verify && verifyBuffer) {
02973             setMemoryBank(bank);
02974             setMemoryStartAddress(address);
02975             I2Cdev::readBytes(devAddr, MPU9150_RA_MEM_R_W, chunkSize, verifyBuffer);
02976             if (memcmp(progBuffer, verifyBuffer, chunkSize) != 0) {
02977                 /*Serial.print("Block write verification error, bank ");
02978                 Serial.print(bank, DEC);
02979                 Serial.print(", address ");
02980                 Serial.print(address, DEC);
02981                 Serial.print("!\nExpected:");
02982                 for (j = 0; j < chunkSize; j++) {
02983                     Serial.print(" 0x");
02984                     if (progBuffer[j] < 16) Serial.print("0");
02985                     Serial.print(progBuffer[j], HEX);
02986                 }
02987                 Serial.print("\nReceived:");
02988                 for (uint8_t j = 0; j < chunkSize; j++) {
02989                     Serial.print(" 0x");
02990                     if (verifyBuffer[i + j] < 16) Serial.print("0");
02991                     Serial.print(verifyBuffer[i + j], HEX);
02992                 }
02993                 Serial.print("\n");*/
02994                 free(verifyBuffer);
02995                 if (useProgMem) free(progBuffer);
02996                 return false; // uh oh.
02997             }
02998         }
02999 
03000         // increase byte index by [chunkSize]
03001         i += chunkSize;
03002 
03003         // uint8_t automatically wraps to 0 at 256
03004         address += chunkSize;
03005 
03006         // if we aren't done, update bank (if necessary) and address
03007         if (i < dataSize) {
03008             if (address == 0) bank++;
03009             setMemoryBank(bank);
03010             setMemoryStartAddress(address);
03011         }
03012     }
03013     if (verify) free(verifyBuffer);
03014     if (useProgMem) free(progBuffer);
03015     return true;
03016 }
03017 bool MPU9150::writeProgMemoryBlock(const uint8_t *data, uint16_t dataSize, uint8_t bank, uint8_t address, bool verify) {
03018     return writeMemoryBlock(data, dataSize, bank, address, verify, true);
03019 }
03020 bool MPU9150::writeDMPConfigurationSet(const uint8_t *data, uint16_t dataSize, bool useProgMem) {
03021     uint8_t *progBuffer, success, special;
03022     uint16_t i, j;
03023     if (useProgMem) {
03024         progBuffer = (uint8_t *)malloc(8); // assume 8-byte blocks, realloc later if necessary
03025     }
03026 
03027     // config set data is a long string of blocks with the following structure:
03028     // [bank] [offset] [length] [byte[0], byte[1], ..., byte[length]]
03029     uint8_t bank, offset, length;
03030     for (i = 0; i < dataSize;) {
03031         if (useProgMem) {
03032             bank = pgm_read_byte(data + i++);
03033             offset = pgm_read_byte(data + i++);
03034             length = pgm_read_byte(data + i++);
03035         } else {
03036             bank = data[i++];
03037             offset = data[i++];
03038             length = data[i++];
03039         }
03040 
03041         // write data or perform special action
03042         if (length > 0) {
03043             // regular block of data to write
03044             /*Serial.print("Writing config block to bank ");
03045             Serial.print(bank);
03046             Serial.print(", offset ");
03047             Serial.print(offset);
03048             Serial.print(", length=");
03049             Serial.println(length);*/
03050             if (useProgMem) {
03051                 if (sizeof(progBuffer) < length) progBuffer = (uint8_t *)realloc(progBuffer, length);
03052                 for (j = 0; j < length; j++) progBuffer[j] = pgm_read_byte(data + i + j);
03053             } else {
03054                 progBuffer = (uint8_t *)data + i;
03055             }
03056             success = writeMemoryBlock(progBuffer, length, bank, offset, true);
03057             i += length;
03058         } else {
03059             // special instruction
03060             // NOTE: this kind of behavior (what and when to do certain things)
03061             // is totally undocumented. This code is in here based on observed
03062             // behavior only, and exactly why (or even whether) it has to be here
03063             // is anybody's guess for now.
03064             if (useProgMem) {
03065                 special = pgm_read_byte(data + i++);
03066             } else {
03067                 special = data[i++];
03068             }
03069             /*Serial.print("Special command code ");
03070             Serial.print(special, HEX);
03071             Serial.println(" found...");*/
03072             if (special == 0x01) {
03073                 // enable DMP-related interrupts
03074 
03075                 //setIntZeroMotionEnabled(true);
03076                 //setIntFIFOBufferOverflowEnabled(true);
03077                 //setIntDMPEnabled(true);
03078                 I2Cdev::writeByte(devAddr, MPU9150_RA_INT_ENABLE, 0x32);  // single operation
03079 
03080                 success = true;
03081             } else {
03082                 // unknown special command
03083                 success = false;
03084             }
03085         }
03086 
03087         if (!success) {
03088             if (useProgMem) free(progBuffer);
03089             return false; // uh oh
03090         }
03091     }
03092     if (useProgMem) free(progBuffer);
03093     return true;
03094 }
03095 bool MPU9150::writeProgDMPConfigurationSet(const uint8_t *data, uint16_t dataSize) {
03096     return writeDMPConfigurationSet(data, dataSize, true);
03097 }
03098 
03099 // DMP_CFG_1 register
03100 
03101 uint8_t MPU9150::getDMPConfig1() {
03102     I2Cdev::readByte(devAddr, MPU9150_RA_DMP_CFG_1, buffer);
03103     return buffer[0];
03104 }
03105 void MPU9150::setDMPConfig1(uint8_t config) {
03106     I2Cdev::writeByte(devAddr, MPU9150_RA_DMP_CFG_1, config);
03107 }
03108 
03109 // DMP_CFG_2 register
03110 
03111 uint8_t MPU9150::getDMPConfig2() {
03112     I2Cdev::readByte(devAddr, MPU9150_RA_DMP_CFG_2, buffer);
03113     return buffer[0];
03114 }
03115 void MPU9150::setDMPConfig2(uint8_t config) {
03116     I2Cdev::writeByte(devAddr, MPU9150_RA_DMP_CFG_2, config);
03117 }