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Development branch of the mbed library sources. This library is kept in synch with the latest changes from the mbed SDK and it is not guaranteed to work.

If you are looking for a stable and tested release, please import one of the official mbed library releases:

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The official mbed C/C++ SDK provides the software platform and libraries to build your applications.

Files at this revision

API Documentation at this revision

Comitter:
mbed_official
Date:
Wed Sep 30 17:00:09 2015 +0100
Parent:
634:ac7d6880524d
Commit message:
Synchronized with git revision d29c98dae61be0946ddf3a3c641c7726056f9452

Full URL: https://github.com/mbedmicro/mbed/commit/d29c98dae61be0946ddf3a3c641c7726056f9452/

Added support for SAMW25

Changed in this revision

targets/cmsis/TARGET_Atmel/TARGET_SAM_CortexM0+/TARGET_SAMD21/TARGET_SAMD21G18A/TOOLCHAIN_GCC_ARM/samd21g18a.ld Show annotated file Show diff for this revision Revisions of this file
targets/cmsis/TARGET_Atmel/TARGET_SAM_CortexM0+/TARGET_SAMD21/TARGET_SAMD21G18A/TOOLCHAIN_GCC_ARM/startup_samd21.c Show annotated file Show diff for this revision Revisions of this file
targets/cmsis/TARGET_Atmel/TARGET_SAM_CortexM0+/TARGET_SAMD21/TARGET_SAMD21G18A/TOOLCHAIN_IAR/startup_samd21.c Show annotated file Show diff for this revision Revisions of this file
targets/hal/TARGET_Atmel/TARGET_SAM_CortexM0+/TARGET_SAMD21G18A/PeripheralNames.h Show annotated file Show diff for this revision Revisions of this file
targets/hal/TARGET_Atmel/TARGET_SAM_CortexM0+/TARGET_SAMD21G18A/PeripheralPins.c Show annotated file Show diff for this revision Revisions of this file
targets/hal/TARGET_Atmel/TARGET_SAM_CortexM0+/TARGET_SAMD21G18A/PeripheralPins.h Show annotated file Show diff for this revision Revisions of this file
targets/hal/TARGET_Atmel/TARGET_SAM_CortexM0+/TARGET_SAMD21G18A/PinNames.h Show annotated file Show diff for this revision Revisions of this file
targets/hal/TARGET_Atmel/TARGET_SAM_CortexM0+/TARGET_SAMD21G18A/SAMW25_XPLAINED_PRO/mbed_overrides.c Show annotated file Show diff for this revision Revisions of this file
targets/hal/TARGET_Atmel/TARGET_SAM_CortexM0+/TARGET_SAMD21G18A/SAMW25_XPLAINED_PRO/samw25_xplained_pro.h Show annotated file Show diff for this revision Revisions of this file
targets/hal/TARGET_Atmel/TARGET_SAM_CortexM0+/TARGET_SAMD21G18A/analogout_api.c Show annotated file Show diff for this revision Revisions of this file
targets/hal/TARGET_Atmel/TARGET_SAM_CortexM0+/TARGET_SAMD21G18A/device.h Show annotated file Show diff for this revision Revisions of this file
targets/hal/TARGET_Atmel/TARGET_SAM_CortexM0+/port_api.c Show annotated file Show diff for this revision Revisions of this file
targets/hal/TARGET_Atmel/TARGET_SAM_CortexM0+/pwmout_api.c Show annotated file Show diff for this revision Revisions of this file
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/targets/cmsis/TARGET_Atmel/TARGET_SAM_CortexM0+/TARGET_SAMD21/TARGET_SAMD21G18A/TOOLCHAIN_GCC_ARM/samd21g18a.ld	Wed Sep 30 17:00:09 2015 +0100
@@ -0,0 +1,126 @@
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+SEARCH_DIR(.)
+
+/* Memory Spaces Definitions */
+MEMORY
+{
+  rom (rx)  : ORIGIN = 0x00000000, LENGTH = 0x00040000
+  ram (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00008000
+}
+
+/* The stack size used by the application. NOTE: you need to adjust according to your application. */
+STACK_SIZE = DEFINED(STACK_SIZE) ? STACK_SIZE : DEFINED(__stack_size__) ? __stack_size__ : 0x2000;
+
+/* Section Definitions */
+SECTIONS
+{
+    .text :
+    {
+        . = ALIGN(4);
+        _sfixed = .;
+        KEEP(*(.vectors .vectors.*))
+        *(.text .text.* .gnu.linkonce.t.*)
+        *(.glue_7t) *(.glue_7)
+        *(.rodata .rodata* .gnu.linkonce.r.*)
+        *(.ARM.extab* .gnu.linkonce.armextab.*)
+
+        /* Support C constructors, and C destructors in both user code
+           and the C library. This also provides support for C++ code. */
+        . = ALIGN(4);
+        KEEP(*(.init))
+        . = ALIGN(4);
+        __preinit_array_start = .;
+        KEEP (*(.preinit_array))
+        __preinit_array_end = .;
+
+        . = ALIGN(4);
+        __init_array_start = .;
+        KEEP (*(SORT(.init_array.*)))
+        KEEP (*(.init_array))
+        __init_array_end = .;
+
+        . = ALIGN(4);
+        KEEP (*crtbegin.o(.ctors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+        KEEP (*(SORT(.ctors.*)))
+        KEEP (*crtend.o(.ctors))
+
+        . = ALIGN(4);
+        KEEP(*(.fini))
+
+        . = ALIGN(4);
+        __fini_array_start = .;
+        KEEP (*(.fini_array))
+        KEEP (*(SORT(.fini_array.*)))
+        __fini_array_end = .;
+
+        KEEP (*crtbegin.o(.dtors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+        KEEP (*(SORT(.dtors.*)))
+        KEEP (*crtend.o(.dtors))
+
+        . = ALIGN(4);
+        _efixed = .;            /* End of text section */
+    } > rom
+
+    /* .ARM.exidx is sorted, so has to go in its own output section.  */
+    PROVIDE_HIDDEN (__exidx_start = .);
+    .ARM.exidx :
+    {
+      *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+    } > rom
+    PROVIDE_HIDDEN (__exidx_end = .);
+
+    . = ALIGN(4);
+    _etext = .;
+	
+	.dvectors (NOLOAD) :
+	{
+		_sdvectors = .;
+		. = . + 0xB0;
+		_edvectors = .;
+	} > ram
+
+    .relocate : AT (_etext)
+    {
+        . = ALIGN(4);
+        _srelocate = .;
+        *(.ramfunc .ramfunc.*);
+        *(.data .data.*);
+        . = ALIGN(4);
+        _erelocate = .;
+    } > ram
+
+    /* .bss section which is used for uninitialized data */
+    .bss (NOLOAD) :
+    {
+        . = ALIGN(4);
+        _sbss = . ;
+        _szero = .;
+        *(.bss .bss.*)
+        *(COMMON)
+        . = ALIGN(4);
+        _ebss = . ;
+        _ezero = .;
+    } > ram
+
+	.heap (NOLOAD) :
+	{
+		. = ALIGN(4);
+		__end__ = . ;
+		. = ORIGIN(ram) + LENGTH(ram) - STACK_SIZE;
+	} > ram
+
+    /* stack section */
+    .stack (NOLOAD):
+    {
+        . = ALIGN(8);
+        _sstack = .;
+        . = . + STACK_SIZE;
+        . = ALIGN(8);
+        _estack = .;
+    } > ram
+
+    . = ALIGN(4);
+}
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/targets/cmsis/TARGET_Atmel/TARGET_SAM_CortexM0+/TARGET_SAMD21/TARGET_SAMD21G18A/TOOLCHAIN_GCC_ARM/startup_samd21.c	Wed Sep 30 17:00:09 2015 +0100
@@ -0,0 +1,158 @@
+#include "samd21.h"
+
+/* Initialize segments */
+extern uint32_t _sfixed;
+extern uint32_t _efixed;
+extern uint32_t _etext;
+extern uint32_t _srelocate;
+extern uint32_t _erelocate;
+extern uint32_t _szero;
+extern uint32_t _ezero;
+extern uint32_t _sstack;
+extern uint32_t _estack;
+
+/** \cond DOXYGEN_SHOULD_SKIP_THIS */
+int main(void);
+/** \endcond */
+
+void __libc_init_array(void);
+
+/* Default empty handler */
+void Dummy_Handler(void);
+
+/* Cortex-M0+ core handlers */
+void NMI_Handler             ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void HardFault_Handler       ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void SVC_Handler             ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void PendSV_Handler          ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void SysTick_Handler         ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+
+/* Peripherals handlers */
+void PM_Handler              ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void SYSCTRL_Handler         ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void WDT_Handler             ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void RTC_Handler             ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void EIC_Handler             ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void NVMCTRL_Handler         ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void DMAC_Handler            ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void USB_Handler             ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void EVSYS_Handler           ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void SERCOM0_Handler         ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void SERCOM1_Handler         ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void SERCOM2_Handler         ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void SERCOM3_Handler         ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void SERCOM4_Handler         ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void SERCOM5_Handler         ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void TCC0_Handler            ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void TCC1_Handler            ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void TCC2_Handler            ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void TC3_Handler             ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void TC4_Handler             ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void TC5_Handler             ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void TC6_Handler             ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void TC7_Handler             ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void ADC_Handler             ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void AC_Handler              ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void DAC_Handler             ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void PTC_Handler             ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void I2S_Handler             ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+
+/* Exception Table */
+__attribute__ ((section(".vectors")))
+const DeviceVectors exception_table = {
+
+    /* Configure Initial Stack Pointer, using linker-generated symbols */
+    (void*) (&_estack),
+
+    (void*) Reset_Handler,
+    (void*) NMI_Handler,
+    (void*) HardFault_Handler,
+    (void*) (0UL), /* Reserved */
+    (void*) (0UL), /* Reserved */
+    (void*) (0UL), /* Reserved */
+    (void*) (0UL), /* Reserved */
+    (void*) (0UL), /* Reserved */
+    (void*) (0UL), /* Reserved */
+    (void*) (0UL), /* Reserved */
+    (void*) SVC_Handler,
+    (void*) (0UL), /* Reserved */
+    (void*) (0UL), /* Reserved */
+    (void*) PendSV_Handler,
+    (void*) SysTick_Handler,
+
+    /* Configurable interrupts */
+    (void*) PM_Handler,             /*  0 Power Manager */
+    (void*) SYSCTRL_Handler,        /*  1 System Control */
+    (void*) WDT_Handler,            /*  2 Watchdog Timer */
+    (void*) RTC_Handler,            /*  3 Real-Time Counter */
+    (void*) EIC_Handler,            /*  4 External Interrupt Controller */
+    (void*) NVMCTRL_Handler,        /*  5 Non-Volatile Memory Controller */
+    (void*) DMAC_Handler,           /*  6 Direct Memory Access Controller */
+    (void*) USB_Handler,            /*  7 Universal Serial Bus */
+    (void*) EVSYS_Handler,          /*  8 Event System Interface */
+    (void*) SERCOM0_Handler,        /*  9 Serial Communication Interface 0 */
+    (void*) SERCOM1_Handler,        /* 10 Serial Communication Interface 1 */
+    (void*) SERCOM2_Handler,        /* 11 Serial Communication Interface 2 */
+    (void*) SERCOM3_Handler,        /* 12 Serial Communication Interface 3 */
+    (void*) SERCOM4_Handler,        /* 13 Serial Communication Interface 4 */
+    (void*) SERCOM5_Handler,        /* 14 Serial Communication Interface 5 */
+    (void*) TCC0_Handler,           /* 15 Timer Counter Control 0 */
+    (void*) TCC1_Handler,           /* 16 Timer Counter Control 1 */
+    (void*) TCC2_Handler,           /* 17 Timer Counter Control 2 */
+    (void*) TC3_Handler,            /* 18 Basic Timer Counter 0 */
+    (void*) TC4_Handler,            /* 19 Basic Timer Counter 1 */
+    (void*) TC5_Handler,            /* 20 Basic Timer Counter 2 */
+    (void*) TC6_Handler,            /* 21 Basic Timer Counter 3 */
+    (void*) TC7_Handler,            /* 22 Basic Timer Counter 4 */
+    (void*) ADC_Handler,            /* 23 Analog Digital Converter */
+    (void*) AC_Handler,             /* 24 Analog Comparators */
+    (void*) DAC_Handler,            /* 25 Digital Analog Converter */
+    (void*) PTC_Handler,            /* 26 Peripheral Touch Controller */
+    (void*) I2S_Handler             /* 27 Inter-IC Sound Interface */
+};
+
+/**
+ * \brief This is the code that gets called on processor reset.
+ * To initialize the device, and call the main() routine.
+ */
+void Reset_Handler(void)
+{
+    uint32_t *pSrc, *pDest;
+
+    /* Initialize the relocate segment */
+    pSrc = &_etext;
+    pDest = &_srelocate;
+
+    if (pSrc != pDest) {
+        for (; pDest < &_erelocate;) {
+            *pDest++ = *pSrc++;
+        }
+    }
+
+    /* Clear the zero segment */
+    for (pDest = &_szero; pDest < &_ezero;) {
+        *pDest++ = 0;
+    }
+
+    /* Set the vector table base address */
+    pSrc = (uint32_t *) & _sfixed;
+    SCB->VTOR = ((uint32_t) pSrc & SCB_VTOR_TBLOFF_Msk);
+
+    /* Initialize the C library */
+    __libc_init_array();
+
+    /* Branch to main function */  // expected to be done by MBED OS
+    main();
+
+    /* Infinite loop */
+    while (1);
+}
+
+/**
+ * \brief Default interrupt handler for unused IRQs.
+ */
+void Dummy_Handler(void)
+{
+    while (1) {
+    }
+}
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/targets/cmsis/TARGET_Atmel/TARGET_SAM_CortexM0+/TARGET_SAMD21/TARGET_SAMD21G18A/TOOLCHAIN_IAR/startup_samd21.c	Wed Sep 30 17:00:09 2015 +0100
@@ -0,0 +1,173 @@
+#include "samd21.h"
+
+void __iar_program_start(void);
+int __low_level_init(void);
+
+void Dummy_Handler(void);
+void Reset_Handler(void);
+
+/**
+ * \brief Default interrupt handler for unused IRQs.
+ */
+void Dummy_Handler(void)
+{
+    while (1) {
+    }
+}
+
+/* Cortex-M0+ core handlers */
+void NMI_Handler              ( void );
+void HardFault_Handler        ( void );
+void SVC_Handler              ( void );
+void PendSV_Handler           ( void );
+void SysTick_Handler          ( void );
+
+/* Peripherals handlers */
+void PM_Handler               ( void );
+void SYSCTRL_Handler          ( void );
+void WDT_Handler              ( void );
+void RTC_Handler              ( void );
+void EIC_Handler              ( void );
+void NVMCTRL_Handler          ( void );
+void DMAC_Handler             ( void );
+void USB_Handler              ( void );
+void EVSYS_Handler            ( void );
+void SERCOM0_Handler          ( void );
+void SERCOM1_Handler          ( void );
+void SERCOM2_Handler          ( void );
+void SERCOM3_Handler          ( void );
+void SERCOM4_Handler          ( void );
+void SERCOM5_Handler          ( void );
+void TCC0_Handler             ( void );
+void TCC1_Handler             ( void );
+void TCC2_Handler             ( void );
+void TC3_Handler              ( void );
+void TC4_Handler              ( void );
+void TC5_Handler              ( void );
+void TC6_Handler              ( void );
+void TC7_Handler              ( void );
+void ADC_Handler              ( void );
+void AC_Handler               ( void );
+void DAC_Handler              ( void );
+void PTC_Handler              ( void );
+void I2S_Handler              ( void );
+
+/* Cortex-M0+ core handlers */
+#pragma weak NMI_Handler              = Dummy_Handler
+#pragma weak HardFault_Handler        = Dummy_Handler
+#pragma weak SVC_Handler              = Dummy_Handler
+#pragma weak PendSV_Handler           = Dummy_Handler
+#pragma weak SysTick_Handler          = Dummy_Handler
+
+/* Peripherals handlers */
+#pragma weak PM_Handler               = Dummy_Handler
+#pragma weak SYSCTRL_Handler          = Dummy_Handler
+#pragma weak WDT_Handler              = Dummy_Handler
+#pragma weak RTC_Handler              = Dummy_Handler
+#pragma weak EIC_Handler              = Dummy_Handler
+#pragma weak NVMCTRL_Handler          = Dummy_Handler
+#pragma weak DMAC_Handler             = Dummy_Handler
+#pragma weak USB_Handler              = Dummy_Handler
+#pragma weak EVSYS_Handler            = Dummy_Handler
+#pragma weak SERCOM0_Handler          = Dummy_Handler
+#pragma weak SERCOM1_Handler          = Dummy_Handler
+#pragma weak SERCOM2_Handler          = Dummy_Handler
+#pragma weak SERCOM3_Handler          = Dummy_Handler
+#pragma weak SERCOM4_Handler          = Dummy_Handler
+#pragma weak SERCOM5_Handler          = Dummy_Handler
+#pragma weak TCC0_Handler             = Dummy_Handler
+#pragma weak TCC1_Handler             = Dummy_Handler
+#pragma weak TCC2_Handler             = Dummy_Handler
+#pragma weak TC3_Handler              = Dummy_Handler
+#pragma weak TC4_Handler              = Dummy_Handler
+#pragma weak TC5_Handler              = Dummy_Handler
+#pragma weak TC6_Handler              = Dummy_Handler
+#pragma weak TC7_Handler              = Dummy_Handler
+#pragma weak ADC_Handler              = Dummy_Handler
+#pragma weak AC_Handler               = Dummy_Handler
+#pragma weak DAC_Handler              = Dummy_Handler
+#pragma weak PTC_Handler              = Dummy_Handler
+#pragma weak I2S_Handler              = Dummy_Handler
+
+/* Exception Table */
+#pragma language=extended
+#pragma segment="CSTACK"
+
+/* The name "__vector_table" has special meaning for C-SPY: */
+/* it is where the SP start value is found, and the NVIC vector */
+/* table register (VTOR) is initialized to this address if != 0 */
+
+#pragma section = ".intvec"
+#pragma location = ".intvec"
+//! [startup_vector_table]
+const DeviceVectors __vector_table[] = {
+    __sfe("CSTACK"),
+    (void*) __iar_program_start,
+    (void*) NMI_Handler,
+    (void*) HardFault_Handler,
+    (void*) (0UL), /* Reserved */
+    (void*) (0UL), /* Reserved */
+    (void*) (0UL), /* Reserved */
+    (void*) (0UL), /* Reserved */
+    (void*) (0UL), /* Reserved */
+    (void*) (0UL), /* Reserved */
+    (void*) (0UL), /* Reserved */
+    (void*) SVC_Handler,
+    (void*) (0UL), /* Reserved */
+    (void*) (0UL), /* Reserved */
+    (void*) PendSV_Handler,
+    (void*) SysTick_Handler,
+
+    /* Configurable interrupts */
+    (void*) PM_Handler,             /*  0 Power Manager */
+    (void*) SYSCTRL_Handler,        /*  1 System Control */
+    (void*) WDT_Handler,            /*  2 Watchdog Timer */
+    (void*) RTC_Handler,            /*  3 Real-Time Counter */
+    (void*) EIC_Handler,            /*  4 External Interrupt Controller */
+    (void*) NVMCTRL_Handler,        /*  5 Non-Volatile Memory Controller */
+    (void*) DMAC_Handler,           /*  6 Direct Memory Access Controller */
+    (void*) USB_Handler,            /*  7 Universal Serial Bus */
+    (void*) EVSYS_Handler,          /*  8 Event System Interface */
+    (void*) SERCOM0_Handler,        /*  9 Serial Communication Interface 0 */
+    (void*) SERCOM1_Handler,        /* 10 Serial Communication Interface 1 */
+    (void*) SERCOM2_Handler,        /* 11 Serial Communication Interface 2 */
+    (void*) SERCOM3_Handler,        /* 12 Serial Communication Interface 3 */
+    (void*) SERCOM4_Handler,        /* 13 Serial Communication Interface 4 */
+    (void*) SERCOM5_Handler,        /* 14 Serial Communication Interface 5 */
+    (void*) TCC0_Handler,           /* 15 Timer Counter Control 0 */
+    (void*) TCC1_Handler,           /* 16 Timer Counter Control 1 */
+    (void*) TCC2_Handler,           /* 17 Timer Counter Control 2 */
+    (void*) TC3_Handler,            /* 18 Basic Timer Counter 0 */
+    (void*) TC4_Handler,            /* 19 Basic Timer Counter 1 */
+    (void*) TC5_Handler,            /* 20 Basic Timer Counter 2 */
+    (void*) TC6_Handler,            /* 21 Basic Timer Counter 3 */
+    (void*) TC7_Handler,            /* 22 Basic Timer Counter 4 */
+    (void*) ADC_Handler,            /* 23 Analog Digital Converter */
+    (void*) AC_Handler,             /* 24 Analog Comparators */
+    (void*) DAC_Handler,            /* 25 Digital Analog Converter */
+    (void*) PTC_Handler,            /* 26 Peripheral Touch Controller */
+    (void*) I2S_Handler             /* 27 Inter-IC Sound Interface */
+};
+//! [startup_vector_table]
+
+/**------------------------------------------------------------------------------
+ * This is the code that gets called on processor reset. To initialize the
+ * device.
+ *------------------------------------------------------------------------------*/
+int __low_level_init(void)
+{
+    uint32_t *pSrc = __section_begin(".intvec");
+
+    SCB->VTOR = ((uint32_t) pSrc & SCB_VTOR_TBLOFF_Msk);
+
+    return 1; /* if return 0, the data sections will not be initialized */
+}
+
+/**------------------------------------------------------------------------------
+ * This is the code that gets called on processor reset. To initialize the
+ * device.
+ *------------------------------------------------------------------------------*/
+void Reset_Handler(void)
+{
+    __iar_program_start();
+}
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/targets/hal/TARGET_Atmel/TARGET_SAM_CortexM0+/TARGET_SAMD21G18A/PeripheralNames.h	Wed Sep 30 17:00:09 2015 +0100
@@ -0,0 +1,150 @@
+/* mbed Microcontroller Library
+ * Copyright (c) 2006-2013 ARM Limited
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef MBED_PERIPHERALNAMES_H
+#define MBED_PERIPHERALNAMES_H
+
+#include <compiler.h>
+#include "cmsis.h"
+#include "PinNames.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define _SERCOM_SPI_NAME(n, unused) \
+                            SPI##n,
+
+#define _SERCOM_PAD_NAME(n, pad) \
+				SERCOM##n##_PAD##pad = ((n & 0xF) | ((pad & 0xF) << 4)),
+
+#define _SERCOM_I2C_NAME(n, unused) \
+                            I2C##n,
+
+
+
+typedef enum {
+    UART_0 = (int)0x42000800UL,  // Base address of SERCOM0
+    UART_1 = (int)0x42000C00UL,  // Base address of SERCOM1
+    UART_2 = (int)0x42001000UL,  // Base address of SERCOM2
+    UART_3 = (int)0x42001400UL,  // Base address of SERCOM3
+    UART_4 = (int)0x42001800UL,  // Base address of SERCOM4
+    UART_5 = (int)0x42001C00UL   // Base address of SERCOM5
+} UARTName;
+
+typedef enum {
+    ADC_0  =  0x0ul,
+    ADC_1  =  0x1ul,
+    ADC_2  =  0x2ul,
+    ADC_3  =  0x3ul,
+    ADC_4  =  0x4ul,
+    ADC_5  =  0x5ul,
+    ADC_6  =  0x6ul,
+    ADC_7  =  0x7ul,
+    ADC_10 =  0xAul,
+    ADC_11 =  0xBul,
+    ADC_16 =  0x10ul,
+    ADC_17 =  0x11ul,
+    ADC_18 =  0x12ul,
+    ADC_19 =  0x13ul
+} ADCName;
+
+typedef enum {
+    DAC_0  =  0x42004800UL
+} DACName;
+
+typedef enum {  // for each channel
+    EXTINT_0 = 0,
+    EXTINT_1,
+    EXTINT_2,
+    EXTINT_3,
+    EXTINT_4,
+    EXTINT_5,
+    EXTINT_6,
+    EXTINT_7,
+    EXTINT_8,
+    EXTINT_9,
+    EXTINT_10,
+    EXTINT_11,
+    EXTINT_12,
+    EXTINT_13,
+    EXTINT_14,
+    EXTINT_15
+} EXTINTName;
+
+typedef enum {
+    MREPEAT(SERCOM_INST_NUM, _SERCOM_SPI_NAME, ~)
+} SPIName;
+
+typedef enum {
+    MREPEAT(SERCOM_INST_NUM, _SERCOM_I2C_NAME, ~)
+} I2CName;
+
+typedef enum {
+    /* Pad 0 definitions */
+    MREPEAT(SERCOM_INST_NUM, _SERCOM_PAD_NAME, 0)
+
+    /* Pad 1 definitions */
+    MREPEAT(SERCOM_INST_NUM, _SERCOM_PAD_NAME, 1)
+
+    /* Pad 2 definitions */
+    MREPEAT(SERCOM_INST_NUM, _SERCOM_PAD_NAME, 2)
+
+    /* Pad 3 definitions */
+    MREPEAT(SERCOM_INST_NUM, _SERCOM_PAD_NAME, 3)
+} SercomPadName;
+
+typedef enum {
+    PWM_0 = (0x42002000UL), /**< \brief (TCC0) APB Base Address */
+    PWM_1 = (0x42002400UL), /**< \brief (TCC1) APB Base Address */
+    PWM_2 = (0x42002800UL), /**< \brief (TCC2) APB Base Address */
+} PWMName;
+
+struct pwm_pin_channel {
+    PinName pin;
+    PWMName pwm;
+    uint8_t channel_index;
+};
+
+#define STDIO_UART_TX     USBTX
+#define STDIO_UART_RX     USBRX
+#define STDIO_UART        UART_3
+
+// Default peripherals
+#define MBED_SPI0         PA18, PA16, PA19, PA17
+
+#define MBED_UART0        PA04, PA05
+#define MBED_UARTUSB      USBTX, USBRX
+
+#define MBED_I2C0         PA08, PA09
+
+#define MBED_ANALOGOUT0   PA02
+
+#define MBED_ANALOGIN0    PA03
+#define MBED_ANALOGIN1    PA08
+#define MBED_ANALOGIN2    PB09
+#define MBED_ANALOGIN3    PA04
+#define MBED_ANALOGIN4    PA05
+#define MBED_ANALOGIN5    PA06
+#define MBED_ANALOGIN7    PA07
+
+#define MBED_PWMOUT0      PA18
+#define MBED_PWMOUT1      PA19
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/targets/hal/TARGET_Atmel/TARGET_SAM_CortexM0+/TARGET_SAMD21G18A/PeripheralPins.c	Wed Sep 30 17:00:09 2015 +0100
@@ -0,0 +1,244 @@
+/* mbed Microcontroller Library
+ * Copyright (c) 2006-2013 ARM Limited
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "PeripheralPins.h"
+
+/************ADC***************/
+const PinMap PinMap_ADC[] = {
+    {PA02,  ADC_0, 1},
+    {PA03,  ADC_1, 1},
+    {PB08,  ADC_2, 1},
+    {PB09,  ADC_3, 1},
+    {PA04,  ADC_4, 1},
+    {PA05,  ADC_5, 1},
+    {PA06,  ADC_6, 1},
+    {PA07,  ADC_7, 1},
+    {PB02,  ADC_10, 1},
+    {PB03,  ADC_11, 1},
+    {PA08,  ADC_16, 1},
+    {PA09,  ADC_17, 1},
+    {PA10,  ADC_18, 1},
+    {PA11,  ADC_19, 1},
+
+    /* Not connected */
+    {NC  , NC   , NC}
+};
+
+/************DAC***************/
+const PinMap PinMap_DAC[] = {
+    {PA02,  DAC_0, 1},
+
+    /* Not connected */
+    {NC  , NC   , NC}
+};
+
+/************SERCOM Pins***********/
+const PinMap PinMap_SERCOM_PAD[] = {
+    {PA00, SERCOM1_PAD0, 3},
+    {PA01, SERCOM1_PAD1, 3},
+    {PA04, SERCOM0_PAD0, 3},
+    {PA05, SERCOM0_PAD1, 3},
+    {PA06, SERCOM0_PAD2, 3},
+    {PA07, SERCOM0_PAD3, 3},
+    {PA08, SERCOM0_PAD0, 2},
+    {PA09, SERCOM0_PAD1, 2},
+    {PA10, SERCOM0_PAD2, 2},
+    {PA11, SERCOM0_PAD3, 2},
+    {PA12, SERCOM2_PAD0, 2},
+    {PA13, SERCOM2_PAD1, 2},
+    {PA14, SERCOM2_PAD2, 2},
+    {PA15, SERCOM2_PAD3, 2},
+    {PA16, SERCOM1_PAD0, 2},
+    {PA17, SERCOM1_PAD1, 2},
+    {PA18, SERCOM1_PAD2, 2},
+    {PA19, SERCOM1_PAD3, 2},
+    {PA20, SERCOM3_PAD2, 3},
+    {PA21, SERCOM3_PAD3, 3},
+    {PA22, SERCOM3_PAD0, 2},
+    {PA23, SERCOM3_PAD1, 2},
+    {PA24, SERCOM3_PAD2, 2},
+    {PA25, SERCOM3_PAD3, 2},
+    {PA30, SERCOM1_PAD2, 3},
+    {PA31, SERCOM1_PAD3, 3},
+    {PB02, SERCOM5_PAD0, 3},
+    {PB03, SERCOM5_PAD1, 3},
+    {PB08, SERCOM4_PAD0, 3},
+    {PB09, SERCOM4_PAD1, 3},
+    {PB10, SERCOM4_PAD2, 3},
+    {PB11, SERCOM4_PAD3, 3},
+    {PB22, SERCOM5_PAD2, 3},
+    {PB23, SERCOM5_PAD3, 3},
+
+    /* Not connected */
+    {NC  , NC   , NC}
+};
+
+/*******SERCOM Pins extended*******/
+const PinMap PinMap_SERCOM_PADEx[] = {
+    {PA08, SERCOM2_PAD0, 3},
+    {PA09, SERCOM2_PAD1, 3},
+    {PA10, SERCOM2_PAD2, 3},
+    {PA11, SERCOM2_PAD3, 3},
+    {PA12, SERCOM4_PAD0, 3},
+    {PA13, SERCOM4_PAD1, 3},
+    {PA14, SERCOM4_PAD2, 3},
+    {PA15, SERCOM4_PAD3, 3},
+    {PA16, SERCOM3_PAD0, 3},
+    {PA17, SERCOM3_PAD1, 3},
+    {PA18, SERCOM3_PAD2, 3},
+    {PA19, SERCOM3_PAD3, 3},
+    {PA20, SERCOM5_PAD2, 2},
+    {PA21, SERCOM5_PAD3, 2},
+    {PA22, SERCOM5_PAD0, 3},
+    {PA23, SERCOM5_PAD1, 3},
+    {PA24, SERCOM5_PAD2, 3},
+    {PA25, SERCOM5_PAD3, 3},
+
+    /* Not connected */
+    {NC  , NC   , NC}
+};
+
+
+/************PWM***************/
+const PinMap PinMap_PWM[] = {
+    {PA00, PWM_2, 4},
+    {PA01, PWM_2, 4},
+    {PA04, PWM_0, 4},
+    {PA05, PWM_0, 4},
+    {PA06, PWM_1, 4},
+    {PA07, PWM_1, 4},
+    {PA08, PWM_1, 5},
+    {PA09, PWM_1, 5},
+    {PA10, PWM_1, 4},
+    {PA11, PWM_1, 4},
+    {PA12, PWM_2, 4},
+    {PA13, PWM_2, 4},
+    {PA14, PWM_0, 5},
+    {PA15, PWM_0, 5},
+    {PA16, PWM_2, 4},
+    {PA17, PWM_2, 4},
+    {PA18, PWM_0, 5},
+    {PA19, PWM_0, 5},
+    {PA20, PWM_0, 5},
+    {PA21, PWM_0, 5},
+    {PA22, PWM_0, 5},
+    {PA23, PWM_0, 5},
+    {PA24, PWM_1, 5},
+    {PA25, PWM_1, 5},
+    {PA30, PWM_1, 4},
+    {PA31, PWM_1, 4},
+    {PB10, PWM_0, 5},
+    {PB11, PWM_0, 5},
+
+    /* Not connected */
+    {NC  , NC   , NC}
+};
+
+/**********EXTINT*************/
+const PinMap PinMap_EXTINT[] = {
+    {PA16,  EXTINT_0, 0},
+    {PA00,  EXTINT_0, 0},
+
+    {PA17,  EXTINT_1, 0},
+    {PA01,  EXTINT_1, 0},
+
+    {PA18,  EXTINT_2, 0},
+    {PA02,  EXTINT_2, 0},
+    {PB02,  EXTINT_2, 0},
+
+    {PA03,  EXTINT_3, 0},
+    {PA19,  EXTINT_3, 0},
+    {PB03,  EXTINT_3, 0},
+
+    {PA04,  EXTINT_4, 0},
+    {PA20,  EXTINT_4, 0},
+
+    {PA05,  EXTINT_5, 0},
+    {PA21,  EXTINT_5, 0},
+
+    {PA06,  EXTINT_6, 0},
+    {PA22,  EXTINT_6, 0},
+    {PB22,  EXTINT_6, 0},
+
+    {PA07,  EXTINT_7, 0},
+    {PA23,  EXTINT_7, 0},
+    {PB23,  EXTINT_7, 0},
+
+    {PA28,  EXTINT_8, 0},
+    {PB08,  EXTINT_8, 0},
+
+    {PA09,  EXTINT_9, 0},
+    {PB09,  EXTINT_9, 0},
+
+    {PA10,  EXTINT_10, 0},
+    {PA30,  EXTINT_10, 0},
+    {PB10,  EXTINT_10, 0},
+
+    {PA11,  EXTINT_11, 0},
+    {PA31,  EXTINT_11, 0},
+    {PB11,  EXTINT_11, 0},
+
+    {PA12,  EXTINT_12, 0},
+    {PA24,  EXTINT_12, 0},
+
+    {PA13,  EXTINT_13, 0},
+    {PA25,  EXTINT_13, 0},
+
+    {PA14,  EXTINT_14, 0},
+
+    {PA15,  EXTINT_15, 0},
+    {PA27,  EXTINT_15, 0},
+
+    /* Not connected */
+    {NC  , NC   , NC}
+};
+
+const struct pwm_pin_channel pwn_pins[] = {
+    {PA00, PWM_2, 0},
+    {PA01, PWM_2, 1},
+    {PA04, PWM_0, 0},
+    {PA05, PWM_0, 1},
+    {PA06, PWM_1, 0},
+    {PA07, PWM_1, 1},
+    {PA08, PWM_1, 2},
+    {PA09, PWM_1, 3},
+    {PA10, PWM_1, 0},
+    {PA11, PWM_1, 1},
+    {PA12, PWM_2, 0},
+    {PA13, PWM_2, 1},
+    {PA14, PWM_0, 4},
+    {PA15, PWM_0, 5},
+    {PA16, PWM_2, 0},
+    {PA17, PWM_2, 1},
+    {PA18, PWM_0, 2},
+    {PA19, PWM_0, 3},
+    {PA20, PWM_0, 6},
+    {PA21, PWM_0, 7},
+    {PA22, PWM_0, 4},
+    {PA23, PWM_0, 5},
+    {PA24, PWM_1, 2},
+    {PA25, PWM_1, 3},
+    {PA30, PWM_1, 0},
+    {PA31, PWM_1, 1},
+    {PB10, PWM_0, 4},
+    {PB11, PWM_0, 5},
+
+    /* Not connected */
+    {NC  , NC   , NC}
+};
+
+
+
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/targets/hal/TARGET_Atmel/TARGET_SAM_CortexM0+/TARGET_SAMD21G18A/PeripheralPins.h	Wed Sep 30 17:00:09 2015 +0100
@@ -0,0 +1,40 @@
+/* mbed Microcontroller Library
+ * Copyright (c) 2006-2013 ARM Limited
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef MBED_PERIPHERALPINS_H
+#define MBED_PERIPHERALPINS_H
+
+#include "pinmap.h"
+#include "PeripheralNames.h"
+
+/************ADC***************/
+extern const PinMap PinMap_ADC[];
+
+/************DAC***************/
+extern const PinMap PinMap_DAC[];
+
+/*********SERCOM*************/
+extern const PinMap PinMap_SERCOM_PAD[];
+extern const PinMap PinMap_SERCOM_PADEx[];
+
+/************PWM***************/
+extern const PinMap PinMap_PWM[];
+
+/**********EXTINT*************/
+extern const PinMap PinMap_EXTINT[];
+
+
+#endif
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/targets/hal/TARGET_Atmel/TARGET_SAM_CortexM0+/TARGET_SAMD21G18A/PinNames.h	Wed Sep 30 17:00:09 2015 +0100
@@ -0,0 +1,95 @@
+/* mbed Microcontroller Library
+ * Copyright (c) 2013 Nordic Semiconductor
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef MBED_PINNAMES_H
+#define MBED_PINNAMES_H
+
+#include "cmsis.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum {
+    PIN_INPUT,
+    PIN_OUTPUT,
+    PIN_INPUT_OUTPUT	//pin state can be set and read back
+} PinDirection;
+
+typedef enum {
+    PA00  = 0,
+    PA01  = 1,
+    PA02  = 2,
+    PA03  = 3,
+    PA04  = 4,
+    PA05  = 5,
+    PA06  = 6,
+    PA07  = 7,
+    PA08  = 8,
+    PA09  = 9,
+    PA10  = 10,
+    PA11  = 11,
+    PA12  = 12,
+    PA13  = 13,
+    PA14  = 14,
+    PA15  = 15,
+    PA16  = 16,
+    PA17  = 17,
+    PA18  = 18,
+    PA19  = 19,
+    PA20  = 20,
+    PA21  = 21,
+    PA22  = 22,
+    PA23  = 23,
+    PA24  = 24,
+    PA25  = 25,
+    PA27  = 27,
+    PA28  = 28,
+    PA30  = 30,
+    PA31  = 31,
+
+    PB02  = 34,
+    PB03  = 35,
+    PB08  = 40,
+    PB09  = 41,
+    PB10  = 42,
+    PB11  = 43,
+    PB22  = 54,
+    PB23  = 55,
+
+    USBTX = PB10,
+    USBRX = PB11,
+
+    LED1 = PA23,
+    LED2 = PA23,
+    LED3 = PA23,
+    LED4 = PA23,
+
+    // Not connected
+    NC = (int)0xFFFFFFFF
+} PinName;
+
+typedef enum {
+    PullNone = 0,
+    PullUp = 1,
+    PullDown = 2,
+    PullDefault = PullUp
+} PinMode;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/targets/hal/TARGET_Atmel/TARGET_SAM_CortexM0+/TARGET_SAMD21G18A/SAMW25_XPLAINED_PRO/mbed_overrides.c	Wed Sep 30 17:00:09 2015 +0100
@@ -0,0 +1,32 @@
+/* mbed Microcontroller Library
+ * Copyright (c) 2006-2013 ARM Limited
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#include "mbed_assert.h"
+#include "compiler.h"
+#include "system.h"
+
+uint8_t g_sys_init = 0;
+
+//called before main - implement here if board needs it ortherwise, let
+// the application override this if necessary
+//TODO: To be implemented by adding system init and board init
+void mbed_sdk_init()
+{
+    if(g_sys_init == 0) {
+        g_sys_init = 1;
+        system_init();
+    }
+}
+/***************************************************************/
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/targets/hal/TARGET_Atmel/TARGET_SAM_CortexM0+/TARGET_SAMD21G18A/SAMW25_XPLAINED_PRO/samw25_xplained_pro.h	Wed Sep 30 17:00:09 2015 +0100
@@ -0,0 +1,530 @@
+/**
+ * \file
+ *
+ * \brief SAM W25 Xplained Pro board definition
+ *
+ * Copyright (c) 2015 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef SAMW25_XPLAINED_PRO_H_INCLUDED
+#define SAMW25_XPLAINED_PRO_H_INCLUDED
+
+#include <conf_board.h>
+#include <compiler.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \ingroup group_common_boards
+ * \defgroup samd21_xplained_pro_group SAM D21 Xplained Pro board
+ *
+ * @{
+ */
+
+void system_board_init(void);
+
+/**
+ * \defgroup samd21_xplained_pro_features_group Features
+ *
+ * Symbols that describe features and capabilities of the board.
+ *
+ * @{
+ */
+
+/** Name string macro */
+#define BOARD_NAME                "SAMW25_XPLAINED_PRO"
+
+/** \name Resonator definitions
+ *  @{ */
+#define BOARD_FREQ_SLCK_XTAL      (32768U)
+#define BOARD_FREQ_SLCK_BYPASS    (32768U)
+#define BOARD_FREQ_MAINCK_XTAL    0 /* Not Mounted */
+#define BOARD_FREQ_MAINCK_BYPASS  0 /* Not Mounted */
+#define BOARD_MCK                 CHIP_FREQ_CPU_MAX
+#define BOARD_OSC_STARTUP_US      15625
+/** @} */
+
+/** \name LED0 definitions
+ *  @{ */
+#define LED0_PIN                  PIN_PA23
+#define LED0_ACTIVE               false
+#define LED0_INACTIVE             !LED0_ACTIVE
+/** @} */
+
+/** \name SW0 definitions
+ *  @{ */
+#define SW0_PIN                   PIN_PB23
+#define SW0_ACTIVE                false
+#define SW0_INACTIVE              !SW0_ACTIVE
+#define SW0_EIC_PIN               PIN_PB23A_EIC_EXTINT7
+#define SW0_EIC_MUX               MUX_PA23A_EIC_EXTINT7
+#define SW0_EIC_PINMUX            PINMUX_PA23A_EIC_EXTINT7
+#define SW0_EIC_LINE              7
+/** @} */
+
+/**
+ * \name LED #0 definitions
+ *
+ * Wrapper macros for LED0, to ensure common naming across all Xplained Pro
+ * boards.
+ *
+ *  @{ */
+#define LED_0_NAME                "LED0 (yellow)"
+#define LED_0_PIN                 LED0_PIN
+#define LED_0_ACTIVE              LED0_ACTIVE
+#define LED_0_INACTIVE            LED0_INACTIVE
+#define LED0_GPIO                 LED0_PIN
+#define LED0                      LED0_PIN
+
+#define LED_0_PWM_MODULE          TCC0
+#define LED_0_PWM_CHANNEL         0
+#define LED_0_PWM_OUTPUT          0
+#define LED_0_PWM_PIN             PIN_PA23F_TCC0_WO5
+#define LED_0_PWM_MUX             MUX_PA23F_TCC0_WO5
+#define LED_0_PWM_PINMUX          PINMUX_PA23F_TCC0_WO5
+/** @} */
+
+/** Number of on-board LEDs */
+#define LED_COUNT                 1
+
+
+/**
+ * \name Button #0 definitions
+ *
+ * Wrapper macros for SW0, to ensure common naming across all Xplained Pro
+ * boards.
+ *
+ *  @{ */
+#define BUTTON_0_NAME             "SW0"
+#define BUTTON_0_PIN              SW0_PIN
+#define BUTTON_0_ACTIVE           SW0_ACTIVE
+#define BUTTON_0_INACTIVE         SW0_INACTIVE
+#define BUTTON_0_EIC_PIN          SW0_EIC_PIN
+#define BUTTON_0_EIC_MUX          SW0_EIC_MUX
+#define BUTTON_0_EIC_PINMUX       SW0_EIC_PINMUX
+#define BUTTON_0_EIC_LINE         SW0_EIC_LINE
+/** @} */
+
+/** Number of on-board buttons */
+#define BUTTON_COUNT 1
+
+/** \name Extension header #1 pin definitions
+ *  @{
+ */
+#define EXT1_PIN_3                PIN_PA02
+#define EXT1_PIN_4                PIN_PA03
+#define EXT1_PIN_5                PIN_PB02
+#define EXT1_PIN_6                PIN_PB03
+#define EXT1_PIN_7                PIN_PA10
+#define EXT1_PIN_8                PIN_PA11
+#define EXT1_PIN_9                PIN_PA20
+#define EXT1_PIN_10               PIN_PA21
+#define EXT1_PIN_11               PIN_PA08
+#define EXT1_PIN_12               PIN_PA09
+#define EXT1_PIN_13               PIN_PB11
+#define EXT1_PIN_14               PIN_PB10
+#define EXT1_PIN_15               PIN_PA17
+#define EXT1_PIN_16               PIN_PA18
+#define EXT1_PIN_17               PIN_PA16
+#define EXT1_PIN_18               PIN_PA19
+/** @} */
+
+/** \name Extension header #1 pin definitions by function
+ *  @{
+ */
+#define EXT1_PIN_ADC_0            EXT1_PIN_3
+#define EXT1_PIN_ADC_1            EXT1_PIN_4
+#define EXT1_PIN_GPIO_0           EXT1_PIN_5
+#define EXT1_PIN_GPIO_1           EXT1_PIN_6
+#define EXT1_PIN_PWM_0            EXT1_PIN_7
+#define EXT1_PIN_PWM_1            EXT1_PIN_8
+#define EXT1_PIN_IRQ              EXT1_PIN_9
+#define EXT1_PIN_I2C_SDA          EXT1_PIN_11
+#define EXT1_PIN_I2C_SCL          EXT1_PIN_12
+#define EXT1_PIN_UART_RX          EXT1_PIN_13
+#define EXT1_PIN_UART_TX          EXT1_PIN_14
+#define EXT1_PIN_SPI_SS_1         EXT1_PIN_10
+#define EXT1_PIN_SPI_SS_0         EXT1_PIN_15
+#define EXT1_PIN_SPI_MOSI         EXT1_PIN_16
+#define EXT1_PIN_SPI_MISO         EXT1_PIN_17
+#define EXT1_PIN_SPI_SCK          EXT1_PIN_18
+/** @} */
+
+/** \name Extension header #1 ADC definitions
+ *  @{
+ */
+#define EXT1_ADC_MODULE           ADC
+#define EXT1_ADC_0_CHANNEL        0
+#define EXT1_ADC_0_PIN            PIN_PA02B_ADC_AIN0
+#define EXT1_ADC_0_MUX            MUX_PA02B_ADC_AIN0
+#define EXT1_ADC_0_PINMUX         PINMUX_PA02B_ADC_AIN0
+#define EXT1_ADC_1_CHANNEL        1
+#define EXT1_ADC_1_PIN            PIN_PA03B_ADC_AIN1
+#define EXT1_ADC_1_MUX            MUX_PA03B_ADC_AIN1
+#define EXT1_ADC_1_PINMUX         PINMUX_PA03B_ADC_AIN1
+/** @} */
+
+/** \name Extension header #1 PWM definitions
+ *  @{
+ */
+#define EXT1_PWM_MODULE           TCC0
+#define EXT1_PWM_0_CHANNEL        2
+#define EXT1_PWM_0_PIN            PIN_PA10F_TCC0_WO2
+#define EXT1_PWM_0_MUX            MUX_PA10F_TCC0_WO2
+#define EXT1_PWM_0_PINMUX         PINMUX_PA10F_TCC0_WO2
+#define EXT1_PWM_1_CHANNEL        3
+#define EXT1_PWM_1_PIN            PIN_PA11F_TCC0_WO3
+#define EXT1_PWM_1_MUX            MUX_PA11F_TCC0_WO3
+#define EXT1_PWM_1_PINMUX         PINMUX_PA11F_TCC0_WO3
+/** @} */
+
+/** \name Extension header #1 IRQ/External interrupt definitions
+ *  @{
+ */
+#define EXT1_IRQ_MODULE           EIC
+#define EXT1_IRQ_INPUT            4
+#define EXT1_IRQ_PIN              PIN_PA20A_EIC_EXTINT4
+#define EXT1_IRQ_MUX              MUX_PA20A_EIC_EXTINT4
+#define EXT1_IRQ_PINMUX           PINMUX_PA20A_EIC_EXTINT4
+/** @} */
+
+/** \name Extension header #1 I2C definitions
+ *  @{
+ */
+#define EXT1_I2C_MODULE              SERCOM0
+#define EXT1_I2C_SERCOM_PINMUX_PAD0  PINMUX_PA08C_SERCOM0_PAD0
+#define EXT1_I2C_SERCOM_PINMUX_PAD1  PINMUX_PA09C_SERCOM0_PAD1
+/** @} */
+
+/** \name Extension header #1 UART definitions
+ *  @{
+ */
+#define EXT1_UART_MODULE              SERCOM4
+#define EXT1_UART_SERCOM_MUX_SETTING  USART_RX_3_TX_2_XCK_3
+#define EXT1_UART_SERCOM_PINMUX_PAD0  PINMUX_UNUSED
+#define EXT1_UART_SERCOM_PINMUX_PAD1  PINMUX_UNUSED
+#define EXT1_UART_SERCOM_PINMUX_PAD2  PINMUX_PB10D_SERCOM4_PAD2
+#define EXT1_UART_SERCOM_PINMUX_PAD3  PINMUX_PB11D_SERCOM4_PAD3
+/** @} */
+
+/** \name Extension header #1 SPI definitions
+ *  @{
+ */
+#define EXT1_SPI_MODULE              SERCOM1
+#define EXT1_SPI_SERCOM_MUX_SETTING  SPI_SIGNAL_MUX_SETTING_E
+#define EXT1_SPI_SERCOM_PINMUX_PAD0  PINMUX_PA16C_SERCOM1_PAD0
+#define EXT1_SPI_SERCOM_PINMUX_PAD1  PINMUX_PA17C_SERCOM1_PAD1
+#define EXT1_SPI_SERCOM_PINMUX_PAD2  PINMUX_PA18C_SERCOM1_PAD2
+#define EXT1_SPI_SERCOM_PINMUX_PAD3  PINMUX_PA19C_SERCOM1_PAD3
+
+/** \name Extension header #3 pin definitions
+ *  @{
+ */
+#define EXT3_PIN_3                PIN_PA04
+#define EXT3_PIN_4                PIN_PA05
+#define EXT3_PIN_5                PIN_PB22
+#define EXT3_PIN_6                PIN_PB23
+#define EXT3_PIN_7                PIN_PA22
+#define EXT3_PIN_8                PIN_PA23
+#define EXT3_PIN_9                PIN_PA06
+#define EXT3_PIN_10               0
+#define EXT3_PIN_11               PIN_PA08
+#define EXT3_PIN_12               PIN_PA09
+#define EXT3_PIN_13               PIN_PA01
+#define EXT3_PIN_14               PIN_PA00
+#define EXT3_PIN_15               PIN_PA07
+#define EXT3_PIN_16               PIN_PA18
+#define EXT3_PIN_17               PIN_PA16
+#define EXT3_PIN_18               PIN_PA19
+/** @} */
+
+/** \name Extension header #3 pin definitions by function
+ *  @{
+ */
+#define EXT3_PIN_ADC_0            EXT3_PIN_3
+#define EXT3_PIN_ADC_1            EXT3_PIN_4
+#define EXT3_PIN_GPIO_0           EXT3_PIN_5
+#define EXT3_PIN_GPIO_1           EXT3_PIN_6
+#define EXT3_PIN_PWM_0            EXT3_PIN_7
+#define EXT3_PIN_PWM_1            EXT3_PIN_8
+#define EXT3_PIN_IRQ              EXT3_PIN_9
+#define EXT3_PIN_I2C_SDA          EXT3_PIN_11
+#define EXT3_PIN_I2C_SCL          EXT3_PIN_12
+#define EXT3_PIN_UART_RX          EXT3_PIN_13
+#define EXT3_PIN_UART_TX          EXT3_PIN_14
+#define EXT3_PIN_SPI_SS_0         EXT3_PIN_15
+#define EXT3_PIN_SPI_MOSI         EXT3_PIN_16
+#define EXT3_PIN_SPI_MISO         EXT3_PIN_17
+#define EXT3_PIN_SPI_SCK          EXT3_PIN_18
+/** @} */
+
+/** \name Extension header #3 ADC definitions
+ *  @{
+ */
+#define EXT3_ADC_MODULE           ADC
+#define EXT3_ADC_0_CHANNEL        4
+#define EXT3_ADC_0_PIN            PIN_PA04B_ADC_AIN4
+#define EXT3_ADC_0_MUX            MUX_PA04B_ADC_AIN4
+#define EXT3_ADC_0_PINMUX         PINMUX_PA04B_ADC_AIN4
+#define EXT3_ADC_1_CHANNEL        5
+#define EXT3_ADC_1_PIN            PIN_PA05B_ADC_AIN5
+#define EXT3_ADC_1_MUX            MUX_PA05B_ADC_AIN5
+#define EXT3_ADC_1_PINMUX         PINMUX_PA05B_ADC_AIN5
+/** @} */
+
+/** \name Extension header #3 PWM definitions
+ *  @{
+ */
+#define EXT3_PWM_MODULE           TC4
+#define EXT3_PWM_0_CHANNEL        0
+#define EXT3_PWM_0_PIN            PIN_PA22E_TC4_WO0
+#define EXT3_PWM_0_MUX            MUX_PA22E_TC4_WO0
+#define EXT3_PWM_0_PINMUX         PINMUX_PA22E_TC4_WO0
+#define EXT3_PWM_1_CHANNEL        1
+#define EXT3_PWM_1_PIN            PIN_PA23E_TC4_WO1
+#define EXT3_PWM_1_MUX            MUX_PA23E_TC4_WO1
+#define EXT3_PWM_1_PINMUX         PINMUX_PA23E_TC4_WO1
+/** @} */
+
+/** \name Extension header #3 IRQ/External interrupt definitions
+ *  @{
+ */
+#define EXT3_IRQ_MODULE           EIC
+#define EXT3_IRQ_INPUT            6
+#define EXT3_IRQ_PIN              PIN_PA06A_EIC_EXTINT6
+#define EXT3_IRQ_MUX              MUX_PA06A_EIC_EXTINT6
+#define EXT3_IRQ_PINMUX           PINMUX_PA06A_EIC_EXTINT6
+/** @} */
+
+/** \name Extension header #3 I2C definitions
+ *  @{
+ */
+#define EXT3_I2C_MODULE              SERCOM0
+#define EXT3_I2C_SERCOM_PINMUX_PAD0  PINMUX_PA08C_SERCOM0_PAD0
+#define EXT3_I2C_SERCOM_PINMUX_PAD1  PINMUX_PA09C_SERCOM0_PAD1
+/** @} */
+
+/** \name Extension header #3 UART definitions
+ *  @{
+ */
+#define EXT3_UART_MODULE              SERCOM1
+#define EXT3_UART_SERCOM_MUX_SETTING  USART_RX_1_TX_0_XCK_1
+#define EXT3_UART_SERCOM_PINMUX_PAD0  PINMUX_PA00D_SERCOM1_PAD0
+#define EXT3_UART_SERCOM_PINMUX_PAD1  PINMUX_PA01D_SERCOM1_PAD1
+#define EXT3_UART_SERCOM_PINMUX_PAD2  PINMUX_UNUSED
+#define EXT3_UART_SERCOM_PINMUX_PAD3  PINMUX_UNUSED
+/** @} */
+
+/** \name Extension header #3 SPI definitions
+ *  @{
+ */
+#define EXT3_SPI_MODULE              SERCOM1
+#define EXT3_SPI_SERCOM_MUX_SETTING  SPI_SIGNAL_MUX_SETTING_E
+#define EXT3_SPI_SERCOM_PINMUX_PAD0  PINMUX_PA16C_SERCOM1_PAD0
+#define EXT3_SPI_SERCOM_PINMUX_PAD1  PINMUX_UNUSED /* PA07 */
+#define EXT3_SPI_SERCOM_PINMUX_PAD2  PINMUX_PA18C_SERCOM1_PAD2
+#define EXT3_SPI_SERCOM_PINMUX_PAD3  PINMUX_PA19C_SERCOM1_PAD3
+/** @} */
+
+/** \name Extension header #3 Dataflash
+ *  @{
+ */
+#define EXT3_DATAFLASH_SPI_MODULE      EXT3_SPI_MODULE
+#define EXT3_DATAFLASH_SPI_MUX_SETTING EXT3_SPI_SERCOM_MUX_SETTING
+#define EXT3_DATAFLASH_SPI_PINMUX_PAD0 EXT3_SPI_SERCOM_PINMUX_PAD0
+#define EXT3_DATAFLASH_SPI_PINMUX_PAD1 EXT3_SPI_SERCOM_PINMUX_PAD1
+#define EXT3_DATAFLASH_SPI_PINMUX_PAD2 EXT3_SPI_SERCOM_PINMUX_PAD2
+#define EXT3_DATAFLASH_SPI_PINMUX_PAD3 EXT3_SPI_SERCOM_PINMUX_PAD3
+/** @} */
+
+/** \name USB definitions
+ * @{
+ */
+#define USB_ID
+#define USB_TARGET_DP_PIN            PIN_PA25G_USB_DP
+#define USB_TARGET_DP_MUX            MUX_PA25G_USB_DP
+#define USB_TARGET_DP_PINMUX         PINMUX_PA25G_USB_DP
+#define USB_TARGET_DM_PIN            PIN_PA24G_USB_DM
+#define USB_TARGET_DM_MUX            MUX_PA24G_USB_DM
+#define USB_TARGET_DM_PINMUX         PINMUX_PA24G_USB_DM
+#define USB_VBUS_PIN                 PIN_PA05
+#define USB_VBUS_EIC_LINE            5
+#define USB_VBUS_EIC_MUX             MUX_PA05A_EIC_EXTINT5
+#define USB_VBUS_EIC_PINMUX          PINMUX_PA05A_EIC_EXTINT5
+#define USB_ID_PIN                   PIN_PA04
+#define USB_ID_EIC_LINE              4
+#define USB_ID_EIC_MUX               MUX_PA04A_EIC_EXTINT4
+#define USB_ID_EIC_PINMUX            PINMUX_PA04A_EIC_EXTINT4
+/** @} */
+
+/** \name Embedded debugger GPIO interface definitions
+ * @{
+ */
+#define EDBG_GPIO0_PIN            PIN_PB22
+#define EDBG_GPIO1_PIN            PIN_PB23
+#define EDBG_GPIO2_PIN            PIN_PA22
+#define EDBG_GPIO3_PIN            PIN_PA24
+/** @} */
+
+/** \name Embedded debugger USART interface definitions
+ * @{
+ */
+#define EDBG_UART_MODULE          -1 /* Not available on this board */
+#define EDBG_UART_RX_PIN          -1 /* Not available on this board */
+#define EDBG_UART_RX_MUX          -1 /* Not available on this board */
+#define EDBG_UART_RX_PINMUX       -1 /* Not available on this board */
+#define EDBG_UART_RX_SERCOM_PAD   -1 /* Not available on this board */
+#define EDBG_UART_TX_PIN          -1 /* Not available on this board */
+#define EDBG_UART_TX_MUX          -1 /* Not available on this board */
+#define EDBG_UART_TX_PINMUX       -1 /* Not available on this board */
+#define EDBG_UART_TX_SERCOM_PAD   -1 /* Not available on this board */
+/** @} */
+
+/** \name Embedded debugger I2C interface definitions
+ * @{
+ */
+#define EDBG_I2C_MODULE              SERCOM0
+#define EDBG_I2C_SERCOM_PINMUX_PAD0  PINMUX_PA08C_SERCOM0_PAD0
+#define EDBG_I2C_SERCOM_PINMUX_PAD1  PINMUX_PA09C_SERCOM0_PAD1
+/** @} */
+
+/** \name Embedded debugger SPI interface definitions
+ * @{
+ */
+#define EDBG_SPI_MODULE              SERCOM1
+#define EDBG_SPI_SERCOM_MUX_SETTING  SPI_SIGNAL_MUX_SETTING_E
+#define EDBG_SPI_SERCOM_PINMUX_PAD0  PINMUX_PA16C_SERCOM1_PAD0
+#define EDBG_SPI_SERCOM_PINMUX_PAD1  PINMUX_UNUSED /* PA_06 */
+#define EDBG_SPI_SERCOM_PINMUX_PAD2  PINMUX_PA18C_SERCOM1_PAD2
+#define EDBG_SPI_SERCOM_PINMUX_PAD3  PINMUX_PA19C_SERCOM1_PAD3
+/** @} */
+
+/** \name Embedded debugger CDC Gateway USART interface definitions
+ * @{
+ */
+#define EDBG_CDC_MODULE              SERCOM4
+#define EDBG_CDC_SERCOM_MUX_SETTING  USART_RX_3_TX_2_XCK_3
+#define EDBG_CDC_SERCOM_PINMUX_PAD0  PINMUX_UNUSED
+#define EDBG_CDC_SERCOM_PINMUX_PAD1  PINMUX_UNUSED
+#define EDBG_CDC_SERCOM_PINMUX_PAD2  PINMUX_PB10D_SERCOM4_PAD2
+#define EDBG_CDC_SERCOM_PINMUX_PAD3  PINMUX_PB11D_SERCOM4_PAD3
+/** @} */
+
+/** @} */
+
+/** \name 802.15.4 TRX Interface definitions
+ * @{
+ */
+
+#define AT86RFX_SPI                  EXT1_SPI_MODULE
+#define AT86RFX_RST_PIN              EXT1_PIN_7
+#define AT86RFX_MISC_PIN             EXT1_PIN_12
+#define AT86RFX_IRQ_PIN              EXT1_PIN_9
+#define AT86RFX_SLP_PIN              EXT1_PIN_10
+#define AT86RFX_SPI_CS               EXT1_PIN_15
+#define AT86RFX_SPI_MOSI             EXT1_PIN_16
+#define AT86RFX_SPI_MISO             EXT1_PIN_17
+#define AT86RFX_SPI_SCK              EXT1_PIN_18
+#define AT86RFX_CSD                  EXT1_PIN_5
+#define AT86RFX_CPS                  EXT1_PIN_8
+
+#define AT86RFX_SPI_SERCOM_MUX_SETTING   EXT1_SPI_SERCOM_MUX_SETTING
+#define AT86RFX_SPI_SERCOM_PINMUX_PAD0   EXT1_SPI_SERCOM_PINMUX_PAD0
+#define AT86RFX_SPI_SERCOM_PINMUX_PAD1   PINMUX_UNUSED
+#define AT86RFX_SPI_SERCOM_PINMUX_PAD2   EXT1_SPI_SERCOM_PINMUX_PAD2
+#define AT86RFX_SPI_SERCOM_PINMUX_PAD3   EXT1_SPI_SERCOM_PINMUX_PAD3
+
+#define AT86RFX_IRQ_CHAN       EXT1_IRQ_INPUT
+#define AT86RFX_IRQ_PINMUX     EXT1_IRQ_PINMUX
+
+
+/** Enables the transceiver main interrupt. */
+#define ENABLE_TRX_IRQ()
+
+/** Disables the transceiver main interrupt. */
+#define DISABLE_TRX_IRQ()
+
+/** Clears the transceiver main interrupt. */
+#define CLEAR_TRX_IRQ()
+
+/*
+ * This macro saves the trx interrupt status and disables the trx interrupt.
+ */
+#define ENTER_TRX_REGION()
+
+/*
+ *  This macro restores the transceiver interrupt status
+ */
+#define LEAVE_TRX_REGION()
+
+/** @} */
+
+/**
+ * \brief Turns off the specified LEDs.
+ *
+ * \param led_gpio LED to turn off (LEDx_GPIO).
+ *
+ * \note The pins of the specified LEDs are set to GPIO output mode.
+ */
+#define LED_Off(led_gpio)     port_pin_set_output_level(led_gpio,true)
+
+/**
+ * \brief Turns on the specified LEDs.
+ *
+ * \param led_gpio LED to turn on (LEDx_GPIO).
+ *
+ * \note The pins of the specified LEDs are set to GPIO output mode.
+ */
+#define LED_On(led_gpio)      port_pin_set_output_level(led_gpio,false)
+
+/**
+ * \brief Toggles the specified LEDs.
+ *
+ * \param led_gpio LED to toggle (LEDx_GPIO).
+ *
+ * \note The pins of the specified LEDs are set to GPIO output mode.
+ */
+#define LED_Toggle(led_gpio)  port_pin_toggle_output_level(led_gpio)
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif  /* SAMW25_XPLAINED_PRO_H_INCLUDED */
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/targets/hal/TARGET_Atmel/TARGET_SAM_CortexM0+/TARGET_SAMD21G18A/analogout_api.c	Wed Sep 30 17:00:09 2015 +0100
@@ -0,0 +1,110 @@
+/* mbed Microcontroller Library
+ * Copyright (c) 2006-2013 ARM Limited
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#include "mbed_assert.h"
+#include "analogout_api.h"
+
+#include "cmsis.h"
+#include "pinmap.h"
+#include "PeripheralPins.h"
+#include "dac.h"
+
+struct dac_module dac_instance;
+extern uint8_t g_sys_init;
+
+#define MAX_VAL_10BIT 0x03FF
+
+void analogout_init(dac_t *obj, PinName pin)
+{
+    MBED_ASSERT(obj);
+    if (g_sys_init == 0) {
+        system_init();
+        g_sys_init = 1;
+    }
+
+    struct dac_config config_dac;
+    struct dac_chan_config config_dac_chan;
+    uint32_t pos_input;
+    pos_input = pinmap_find_peripheral(pin, PinMap_DAC);
+    MBED_ASSERT(pos_input != NC);
+
+    obj->dac = DAC_0;
+
+    dac_get_config_defaults(&config_dac);
+    dac_init(&dac_instance, (Dac *)DAC_0, &config_dac);
+
+    dac_chan_get_config_defaults(&config_dac_chan);
+    dac_chan_set_config(&dac_instance, DAC_CHANNEL_0, &config_dac_chan);
+    dac_chan_enable(&dac_instance, DAC_CHANNEL_0);
+
+    dac_enable(&dac_instance);
+}
+
+void analogout_free(dac_t *obj)
+{
+    MBED_ASSERT(obj);
+    struct system_pinmux_config pin_conf;
+
+    dac_disable(&dac_instance);
+    pin_conf.direction = SYSTEM_PINMUX_PIN_DIR_INPUT;
+    pin_conf.input_pull = SYSTEM_PINMUX_PIN_PULL_UP;
+    pin_conf.powersave    = false;
+    pin_conf.mux_position = SYSTEM_PINMUX_GPIO;
+    system_pinmux_pin_set_config(PA02, &pin_conf);  /*PA02 is the only DAC pin available*/
+}
+
+void analogout_write(dac_t *obj, float value)
+{
+    MBED_ASSERT(obj);
+    uint16_t count_val = 0;
+    if (value < 0.0f) {
+        count_val = 0;
+    } else if (value > 1.0f) {
+        count_val = MAX_VAL_10BIT;
+    } else {
+        count_val = (uint16_t)(value * (float)MAX_VAL_10BIT);
+    }
+    dac_chan_write(&dac_instance, DAC_CHANNEL_0, count_val);
+
+}
+
+void analogout_write_u16(dac_t *obj, uint16_t value)
+{
+    MBED_ASSERT(obj);
+    uint16_t count_val;
+    count_val = (uint16_t)((value * (float)MAX_VAL_10BIT) / 0xFFFF);  /*Normalization to the value 0xFFFF*/
+    dac_chan_write(&dac_instance, DAC_CHANNEL_0, count_val);
+
+}
+
+static uint32_t data_reg_read(dac_t *obj)
+{
+    Dac *const dac_module = (Dac *)obj->dac;
+    return (uint32_t)dac_module->DATA.reg;
+}
+
+float analogout_read(dac_t *obj)
+{
+    MBED_ASSERT(obj);
+    uint32_t data_val = data_reg_read(obj);
+    return data_val/(float)MAX_VAL_10BIT;
+}
+
+uint16_t analogout_read_u16(dac_t *obj)
+{
+    MBED_ASSERT(obj);
+    uint32_t data_val = data_reg_read(obj);
+    return (uint16_t)((data_val / (float)MAX_VAL_10BIT) * 0xFFFF);   /*Normalization to the value 0xFFFF*/
+}
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/targets/hal/TARGET_Atmel/TARGET_SAM_CortexM0+/TARGET_SAMD21G18A/device.h	Wed Sep 30 17:00:09 2015 +0100
@@ -0,0 +1,63 @@
+/* mbed Microcontroller Library
+ * Copyright (c) 2006-2013 ARM Limited
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef MBED_DEVICE_H
+#define MBED_DEVICE_H
+
+#define DEVICE_PORTIN           1
+#define DEVICE_PORTOUT          1
+#define DEVICE_PORTINOUT        1
+
+#define DEVICE_INTERRUPTIN      1
+
+#define DEVICE_ANALOGIN         1
+#define DEVICE_ANALOGOUT        1
+
+#define DEVICE_SERIAL           1
+#define DEVICE_SERIAL_FC        1
+#define DEVICE_SERIAL_ASYNCH    1
+
+#define DEVICE_I2C              1
+#define DEVICE_I2CSLAVE         1
+#define DEVICE_I2C_ASYNCH       1
+
+#define DEVICE_SPI              1
+#define DEVICE_SPISLAVE         1
+#define DEVICE_SPI_ASYNCH       1
+
+#define DEVICE_CAN              0
+
+#define DEVICE_RTC              1
+
+#define DEVICE_ETHERNET         0
+
+#define DEVICE_PWMOUT           1
+
+#define DEVICE_SEMIHOST         0
+#define DEVICE_LOCALFILESYSTEM  0
+#define DEVICE_ID_LENGTH        0
+#define DEVICE_MAC_OFFSET       0
+
+#define DEVICE_SLEEP            1
+
+#define DEVICE_DEBUG_AWARENESS  0
+
+#define DEVICE_STDIO_MESSAGES   0
+
+#define DEVICE_ERROR_PATTERN    0
+
+#include "objects.h"
+
+#endif
--- a/targets/hal/TARGET_Atmel/TARGET_SAM_CortexM0+/port_api.c	Mon Sep 28 20:15:09 2015 +0100
+++ b/targets/hal/TARGET_Atmel/TARGET_SAM_CortexM0+/port_api.c	Wed Sep 30 17:00:09 2015 +0100
@@ -25,6 +25,10 @@
 #elif defined(TARGET_SAMD21J18A)
 #define PORTA_MASK  0xDBFFFFFF  // mask for available pins in Port A
 #define PORTB_MASK  0xC0C3FFFF  // mask for available pins in Port B
+#elif defined(TARGET_SAMD21G18A)
+#define PORTA_MASK  0xDBFFFFFF  // mask for available pins in Port A
+#define PORTB_MASK  0x00C00F0C  // mask for available pins in Port B
+#else
 #endif
 
 uint32_t start_pin(PortName port)
--- a/targets/hal/TARGET_Atmel/TARGET_SAM_CortexM0+/pwmout_api.c	Mon Sep 28 20:15:09 2015 +0100
+++ b/targets/hal/TARGET_Atmel/TARGET_SAM_CortexM0+/pwmout_api.c	Wed Sep 30 17:00:09 2015 +0100
@@ -20,9 +20,6 @@
 
 #include "pinmap_function.h"
 
-/* Compare Channel used for PWM in TCC Modules */
-#define PWMOUT_CTRL_CHANNEL     0
-
 /* Prescaler values for TCC Module */
 const uint32_t tcc_prescaler[] = {
     TCC_CLOCK_PRESCALER_DIV1,
@@ -89,6 +86,7 @@
     PinName pin;
     uint32_t ch_index = NC;
     struct tcc_config config_tcc;
+    uint32_t tcc_channel = NC;
 
     /* Sanity check arguments */
     MBED_ASSERT(obj);
@@ -103,6 +101,15 @@
         /* Pin not supported */
         return 0;
     }
+    if ((ch_index == 0) || (ch_index == 4)) {
+        tcc_channel = 0;
+    } else if ((ch_index == 1) || (ch_index == 5)) {
+        tcc_channel = 1;
+    } else if ((ch_index == 2) || (ch_index == 6)) {
+        tcc_channel = 2;
+    } else if ((ch_index == 3) || (ch_index == 7)) {
+        tcc_channel = 3;
+    }
 
     tcc_get_config_defaults(&config_tcc, (Tcc*)pwm);
 
@@ -111,7 +118,7 @@
 
     config_tcc.counter.period = obj->period;
     config_tcc.compare.wave_generation = TCC_WAVE_GENERATION_SINGLE_SLOPE_PWM;
-    config_tcc.compare.match[PWMOUT_CTRL_CHANNEL] = obj->period * obj->duty_cycle;
+    config_tcc.compare.match[tcc_channel] = obj->period * obj->duty_cycle;
 
     config_tcc.pins.enable_wave_out_pin[ch_index] = true;
     config_tcc.pins.wave_out_pin[ch_index]        = pin;