mbed library sources. Supersedes mbed-src.
Dependents: Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more
targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/drivers/fsl_flash.c@169:e3b6fe271b81, 2017-07-19 (annotated)
- Committer:
- Kojto
- Date:
- Wed Jul 19 17:31:21 2017 +0100
- Revision:
- 169:e3b6fe271b81
- Parent:
- 154:37f96f9d4de2
This updates the lib to the mbed lib v 147
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 154:37f96f9d4de2 | 1 | /* |
<> | 154:37f96f9d4de2 | 2 | * Copyright (c) 2015-2016, Freescale Semiconductor, Inc. |
<> | 154:37f96f9d4de2 | 3 | * All rights reserved. |
<> | 154:37f96f9d4de2 | 4 | * |
<> | 154:37f96f9d4de2 | 5 | * Redistribution and use in source and binary forms, with or without modification, |
<> | 154:37f96f9d4de2 | 6 | * are permitted provided that the following conditions are met: |
<> | 154:37f96f9d4de2 | 7 | * |
<> | 154:37f96f9d4de2 | 8 | * o Redistributions of source code must retain the above copyright notice, this list |
<> | 154:37f96f9d4de2 | 9 | * of conditions and the following disclaimer. |
<> | 154:37f96f9d4de2 | 10 | * |
<> | 154:37f96f9d4de2 | 11 | * o Redistributions in binary form must reproduce the above copyright notice, this |
<> | 154:37f96f9d4de2 | 12 | * list of conditions and the following disclaimer in the documentation and/or |
<> | 154:37f96f9d4de2 | 13 | * other materials provided with the distribution. |
<> | 154:37f96f9d4de2 | 14 | * |
<> | 154:37f96f9d4de2 | 15 | * o Neither the name of Freescale Semiconductor, Inc. nor the names of its |
<> | 154:37f96f9d4de2 | 16 | * contributors may be used to endorse or promote products derived from this |
<> | 154:37f96f9d4de2 | 17 | * software without specific prior written permission. |
<> | 154:37f96f9d4de2 | 18 | * |
<> | 154:37f96f9d4de2 | 19 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND |
<> | 154:37f96f9d4de2 | 20 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
<> | 154:37f96f9d4de2 | 21 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
<> | 154:37f96f9d4de2 | 22 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR |
<> | 154:37f96f9d4de2 | 23 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
<> | 154:37f96f9d4de2 | 24 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
<> | 154:37f96f9d4de2 | 25 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON |
<> | 154:37f96f9d4de2 | 26 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
<> | 154:37f96f9d4de2 | 27 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
<> | 154:37f96f9d4de2 | 28 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
<> | 154:37f96f9d4de2 | 29 | */ |
<> | 154:37f96f9d4de2 | 30 | |
<> | 154:37f96f9d4de2 | 31 | #include "fsl_flash.h" |
<> | 154:37f96f9d4de2 | 32 | |
<> | 154:37f96f9d4de2 | 33 | /******************************************************************************* |
<> | 154:37f96f9d4de2 | 34 | * Definitions |
<> | 154:37f96f9d4de2 | 35 | ******************************************************************************/ |
<> | 154:37f96f9d4de2 | 36 | |
<> | 154:37f96f9d4de2 | 37 | /*! |
<> | 154:37f96f9d4de2 | 38 | * @name Misc utility defines |
<> | 154:37f96f9d4de2 | 39 | * @{ |
<> | 154:37f96f9d4de2 | 40 | */ |
<> | 154:37f96f9d4de2 | 41 | #ifndef ALIGN_DOWN |
<> | 154:37f96f9d4de2 | 42 | #define ALIGN_DOWN(x, a) ((x) & (uint32_t)(-((int32_t)(a)))) |
<> | 154:37f96f9d4de2 | 43 | #endif |
<> | 154:37f96f9d4de2 | 44 | #ifndef ALIGN_UP |
<> | 154:37f96f9d4de2 | 45 | #define ALIGN_UP(x, a) (-((int32_t)((uint32_t)(-((int32_t)(x))) & (uint32_t)(-((int32_t)(a)))))) |
<> | 154:37f96f9d4de2 | 46 | #endif |
<> | 154:37f96f9d4de2 | 47 | |
<> | 154:37f96f9d4de2 | 48 | #define BYTES_JOIN_TO_WORD_1_3(x, y) ((((uint32_t)(x)&0xFFU) << 24) | ((uint32_t)(y)&0xFFFFFFU)) |
<> | 154:37f96f9d4de2 | 49 | #define BYTES_JOIN_TO_WORD_2_2(x, y) ((((uint32_t)(x)&0xFFFFU) << 16) | ((uint32_t)(y)&0xFFFFU)) |
<> | 154:37f96f9d4de2 | 50 | #define BYTES_JOIN_TO_WORD_3_1(x, y) ((((uint32_t)(x)&0xFFFFFFU) << 8) | ((uint32_t)(y)&0xFFU)) |
<> | 154:37f96f9d4de2 | 51 | #define BYTES_JOIN_TO_WORD_1_1_2(x, y, z) \ |
<> | 154:37f96f9d4de2 | 52 | ((((uint32_t)(x)&0xFFU) << 24) | (((uint32_t)(y)&0xFFU) << 16) | ((uint32_t)(z)&0xFFFFU)) |
<> | 154:37f96f9d4de2 | 53 | #define BYTES_JOIN_TO_WORD_1_2_1(x, y, z) \ |
<> | 154:37f96f9d4de2 | 54 | ((((uint32_t)(x)&0xFFU) << 24) | (((uint32_t)(y)&0xFFFFU) << 8) | ((uint32_t)(z)&0xFFU)) |
<> | 154:37f96f9d4de2 | 55 | #define BYTES_JOIN_TO_WORD_2_1_1(x, y, z) \ |
<> | 154:37f96f9d4de2 | 56 | ((((uint32_t)(x)&0xFFFFU) << 16) | (((uint32_t)(y)&0xFFU) << 8) | ((uint32_t)(z)&0xFFU)) |
<> | 154:37f96f9d4de2 | 57 | #define BYTES_JOIN_TO_WORD_1_1_1_1(x, y, z, w) \ |
<> | 154:37f96f9d4de2 | 58 | ((((uint32_t)(x)&0xFFU) << 24) | (((uint32_t)(y)&0xFFU) << 16) | (((uint32_t)(z)&0xFFU) << 8) | \ |
<> | 154:37f96f9d4de2 | 59 | ((uint32_t)(w)&0xFFU)) |
<> | 154:37f96f9d4de2 | 60 | /*@}*/ |
<> | 154:37f96f9d4de2 | 61 | |
<> | 154:37f96f9d4de2 | 62 | /*! @brief Data flash IFR map Field*/ |
<> | 154:37f96f9d4de2 | 63 | #if defined(FSL_FEATURE_FLASH_IS_FTFE) && FSL_FEATURE_FLASH_IS_FTFE |
<> | 154:37f96f9d4de2 | 64 | #define DFLASH_IFR_READRESOURCE_START_ADDRESS 0x8003F8U |
<> | 154:37f96f9d4de2 | 65 | #else /* FSL_FEATURE_FLASH_IS_FTFL == 1 or FSL_FEATURE_FLASH_IS_FTFA = =1 */ |
<> | 154:37f96f9d4de2 | 66 | #define DFLASH_IFR_READRESOURCE_START_ADDRESS 0x8000F8U |
<> | 154:37f96f9d4de2 | 67 | #endif |
<> | 154:37f96f9d4de2 | 68 | |
<> | 154:37f96f9d4de2 | 69 | /*! |
<> | 154:37f96f9d4de2 | 70 | * @name Reserved FlexNVM size (For a variety of purposes) defines |
<> | 154:37f96f9d4de2 | 71 | * @{ |
<> | 154:37f96f9d4de2 | 72 | */ |
<> | 154:37f96f9d4de2 | 73 | #define FLEX_NVM_DFLASH_SIZE_FOR_DEPART_RESERVED 0xFFFFFFFFU |
<> | 154:37f96f9d4de2 | 74 | #define FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_RESERVED 0xFFFFU |
<> | 154:37f96f9d4de2 | 75 | /*@}*/ |
<> | 154:37f96f9d4de2 | 76 | |
<> | 154:37f96f9d4de2 | 77 | /*! |
<> | 154:37f96f9d4de2 | 78 | * @name Flash Program Once Field defines |
<> | 154:37f96f9d4de2 | 79 | * @{ |
<> | 154:37f96f9d4de2 | 80 | */ |
<> | 154:37f96f9d4de2 | 81 | #if defined(FSL_FEATURE_FLASH_IS_FTFA) && FSL_FEATURE_FLASH_IS_FTFA |
<> | 154:37f96f9d4de2 | 82 | /* FTFA parts(eg. K80, KL80, L5K) support both 4-bytes and 8-bytes unit size */ |
<> | 154:37f96f9d4de2 | 83 | #define FLASH_PROGRAM_ONCE_MIN_ID_8BYTES \ |
<> | 154:37f96f9d4de2 | 84 | 0x10U /* Minimum Index indcating one of Progam Once Fields which is accessed in 8-byte records */ |
<> | 154:37f96f9d4de2 | 85 | #define FLASH_PROGRAM_ONCE_MAX_ID_8BYTES \ |
<> | 154:37f96f9d4de2 | 86 | 0x13U /* Maximum Index indcating one of Progam Once Fields which is accessed in 8-byte records */ |
<> | 154:37f96f9d4de2 | 87 | #define FLASH_PROGRAM_ONCE_IS_4BYTES_UNIT_SUPPORT 1 |
<> | 154:37f96f9d4de2 | 88 | #define FLASH_PROGRAM_ONCE_IS_8BYTES_UNIT_SUPPORT 1 |
<> | 154:37f96f9d4de2 | 89 | #elif defined(FSL_FEATURE_FLASH_IS_FTFE) && FSL_FEATURE_FLASH_IS_FTFE |
<> | 154:37f96f9d4de2 | 90 | /* FTFE parts(eg. K65, KE18) only support 8-bytes unit size */ |
<> | 154:37f96f9d4de2 | 91 | #define FLASH_PROGRAM_ONCE_IS_4BYTES_UNIT_SUPPORT 0 |
<> | 154:37f96f9d4de2 | 92 | #define FLASH_PROGRAM_ONCE_IS_8BYTES_UNIT_SUPPORT 1 |
<> | 154:37f96f9d4de2 | 93 | #elif defined(FSL_FEATURE_FLASH_IS_FTFL) && FSL_FEATURE_FLASH_IS_FTFL |
<> | 154:37f96f9d4de2 | 94 | /* FTFL parts(eg. K20) only support 4-bytes unit size */ |
<> | 154:37f96f9d4de2 | 95 | #define FLASH_PROGRAM_ONCE_IS_4BYTES_UNIT_SUPPORT 1 |
<> | 154:37f96f9d4de2 | 96 | #define FLASH_PROGRAM_ONCE_IS_8BYTES_UNIT_SUPPORT 0 |
<> | 154:37f96f9d4de2 | 97 | #endif |
<> | 154:37f96f9d4de2 | 98 | /*@}*/ |
<> | 154:37f96f9d4de2 | 99 | |
<> | 154:37f96f9d4de2 | 100 | /*! |
<> | 154:37f96f9d4de2 | 101 | * @name Flash security status defines |
<> | 154:37f96f9d4de2 | 102 | * @{ |
<> | 154:37f96f9d4de2 | 103 | */ |
<> | 154:37f96f9d4de2 | 104 | #define FLASH_SECURITY_STATE_KEYEN 0x80U |
<> | 154:37f96f9d4de2 | 105 | #define FLASH_SECURITY_STATE_UNSECURED 0x02U |
<> | 154:37f96f9d4de2 | 106 | #define FLASH_NOT_SECURE 0x01U |
<> | 154:37f96f9d4de2 | 107 | #define FLASH_SECURE_BACKDOOR_ENABLED 0x02U |
<> | 154:37f96f9d4de2 | 108 | #define FLASH_SECURE_BACKDOOR_DISABLED 0x04U |
<> | 154:37f96f9d4de2 | 109 | /*@}*/ |
<> | 154:37f96f9d4de2 | 110 | |
<> | 154:37f96f9d4de2 | 111 | /*! |
<> | 154:37f96f9d4de2 | 112 | * @name Flash controller command numbers |
<> | 154:37f96f9d4de2 | 113 | * @{ |
<> | 154:37f96f9d4de2 | 114 | */ |
<> | 154:37f96f9d4de2 | 115 | #define FTFx_VERIFY_BLOCK 0x00U /*!< RD1BLK*/ |
<> | 154:37f96f9d4de2 | 116 | #define FTFx_VERIFY_SECTION 0x01U /*!< RD1SEC*/ |
<> | 154:37f96f9d4de2 | 117 | #define FTFx_PROGRAM_CHECK 0x02U /*!< PGMCHK*/ |
<> | 154:37f96f9d4de2 | 118 | #define FTFx_READ_RESOURCE 0x03U /*!< RDRSRC*/ |
<> | 154:37f96f9d4de2 | 119 | #define FTFx_PROGRAM_LONGWORD 0x06U /*!< PGM4*/ |
<> | 154:37f96f9d4de2 | 120 | #define FTFx_PROGRAM_PHRASE 0x07U /*!< PGM8*/ |
<> | 154:37f96f9d4de2 | 121 | #define FTFx_ERASE_BLOCK 0x08U /*!< ERSBLK*/ |
<> | 154:37f96f9d4de2 | 122 | #define FTFx_ERASE_SECTOR 0x09U /*!< ERSSCR*/ |
<> | 154:37f96f9d4de2 | 123 | #define FTFx_PROGRAM_SECTION 0x0BU /*!< PGMSEC*/ |
<> | 154:37f96f9d4de2 | 124 | #define FTFx_GENERATE_CRC 0x0CU /*!< CRCGEN*/ |
<> | 154:37f96f9d4de2 | 125 | #define FTFx_VERIFY_ALL_BLOCK 0x40U /*!< RD1ALL*/ |
<> | 154:37f96f9d4de2 | 126 | #define FTFx_READ_ONCE 0x41U /*!< RDONCE or RDINDEX*/ |
<> | 154:37f96f9d4de2 | 127 | #define FTFx_PROGRAM_ONCE 0x43U /*!< PGMONCE or PGMINDEX*/ |
<> | 154:37f96f9d4de2 | 128 | #define FTFx_ERASE_ALL_BLOCK 0x44U /*!< ERSALL*/ |
<> | 154:37f96f9d4de2 | 129 | #define FTFx_SECURITY_BY_PASS 0x45U /*!< VFYKEY*/ |
<> | 154:37f96f9d4de2 | 130 | #define FTFx_SWAP_CONTROL 0x46U /*!< SWAP*/ |
<> | 154:37f96f9d4de2 | 131 | #define FTFx_ERASE_ALL_BLOCK_UNSECURE 0x49U /*!< ERSALLU*/ |
<> | 154:37f96f9d4de2 | 132 | #define FTFx_VERIFY_ALL_EXECUTE_ONLY_SEGMENT 0x4AU /*!< RD1XA*/ |
<> | 154:37f96f9d4de2 | 133 | #define FTFx_ERASE_ALL_EXECUTE_ONLY_SEGMENT 0x4BU /*!< ERSXA*/ |
<> | 154:37f96f9d4de2 | 134 | #define FTFx_PROGRAM_PARTITION 0x80U /*!< PGMPART)*/ |
<> | 154:37f96f9d4de2 | 135 | #define FTFx_SET_FLEXRAM_FUNCTION 0x81U /*!< SETRAM*/ |
<> | 154:37f96f9d4de2 | 136 | /*@}*/ |
<> | 154:37f96f9d4de2 | 137 | |
<> | 154:37f96f9d4de2 | 138 | /*! |
<> | 154:37f96f9d4de2 | 139 | * @name Common flash register info defines |
<> | 154:37f96f9d4de2 | 140 | * @{ |
<> | 154:37f96f9d4de2 | 141 | */ |
<> | 154:37f96f9d4de2 | 142 | #if defined(FTFA) |
<> | 154:37f96f9d4de2 | 143 | #define FTFx FTFA |
<> | 154:37f96f9d4de2 | 144 | #define FTFx_BASE FTFA_BASE |
<> | 154:37f96f9d4de2 | 145 | #define FTFx_FSTAT_CCIF_MASK FTFA_FSTAT_CCIF_MASK |
<> | 154:37f96f9d4de2 | 146 | #define FTFx_FSTAT_RDCOLERR_MASK FTFA_FSTAT_RDCOLERR_MASK |
<> | 154:37f96f9d4de2 | 147 | #define FTFx_FSTAT_ACCERR_MASK FTFA_FSTAT_ACCERR_MASK |
<> | 154:37f96f9d4de2 | 148 | #define FTFx_FSTAT_FPVIOL_MASK FTFA_FSTAT_FPVIOL_MASK |
<> | 154:37f96f9d4de2 | 149 | #define FTFx_FSTAT_MGSTAT0_MASK FTFA_FSTAT_MGSTAT0_MASK |
<> | 154:37f96f9d4de2 | 150 | #define FTFx_FSEC_SEC_MASK FTFA_FSEC_SEC_MASK |
<> | 154:37f96f9d4de2 | 151 | #define FTFx_FSEC_KEYEN_MASK FTFA_FSEC_KEYEN_MASK |
<> | 154:37f96f9d4de2 | 152 | #if defined(FSL_FEATURE_FLASH_HAS_FLEX_RAM) && FSL_FEATURE_FLASH_HAS_FLEX_RAM |
<> | 154:37f96f9d4de2 | 153 | #define FTFx_FCNFG_RAMRDY_MASK FTFA_FCNFG_RAMRDY_MASK |
<> | 154:37f96f9d4de2 | 154 | #endif /* FSL_FEATURE_FLASH_HAS_FLEX_RAM */ |
<> | 154:37f96f9d4de2 | 155 | #if defined(FSL_FEATURE_FLASH_HAS_FLEX_NVM) && FSL_FEATURE_FLASH_HAS_FLEX_NVM |
<> | 154:37f96f9d4de2 | 156 | #define FTFx_FCNFG_EEERDY_MASK FTFA_FCNFG_EEERDY_MASK |
<> | 154:37f96f9d4de2 | 157 | #endif /* FSL_FEATURE_FLASH_HAS_FLEX_NVM */ |
<> | 154:37f96f9d4de2 | 158 | #elif defined(FTFE) |
<> | 154:37f96f9d4de2 | 159 | #define FTFx FTFE |
<> | 154:37f96f9d4de2 | 160 | #define FTFx_BASE FTFE_BASE |
<> | 154:37f96f9d4de2 | 161 | #define FTFx_FSTAT_CCIF_MASK FTFE_FSTAT_CCIF_MASK |
<> | 154:37f96f9d4de2 | 162 | #define FTFx_FSTAT_RDCOLERR_MASK FTFE_FSTAT_RDCOLERR_MASK |
<> | 154:37f96f9d4de2 | 163 | #define FTFx_FSTAT_ACCERR_MASK FTFE_FSTAT_ACCERR_MASK |
<> | 154:37f96f9d4de2 | 164 | #define FTFx_FSTAT_FPVIOL_MASK FTFE_FSTAT_FPVIOL_MASK |
<> | 154:37f96f9d4de2 | 165 | #define FTFx_FSTAT_MGSTAT0_MASK FTFE_FSTAT_MGSTAT0_MASK |
<> | 154:37f96f9d4de2 | 166 | #define FTFx_FSEC_SEC_MASK FTFE_FSEC_SEC_MASK |
<> | 154:37f96f9d4de2 | 167 | #define FTFx_FSEC_KEYEN_MASK FTFE_FSEC_KEYEN_MASK |
<> | 154:37f96f9d4de2 | 168 | #if defined(FSL_FEATURE_FLASH_HAS_FLEX_RAM) && FSL_FEATURE_FLASH_HAS_FLEX_RAM |
<> | 154:37f96f9d4de2 | 169 | #define FTFx_FCNFG_RAMRDY_MASK FTFE_FCNFG_RAMRDY_MASK |
<> | 154:37f96f9d4de2 | 170 | #endif /* FSL_FEATURE_FLASH_HAS_FLEX_RAM */ |
<> | 154:37f96f9d4de2 | 171 | #if defined(FSL_FEATURE_FLASH_HAS_FLEX_NVM) && FSL_FEATURE_FLASH_HAS_FLEX_NVM |
<> | 154:37f96f9d4de2 | 172 | #define FTFx_FCNFG_EEERDY_MASK FTFE_FCNFG_EEERDY_MASK |
<> | 154:37f96f9d4de2 | 173 | #endif /* FSL_FEATURE_FLASH_HAS_FLEX_NVM */ |
<> | 154:37f96f9d4de2 | 174 | #elif defined(FTFL) |
<> | 154:37f96f9d4de2 | 175 | #define FTFx FTFL |
<> | 154:37f96f9d4de2 | 176 | #define FTFx_BASE FTFL_BASE |
<> | 154:37f96f9d4de2 | 177 | #define FTFx_FSTAT_CCIF_MASK FTFL_FSTAT_CCIF_MASK |
<> | 154:37f96f9d4de2 | 178 | #define FTFx_FSTAT_RDCOLERR_MASK FTFL_FSTAT_RDCOLERR_MASK |
<> | 154:37f96f9d4de2 | 179 | #define FTFx_FSTAT_ACCERR_MASK FTFL_FSTAT_ACCERR_MASK |
<> | 154:37f96f9d4de2 | 180 | #define FTFx_FSTAT_FPVIOL_MASK FTFL_FSTAT_FPVIOL_MASK |
<> | 154:37f96f9d4de2 | 181 | #define FTFx_FSTAT_MGSTAT0_MASK FTFL_FSTAT_MGSTAT0_MASK |
<> | 154:37f96f9d4de2 | 182 | #define FTFx_FSEC_SEC_MASK FTFL_FSEC_SEC_MASK |
<> | 154:37f96f9d4de2 | 183 | #define FTFx_FSEC_KEYEN_MASK FTFL_FSEC_KEYEN_MASK |
<> | 154:37f96f9d4de2 | 184 | #if defined(FSL_FEATURE_FLASH_HAS_FLEX_RAM) && FSL_FEATURE_FLASH_HAS_FLEX_RAM |
<> | 154:37f96f9d4de2 | 185 | #define FTFx_FCNFG_RAMRDY_MASK FTFL_FCNFG_RAMRDY_MASK |
<> | 154:37f96f9d4de2 | 186 | #endif /* FSL_FEATURE_FLASH_HAS_FLEX_RAM */ |
<> | 154:37f96f9d4de2 | 187 | #if defined(FSL_FEATURE_FLASH_HAS_FLEX_NVM) && FSL_FEATURE_FLASH_HAS_FLEX_NVM |
<> | 154:37f96f9d4de2 | 188 | #define FTFx_FCNFG_EEERDY_MASK FTFL_FCNFG_EEERDY_MASK |
<> | 154:37f96f9d4de2 | 189 | #endif /* FSL_FEATURE_FLASH_HAS_FLEX_NVM */ |
<> | 154:37f96f9d4de2 | 190 | #else |
<> | 154:37f96f9d4de2 | 191 | #error "Unknown flash controller" |
<> | 154:37f96f9d4de2 | 192 | #endif |
<> | 154:37f96f9d4de2 | 193 | /*@}*/ |
<> | 154:37f96f9d4de2 | 194 | |
<> | 154:37f96f9d4de2 | 195 | /*! |
<> | 154:37f96f9d4de2 | 196 | * @name Common flash register access info defines |
<> | 154:37f96f9d4de2 | 197 | * @{ |
<> | 154:37f96f9d4de2 | 198 | */ |
<> | 154:37f96f9d4de2 | 199 | #if defined(FTFA_FCCOB_CCOBn_MASK) || defined(FTFE_FCCOB_CCOBn_MASK) || defined(FTFL_FCCOB_CCOBn_MASK) |
<> | 154:37f96f9d4de2 | 200 | #define FTFx_FCCOB3_REG (FTFx->FCCOB[0]) |
<> | 154:37f96f9d4de2 | 201 | #define FTFx_FCCOB5_REG (FTFx->FCCOB[6]) |
<> | 154:37f96f9d4de2 | 202 | #define FTFx_FCCOB6_REG (FTFx->FCCOB[5]) |
<> | 154:37f96f9d4de2 | 203 | #define FTFx_FCCOB7_REG (FTFx->FCCOB[4]) |
<> | 154:37f96f9d4de2 | 204 | #else |
<> | 154:37f96f9d4de2 | 205 | #define FTFx_FCCOB3_REG (FTFx->FCCOB3) |
<> | 154:37f96f9d4de2 | 206 | #define FTFx_FCCOB5_REG (FTFx->FCCOB5) |
<> | 154:37f96f9d4de2 | 207 | #define FTFx_FCCOB6_REG (FTFx->FCCOB6) |
<> | 154:37f96f9d4de2 | 208 | #define FTFx_FCCOB7_REG (FTFx->FCCOB7) |
<> | 154:37f96f9d4de2 | 209 | #endif |
<> | 154:37f96f9d4de2 | 210 | |
<> | 154:37f96f9d4de2 | 211 | #if defined(FTFA_FPROT_PROT_MASK) || defined(FTFE_FPROT_PROT_MASK) || defined(FTFL_FPROT_PROT_MASK) |
<> | 154:37f96f9d4de2 | 212 | #define FTFx_FPROT_LOW_REG (FTFx->FPROT[4]) |
<> | 154:37f96f9d4de2 | 213 | #define FTFx_FPROTL3_REG (FTFx->FPROT[4]) |
<> | 154:37f96f9d4de2 | 214 | #define FTFx_FPROTL2_REG (FTFx->FPROT[5]) |
<> | 154:37f96f9d4de2 | 215 | #define FTFx_FPROTL1_REG (FTFx->FPROT[6]) |
<> | 154:37f96f9d4de2 | 216 | #define FTFx_FPROTL0_REG (FTFx->FPROT[7]) |
<> | 154:37f96f9d4de2 | 217 | #define FTFx_FPROT_HIGH_REG (FTFx->FPROT[0]) |
<> | 154:37f96f9d4de2 | 218 | #define FTFx_FPROTH3_REG (FTFx->FPROT[0]) |
<> | 154:37f96f9d4de2 | 219 | #define FTFx_FPROTH2_REG (FTFx->FPROT[1]) |
<> | 154:37f96f9d4de2 | 220 | #define FTFx_FPROTH1_REG (FTFx->FPROT[2]) |
<> | 154:37f96f9d4de2 | 221 | #define FTFx_FPROTH0_REG (FTFx->FPROT[3]) |
<> | 154:37f96f9d4de2 | 222 | #else |
<> | 154:37f96f9d4de2 | 223 | #define FTFx_FPROT_LOW_REG (FTFx->FPROT3) |
<> | 154:37f96f9d4de2 | 224 | #define FTFx_FPROTL3_REG (FTFx->FPROT3) |
<> | 154:37f96f9d4de2 | 225 | #define FTFx_FPROTL2_REG (FTFx->FPROT2) |
<> | 154:37f96f9d4de2 | 226 | #define FTFx_FPROTL1_REG (FTFx->FPROT1) |
<> | 154:37f96f9d4de2 | 227 | #define FTFx_FPROTL0_REG (FTFx->FPROT0) |
<> | 154:37f96f9d4de2 | 228 | #endif |
<> | 154:37f96f9d4de2 | 229 | |
<> | 154:37f96f9d4de2 | 230 | #if FLASH_SSD_IS_SECONDARY_FLASH_SUPPORTED && FLASH_SSD_SECONDARY_FLASH_HAS_ITS_OWN_PROTECTION_REGISTER |
<> | 154:37f96f9d4de2 | 231 | #if defined(FTFA_FPROTS_PROTS_MASK) || defined(FTFE_FPROTS_PROTS_MASK) || defined(FTFL_FPROTS_PROTS_MASK) |
<> | 154:37f96f9d4de2 | 232 | #define FTFx_FPROTSH_REG (FTFx->FPROTS[1]) |
<> | 154:37f96f9d4de2 | 233 | #define FTFx_FPROTSL_REG (FTFx->FPROTS[0]) |
<> | 154:37f96f9d4de2 | 234 | #else |
<> | 154:37f96f9d4de2 | 235 | #define FTFx_FPROTSH_REG (FTFx->FPROTSH) |
<> | 154:37f96f9d4de2 | 236 | #define FTFx_FPROTSL_REG (FTFx->FPROTSL) |
<> | 154:37f96f9d4de2 | 237 | #endif |
<> | 154:37f96f9d4de2 | 238 | #endif |
<> | 154:37f96f9d4de2 | 239 | |
<> | 154:37f96f9d4de2 | 240 | #if defined(FTFA_XACC_XA_MASK) || defined(FTFE_XACC_XA_MASK) || defined(FTFL_XACC_XA_MASK) |
<> | 154:37f96f9d4de2 | 241 | #define FTFx_XACCH3_REG (FTFx->XACC[0]) |
<> | 154:37f96f9d4de2 | 242 | #define FTFx_XACCL3_REG (FTFx->XACC[4]) |
<> | 154:37f96f9d4de2 | 243 | #else |
<> | 154:37f96f9d4de2 | 244 | #define FTFx_XACCH3_REG (FTFx->XACCH3) |
<> | 154:37f96f9d4de2 | 245 | #define FTFx_XACCL3_REG (FTFx->XACCL3) |
<> | 154:37f96f9d4de2 | 246 | #endif |
<> | 154:37f96f9d4de2 | 247 | |
<> | 154:37f96f9d4de2 | 248 | #if FLASH_SSD_IS_SECONDARY_FLASH_SUPPORTED && FLASH_SSD_SECONDARY_FLASH_HAS_ITS_OWN_ACCESS_REGISTER |
<> | 154:37f96f9d4de2 | 249 | #if defined(FTFA_XACCS_XA_S_MASK) || defined(FTFE_XACCS_XA_S_MASK) || defined(FTFL_XACCS_XA_S_MASK) |
<> | 154:37f96f9d4de2 | 250 | #define FTFx_XACCSH_REG (FTFx->XACCS[1]) |
<> | 154:37f96f9d4de2 | 251 | #define FTFx_XACCSL_REG (FTFx->XACCS[0]) |
<> | 154:37f96f9d4de2 | 252 | #else |
<> | 154:37f96f9d4de2 | 253 | #define FTFx_XACCSH_REG (FTFx->XACCSH) |
<> | 154:37f96f9d4de2 | 254 | #define FTFx_XACCSL_REG (FTFx->XACCSL) |
<> | 154:37f96f9d4de2 | 255 | #endif |
<> | 154:37f96f9d4de2 | 256 | #endif |
<> | 154:37f96f9d4de2 | 257 | /*@}*/ |
<> | 154:37f96f9d4de2 | 258 | |
<> | 154:37f96f9d4de2 | 259 | /*! |
<> | 154:37f96f9d4de2 | 260 | * @brief Enumeration for access segment property. |
<> | 154:37f96f9d4de2 | 261 | */ |
<> | 154:37f96f9d4de2 | 262 | enum _flash_access_segment_property |
<> | 154:37f96f9d4de2 | 263 | { |
<> | 154:37f96f9d4de2 | 264 | kFLASH_AccessSegmentBase = 256UL, |
<> | 154:37f96f9d4de2 | 265 | }; |
<> | 154:37f96f9d4de2 | 266 | |
<> | 154:37f96f9d4de2 | 267 | /*! |
<> | 154:37f96f9d4de2 | 268 | * @brief Enumeration for flash config area. |
<> | 154:37f96f9d4de2 | 269 | */ |
<> | 154:37f96f9d4de2 | 270 | enum _flash_config_area_range |
<> | 154:37f96f9d4de2 | 271 | { |
<> | 154:37f96f9d4de2 | 272 | kFLASH_ConfigAreaStart = 0x400U, |
<> | 154:37f96f9d4de2 | 273 | kFLASH_ConfigAreaEnd = 0x40FU |
<> | 154:37f96f9d4de2 | 274 | }; |
<> | 154:37f96f9d4de2 | 275 | |
<> | 154:37f96f9d4de2 | 276 | /*! |
<> | 154:37f96f9d4de2 | 277 | * @name Flash register access type defines |
<> | 154:37f96f9d4de2 | 278 | * @{ |
<> | 154:37f96f9d4de2 | 279 | */ |
<> | 154:37f96f9d4de2 | 280 | #define FTFx_REG8_ACCESS_TYPE volatile uint8_t * |
<> | 154:37f96f9d4de2 | 281 | #define FTFx_REG32_ACCESS_TYPE volatile uint32_t * |
<> | 154:37f96f9d4de2 | 282 | /*@}*/ |
<> | 154:37f96f9d4de2 | 283 | |
<> | 154:37f96f9d4de2 | 284 | /*! |
<> | 154:37f96f9d4de2 | 285 | * @brief MSCM prefetch speculation defines. |
<> | 154:37f96f9d4de2 | 286 | */ |
<> | 154:37f96f9d4de2 | 287 | #define MSCM_OCMDR_OCMC1_DFDS_MASK (0x10U) |
<> | 154:37f96f9d4de2 | 288 | #define MSCM_OCMDR_OCMC1_DFCS_MASK (0x20U) |
<> | 154:37f96f9d4de2 | 289 | |
<> | 154:37f96f9d4de2 | 290 | #define MSCM_OCMDR_OCMC1_DFDS_SHIFT (4U) |
<> | 154:37f96f9d4de2 | 291 | #define MSCM_OCMDR_OCMC1_DFCS_SHIFT (5U) |
<> | 154:37f96f9d4de2 | 292 | |
<> | 154:37f96f9d4de2 | 293 | /******************************************************************************* |
<> | 154:37f96f9d4de2 | 294 | * Prototypes |
<> | 154:37f96f9d4de2 | 295 | ******************************************************************************/ |
<> | 154:37f96f9d4de2 | 296 | |
<> | 154:37f96f9d4de2 | 297 | #if FLASH_DRIVER_IS_FLASH_RESIDENT |
<> | 154:37f96f9d4de2 | 298 | /*! @brief Copy flash_run_command() to RAM*/ |
<> | 154:37f96f9d4de2 | 299 | static void copy_flash_run_command(uint32_t *flashRunCommand); |
<> | 154:37f96f9d4de2 | 300 | /*! @brief Copy flash_cache_clear_command() to RAM*/ |
<> | 154:37f96f9d4de2 | 301 | static void copy_flash_common_bit_operation(uint32_t *flashCommonBitOperation); |
<> | 154:37f96f9d4de2 | 302 | /*! @brief Check whether flash execute-in-ram functions are ready*/ |
<> | 154:37f96f9d4de2 | 303 | static status_t flash_check_execute_in_ram_function_info(flash_config_t *config); |
<> | 154:37f96f9d4de2 | 304 | #endif /* FLASH_DRIVER_IS_FLASH_RESIDENT */ |
<> | 154:37f96f9d4de2 | 305 | |
<> | 154:37f96f9d4de2 | 306 | /*! @brief Internal function Flash command sequence. Called by driver APIs only*/ |
<> | 154:37f96f9d4de2 | 307 | static status_t flash_command_sequence(flash_config_t *config); |
<> | 154:37f96f9d4de2 | 308 | |
<> | 154:37f96f9d4de2 | 309 | /*! @brief Perform the cache clear to the flash*/ |
<> | 154:37f96f9d4de2 | 310 | void flash_cache_clear(flash_config_t *config); |
<> | 154:37f96f9d4de2 | 311 | |
<> | 154:37f96f9d4de2 | 312 | /*! @brief Validates the range and alignment of the given address range.*/ |
<> | 154:37f96f9d4de2 | 313 | static status_t flash_check_range(flash_config_t *config, |
<> | 154:37f96f9d4de2 | 314 | uint32_t startAddress, |
<> | 154:37f96f9d4de2 | 315 | uint32_t lengthInBytes, |
<> | 154:37f96f9d4de2 | 316 | uint32_t alignmentBaseline); |
<> | 154:37f96f9d4de2 | 317 | /*! @brief Gets the right address, sector and block size of current flash type which is indicated by address.*/ |
<> | 154:37f96f9d4de2 | 318 | static status_t flash_get_matched_operation_info(flash_config_t *config, |
<> | 154:37f96f9d4de2 | 319 | uint32_t address, |
<> | 154:37f96f9d4de2 | 320 | flash_operation_config_t *info); |
<> | 154:37f96f9d4de2 | 321 | /*! @brief Validates the given user key for flash erase APIs.*/ |
<> | 154:37f96f9d4de2 | 322 | static status_t flash_check_user_key(uint32_t key); |
<> | 154:37f96f9d4de2 | 323 | |
<> | 154:37f96f9d4de2 | 324 | #if FLASH_SSD_IS_FLEXNVM_ENABLED |
<> | 154:37f96f9d4de2 | 325 | /*! @brief Updates FlexNVM memory partition status according to data flash 0 IFR.*/ |
<> | 154:37f96f9d4de2 | 326 | static status_t flash_update_flexnvm_memory_partition_status(flash_config_t *config); |
<> | 154:37f96f9d4de2 | 327 | #endif /* FLASH_SSD_IS_FLEXNVM_ENABLED */ |
<> | 154:37f96f9d4de2 | 328 | |
<> | 154:37f96f9d4de2 | 329 | #if defined(FSL_FEATURE_FLASH_HAS_READ_RESOURCE_CMD) && FSL_FEATURE_FLASH_HAS_READ_RESOURCE_CMD |
<> | 154:37f96f9d4de2 | 330 | /*! @brief Validates the range of the given resource address.*/ |
<> | 154:37f96f9d4de2 | 331 | static status_t flash_check_resource_range(uint32_t start, |
<> | 154:37f96f9d4de2 | 332 | uint32_t lengthInBytes, |
<> | 154:37f96f9d4de2 | 333 | uint32_t alignmentBaseline, |
<> | 154:37f96f9d4de2 | 334 | flash_read_resource_option_t option); |
<> | 154:37f96f9d4de2 | 335 | #endif /* FSL_FEATURE_FLASH_HAS_READ_RESOURCE_CMD */ |
<> | 154:37f96f9d4de2 | 336 | |
<> | 154:37f96f9d4de2 | 337 | #if defined(FSL_FEATURE_FLASH_HAS_SWAP_CONTROL_CMD) && FSL_FEATURE_FLASH_HAS_SWAP_CONTROL_CMD |
<> | 154:37f96f9d4de2 | 338 | /*! @brief Validates the gived swap control option.*/ |
<> | 154:37f96f9d4de2 | 339 | static status_t flash_check_swap_control_option(flash_swap_control_option_t option); |
<> | 154:37f96f9d4de2 | 340 | #endif /* FSL_FEATURE_FLASH_HAS_SWAP_CONTROL_CMD */ |
<> | 154:37f96f9d4de2 | 341 | |
<> | 154:37f96f9d4de2 | 342 | #if defined(FSL_FEATURE_FLASH_HAS_PFLASH_BLOCK_SWAP) && FSL_FEATURE_FLASH_HAS_PFLASH_BLOCK_SWAP |
<> | 154:37f96f9d4de2 | 343 | /*! @brief Validates the gived address to see if it is equal to swap indicator address in pflash swap IFR.*/ |
<> | 154:37f96f9d4de2 | 344 | static status_t flash_validate_swap_indicator_address(flash_config_t *config, uint32_t address); |
<> | 154:37f96f9d4de2 | 345 | #endif /* FSL_FEATURE_FLASH_HAS_PFLASH_BLOCK_SWAP */ |
<> | 154:37f96f9d4de2 | 346 | |
<> | 154:37f96f9d4de2 | 347 | #if defined(FSL_FEATURE_FLASH_HAS_SET_FLEXRAM_FUNCTION_CMD) && FSL_FEATURE_FLASH_HAS_SET_FLEXRAM_FUNCTION_CMD |
<> | 154:37f96f9d4de2 | 348 | /*! @brief Validates the gived flexram function option.*/ |
<> | 154:37f96f9d4de2 | 349 | static inline status_t flasn_check_flexram_function_option_range(flash_flexram_function_option_t option); |
<> | 154:37f96f9d4de2 | 350 | #endif /* FSL_FEATURE_FLASH_HAS_SET_FLEXRAM_FUNCTION_CMD */ |
<> | 154:37f96f9d4de2 | 351 | |
<> | 154:37f96f9d4de2 | 352 | /*! @brief Gets the flash protection information (region size, region count).*/ |
<> | 154:37f96f9d4de2 | 353 | static status_t flash_get_protection_info(flash_config_t *config, flash_protection_config_t *info); |
<> | 154:37f96f9d4de2 | 354 | |
<> | 154:37f96f9d4de2 | 355 | #if defined(FSL_FEATURE_FLASH_HAS_ACCESS_CONTROL) && FSL_FEATURE_FLASH_HAS_ACCESS_CONTROL |
<> | 154:37f96f9d4de2 | 356 | /*! @brief Gets the flash Execute-Only access information (Segment size, Segment count).*/ |
<> | 154:37f96f9d4de2 | 357 | static status_t flash_get_access_info(flash_config_t *config, flash_access_config_t *info); |
<> | 154:37f96f9d4de2 | 358 | #endif /* FSL_FEATURE_FLASH_HAS_ACCESS_CONTROL */ |
<> | 154:37f96f9d4de2 | 359 | |
<> | 154:37f96f9d4de2 | 360 | /******************************************************************************* |
<> | 154:37f96f9d4de2 | 361 | * Variables |
<> | 154:37f96f9d4de2 | 362 | ******************************************************************************/ |
<> | 154:37f96f9d4de2 | 363 | |
<> | 154:37f96f9d4de2 | 364 | /*! @brief Access to FTFx->FCCOB */ |
<> | 154:37f96f9d4de2 | 365 | volatile uint32_t *const kFCCOBx = (volatile uint32_t *)&FTFx_FCCOB3_REG; |
<> | 154:37f96f9d4de2 | 366 | /*! @brief Access to FTFx->FPROT */ |
<> | 154:37f96f9d4de2 | 367 | volatile uint32_t *const kFPROTL = (volatile uint32_t *)&FTFx_FPROT_LOW_REG; |
<> | 154:37f96f9d4de2 | 368 | #if defined(FTFx_FPROT_HIGH_REG) |
<> | 154:37f96f9d4de2 | 369 | volatile uint32_t *const kFPROTH = (volatile uint32_t *)&FTFx_FPROT_HIGH_REG; |
<> | 154:37f96f9d4de2 | 370 | #endif |
<> | 154:37f96f9d4de2 | 371 | |
<> | 154:37f96f9d4de2 | 372 | #if FLASH_SSD_IS_SECONDARY_FLASH_SUPPORTED && FLASH_SSD_SECONDARY_FLASH_HAS_ITS_OWN_PROTECTION_REGISTER |
<> | 154:37f96f9d4de2 | 373 | volatile uint8_t *const kFPROTSL = (volatile uint8_t *)&FTFx_FPROTSL_REG; |
<> | 154:37f96f9d4de2 | 374 | volatile uint8_t *const kFPROTSH = (volatile uint8_t *)&FTFx_FPROTSH_REG; |
<> | 154:37f96f9d4de2 | 375 | #endif |
<> | 154:37f96f9d4de2 | 376 | |
<> | 154:37f96f9d4de2 | 377 | #if FLASH_DRIVER_IS_FLASH_RESIDENT |
<> | 154:37f96f9d4de2 | 378 | /*! @brief A function pointer used to point to relocated flash_run_command() */ |
<> | 154:37f96f9d4de2 | 379 | static void (*callFlashRunCommand)(FTFx_REG8_ACCESS_TYPE ftfx_fstat); |
<> | 154:37f96f9d4de2 | 380 | /*! @brief A function pointer used to point to relocated flash_common_bit_operation() */ |
<> | 154:37f96f9d4de2 | 381 | static void (*callFlashCommonBitOperation)(FTFx_REG32_ACCESS_TYPE base, |
<> | 154:37f96f9d4de2 | 382 | uint32_t bitMask, |
<> | 154:37f96f9d4de2 | 383 | uint32_t bitShift, |
<> | 154:37f96f9d4de2 | 384 | uint32_t bitValue); |
<> | 154:37f96f9d4de2 | 385 | |
<> | 154:37f96f9d4de2 | 386 | /*! |
<> | 154:37f96f9d4de2 | 387 | * @brief Position independent code of flash_run_command() |
<> | 154:37f96f9d4de2 | 388 | * |
<> | 154:37f96f9d4de2 | 389 | * Note1: The prototype of C function is shown as below: |
<> | 154:37f96f9d4de2 | 390 | * @code |
<> | 154:37f96f9d4de2 | 391 | * void flash_run_command(FTFx_REG8_ACCESS_TYPE ftfx_fstat) |
<> | 154:37f96f9d4de2 | 392 | * { |
<> | 154:37f96f9d4de2 | 393 | * // clear CCIF bit |
<> | 154:37f96f9d4de2 | 394 | * *ftfx_fstat = FTFx_FSTAT_CCIF_MASK; |
<> | 154:37f96f9d4de2 | 395 | * |
<> | 154:37f96f9d4de2 | 396 | * // Check CCIF bit of the flash status register, wait till it is set. |
<> | 154:37f96f9d4de2 | 397 | * // IP team indicates that this loop will always complete. |
<> | 154:37f96f9d4de2 | 398 | * while (!((*ftfx_fstat) & FTFx_FSTAT_CCIF_MASK)) |
<> | 154:37f96f9d4de2 | 399 | * { |
<> | 154:37f96f9d4de2 | 400 | * } |
<> | 154:37f96f9d4de2 | 401 | * } |
<> | 154:37f96f9d4de2 | 402 | * @endcode |
<> | 154:37f96f9d4de2 | 403 | * Note2: The binary code is generated by IAR 7.70.1 |
<> | 154:37f96f9d4de2 | 404 | */ |
Kojto | 169:e3b6fe271b81 | 405 | static const uint16_t s_flashRunCommandFunctionCode[] = { |
<> | 154:37f96f9d4de2 | 406 | 0x2180, /* MOVS R1, #128 ; 0x80 */ |
<> | 154:37f96f9d4de2 | 407 | 0x7001, /* STRB R1, [R0] */ |
<> | 154:37f96f9d4de2 | 408 | /* @4: */ |
<> | 154:37f96f9d4de2 | 409 | 0x7802, /* LDRB R2, [R0] */ |
<> | 154:37f96f9d4de2 | 410 | 0x420a, /* TST R2, R1 */ |
<> | 154:37f96f9d4de2 | 411 | 0xd0fc, /* BEQ.N @4 */ |
<> | 154:37f96f9d4de2 | 412 | 0x4770 /* BX LR */ |
<> | 154:37f96f9d4de2 | 413 | }; |
<> | 154:37f96f9d4de2 | 414 | |
<> | 154:37f96f9d4de2 | 415 | /*! |
<> | 154:37f96f9d4de2 | 416 | * @brief Position independent code of flash_common_bit_operation() |
<> | 154:37f96f9d4de2 | 417 | * |
<> | 154:37f96f9d4de2 | 418 | * Note1: The prototype of C function is shown as below: |
<> | 154:37f96f9d4de2 | 419 | * @code |
<> | 154:37f96f9d4de2 | 420 | * void flash_common_bit_operation(FTFx_REG32_ACCESS_TYPE base, uint32_t bitMask, uint32_t bitShift, uint32_t |
<> | 154:37f96f9d4de2 | 421 | * bitValue) |
<> | 154:37f96f9d4de2 | 422 | * { |
<> | 154:37f96f9d4de2 | 423 | * if (bitMask) |
<> | 154:37f96f9d4de2 | 424 | * { |
<> | 154:37f96f9d4de2 | 425 | * uint32_t value = (((uint32_t)(((uint32_t)(bitValue)) << bitShift)) & bitMask); |
<> | 154:37f96f9d4de2 | 426 | * *base = (*base & (~bitMask)) | value; |
<> | 154:37f96f9d4de2 | 427 | * } |
<> | 154:37f96f9d4de2 | 428 | * |
<> | 154:37f96f9d4de2 | 429 | * __ISB(); |
<> | 154:37f96f9d4de2 | 430 | * __DSB(); |
<> | 154:37f96f9d4de2 | 431 | * } |
<> | 154:37f96f9d4de2 | 432 | * @endcode |
<> | 154:37f96f9d4de2 | 433 | * Note2: The binary code is generated by IAR 7.70.1 |
<> | 154:37f96f9d4de2 | 434 | */ |
Kojto | 169:e3b6fe271b81 | 435 | static const uint16_t s_flashCommonBitOperationFunctionCode[] = { |
<> | 154:37f96f9d4de2 | 436 | 0xb510, /* PUSH {R4, LR} */ |
<> | 154:37f96f9d4de2 | 437 | 0x2900, /* CMP R1, #0 */ |
<> | 154:37f96f9d4de2 | 438 | 0xd005, /* BEQ.N @12 */ |
<> | 154:37f96f9d4de2 | 439 | 0x6804, /* LDR R4, [R0] */ |
<> | 154:37f96f9d4de2 | 440 | 0x438c, /* BICS R4, R4, R1 */ |
<> | 154:37f96f9d4de2 | 441 | 0x4093, /* LSLS R3, R3, R2 */ |
<> | 154:37f96f9d4de2 | 442 | 0x4019, /* ANDS R1, R1, R3 */ |
<> | 154:37f96f9d4de2 | 443 | 0x4321, /* ORRS R1, R1, R4 */ |
<> | 154:37f96f9d4de2 | 444 | 0x6001, /* STR R1, [R0] */ |
<> | 154:37f96f9d4de2 | 445 | /* @12: */ |
<> | 154:37f96f9d4de2 | 446 | 0xf3bf, 0x8f6f, /* ISB */ |
<> | 154:37f96f9d4de2 | 447 | 0xf3bf, 0x8f4f, /* DSB */ |
<> | 154:37f96f9d4de2 | 448 | 0xbd10 /* POP {R4, PC} */ |
<> | 154:37f96f9d4de2 | 449 | }; |
<> | 154:37f96f9d4de2 | 450 | #endif /* FLASH_DRIVER_IS_FLASH_RESIDENT */ |
<> | 154:37f96f9d4de2 | 451 | |
<> | 154:37f96f9d4de2 | 452 | #if (FLASH_DRIVER_IS_FLASH_RESIDENT && !FLASH_DRIVER_IS_EXPORTED) |
<> | 154:37f96f9d4de2 | 453 | /*! @brief A static buffer used to hold flash_run_command() */ |
<> | 154:37f96f9d4de2 | 454 | static uint32_t s_flashRunCommand[kFLASH_ExecuteInRamFunctionMaxSizeInWords]; |
<> | 154:37f96f9d4de2 | 455 | /*! @brief A static buffer used to hold flash_common_bit_operation() */ |
<> | 154:37f96f9d4de2 | 456 | static uint32_t s_flashCommonBitOperation[kFLASH_ExecuteInRamFunctionMaxSizeInWords]; |
<> | 154:37f96f9d4de2 | 457 | /*! @brief Flash execute-in-ram function information */ |
<> | 154:37f96f9d4de2 | 458 | static flash_execute_in_ram_function_config_t s_flashExecuteInRamFunctionInfo; |
<> | 154:37f96f9d4de2 | 459 | #endif |
<> | 154:37f96f9d4de2 | 460 | |
<> | 154:37f96f9d4de2 | 461 | /*! |
<> | 154:37f96f9d4de2 | 462 | * @brief Table of pflash sizes. |
<> | 154:37f96f9d4de2 | 463 | * |
<> | 154:37f96f9d4de2 | 464 | * The index into this table is the value of the SIM_FCFG1.PFSIZE bitfield. |
<> | 154:37f96f9d4de2 | 465 | * |
<> | 154:37f96f9d4de2 | 466 | * The values in this table have been right shifted 10 bits so that they will all fit within |
<> | 154:37f96f9d4de2 | 467 | * an 16-bit integer. To get the actual flash density, you must left shift the looked up value |
<> | 154:37f96f9d4de2 | 468 | * by 10 bits. |
<> | 154:37f96f9d4de2 | 469 | * |
<> | 154:37f96f9d4de2 | 470 | * Elements of this table have a value of 0 in cases where the PFSIZE bitfield value is |
<> | 154:37f96f9d4de2 | 471 | * reserved. |
<> | 154:37f96f9d4de2 | 472 | * |
<> | 154:37f96f9d4de2 | 473 | * Code to use the table: |
<> | 154:37f96f9d4de2 | 474 | * @code |
<> | 154:37f96f9d4de2 | 475 | * uint8_t pfsize = (SIM->FCFG1 & SIM_FCFG1_PFSIZE_MASK) >> SIM_FCFG1_PFSIZE_SHIFT; |
<> | 154:37f96f9d4de2 | 476 | * flashDensity = ((uint32_t)kPFlashDensities[pfsize]) << 10; |
<> | 154:37f96f9d4de2 | 477 | * @endcode |
<> | 154:37f96f9d4de2 | 478 | */ |
<> | 154:37f96f9d4de2 | 479 | const uint16_t kPFlashDensities[] = { |
<> | 154:37f96f9d4de2 | 480 | 8, /* 0x0 - 8192, 8KB */ |
<> | 154:37f96f9d4de2 | 481 | 16, /* 0x1 - 16384, 16KB */ |
<> | 154:37f96f9d4de2 | 482 | 24, /* 0x2 - 24576, 24KB */ |
<> | 154:37f96f9d4de2 | 483 | 32, /* 0x3 - 32768, 32KB */ |
<> | 154:37f96f9d4de2 | 484 | 48, /* 0x4 - 49152, 48KB */ |
<> | 154:37f96f9d4de2 | 485 | 64, /* 0x5 - 65536, 64KB */ |
<> | 154:37f96f9d4de2 | 486 | 96, /* 0x6 - 98304, 96KB */ |
<> | 154:37f96f9d4de2 | 487 | 128, /* 0x7 - 131072, 128KB */ |
<> | 154:37f96f9d4de2 | 488 | 192, /* 0x8 - 196608, 192KB */ |
<> | 154:37f96f9d4de2 | 489 | 256, /* 0x9 - 262144, 256KB */ |
<> | 154:37f96f9d4de2 | 490 | 384, /* 0xa - 393216, 384KB */ |
<> | 154:37f96f9d4de2 | 491 | 512, /* 0xb - 524288, 512KB */ |
<> | 154:37f96f9d4de2 | 492 | 768, /* 0xc - 786432, 768KB */ |
<> | 154:37f96f9d4de2 | 493 | 1024, /* 0xd - 1048576, 1MB */ |
<> | 154:37f96f9d4de2 | 494 | 1536, /* 0xe - 1572864, 1.5MB */ |
<> | 154:37f96f9d4de2 | 495 | /* 2048, 0xf - 2097152, 2MB */ |
<> | 154:37f96f9d4de2 | 496 | }; |
<> | 154:37f96f9d4de2 | 497 | |
<> | 154:37f96f9d4de2 | 498 | /******************************************************************************* |
<> | 154:37f96f9d4de2 | 499 | * Code |
<> | 154:37f96f9d4de2 | 500 | ******************************************************************************/ |
<> | 154:37f96f9d4de2 | 501 | |
<> | 154:37f96f9d4de2 | 502 | status_t FLASH_Init(flash_config_t *config) |
<> | 154:37f96f9d4de2 | 503 | { |
<> | 154:37f96f9d4de2 | 504 | if (config == NULL) |
<> | 154:37f96f9d4de2 | 505 | { |
<> | 154:37f96f9d4de2 | 506 | return kStatus_FLASH_InvalidArgument; |
<> | 154:37f96f9d4de2 | 507 | } |
<> | 154:37f96f9d4de2 | 508 | |
<> | 154:37f96f9d4de2 | 509 | #if FLASH_SSD_IS_SECONDARY_FLASH_SUPPORTED |
<> | 154:37f96f9d4de2 | 510 | if (config->FlashMemoryIndex == (uint32_t)kFLASH_MemoryIndexSecondaryFlash) |
<> | 154:37f96f9d4de2 | 511 | { |
<> | 154:37f96f9d4de2 | 512 | /* calculate the flash density from SIM_FCFG1.PFSIZE */ |
<> | 154:37f96f9d4de2 | 513 | #if defined(SIM_FCFG1_CORE1_PFSIZE_MASK) |
<> | 154:37f96f9d4de2 | 514 | uint32_t flashDensity; |
<> | 154:37f96f9d4de2 | 515 | uint8_t pfsize = (SIM->FCFG1 & SIM_FCFG1_CORE1_PFSIZE_MASK) >> SIM_FCFG1_CORE1_PFSIZE_SHIFT; |
<> | 154:37f96f9d4de2 | 516 | if (pfsize == 0xf) |
<> | 154:37f96f9d4de2 | 517 | { |
<> | 154:37f96f9d4de2 | 518 | flashDensity = FSL_FEATURE_FLASH_PFLASH_1_BLOCK_COUNT * FSL_FEATURE_FLASH_PFLASH_1_BLOCK_SIZE; |
<> | 154:37f96f9d4de2 | 519 | } |
<> | 154:37f96f9d4de2 | 520 | else |
<> | 154:37f96f9d4de2 | 521 | { |
<> | 154:37f96f9d4de2 | 522 | flashDensity = ((uint32_t)kPFlashDensities[pfsize]) << 10; |
<> | 154:37f96f9d4de2 | 523 | } |
<> | 154:37f96f9d4de2 | 524 | config->PFlashTotalSize = flashDensity; |
<> | 154:37f96f9d4de2 | 525 | #else |
<> | 154:37f96f9d4de2 | 526 | /* Unused code to solve MISRA-C issue*/ |
<> | 154:37f96f9d4de2 | 527 | config->PFlashBlockBase = kPFlashDensities[0]; |
<> | 154:37f96f9d4de2 | 528 | config->PFlashTotalSize = FSL_FEATURE_FLASH_PFLASH_1_BLOCK_COUNT * FSL_FEATURE_FLASH_PFLASH_1_BLOCK_SIZE; |
<> | 154:37f96f9d4de2 | 529 | #endif |
<> | 154:37f96f9d4de2 | 530 | config->PFlashBlockBase = FSL_FEATURE_FLASH_PFLASH_1_START_ADDRESS; |
<> | 154:37f96f9d4de2 | 531 | config->PFlashBlockCount = FSL_FEATURE_FLASH_PFLASH_1_BLOCK_COUNT; |
<> | 154:37f96f9d4de2 | 532 | config->PFlashSectorSize = FSL_FEATURE_FLASH_PFLASH_1_BLOCK_SECTOR_SIZE; |
<> | 154:37f96f9d4de2 | 533 | } |
<> | 154:37f96f9d4de2 | 534 | else |
<> | 154:37f96f9d4de2 | 535 | #endif /* FLASH_SSD_IS_SECONDARY_FLASH_SUPPORTED */ |
<> | 154:37f96f9d4de2 | 536 | { |
<> | 154:37f96f9d4de2 | 537 | uint32_t flashDensity; |
<> | 154:37f96f9d4de2 | 538 | |
<> | 154:37f96f9d4de2 | 539 | /* calculate the flash density from SIM_FCFG1.PFSIZE */ |
<> | 154:37f96f9d4de2 | 540 | #if defined(SIM_FCFG1_CORE0_PFSIZE_MASK) |
<> | 154:37f96f9d4de2 | 541 | uint8_t pfsize = (SIM->FCFG1 & SIM_FCFG1_CORE0_PFSIZE_MASK) >> SIM_FCFG1_CORE0_PFSIZE_SHIFT; |
<> | 154:37f96f9d4de2 | 542 | #elif defined(SIM_FCFG1_PFSIZE_MASK) |
<> | 154:37f96f9d4de2 | 543 | uint8_t pfsize = (SIM->FCFG1 & SIM_FCFG1_PFSIZE_MASK) >> SIM_FCFG1_PFSIZE_SHIFT; |
<> | 154:37f96f9d4de2 | 544 | #else |
<> | 154:37f96f9d4de2 | 545 | #error "Unknown flash size" |
<> | 154:37f96f9d4de2 | 546 | #endif |
<> | 154:37f96f9d4de2 | 547 | /* PFSIZE=0xf means that on customer parts the IFR was not correctly programmed. |
<> | 154:37f96f9d4de2 | 548 | * We just use the pre-defined flash size in feature file here to support pre-production parts */ |
<> | 154:37f96f9d4de2 | 549 | if (pfsize == 0xf) |
<> | 154:37f96f9d4de2 | 550 | { |
<> | 154:37f96f9d4de2 | 551 | flashDensity = FSL_FEATURE_FLASH_PFLASH_BLOCK_COUNT * FSL_FEATURE_FLASH_PFLASH_BLOCK_SIZE; |
<> | 154:37f96f9d4de2 | 552 | } |
<> | 154:37f96f9d4de2 | 553 | else |
<> | 154:37f96f9d4de2 | 554 | { |
<> | 154:37f96f9d4de2 | 555 | flashDensity = ((uint32_t)kPFlashDensities[pfsize]) << 10; |
<> | 154:37f96f9d4de2 | 556 | } |
<> | 154:37f96f9d4de2 | 557 | |
<> | 154:37f96f9d4de2 | 558 | /* fill out a few of the structure members */ |
<> | 154:37f96f9d4de2 | 559 | config->PFlashBlockBase = FSL_FEATURE_FLASH_PFLASH_START_ADDRESS; |
<> | 154:37f96f9d4de2 | 560 | config->PFlashTotalSize = flashDensity; |
<> | 154:37f96f9d4de2 | 561 | config->PFlashBlockCount = FSL_FEATURE_FLASH_PFLASH_BLOCK_COUNT; |
<> | 154:37f96f9d4de2 | 562 | config->PFlashSectorSize = FSL_FEATURE_FLASH_PFLASH_BLOCK_SECTOR_SIZE; |
<> | 154:37f96f9d4de2 | 563 | } |
<> | 154:37f96f9d4de2 | 564 | |
<> | 154:37f96f9d4de2 | 565 | { |
<> | 154:37f96f9d4de2 | 566 | #if defined(FSL_FEATURE_FLASH_HAS_ACCESS_CONTROL) && FSL_FEATURE_FLASH_HAS_ACCESS_CONTROL |
<> | 154:37f96f9d4de2 | 567 | #if FLASH_SSD_IS_SECONDARY_FLASH_SUPPORTED && FLASH_SSD_SECONDARY_FLASH_HAS_ITS_OWN_ACCESS_REGISTER |
<> | 154:37f96f9d4de2 | 568 | if (config->FlashMemoryIndex == (uint32_t)kFLASH_MemoryIndexSecondaryFlash) |
<> | 154:37f96f9d4de2 | 569 | { |
<> | 154:37f96f9d4de2 | 570 | config->PFlashAccessSegmentSize = kFLASH_AccessSegmentBase << FTFx->FACSSS; |
<> | 154:37f96f9d4de2 | 571 | config->PFlashAccessSegmentCount = FTFx->FACSNS; |
<> | 154:37f96f9d4de2 | 572 | } |
<> | 154:37f96f9d4de2 | 573 | else |
<> | 154:37f96f9d4de2 | 574 | #endif |
<> | 154:37f96f9d4de2 | 575 | { |
<> | 154:37f96f9d4de2 | 576 | config->PFlashAccessSegmentSize = kFLASH_AccessSegmentBase << FTFx->FACSS; |
<> | 154:37f96f9d4de2 | 577 | config->PFlashAccessSegmentCount = FTFx->FACSN; |
<> | 154:37f96f9d4de2 | 578 | } |
<> | 154:37f96f9d4de2 | 579 | #else |
<> | 154:37f96f9d4de2 | 580 | config->PFlashAccessSegmentSize = 0; |
<> | 154:37f96f9d4de2 | 581 | config->PFlashAccessSegmentCount = 0; |
<> | 154:37f96f9d4de2 | 582 | #endif /* FSL_FEATURE_FLASH_HAS_ACCESS_CONTROL */ |
<> | 154:37f96f9d4de2 | 583 | } |
<> | 154:37f96f9d4de2 | 584 | |
<> | 154:37f96f9d4de2 | 585 | config->PFlashCallback = NULL; |
<> | 154:37f96f9d4de2 | 586 | |
<> | 154:37f96f9d4de2 | 587 | /* copy required flash commands to RAM */ |
<> | 154:37f96f9d4de2 | 588 | #if (FLASH_DRIVER_IS_FLASH_RESIDENT && !FLASH_DRIVER_IS_EXPORTED) |
<> | 154:37f96f9d4de2 | 589 | if (kStatus_FLASH_Success != flash_check_execute_in_ram_function_info(config)) |
<> | 154:37f96f9d4de2 | 590 | { |
<> | 154:37f96f9d4de2 | 591 | s_flashExecuteInRamFunctionInfo.activeFunctionCount = 0; |
<> | 154:37f96f9d4de2 | 592 | s_flashExecuteInRamFunctionInfo.flashRunCommand = s_flashRunCommand; |
<> | 154:37f96f9d4de2 | 593 | s_flashExecuteInRamFunctionInfo.flashCommonBitOperation = s_flashCommonBitOperation; |
<> | 154:37f96f9d4de2 | 594 | config->flashExecuteInRamFunctionInfo = &s_flashExecuteInRamFunctionInfo.activeFunctionCount; |
<> | 154:37f96f9d4de2 | 595 | FLASH_PrepareExecuteInRamFunctions(config); |
<> | 154:37f96f9d4de2 | 596 | } |
<> | 154:37f96f9d4de2 | 597 | #endif |
<> | 154:37f96f9d4de2 | 598 | |
<> | 154:37f96f9d4de2 | 599 | config->FlexRAMBlockBase = FSL_FEATURE_FLASH_FLEX_RAM_START_ADDRESS; |
<> | 154:37f96f9d4de2 | 600 | config->FlexRAMTotalSize = FSL_FEATURE_FLASH_FLEX_RAM_SIZE; |
<> | 154:37f96f9d4de2 | 601 | |
<> | 154:37f96f9d4de2 | 602 | #if FLASH_SSD_IS_FLEXNVM_ENABLED |
<> | 154:37f96f9d4de2 | 603 | { |
<> | 154:37f96f9d4de2 | 604 | status_t returnCode; |
<> | 154:37f96f9d4de2 | 605 | config->DFlashBlockBase = FSL_FEATURE_FLASH_FLEX_NVM_START_ADDRESS; |
<> | 154:37f96f9d4de2 | 606 | returnCode = flash_update_flexnvm_memory_partition_status(config); |
<> | 154:37f96f9d4de2 | 607 | if (returnCode != kStatus_FLASH_Success) |
<> | 154:37f96f9d4de2 | 608 | { |
<> | 154:37f96f9d4de2 | 609 | return returnCode; |
<> | 154:37f96f9d4de2 | 610 | } |
<> | 154:37f96f9d4de2 | 611 | } |
<> | 154:37f96f9d4de2 | 612 | #endif |
<> | 154:37f96f9d4de2 | 613 | |
<> | 154:37f96f9d4de2 | 614 | return kStatus_FLASH_Success; |
<> | 154:37f96f9d4de2 | 615 | } |
<> | 154:37f96f9d4de2 | 616 | |
<> | 154:37f96f9d4de2 | 617 | status_t FLASH_SetCallback(flash_config_t *config, flash_callback_t callback) |
<> | 154:37f96f9d4de2 | 618 | { |
<> | 154:37f96f9d4de2 | 619 | if (config == NULL) |
<> | 154:37f96f9d4de2 | 620 | { |
<> | 154:37f96f9d4de2 | 621 | return kStatus_FLASH_InvalidArgument; |
<> | 154:37f96f9d4de2 | 622 | } |
<> | 154:37f96f9d4de2 | 623 | |
<> | 154:37f96f9d4de2 | 624 | config->PFlashCallback = callback; |
<> | 154:37f96f9d4de2 | 625 | |
<> | 154:37f96f9d4de2 | 626 | return kStatus_FLASH_Success; |
<> | 154:37f96f9d4de2 | 627 | } |
<> | 154:37f96f9d4de2 | 628 | |
<> | 154:37f96f9d4de2 | 629 | #if FLASH_DRIVER_IS_FLASH_RESIDENT |
<> | 154:37f96f9d4de2 | 630 | status_t FLASH_PrepareExecuteInRamFunctions(flash_config_t *config) |
<> | 154:37f96f9d4de2 | 631 | { |
<> | 154:37f96f9d4de2 | 632 | flash_execute_in_ram_function_config_t *flashExecuteInRamFunctionInfo; |
<> | 154:37f96f9d4de2 | 633 | |
<> | 154:37f96f9d4de2 | 634 | if (config == NULL) |
<> | 154:37f96f9d4de2 | 635 | { |
<> | 154:37f96f9d4de2 | 636 | return kStatus_FLASH_InvalidArgument; |
<> | 154:37f96f9d4de2 | 637 | } |
<> | 154:37f96f9d4de2 | 638 | |
<> | 154:37f96f9d4de2 | 639 | flashExecuteInRamFunctionInfo = (flash_execute_in_ram_function_config_t *)config->flashExecuteInRamFunctionInfo; |
<> | 154:37f96f9d4de2 | 640 | |
<> | 154:37f96f9d4de2 | 641 | copy_flash_run_command(flashExecuteInRamFunctionInfo->flashRunCommand); |
<> | 154:37f96f9d4de2 | 642 | copy_flash_common_bit_operation(flashExecuteInRamFunctionInfo->flashCommonBitOperation); |
<> | 154:37f96f9d4de2 | 643 | flashExecuteInRamFunctionInfo->activeFunctionCount = kFLASH_ExecuteInRamFunctionTotalNum; |
<> | 154:37f96f9d4de2 | 644 | |
<> | 154:37f96f9d4de2 | 645 | return kStatus_FLASH_Success; |
<> | 154:37f96f9d4de2 | 646 | } |
<> | 154:37f96f9d4de2 | 647 | #endif /* FLASH_DRIVER_IS_FLASH_RESIDENT */ |
<> | 154:37f96f9d4de2 | 648 | |
<> | 154:37f96f9d4de2 | 649 | status_t FLASH_EraseAll(flash_config_t *config, uint32_t key) |
<> | 154:37f96f9d4de2 | 650 | { |
<> | 154:37f96f9d4de2 | 651 | status_t returnCode; |
<> | 154:37f96f9d4de2 | 652 | |
<> | 154:37f96f9d4de2 | 653 | if (config == NULL) |
<> | 154:37f96f9d4de2 | 654 | { |
<> | 154:37f96f9d4de2 | 655 | return kStatus_FLASH_InvalidArgument; |
<> | 154:37f96f9d4de2 | 656 | } |
<> | 154:37f96f9d4de2 | 657 | |
<> | 154:37f96f9d4de2 | 658 | /* preparing passing parameter to erase all flash blocks */ |
<> | 154:37f96f9d4de2 | 659 | kFCCOBx[0] = BYTES_JOIN_TO_WORD_1_3(FTFx_ERASE_ALL_BLOCK, 0xFFFFFFU); |
<> | 154:37f96f9d4de2 | 660 | |
<> | 154:37f96f9d4de2 | 661 | /* Validate the user key */ |
<> | 154:37f96f9d4de2 | 662 | returnCode = flash_check_user_key(key); |
<> | 154:37f96f9d4de2 | 663 | if (returnCode) |
<> | 154:37f96f9d4de2 | 664 | { |
<> | 154:37f96f9d4de2 | 665 | return returnCode; |
<> | 154:37f96f9d4de2 | 666 | } |
<> | 154:37f96f9d4de2 | 667 | |
<> | 154:37f96f9d4de2 | 668 | /* calling flash command sequence function to execute the command */ |
<> | 154:37f96f9d4de2 | 669 | returnCode = flash_command_sequence(config); |
<> | 154:37f96f9d4de2 | 670 | |
<> | 154:37f96f9d4de2 | 671 | flash_cache_clear(config); |
<> | 154:37f96f9d4de2 | 672 | |
<> | 154:37f96f9d4de2 | 673 | #if FLASH_SSD_IS_FLEXNVM_ENABLED |
<> | 154:37f96f9d4de2 | 674 | /* Data flash IFR will be erased by erase all command, so we need to |
<> | 154:37f96f9d4de2 | 675 | * update FlexNVM memory partition status synchronously */ |
<> | 154:37f96f9d4de2 | 676 | if (returnCode == kStatus_FLASH_Success) |
<> | 154:37f96f9d4de2 | 677 | { |
<> | 154:37f96f9d4de2 | 678 | returnCode = flash_update_flexnvm_memory_partition_status(config); |
<> | 154:37f96f9d4de2 | 679 | } |
<> | 154:37f96f9d4de2 | 680 | #endif |
<> | 154:37f96f9d4de2 | 681 | |
<> | 154:37f96f9d4de2 | 682 | return returnCode; |
<> | 154:37f96f9d4de2 | 683 | } |
<> | 154:37f96f9d4de2 | 684 | |
<> | 154:37f96f9d4de2 | 685 | status_t FLASH_Erase(flash_config_t *config, uint32_t start, uint32_t lengthInBytes, uint32_t key) |
<> | 154:37f96f9d4de2 | 686 | { |
<> | 154:37f96f9d4de2 | 687 | uint32_t sectorSize; |
<> | 154:37f96f9d4de2 | 688 | flash_operation_config_t flashOperationInfo; |
<> | 154:37f96f9d4de2 | 689 | uint32_t endAddress; /* storing end address */ |
<> | 154:37f96f9d4de2 | 690 | uint32_t numberOfSectors; /* number of sectors calculated by endAddress */ |
<> | 154:37f96f9d4de2 | 691 | status_t returnCode; |
<> | 154:37f96f9d4de2 | 692 | |
<> | 154:37f96f9d4de2 | 693 | flash_get_matched_operation_info(config, start, &flashOperationInfo); |
<> | 154:37f96f9d4de2 | 694 | |
<> | 154:37f96f9d4de2 | 695 | /* Check the supplied address range. */ |
<> | 154:37f96f9d4de2 | 696 | returnCode = flash_check_range(config, start, lengthInBytes, flashOperationInfo.sectorCmdAddressAligment); |
<> | 154:37f96f9d4de2 | 697 | if (returnCode) |
<> | 154:37f96f9d4de2 | 698 | { |
<> | 154:37f96f9d4de2 | 699 | return returnCode; |
<> | 154:37f96f9d4de2 | 700 | } |
<> | 154:37f96f9d4de2 | 701 | |
<> | 154:37f96f9d4de2 | 702 | start = flashOperationInfo.convertedAddress; |
<> | 154:37f96f9d4de2 | 703 | sectorSize = flashOperationInfo.activeSectorSize; |
<> | 154:37f96f9d4de2 | 704 | |
<> | 154:37f96f9d4de2 | 705 | /* calculating Flash end address */ |
<> | 154:37f96f9d4de2 | 706 | endAddress = start + lengthInBytes - 1; |
<> | 154:37f96f9d4de2 | 707 | |
<> | 154:37f96f9d4de2 | 708 | /* re-calculate the endAddress and align it to the start of the next sector |
<> | 154:37f96f9d4de2 | 709 | * which will be used in the comparison below */ |
<> | 154:37f96f9d4de2 | 710 | if (endAddress % sectorSize) |
<> | 154:37f96f9d4de2 | 711 | { |
<> | 154:37f96f9d4de2 | 712 | numberOfSectors = endAddress / sectorSize + 1; |
<> | 154:37f96f9d4de2 | 713 | endAddress = numberOfSectors * sectorSize - 1; |
<> | 154:37f96f9d4de2 | 714 | } |
<> | 154:37f96f9d4de2 | 715 | |
<> | 154:37f96f9d4de2 | 716 | /* the start address will increment to the next sector address |
<> | 154:37f96f9d4de2 | 717 | * until it reaches the endAdddress */ |
<> | 154:37f96f9d4de2 | 718 | while (start <= endAddress) |
<> | 154:37f96f9d4de2 | 719 | { |
<> | 154:37f96f9d4de2 | 720 | /* preparing passing parameter to erase a flash block */ |
<> | 154:37f96f9d4de2 | 721 | kFCCOBx[0] = BYTES_JOIN_TO_WORD_1_3(FTFx_ERASE_SECTOR, start); |
<> | 154:37f96f9d4de2 | 722 | |
<> | 154:37f96f9d4de2 | 723 | /* Validate the user key */ |
<> | 154:37f96f9d4de2 | 724 | returnCode = flash_check_user_key(key); |
<> | 154:37f96f9d4de2 | 725 | if (returnCode) |
<> | 154:37f96f9d4de2 | 726 | { |
<> | 154:37f96f9d4de2 | 727 | return returnCode; |
<> | 154:37f96f9d4de2 | 728 | } |
<> | 154:37f96f9d4de2 | 729 | |
<> | 154:37f96f9d4de2 | 730 | /* calling flash command sequence function to execute the command */ |
<> | 154:37f96f9d4de2 | 731 | returnCode = flash_command_sequence(config); |
<> | 154:37f96f9d4de2 | 732 | |
<> | 154:37f96f9d4de2 | 733 | /* calling flash callback function if it is available */ |
<> | 154:37f96f9d4de2 | 734 | if (config->PFlashCallback) |
<> | 154:37f96f9d4de2 | 735 | { |
<> | 154:37f96f9d4de2 | 736 | config->PFlashCallback(); |
<> | 154:37f96f9d4de2 | 737 | } |
<> | 154:37f96f9d4de2 | 738 | |
<> | 154:37f96f9d4de2 | 739 | /* checking the success of command execution */ |
<> | 154:37f96f9d4de2 | 740 | if (kStatus_FLASH_Success != returnCode) |
<> | 154:37f96f9d4de2 | 741 | { |
<> | 154:37f96f9d4de2 | 742 | break; |
<> | 154:37f96f9d4de2 | 743 | } |
<> | 154:37f96f9d4de2 | 744 | else |
<> | 154:37f96f9d4de2 | 745 | { |
<> | 154:37f96f9d4de2 | 746 | /* Increment to the next sector */ |
<> | 154:37f96f9d4de2 | 747 | start += sectorSize; |
<> | 154:37f96f9d4de2 | 748 | } |
<> | 154:37f96f9d4de2 | 749 | } |
<> | 154:37f96f9d4de2 | 750 | |
<> | 154:37f96f9d4de2 | 751 | flash_cache_clear(config); |
<> | 154:37f96f9d4de2 | 752 | |
<> | 154:37f96f9d4de2 | 753 | return (returnCode); |
<> | 154:37f96f9d4de2 | 754 | } |
<> | 154:37f96f9d4de2 | 755 | |
<> | 154:37f96f9d4de2 | 756 | #if defined(FSL_FEATURE_FLASH_HAS_ERASE_ALL_BLOCKS_UNSECURE_CMD) && FSL_FEATURE_FLASH_HAS_ERASE_ALL_BLOCKS_UNSECURE_CMD |
<> | 154:37f96f9d4de2 | 757 | status_t FLASH_EraseAllUnsecure(flash_config_t *config, uint32_t key) |
<> | 154:37f96f9d4de2 | 758 | { |
<> | 154:37f96f9d4de2 | 759 | status_t returnCode; |
<> | 154:37f96f9d4de2 | 760 | |
<> | 154:37f96f9d4de2 | 761 | if (config == NULL) |
<> | 154:37f96f9d4de2 | 762 | { |
<> | 154:37f96f9d4de2 | 763 | return kStatus_FLASH_InvalidArgument; |
<> | 154:37f96f9d4de2 | 764 | } |
<> | 154:37f96f9d4de2 | 765 | |
<> | 154:37f96f9d4de2 | 766 | /* Prepare passing parameter to erase all flash blocks (unsecure). */ |
<> | 154:37f96f9d4de2 | 767 | kFCCOBx[0] = BYTES_JOIN_TO_WORD_1_3(FTFx_ERASE_ALL_BLOCK_UNSECURE, 0xFFFFFFU); |
<> | 154:37f96f9d4de2 | 768 | |
<> | 154:37f96f9d4de2 | 769 | /* Validate the user key */ |
<> | 154:37f96f9d4de2 | 770 | returnCode = flash_check_user_key(key); |
<> | 154:37f96f9d4de2 | 771 | if (returnCode) |
<> | 154:37f96f9d4de2 | 772 | { |
<> | 154:37f96f9d4de2 | 773 | return returnCode; |
<> | 154:37f96f9d4de2 | 774 | } |
<> | 154:37f96f9d4de2 | 775 | |
<> | 154:37f96f9d4de2 | 776 | /* calling flash command sequence function to execute the command */ |
<> | 154:37f96f9d4de2 | 777 | returnCode = flash_command_sequence(config); |
<> | 154:37f96f9d4de2 | 778 | |
<> | 154:37f96f9d4de2 | 779 | flash_cache_clear(config); |
<> | 154:37f96f9d4de2 | 780 | |
<> | 154:37f96f9d4de2 | 781 | #if FLASH_SSD_IS_FLEXNVM_ENABLED |
<> | 154:37f96f9d4de2 | 782 | /* Data flash IFR will be erased by erase all unsecure command, so we need to |
<> | 154:37f96f9d4de2 | 783 | * update FlexNVM memory partition status synchronously */ |
<> | 154:37f96f9d4de2 | 784 | if (returnCode == kStatus_FLASH_Success) |
<> | 154:37f96f9d4de2 | 785 | { |
<> | 154:37f96f9d4de2 | 786 | returnCode = flash_update_flexnvm_memory_partition_status(config); |
<> | 154:37f96f9d4de2 | 787 | } |
<> | 154:37f96f9d4de2 | 788 | #endif |
<> | 154:37f96f9d4de2 | 789 | |
<> | 154:37f96f9d4de2 | 790 | return returnCode; |
<> | 154:37f96f9d4de2 | 791 | } |
<> | 154:37f96f9d4de2 | 792 | #endif /* FSL_FEATURE_FLASH_HAS_ERASE_ALL_BLOCKS_UNSECURE_CMD */ |
<> | 154:37f96f9d4de2 | 793 | |
<> | 154:37f96f9d4de2 | 794 | status_t FLASH_EraseAllExecuteOnlySegments(flash_config_t *config, uint32_t key) |
<> | 154:37f96f9d4de2 | 795 | { |
<> | 154:37f96f9d4de2 | 796 | status_t returnCode; |
<> | 154:37f96f9d4de2 | 797 | |
<> | 154:37f96f9d4de2 | 798 | if (config == NULL) |
<> | 154:37f96f9d4de2 | 799 | { |
<> | 154:37f96f9d4de2 | 800 | return kStatus_FLASH_InvalidArgument; |
<> | 154:37f96f9d4de2 | 801 | } |
<> | 154:37f96f9d4de2 | 802 | |
<> | 154:37f96f9d4de2 | 803 | /* preparing passing parameter to erase all execute-only segments |
<> | 154:37f96f9d4de2 | 804 | * 1st element for the FCCOB register */ |
<> | 154:37f96f9d4de2 | 805 | kFCCOBx[0] = BYTES_JOIN_TO_WORD_1_3(FTFx_ERASE_ALL_EXECUTE_ONLY_SEGMENT, 0xFFFFFFU); |
<> | 154:37f96f9d4de2 | 806 | |
<> | 154:37f96f9d4de2 | 807 | /* Validate the user key */ |
<> | 154:37f96f9d4de2 | 808 | returnCode = flash_check_user_key(key); |
<> | 154:37f96f9d4de2 | 809 | if (returnCode) |
<> | 154:37f96f9d4de2 | 810 | { |
<> | 154:37f96f9d4de2 | 811 | return returnCode; |
<> | 154:37f96f9d4de2 | 812 | } |
<> | 154:37f96f9d4de2 | 813 | |
<> | 154:37f96f9d4de2 | 814 | /* calling flash command sequence function to execute the command */ |
<> | 154:37f96f9d4de2 | 815 | returnCode = flash_command_sequence(config); |
<> | 154:37f96f9d4de2 | 816 | |
<> | 154:37f96f9d4de2 | 817 | flash_cache_clear(config); |
<> | 154:37f96f9d4de2 | 818 | |
<> | 154:37f96f9d4de2 | 819 | return returnCode; |
<> | 154:37f96f9d4de2 | 820 | } |
<> | 154:37f96f9d4de2 | 821 | |
<> | 154:37f96f9d4de2 | 822 | status_t FLASH_Program(flash_config_t *config, uint32_t start, uint32_t *src, uint32_t lengthInBytes) |
<> | 154:37f96f9d4de2 | 823 | { |
<> | 154:37f96f9d4de2 | 824 | status_t returnCode; |
<> | 154:37f96f9d4de2 | 825 | flash_operation_config_t flashOperationInfo; |
<> | 154:37f96f9d4de2 | 826 | |
<> | 154:37f96f9d4de2 | 827 | if (src == NULL) |
<> | 154:37f96f9d4de2 | 828 | { |
<> | 154:37f96f9d4de2 | 829 | return kStatus_FLASH_InvalidArgument; |
<> | 154:37f96f9d4de2 | 830 | } |
<> | 154:37f96f9d4de2 | 831 | |
<> | 154:37f96f9d4de2 | 832 | flash_get_matched_operation_info(config, start, &flashOperationInfo); |
<> | 154:37f96f9d4de2 | 833 | |
<> | 154:37f96f9d4de2 | 834 | /* Check the supplied address range. */ |
<> | 154:37f96f9d4de2 | 835 | returnCode = flash_check_range(config, start, lengthInBytes, flashOperationInfo.blockWriteUnitSize); |
<> | 154:37f96f9d4de2 | 836 | if (returnCode) |
<> | 154:37f96f9d4de2 | 837 | { |
<> | 154:37f96f9d4de2 | 838 | return returnCode; |
<> | 154:37f96f9d4de2 | 839 | } |
<> | 154:37f96f9d4de2 | 840 | |
<> | 154:37f96f9d4de2 | 841 | start = flashOperationInfo.convertedAddress; |
<> | 154:37f96f9d4de2 | 842 | |
<> | 154:37f96f9d4de2 | 843 | while (lengthInBytes > 0) |
<> | 154:37f96f9d4de2 | 844 | { |
<> | 154:37f96f9d4de2 | 845 | /* preparing passing parameter to program the flash block */ |
<> | 154:37f96f9d4de2 | 846 | kFCCOBx[1] = *src++; |
<> | 154:37f96f9d4de2 | 847 | if (4 == flashOperationInfo.blockWriteUnitSize) |
<> | 154:37f96f9d4de2 | 848 | { |
<> | 154:37f96f9d4de2 | 849 | kFCCOBx[0] = BYTES_JOIN_TO_WORD_1_3(FTFx_PROGRAM_LONGWORD, start); |
<> | 154:37f96f9d4de2 | 850 | } |
<> | 154:37f96f9d4de2 | 851 | else if (8 == flashOperationInfo.blockWriteUnitSize) |
<> | 154:37f96f9d4de2 | 852 | { |
<> | 154:37f96f9d4de2 | 853 | kFCCOBx[2] = *src++; |
<> | 154:37f96f9d4de2 | 854 | kFCCOBx[0] = BYTES_JOIN_TO_WORD_1_3(FTFx_PROGRAM_PHRASE, start); |
<> | 154:37f96f9d4de2 | 855 | } |
<> | 154:37f96f9d4de2 | 856 | else |
<> | 154:37f96f9d4de2 | 857 | { |
<> | 154:37f96f9d4de2 | 858 | } |
<> | 154:37f96f9d4de2 | 859 | |
<> | 154:37f96f9d4de2 | 860 | /* calling flash command sequence function to execute the command */ |
<> | 154:37f96f9d4de2 | 861 | returnCode = flash_command_sequence(config); |
<> | 154:37f96f9d4de2 | 862 | |
<> | 154:37f96f9d4de2 | 863 | /* calling flash callback function if it is available */ |
<> | 154:37f96f9d4de2 | 864 | if (config->PFlashCallback) |
<> | 154:37f96f9d4de2 | 865 | { |
<> | 154:37f96f9d4de2 | 866 | config->PFlashCallback(); |
<> | 154:37f96f9d4de2 | 867 | } |
<> | 154:37f96f9d4de2 | 868 | |
<> | 154:37f96f9d4de2 | 869 | /* checking for the success of command execution */ |
<> | 154:37f96f9d4de2 | 870 | if (kStatus_FLASH_Success != returnCode) |
<> | 154:37f96f9d4de2 | 871 | { |
<> | 154:37f96f9d4de2 | 872 | break; |
<> | 154:37f96f9d4de2 | 873 | } |
<> | 154:37f96f9d4de2 | 874 | else |
<> | 154:37f96f9d4de2 | 875 | { |
<> | 154:37f96f9d4de2 | 876 | /* update start address for next iteration */ |
<> | 154:37f96f9d4de2 | 877 | start += flashOperationInfo.blockWriteUnitSize; |
<> | 154:37f96f9d4de2 | 878 | |
<> | 154:37f96f9d4de2 | 879 | /* update lengthInBytes for next iteration */ |
<> | 154:37f96f9d4de2 | 880 | lengthInBytes -= flashOperationInfo.blockWriteUnitSize; |
<> | 154:37f96f9d4de2 | 881 | } |
<> | 154:37f96f9d4de2 | 882 | } |
<> | 154:37f96f9d4de2 | 883 | |
<> | 154:37f96f9d4de2 | 884 | flash_cache_clear(config); |
<> | 154:37f96f9d4de2 | 885 | |
<> | 154:37f96f9d4de2 | 886 | return (returnCode); |
<> | 154:37f96f9d4de2 | 887 | } |
<> | 154:37f96f9d4de2 | 888 | |
<> | 154:37f96f9d4de2 | 889 | status_t FLASH_ProgramOnce(flash_config_t *config, uint32_t index, uint32_t *src, uint32_t lengthInBytes) |
<> | 154:37f96f9d4de2 | 890 | { |
<> | 154:37f96f9d4de2 | 891 | status_t returnCode; |
<> | 154:37f96f9d4de2 | 892 | |
<> | 154:37f96f9d4de2 | 893 | if ((config == NULL) || (src == NULL)) |
<> | 154:37f96f9d4de2 | 894 | { |
<> | 154:37f96f9d4de2 | 895 | return kStatus_FLASH_InvalidArgument; |
<> | 154:37f96f9d4de2 | 896 | } |
<> | 154:37f96f9d4de2 | 897 | |
<> | 154:37f96f9d4de2 | 898 | /* pass paramters to FTFx */ |
<> | 154:37f96f9d4de2 | 899 | kFCCOBx[0] = BYTES_JOIN_TO_WORD_1_1_2(FTFx_PROGRAM_ONCE, index, 0xFFFFU); |
<> | 154:37f96f9d4de2 | 900 | |
<> | 154:37f96f9d4de2 | 901 | kFCCOBx[1] = *src; |
<> | 154:37f96f9d4de2 | 902 | |
<> | 154:37f96f9d4de2 | 903 | /* Note: Have to seperate the first index from the rest if it equals 0 |
<> | 154:37f96f9d4de2 | 904 | * to avoid a pointless comparison of unsigned int to 0 compiler warning */ |
<> | 154:37f96f9d4de2 | 905 | #if FLASH_PROGRAM_ONCE_IS_8BYTES_UNIT_SUPPORT |
<> | 154:37f96f9d4de2 | 906 | #if FLASH_PROGRAM_ONCE_IS_4BYTES_UNIT_SUPPORT |
<> | 154:37f96f9d4de2 | 907 | if (((index == FLASH_PROGRAM_ONCE_MIN_ID_8BYTES) || |
<> | 154:37f96f9d4de2 | 908 | /* Range check */ |
<> | 154:37f96f9d4de2 | 909 | ((index >= FLASH_PROGRAM_ONCE_MIN_ID_8BYTES + 1) && (index <= FLASH_PROGRAM_ONCE_MAX_ID_8BYTES))) && |
<> | 154:37f96f9d4de2 | 910 | (lengthInBytes == 8)) |
<> | 154:37f96f9d4de2 | 911 | #endif /* FLASH_PROGRAM_ONCE_IS_4BYTES_UNIT_SUPPORT */ |
<> | 154:37f96f9d4de2 | 912 | { |
<> | 154:37f96f9d4de2 | 913 | kFCCOBx[2] = *(src + 1); |
<> | 154:37f96f9d4de2 | 914 | } |
<> | 154:37f96f9d4de2 | 915 | #endif /* FLASH_PROGRAM_ONCE_IS_8BYTES_UNIT_SUPPORT */ |
<> | 154:37f96f9d4de2 | 916 | |
<> | 154:37f96f9d4de2 | 917 | /* calling flash command sequence function to execute the command */ |
<> | 154:37f96f9d4de2 | 918 | returnCode = flash_command_sequence(config); |
<> | 154:37f96f9d4de2 | 919 | |
<> | 154:37f96f9d4de2 | 920 | flash_cache_clear(config); |
<> | 154:37f96f9d4de2 | 921 | |
<> | 154:37f96f9d4de2 | 922 | return returnCode; |
<> | 154:37f96f9d4de2 | 923 | } |
<> | 154:37f96f9d4de2 | 924 | |
<> | 154:37f96f9d4de2 | 925 | #if defined(FSL_FEATURE_FLASH_HAS_PROGRAM_SECTION_CMD) && FSL_FEATURE_FLASH_HAS_PROGRAM_SECTION_CMD |
<> | 154:37f96f9d4de2 | 926 | status_t FLASH_ProgramSection(flash_config_t *config, uint32_t start, uint32_t *src, uint32_t lengthInBytes) |
<> | 154:37f96f9d4de2 | 927 | { |
<> | 154:37f96f9d4de2 | 928 | status_t returnCode; |
<> | 154:37f96f9d4de2 | 929 | uint32_t sectorSize; |
<> | 154:37f96f9d4de2 | 930 | flash_operation_config_t flashOperationInfo; |
<> | 154:37f96f9d4de2 | 931 | #if defined(FSL_FEATURE_FLASH_HAS_SET_FLEXRAM_FUNCTION_CMD) && FSL_FEATURE_FLASH_HAS_SET_FLEXRAM_FUNCTION_CMD |
<> | 154:37f96f9d4de2 | 932 | bool needSwitchFlexRamMode = false; |
<> | 154:37f96f9d4de2 | 933 | #endif /* FSL_FEATURE_FLASH_HAS_SET_FLEXRAM_FUNCTION_CMD */ |
<> | 154:37f96f9d4de2 | 934 | |
<> | 154:37f96f9d4de2 | 935 | if (src == NULL) |
<> | 154:37f96f9d4de2 | 936 | { |
<> | 154:37f96f9d4de2 | 937 | return kStatus_FLASH_InvalidArgument; |
<> | 154:37f96f9d4de2 | 938 | } |
<> | 154:37f96f9d4de2 | 939 | |
<> | 154:37f96f9d4de2 | 940 | flash_get_matched_operation_info(config, start, &flashOperationInfo); |
<> | 154:37f96f9d4de2 | 941 | |
<> | 154:37f96f9d4de2 | 942 | /* Check the supplied address range. */ |
<> | 154:37f96f9d4de2 | 943 | returnCode = flash_check_range(config, start, lengthInBytes, flashOperationInfo.sectionCmdAddressAligment); |
<> | 154:37f96f9d4de2 | 944 | if (returnCode) |
<> | 154:37f96f9d4de2 | 945 | { |
<> | 154:37f96f9d4de2 | 946 | return returnCode; |
<> | 154:37f96f9d4de2 | 947 | } |
<> | 154:37f96f9d4de2 | 948 | |
<> | 154:37f96f9d4de2 | 949 | start = flashOperationInfo.convertedAddress; |
<> | 154:37f96f9d4de2 | 950 | sectorSize = flashOperationInfo.activeSectorSize; |
<> | 154:37f96f9d4de2 | 951 | |
<> | 154:37f96f9d4de2 | 952 | #if defined(FSL_FEATURE_FLASH_HAS_SET_FLEXRAM_FUNCTION_CMD) && FSL_FEATURE_FLASH_HAS_SET_FLEXRAM_FUNCTION_CMD |
<> | 154:37f96f9d4de2 | 953 | /* Switch function of FlexRAM if needed */ |
<> | 154:37f96f9d4de2 | 954 | if (!(FTFx->FCNFG & FTFx_FCNFG_RAMRDY_MASK)) |
<> | 154:37f96f9d4de2 | 955 | { |
<> | 154:37f96f9d4de2 | 956 | needSwitchFlexRamMode = true; |
<> | 154:37f96f9d4de2 | 957 | |
<> | 154:37f96f9d4de2 | 958 | returnCode = FLASH_SetFlexramFunction(config, kFLASH_FlexramFunctionOptionAvailableAsRam); |
<> | 154:37f96f9d4de2 | 959 | if (returnCode != kStatus_FLASH_Success) |
<> | 154:37f96f9d4de2 | 960 | { |
<> | 154:37f96f9d4de2 | 961 | return kStatus_FLASH_SetFlexramAsRamError; |
<> | 154:37f96f9d4de2 | 962 | } |
<> | 154:37f96f9d4de2 | 963 | } |
<> | 154:37f96f9d4de2 | 964 | #endif /* FSL_FEATURE_FLASH_HAS_SET_FLEXRAM_FUNCTION_CMD */ |
<> | 154:37f96f9d4de2 | 965 | |
<> | 154:37f96f9d4de2 | 966 | while (lengthInBytes > 0) |
<> | 154:37f96f9d4de2 | 967 | { |
<> | 154:37f96f9d4de2 | 968 | /* Make sure the write operation doesn't span two sectors */ |
<> | 154:37f96f9d4de2 | 969 | uint32_t endAddressOfCurrentSector = ALIGN_UP(start, sectorSize); |
<> | 154:37f96f9d4de2 | 970 | uint32_t lengthTobeProgrammedOfCurrentSector; |
<> | 154:37f96f9d4de2 | 971 | uint32_t currentOffset = 0; |
<> | 154:37f96f9d4de2 | 972 | |
<> | 154:37f96f9d4de2 | 973 | if (endAddressOfCurrentSector == start) |
<> | 154:37f96f9d4de2 | 974 | { |
<> | 154:37f96f9d4de2 | 975 | endAddressOfCurrentSector += sectorSize; |
<> | 154:37f96f9d4de2 | 976 | } |
<> | 154:37f96f9d4de2 | 977 | |
<> | 154:37f96f9d4de2 | 978 | if (lengthInBytes + start > endAddressOfCurrentSector) |
<> | 154:37f96f9d4de2 | 979 | { |
<> | 154:37f96f9d4de2 | 980 | lengthTobeProgrammedOfCurrentSector = endAddressOfCurrentSector - start; |
<> | 154:37f96f9d4de2 | 981 | } |
<> | 154:37f96f9d4de2 | 982 | else |
<> | 154:37f96f9d4de2 | 983 | { |
<> | 154:37f96f9d4de2 | 984 | lengthTobeProgrammedOfCurrentSector = lengthInBytes; |
<> | 154:37f96f9d4de2 | 985 | } |
<> | 154:37f96f9d4de2 | 986 | |
<> | 154:37f96f9d4de2 | 987 | /* Program Current Sector */ |
<> | 154:37f96f9d4de2 | 988 | while (lengthTobeProgrammedOfCurrentSector > 0) |
<> | 154:37f96f9d4de2 | 989 | { |
<> | 154:37f96f9d4de2 | 990 | /* Make sure the program size doesn't exceeds Acceleration RAM size */ |
<> | 154:37f96f9d4de2 | 991 | uint32_t programSizeOfCurrentPass; |
<> | 154:37f96f9d4de2 | 992 | uint32_t numberOfPhases; |
<> | 154:37f96f9d4de2 | 993 | |
<> | 154:37f96f9d4de2 | 994 | if (lengthTobeProgrammedOfCurrentSector > kFLASH_AccelerationRamSize) |
<> | 154:37f96f9d4de2 | 995 | { |
<> | 154:37f96f9d4de2 | 996 | programSizeOfCurrentPass = kFLASH_AccelerationRamSize; |
<> | 154:37f96f9d4de2 | 997 | } |
<> | 154:37f96f9d4de2 | 998 | else |
<> | 154:37f96f9d4de2 | 999 | { |
<> | 154:37f96f9d4de2 | 1000 | programSizeOfCurrentPass = lengthTobeProgrammedOfCurrentSector; |
<> | 154:37f96f9d4de2 | 1001 | } |
<> | 154:37f96f9d4de2 | 1002 | |
<> | 154:37f96f9d4de2 | 1003 | /* Copy data to FlexRAM */ |
<> | 154:37f96f9d4de2 | 1004 | memcpy((void *)FSL_FEATURE_FLASH_FLEX_RAM_START_ADDRESS, src + currentOffset / 4, programSizeOfCurrentPass); |
<> | 154:37f96f9d4de2 | 1005 | /* Set start address of the data to be programmed */ |
<> | 154:37f96f9d4de2 | 1006 | kFCCOBx[0] = BYTES_JOIN_TO_WORD_1_3(FTFx_PROGRAM_SECTION, start + currentOffset); |
<> | 154:37f96f9d4de2 | 1007 | /* Set program size in terms of FEATURE_FLASH_SECTION_CMD_ADDRESS_ALIGMENT */ |
<> | 154:37f96f9d4de2 | 1008 | numberOfPhases = programSizeOfCurrentPass / flashOperationInfo.sectionCmdAddressAligment; |
<> | 154:37f96f9d4de2 | 1009 | |
<> | 154:37f96f9d4de2 | 1010 | kFCCOBx[1] = BYTES_JOIN_TO_WORD_2_2(numberOfPhases, 0xFFFFU); |
<> | 154:37f96f9d4de2 | 1011 | |
<> | 154:37f96f9d4de2 | 1012 | /* Peform command sequence */ |
<> | 154:37f96f9d4de2 | 1013 | returnCode = flash_command_sequence(config); |
<> | 154:37f96f9d4de2 | 1014 | |
<> | 154:37f96f9d4de2 | 1015 | /* calling flash callback function if it is available */ |
<> | 154:37f96f9d4de2 | 1016 | if (config->PFlashCallback) |
<> | 154:37f96f9d4de2 | 1017 | { |
<> | 154:37f96f9d4de2 | 1018 | config->PFlashCallback(); |
<> | 154:37f96f9d4de2 | 1019 | } |
<> | 154:37f96f9d4de2 | 1020 | |
<> | 154:37f96f9d4de2 | 1021 | if (returnCode != kStatus_FLASH_Success) |
<> | 154:37f96f9d4de2 | 1022 | { |
<> | 154:37f96f9d4de2 | 1023 | flash_cache_clear(config); |
<> | 154:37f96f9d4de2 | 1024 | return returnCode; |
<> | 154:37f96f9d4de2 | 1025 | } |
<> | 154:37f96f9d4de2 | 1026 | |
<> | 154:37f96f9d4de2 | 1027 | lengthTobeProgrammedOfCurrentSector -= programSizeOfCurrentPass; |
<> | 154:37f96f9d4de2 | 1028 | currentOffset += programSizeOfCurrentPass; |
<> | 154:37f96f9d4de2 | 1029 | } |
<> | 154:37f96f9d4de2 | 1030 | |
<> | 154:37f96f9d4de2 | 1031 | src += currentOffset / 4; |
<> | 154:37f96f9d4de2 | 1032 | start += currentOffset; |
<> | 154:37f96f9d4de2 | 1033 | lengthInBytes -= currentOffset; |
<> | 154:37f96f9d4de2 | 1034 | } |
<> | 154:37f96f9d4de2 | 1035 | |
<> | 154:37f96f9d4de2 | 1036 | flash_cache_clear(config); |
<> | 154:37f96f9d4de2 | 1037 | |
<> | 154:37f96f9d4de2 | 1038 | #if defined(FSL_FEATURE_FLASH_HAS_SET_FLEXRAM_FUNCTION_CMD) && FSL_FEATURE_FLASH_HAS_SET_FLEXRAM_FUNCTION_CMD |
<> | 154:37f96f9d4de2 | 1039 | /* Restore function of FlexRAM if needed. */ |
<> | 154:37f96f9d4de2 | 1040 | if (needSwitchFlexRamMode) |
<> | 154:37f96f9d4de2 | 1041 | { |
<> | 154:37f96f9d4de2 | 1042 | returnCode = FLASH_SetFlexramFunction(config, kFLASH_FlexramFunctionOptionAvailableForEeprom); |
<> | 154:37f96f9d4de2 | 1043 | if (returnCode != kStatus_FLASH_Success) |
<> | 154:37f96f9d4de2 | 1044 | { |
<> | 154:37f96f9d4de2 | 1045 | return kStatus_FLASH_RecoverFlexramAsEepromError; |
<> | 154:37f96f9d4de2 | 1046 | } |
<> | 154:37f96f9d4de2 | 1047 | } |
<> | 154:37f96f9d4de2 | 1048 | #endif /* FSL_FEATURE_FLASH_HAS_SET_FLEXRAM_FUNCTION_CMD */ |
<> | 154:37f96f9d4de2 | 1049 | |
<> | 154:37f96f9d4de2 | 1050 | return returnCode; |
<> | 154:37f96f9d4de2 | 1051 | } |
<> | 154:37f96f9d4de2 | 1052 | #endif /* FSL_FEATURE_FLASH_HAS_PROGRAM_SECTION_CMD */ |
<> | 154:37f96f9d4de2 | 1053 | |
<> | 154:37f96f9d4de2 | 1054 | #if FLASH_SSD_IS_FLEXNVM_ENABLED |
<> | 154:37f96f9d4de2 | 1055 | status_t FLASH_EepromWrite(flash_config_t *config, uint32_t start, uint8_t *src, uint32_t lengthInBytes) |
<> | 154:37f96f9d4de2 | 1056 | { |
<> | 154:37f96f9d4de2 | 1057 | status_t returnCode; |
<> | 154:37f96f9d4de2 | 1058 | bool needSwitchFlexRamMode = false; |
<> | 154:37f96f9d4de2 | 1059 | |
<> | 154:37f96f9d4de2 | 1060 | if (config == NULL) |
<> | 154:37f96f9d4de2 | 1061 | { |
<> | 154:37f96f9d4de2 | 1062 | return kStatus_FLASH_InvalidArgument; |
<> | 154:37f96f9d4de2 | 1063 | } |
<> | 154:37f96f9d4de2 | 1064 | |
<> | 154:37f96f9d4de2 | 1065 | /* Validates the range of the given address */ |
<> | 154:37f96f9d4de2 | 1066 | if ((start < config->FlexRAMBlockBase) || |
<> | 154:37f96f9d4de2 | 1067 | ((start + lengthInBytes) > (config->FlexRAMBlockBase + config->EEpromTotalSize))) |
<> | 154:37f96f9d4de2 | 1068 | { |
<> | 154:37f96f9d4de2 | 1069 | return kStatus_FLASH_AddressError; |
<> | 154:37f96f9d4de2 | 1070 | } |
<> | 154:37f96f9d4de2 | 1071 | |
<> | 154:37f96f9d4de2 | 1072 | returnCode = kStatus_FLASH_Success; |
<> | 154:37f96f9d4de2 | 1073 | |
<> | 154:37f96f9d4de2 | 1074 | /* Switch function of FlexRAM if needed */ |
<> | 154:37f96f9d4de2 | 1075 | if (!(FTFx->FCNFG & FTFx_FCNFG_EEERDY_MASK)) |
<> | 154:37f96f9d4de2 | 1076 | { |
<> | 154:37f96f9d4de2 | 1077 | needSwitchFlexRamMode = true; |
<> | 154:37f96f9d4de2 | 1078 | |
<> | 154:37f96f9d4de2 | 1079 | returnCode = FLASH_SetFlexramFunction(config, kFLASH_FlexramFunctionOptionAvailableForEeprom); |
<> | 154:37f96f9d4de2 | 1080 | if (returnCode != kStatus_FLASH_Success) |
<> | 154:37f96f9d4de2 | 1081 | { |
<> | 154:37f96f9d4de2 | 1082 | return kStatus_FLASH_SetFlexramAsEepromError; |
<> | 154:37f96f9d4de2 | 1083 | } |
<> | 154:37f96f9d4de2 | 1084 | } |
<> | 154:37f96f9d4de2 | 1085 | |
<> | 154:37f96f9d4de2 | 1086 | /* Write data to FlexRAM when it is used as EEPROM emulator */ |
<> | 154:37f96f9d4de2 | 1087 | while (lengthInBytes > 0) |
<> | 154:37f96f9d4de2 | 1088 | { |
<> | 154:37f96f9d4de2 | 1089 | if ((!(start & 0x3U)) && (lengthInBytes >= 4)) |
<> | 154:37f96f9d4de2 | 1090 | { |
<> | 154:37f96f9d4de2 | 1091 | *(uint32_t *)start = *(uint32_t *)src; |
<> | 154:37f96f9d4de2 | 1092 | start += 4; |
<> | 154:37f96f9d4de2 | 1093 | src += 4; |
<> | 154:37f96f9d4de2 | 1094 | lengthInBytes -= 4; |
<> | 154:37f96f9d4de2 | 1095 | } |
<> | 154:37f96f9d4de2 | 1096 | else if ((!(start & 0x1U)) && (lengthInBytes >= 2)) |
<> | 154:37f96f9d4de2 | 1097 | { |
<> | 154:37f96f9d4de2 | 1098 | *(uint16_t *)start = *(uint16_t *)src; |
<> | 154:37f96f9d4de2 | 1099 | start += 2; |
<> | 154:37f96f9d4de2 | 1100 | src += 2; |
<> | 154:37f96f9d4de2 | 1101 | lengthInBytes -= 2; |
<> | 154:37f96f9d4de2 | 1102 | } |
<> | 154:37f96f9d4de2 | 1103 | else |
<> | 154:37f96f9d4de2 | 1104 | { |
<> | 154:37f96f9d4de2 | 1105 | *(uint8_t *)start = *src; |
<> | 154:37f96f9d4de2 | 1106 | start += 1; |
<> | 154:37f96f9d4de2 | 1107 | src += 1; |
<> | 154:37f96f9d4de2 | 1108 | lengthInBytes -= 1; |
<> | 154:37f96f9d4de2 | 1109 | } |
<> | 154:37f96f9d4de2 | 1110 | /* Wait till EEERDY bit is set */ |
<> | 154:37f96f9d4de2 | 1111 | while (!(FTFx->FCNFG & FTFx_FCNFG_EEERDY_MASK)) |
<> | 154:37f96f9d4de2 | 1112 | { |
<> | 154:37f96f9d4de2 | 1113 | } |
<> | 154:37f96f9d4de2 | 1114 | |
<> | 154:37f96f9d4de2 | 1115 | /* Check for protection violation error */ |
<> | 154:37f96f9d4de2 | 1116 | if (FTFx->FSTAT & FTFx_FSTAT_FPVIOL_MASK) |
<> | 154:37f96f9d4de2 | 1117 | { |
<> | 154:37f96f9d4de2 | 1118 | return kStatus_FLASH_ProtectionViolation; |
<> | 154:37f96f9d4de2 | 1119 | } |
<> | 154:37f96f9d4de2 | 1120 | } |
<> | 154:37f96f9d4de2 | 1121 | |
<> | 154:37f96f9d4de2 | 1122 | /* Switch function of FlexRAM if needed */ |
<> | 154:37f96f9d4de2 | 1123 | if (needSwitchFlexRamMode) |
<> | 154:37f96f9d4de2 | 1124 | { |
<> | 154:37f96f9d4de2 | 1125 | returnCode = FLASH_SetFlexramFunction(config, kFLASH_FlexramFunctionOptionAvailableAsRam); |
<> | 154:37f96f9d4de2 | 1126 | if (returnCode != kStatus_FLASH_Success) |
<> | 154:37f96f9d4de2 | 1127 | { |
<> | 154:37f96f9d4de2 | 1128 | return kStatus_FLASH_RecoverFlexramAsRamError; |
<> | 154:37f96f9d4de2 | 1129 | } |
<> | 154:37f96f9d4de2 | 1130 | } |
<> | 154:37f96f9d4de2 | 1131 | |
<> | 154:37f96f9d4de2 | 1132 | return returnCode; |
<> | 154:37f96f9d4de2 | 1133 | } |
<> | 154:37f96f9d4de2 | 1134 | #endif /* FLASH_SSD_IS_FLEXNVM_ENABLED */ |
<> | 154:37f96f9d4de2 | 1135 | |
<> | 154:37f96f9d4de2 | 1136 | #if defined(FSL_FEATURE_FLASH_HAS_READ_RESOURCE_CMD) && FSL_FEATURE_FLASH_HAS_READ_RESOURCE_CMD |
<> | 154:37f96f9d4de2 | 1137 | status_t FLASH_ReadResource( |
<> | 154:37f96f9d4de2 | 1138 | flash_config_t *config, uint32_t start, uint32_t *dst, uint32_t lengthInBytes, flash_read_resource_option_t option) |
<> | 154:37f96f9d4de2 | 1139 | { |
<> | 154:37f96f9d4de2 | 1140 | status_t returnCode; |
<> | 154:37f96f9d4de2 | 1141 | flash_operation_config_t flashOperationInfo; |
<> | 154:37f96f9d4de2 | 1142 | |
<> | 154:37f96f9d4de2 | 1143 | if ((config == NULL) || (dst == NULL)) |
<> | 154:37f96f9d4de2 | 1144 | { |
<> | 154:37f96f9d4de2 | 1145 | return kStatus_FLASH_InvalidArgument; |
<> | 154:37f96f9d4de2 | 1146 | } |
<> | 154:37f96f9d4de2 | 1147 | |
<> | 154:37f96f9d4de2 | 1148 | flash_get_matched_operation_info(config, start, &flashOperationInfo); |
<> | 154:37f96f9d4de2 | 1149 | |
<> | 154:37f96f9d4de2 | 1150 | /* Check the supplied address range. */ |
<> | 154:37f96f9d4de2 | 1151 | returnCode = |
<> | 154:37f96f9d4de2 | 1152 | flash_check_resource_range(start, lengthInBytes, flashOperationInfo.resourceCmdAddressAligment, option); |
<> | 154:37f96f9d4de2 | 1153 | if (returnCode != kStatus_FLASH_Success) |
<> | 154:37f96f9d4de2 | 1154 | { |
<> | 154:37f96f9d4de2 | 1155 | return returnCode; |
<> | 154:37f96f9d4de2 | 1156 | } |
<> | 154:37f96f9d4de2 | 1157 | |
<> | 154:37f96f9d4de2 | 1158 | while (lengthInBytes > 0) |
<> | 154:37f96f9d4de2 | 1159 | { |
<> | 154:37f96f9d4de2 | 1160 | /* preparing passing parameter */ |
<> | 154:37f96f9d4de2 | 1161 | kFCCOBx[0] = BYTES_JOIN_TO_WORD_1_3(FTFx_READ_RESOURCE, start); |
<> | 154:37f96f9d4de2 | 1162 | if (flashOperationInfo.resourceCmdAddressAligment == 4) |
<> | 154:37f96f9d4de2 | 1163 | { |
<> | 154:37f96f9d4de2 | 1164 | kFCCOBx[2] = BYTES_JOIN_TO_WORD_1_3(option, 0xFFFFFFU); |
<> | 154:37f96f9d4de2 | 1165 | } |
<> | 154:37f96f9d4de2 | 1166 | else if (flashOperationInfo.resourceCmdAddressAligment == 8) |
<> | 154:37f96f9d4de2 | 1167 | { |
<> | 154:37f96f9d4de2 | 1168 | kFCCOBx[1] = BYTES_JOIN_TO_WORD_1_3(option, 0xFFFFFFU); |
<> | 154:37f96f9d4de2 | 1169 | } |
<> | 154:37f96f9d4de2 | 1170 | else |
<> | 154:37f96f9d4de2 | 1171 | { |
<> | 154:37f96f9d4de2 | 1172 | } |
<> | 154:37f96f9d4de2 | 1173 | |
<> | 154:37f96f9d4de2 | 1174 | /* calling flash command sequence function to execute the command */ |
<> | 154:37f96f9d4de2 | 1175 | returnCode = flash_command_sequence(config); |
<> | 154:37f96f9d4de2 | 1176 | |
<> | 154:37f96f9d4de2 | 1177 | if (kStatus_FLASH_Success != returnCode) |
<> | 154:37f96f9d4de2 | 1178 | { |
<> | 154:37f96f9d4de2 | 1179 | break; |
<> | 154:37f96f9d4de2 | 1180 | } |
<> | 154:37f96f9d4de2 | 1181 | |
<> | 154:37f96f9d4de2 | 1182 | /* fetch data */ |
<> | 154:37f96f9d4de2 | 1183 | *dst++ = kFCCOBx[1]; |
<> | 154:37f96f9d4de2 | 1184 | if (flashOperationInfo.resourceCmdAddressAligment == 8) |
<> | 154:37f96f9d4de2 | 1185 | { |
<> | 154:37f96f9d4de2 | 1186 | *dst++ = kFCCOBx[2]; |
<> | 154:37f96f9d4de2 | 1187 | } |
<> | 154:37f96f9d4de2 | 1188 | /* update start address for next iteration */ |
<> | 154:37f96f9d4de2 | 1189 | start += flashOperationInfo.resourceCmdAddressAligment; |
<> | 154:37f96f9d4de2 | 1190 | /* update lengthInBytes for next iteration */ |
<> | 154:37f96f9d4de2 | 1191 | lengthInBytes -= flashOperationInfo.resourceCmdAddressAligment; |
<> | 154:37f96f9d4de2 | 1192 | } |
<> | 154:37f96f9d4de2 | 1193 | |
<> | 154:37f96f9d4de2 | 1194 | return (returnCode); |
<> | 154:37f96f9d4de2 | 1195 | } |
<> | 154:37f96f9d4de2 | 1196 | #endif /* FSL_FEATURE_FLASH_HAS_READ_RESOURCE_CMD */ |
<> | 154:37f96f9d4de2 | 1197 | |
<> | 154:37f96f9d4de2 | 1198 | status_t FLASH_ReadOnce(flash_config_t *config, uint32_t index, uint32_t *dst, uint32_t lengthInBytes) |
<> | 154:37f96f9d4de2 | 1199 | { |
<> | 154:37f96f9d4de2 | 1200 | status_t returnCode; |
<> | 154:37f96f9d4de2 | 1201 | |
<> | 154:37f96f9d4de2 | 1202 | if ((config == NULL) || (dst == NULL)) |
<> | 154:37f96f9d4de2 | 1203 | { |
<> | 154:37f96f9d4de2 | 1204 | return kStatus_FLASH_InvalidArgument; |
<> | 154:37f96f9d4de2 | 1205 | } |
<> | 154:37f96f9d4de2 | 1206 | |
<> | 154:37f96f9d4de2 | 1207 | /* pass paramters to FTFx */ |
<> | 154:37f96f9d4de2 | 1208 | kFCCOBx[0] = BYTES_JOIN_TO_WORD_1_1_2(FTFx_READ_ONCE, index, 0xFFFFU); |
<> | 154:37f96f9d4de2 | 1209 | |
<> | 154:37f96f9d4de2 | 1210 | /* calling flash command sequence function to execute the command */ |
<> | 154:37f96f9d4de2 | 1211 | returnCode = flash_command_sequence(config); |
<> | 154:37f96f9d4de2 | 1212 | |
<> | 154:37f96f9d4de2 | 1213 | if (kStatus_FLASH_Success == returnCode) |
<> | 154:37f96f9d4de2 | 1214 | { |
<> | 154:37f96f9d4de2 | 1215 | *dst = kFCCOBx[1]; |
<> | 154:37f96f9d4de2 | 1216 | /* Note: Have to seperate the first index from the rest if it equals 0 |
<> | 154:37f96f9d4de2 | 1217 | * to avoid a pointless comparison of unsigned int to 0 compiler warning */ |
<> | 154:37f96f9d4de2 | 1218 | #if FLASH_PROGRAM_ONCE_IS_8BYTES_UNIT_SUPPORT |
<> | 154:37f96f9d4de2 | 1219 | #if FLASH_PROGRAM_ONCE_IS_4BYTES_UNIT_SUPPORT |
<> | 154:37f96f9d4de2 | 1220 | if (((index == FLASH_PROGRAM_ONCE_MIN_ID_8BYTES) || |
<> | 154:37f96f9d4de2 | 1221 | /* Range check */ |
<> | 154:37f96f9d4de2 | 1222 | ((index >= FLASH_PROGRAM_ONCE_MIN_ID_8BYTES + 1) && (index <= FLASH_PROGRAM_ONCE_MAX_ID_8BYTES))) && |
<> | 154:37f96f9d4de2 | 1223 | (lengthInBytes == 8)) |
<> | 154:37f96f9d4de2 | 1224 | #endif /* FLASH_PROGRAM_ONCE_IS_4BYTES_UNIT_SUPPORT */ |
<> | 154:37f96f9d4de2 | 1225 | { |
<> | 154:37f96f9d4de2 | 1226 | *(dst + 1) = kFCCOBx[2]; |
<> | 154:37f96f9d4de2 | 1227 | } |
<> | 154:37f96f9d4de2 | 1228 | #endif /* FLASH_PROGRAM_ONCE_IS_8BYTES_UNIT_SUPPORT */ |
<> | 154:37f96f9d4de2 | 1229 | } |
<> | 154:37f96f9d4de2 | 1230 | |
<> | 154:37f96f9d4de2 | 1231 | return returnCode; |
<> | 154:37f96f9d4de2 | 1232 | } |
<> | 154:37f96f9d4de2 | 1233 | |
<> | 154:37f96f9d4de2 | 1234 | status_t FLASH_GetSecurityState(flash_config_t *config, flash_security_state_t *state) |
<> | 154:37f96f9d4de2 | 1235 | { |
<> | 154:37f96f9d4de2 | 1236 | /* store data read from flash register */ |
<> | 154:37f96f9d4de2 | 1237 | uint8_t registerValue; |
<> | 154:37f96f9d4de2 | 1238 | |
<> | 154:37f96f9d4de2 | 1239 | if ((config == NULL) || (state == NULL)) |
<> | 154:37f96f9d4de2 | 1240 | { |
<> | 154:37f96f9d4de2 | 1241 | return kStatus_FLASH_InvalidArgument; |
<> | 154:37f96f9d4de2 | 1242 | } |
<> | 154:37f96f9d4de2 | 1243 | |
<> | 154:37f96f9d4de2 | 1244 | /* Get flash security register value */ |
<> | 154:37f96f9d4de2 | 1245 | registerValue = FTFx->FSEC; |
<> | 154:37f96f9d4de2 | 1246 | |
<> | 154:37f96f9d4de2 | 1247 | /* check the status of the flash security bits in the security register */ |
<> | 154:37f96f9d4de2 | 1248 | if (FLASH_SECURITY_STATE_UNSECURED == (registerValue & FTFx_FSEC_SEC_MASK)) |
<> | 154:37f96f9d4de2 | 1249 | { |
<> | 154:37f96f9d4de2 | 1250 | /* Flash in unsecured state */ |
<> | 154:37f96f9d4de2 | 1251 | *state = kFLASH_SecurityStateNotSecure; |
<> | 154:37f96f9d4de2 | 1252 | } |
<> | 154:37f96f9d4de2 | 1253 | else |
<> | 154:37f96f9d4de2 | 1254 | { |
<> | 154:37f96f9d4de2 | 1255 | /* Flash in secured state |
<> | 154:37f96f9d4de2 | 1256 | * check for backdoor key security enable bit */ |
<> | 154:37f96f9d4de2 | 1257 | if (FLASH_SECURITY_STATE_KEYEN == (registerValue & FTFx_FSEC_KEYEN_MASK)) |
<> | 154:37f96f9d4de2 | 1258 | { |
<> | 154:37f96f9d4de2 | 1259 | /* Backdoor key security enabled */ |
<> | 154:37f96f9d4de2 | 1260 | *state = kFLASH_SecurityStateBackdoorEnabled; |
<> | 154:37f96f9d4de2 | 1261 | } |
<> | 154:37f96f9d4de2 | 1262 | else |
<> | 154:37f96f9d4de2 | 1263 | { |
<> | 154:37f96f9d4de2 | 1264 | /* Backdoor key security disabled */ |
<> | 154:37f96f9d4de2 | 1265 | *state = kFLASH_SecurityStateBackdoorDisabled; |
<> | 154:37f96f9d4de2 | 1266 | } |
<> | 154:37f96f9d4de2 | 1267 | } |
<> | 154:37f96f9d4de2 | 1268 | |
<> | 154:37f96f9d4de2 | 1269 | return (kStatus_FLASH_Success); |
<> | 154:37f96f9d4de2 | 1270 | } |
<> | 154:37f96f9d4de2 | 1271 | |
<> | 154:37f96f9d4de2 | 1272 | status_t FLASH_SecurityBypass(flash_config_t *config, const uint8_t *backdoorKey) |
<> | 154:37f96f9d4de2 | 1273 | { |
<> | 154:37f96f9d4de2 | 1274 | uint8_t registerValue; /* registerValue */ |
<> | 154:37f96f9d4de2 | 1275 | status_t returnCode; /* return code variable */ |
<> | 154:37f96f9d4de2 | 1276 | |
<> | 154:37f96f9d4de2 | 1277 | if ((config == NULL) || (backdoorKey == NULL)) |
<> | 154:37f96f9d4de2 | 1278 | { |
<> | 154:37f96f9d4de2 | 1279 | return kStatus_FLASH_InvalidArgument; |
<> | 154:37f96f9d4de2 | 1280 | } |
<> | 154:37f96f9d4de2 | 1281 | |
<> | 154:37f96f9d4de2 | 1282 | /* set the default return code as kStatus_Success */ |
<> | 154:37f96f9d4de2 | 1283 | returnCode = kStatus_FLASH_Success; |
<> | 154:37f96f9d4de2 | 1284 | |
<> | 154:37f96f9d4de2 | 1285 | /* Get flash security register value */ |
<> | 154:37f96f9d4de2 | 1286 | registerValue = FTFx->FSEC; |
<> | 154:37f96f9d4de2 | 1287 | |
<> | 154:37f96f9d4de2 | 1288 | /* Check to see if flash is in secure state (any state other than 0x2) |
<> | 154:37f96f9d4de2 | 1289 | * If not, then skip this since flash is not secure */ |
<> | 154:37f96f9d4de2 | 1290 | if (0x02 != (registerValue & 0x03)) |
<> | 154:37f96f9d4de2 | 1291 | { |
<> | 154:37f96f9d4de2 | 1292 | /* preparing passing parameter to erase a flash block */ |
<> | 154:37f96f9d4de2 | 1293 | kFCCOBx[0] = BYTES_JOIN_TO_WORD_1_3(FTFx_SECURITY_BY_PASS, 0xFFFFFFU); |
<> | 154:37f96f9d4de2 | 1294 | kFCCOBx[1] = BYTES_JOIN_TO_WORD_1_1_1_1(backdoorKey[0], backdoorKey[1], backdoorKey[2], backdoorKey[3]); |
<> | 154:37f96f9d4de2 | 1295 | kFCCOBx[2] = BYTES_JOIN_TO_WORD_1_1_1_1(backdoorKey[4], backdoorKey[5], backdoorKey[6], backdoorKey[7]); |
<> | 154:37f96f9d4de2 | 1296 | |
<> | 154:37f96f9d4de2 | 1297 | /* calling flash command sequence function to execute the command */ |
<> | 154:37f96f9d4de2 | 1298 | returnCode = flash_command_sequence(config); |
<> | 154:37f96f9d4de2 | 1299 | } |
<> | 154:37f96f9d4de2 | 1300 | |
<> | 154:37f96f9d4de2 | 1301 | return (returnCode); |
<> | 154:37f96f9d4de2 | 1302 | } |
<> | 154:37f96f9d4de2 | 1303 | |
<> | 154:37f96f9d4de2 | 1304 | status_t FLASH_VerifyEraseAll(flash_config_t *config, flash_margin_value_t margin) |
<> | 154:37f96f9d4de2 | 1305 | { |
<> | 154:37f96f9d4de2 | 1306 | if (config == NULL) |
<> | 154:37f96f9d4de2 | 1307 | { |
<> | 154:37f96f9d4de2 | 1308 | return kStatus_FLASH_InvalidArgument; |
<> | 154:37f96f9d4de2 | 1309 | } |
<> | 154:37f96f9d4de2 | 1310 | |
<> | 154:37f96f9d4de2 | 1311 | /* preparing passing parameter to verify all block command */ |
<> | 154:37f96f9d4de2 | 1312 | kFCCOBx[0] = BYTES_JOIN_TO_WORD_1_1_2(FTFx_VERIFY_ALL_BLOCK, margin, 0xFFFFU); |
<> | 154:37f96f9d4de2 | 1313 | |
<> | 154:37f96f9d4de2 | 1314 | /* calling flash command sequence function to execute the command */ |
<> | 154:37f96f9d4de2 | 1315 | return flash_command_sequence(config); |
<> | 154:37f96f9d4de2 | 1316 | } |
<> | 154:37f96f9d4de2 | 1317 | |
<> | 154:37f96f9d4de2 | 1318 | status_t FLASH_VerifyErase(flash_config_t *config, uint32_t start, uint32_t lengthInBytes, flash_margin_value_t margin) |
<> | 154:37f96f9d4de2 | 1319 | { |
<> | 154:37f96f9d4de2 | 1320 | /* Check arguments. */ |
<> | 154:37f96f9d4de2 | 1321 | uint32_t blockSize; |
<> | 154:37f96f9d4de2 | 1322 | flash_operation_config_t flashOperationInfo; |
<> | 154:37f96f9d4de2 | 1323 | uint32_t nextBlockStartAddress; |
<> | 154:37f96f9d4de2 | 1324 | uint32_t remainingBytes; |
<> | 154:37f96f9d4de2 | 1325 | status_t returnCode; |
<> | 154:37f96f9d4de2 | 1326 | |
<> | 154:37f96f9d4de2 | 1327 | flash_get_matched_operation_info(config, start, &flashOperationInfo); |
<> | 154:37f96f9d4de2 | 1328 | |
<> | 154:37f96f9d4de2 | 1329 | returnCode = flash_check_range(config, start, lengthInBytes, flashOperationInfo.sectionCmdAddressAligment); |
<> | 154:37f96f9d4de2 | 1330 | if (returnCode) |
<> | 154:37f96f9d4de2 | 1331 | { |
<> | 154:37f96f9d4de2 | 1332 | return returnCode; |
<> | 154:37f96f9d4de2 | 1333 | } |
<> | 154:37f96f9d4de2 | 1334 | |
<> | 154:37f96f9d4de2 | 1335 | flash_get_matched_operation_info(config, start, &flashOperationInfo); |
<> | 154:37f96f9d4de2 | 1336 | start = flashOperationInfo.convertedAddress; |
<> | 154:37f96f9d4de2 | 1337 | blockSize = flashOperationInfo.activeBlockSize; |
<> | 154:37f96f9d4de2 | 1338 | |
<> | 154:37f96f9d4de2 | 1339 | nextBlockStartAddress = ALIGN_UP(start, blockSize); |
<> | 154:37f96f9d4de2 | 1340 | if (nextBlockStartAddress == start) |
<> | 154:37f96f9d4de2 | 1341 | { |
<> | 154:37f96f9d4de2 | 1342 | nextBlockStartAddress += blockSize; |
<> | 154:37f96f9d4de2 | 1343 | } |
<> | 154:37f96f9d4de2 | 1344 | |
<> | 154:37f96f9d4de2 | 1345 | remainingBytes = lengthInBytes; |
<> | 154:37f96f9d4de2 | 1346 | |
<> | 154:37f96f9d4de2 | 1347 | while (remainingBytes) |
<> | 154:37f96f9d4de2 | 1348 | { |
<> | 154:37f96f9d4de2 | 1349 | uint32_t numberOfPhrases; |
<> | 154:37f96f9d4de2 | 1350 | uint32_t verifyLength = nextBlockStartAddress - start; |
<> | 154:37f96f9d4de2 | 1351 | if (verifyLength > remainingBytes) |
<> | 154:37f96f9d4de2 | 1352 | { |
<> | 154:37f96f9d4de2 | 1353 | verifyLength = remainingBytes; |
<> | 154:37f96f9d4de2 | 1354 | } |
<> | 154:37f96f9d4de2 | 1355 | |
<> | 154:37f96f9d4de2 | 1356 | numberOfPhrases = verifyLength / flashOperationInfo.sectionCmdAddressAligment; |
<> | 154:37f96f9d4de2 | 1357 | |
<> | 154:37f96f9d4de2 | 1358 | /* Fill in verify section command parameters. */ |
<> | 154:37f96f9d4de2 | 1359 | kFCCOBx[0] = BYTES_JOIN_TO_WORD_1_3(FTFx_VERIFY_SECTION, start); |
<> | 154:37f96f9d4de2 | 1360 | kFCCOBx[1] = BYTES_JOIN_TO_WORD_2_1_1(numberOfPhrases, margin, 0xFFU); |
<> | 154:37f96f9d4de2 | 1361 | |
<> | 154:37f96f9d4de2 | 1362 | /* calling flash command sequence function to execute the command */ |
<> | 154:37f96f9d4de2 | 1363 | returnCode = flash_command_sequence(config); |
<> | 154:37f96f9d4de2 | 1364 | if (returnCode) |
<> | 154:37f96f9d4de2 | 1365 | { |
<> | 154:37f96f9d4de2 | 1366 | return returnCode; |
<> | 154:37f96f9d4de2 | 1367 | } |
<> | 154:37f96f9d4de2 | 1368 | |
<> | 154:37f96f9d4de2 | 1369 | remainingBytes -= verifyLength; |
<> | 154:37f96f9d4de2 | 1370 | start += verifyLength; |
<> | 154:37f96f9d4de2 | 1371 | nextBlockStartAddress += blockSize; |
<> | 154:37f96f9d4de2 | 1372 | } |
<> | 154:37f96f9d4de2 | 1373 | |
<> | 154:37f96f9d4de2 | 1374 | return kStatus_FLASH_Success; |
<> | 154:37f96f9d4de2 | 1375 | } |
<> | 154:37f96f9d4de2 | 1376 | |
<> | 154:37f96f9d4de2 | 1377 | status_t FLASH_VerifyProgram(flash_config_t *config, |
<> | 154:37f96f9d4de2 | 1378 | uint32_t start, |
<> | 154:37f96f9d4de2 | 1379 | uint32_t lengthInBytes, |
<> | 154:37f96f9d4de2 | 1380 | const uint32_t *expectedData, |
<> | 154:37f96f9d4de2 | 1381 | flash_margin_value_t margin, |
<> | 154:37f96f9d4de2 | 1382 | uint32_t *failedAddress, |
<> | 154:37f96f9d4de2 | 1383 | uint32_t *failedData) |
<> | 154:37f96f9d4de2 | 1384 | { |
<> | 154:37f96f9d4de2 | 1385 | status_t returnCode; |
<> | 154:37f96f9d4de2 | 1386 | flash_operation_config_t flashOperationInfo; |
<> | 154:37f96f9d4de2 | 1387 | |
<> | 154:37f96f9d4de2 | 1388 | if (expectedData == NULL) |
<> | 154:37f96f9d4de2 | 1389 | { |
<> | 154:37f96f9d4de2 | 1390 | return kStatus_FLASH_InvalidArgument; |
<> | 154:37f96f9d4de2 | 1391 | } |
<> | 154:37f96f9d4de2 | 1392 | |
<> | 154:37f96f9d4de2 | 1393 | flash_get_matched_operation_info(config, start, &flashOperationInfo); |
<> | 154:37f96f9d4de2 | 1394 | |
<> | 154:37f96f9d4de2 | 1395 | returnCode = flash_check_range(config, start, lengthInBytes, flashOperationInfo.checkCmdAddressAligment); |
<> | 154:37f96f9d4de2 | 1396 | if (returnCode) |
<> | 154:37f96f9d4de2 | 1397 | { |
<> | 154:37f96f9d4de2 | 1398 | return returnCode; |
<> | 154:37f96f9d4de2 | 1399 | } |
<> | 154:37f96f9d4de2 | 1400 | |
<> | 154:37f96f9d4de2 | 1401 | start = flashOperationInfo.convertedAddress; |
<> | 154:37f96f9d4de2 | 1402 | |
<> | 154:37f96f9d4de2 | 1403 | while (lengthInBytes) |
<> | 154:37f96f9d4de2 | 1404 | { |
<> | 154:37f96f9d4de2 | 1405 | /* preparing passing parameter to program check the flash block */ |
<> | 154:37f96f9d4de2 | 1406 | kFCCOBx[0] = BYTES_JOIN_TO_WORD_1_3(FTFx_PROGRAM_CHECK, start); |
<> | 154:37f96f9d4de2 | 1407 | kFCCOBx[1] = BYTES_JOIN_TO_WORD_1_3(margin, 0xFFFFFFU); |
<> | 154:37f96f9d4de2 | 1408 | kFCCOBx[2] = *expectedData; |
<> | 154:37f96f9d4de2 | 1409 | |
<> | 154:37f96f9d4de2 | 1410 | /* calling flash command sequence function to execute the command */ |
<> | 154:37f96f9d4de2 | 1411 | returnCode = flash_command_sequence(config); |
<> | 154:37f96f9d4de2 | 1412 | |
<> | 154:37f96f9d4de2 | 1413 | /* checking for the success of command execution */ |
<> | 154:37f96f9d4de2 | 1414 | if (kStatus_FLASH_Success != returnCode) |
<> | 154:37f96f9d4de2 | 1415 | { |
<> | 154:37f96f9d4de2 | 1416 | if (failedAddress) |
<> | 154:37f96f9d4de2 | 1417 | { |
<> | 154:37f96f9d4de2 | 1418 | *failedAddress = start; |
<> | 154:37f96f9d4de2 | 1419 | } |
<> | 154:37f96f9d4de2 | 1420 | if (failedData) |
<> | 154:37f96f9d4de2 | 1421 | { |
<> | 154:37f96f9d4de2 | 1422 | *failedData = 0; |
<> | 154:37f96f9d4de2 | 1423 | } |
<> | 154:37f96f9d4de2 | 1424 | break; |
<> | 154:37f96f9d4de2 | 1425 | } |
<> | 154:37f96f9d4de2 | 1426 | |
<> | 154:37f96f9d4de2 | 1427 | lengthInBytes -= flashOperationInfo.checkCmdAddressAligment; |
<> | 154:37f96f9d4de2 | 1428 | expectedData += flashOperationInfo.checkCmdAddressAligment / sizeof(*expectedData); |
<> | 154:37f96f9d4de2 | 1429 | start += flashOperationInfo.checkCmdAddressAligment; |
<> | 154:37f96f9d4de2 | 1430 | } |
<> | 154:37f96f9d4de2 | 1431 | |
<> | 154:37f96f9d4de2 | 1432 | return (returnCode); |
<> | 154:37f96f9d4de2 | 1433 | } |
<> | 154:37f96f9d4de2 | 1434 | |
<> | 154:37f96f9d4de2 | 1435 | status_t FLASH_VerifyEraseAllExecuteOnlySegments(flash_config_t *config, flash_margin_value_t margin) |
<> | 154:37f96f9d4de2 | 1436 | { |
<> | 154:37f96f9d4de2 | 1437 | if (config == NULL) |
<> | 154:37f96f9d4de2 | 1438 | { |
<> | 154:37f96f9d4de2 | 1439 | return kStatus_FLASH_InvalidArgument; |
<> | 154:37f96f9d4de2 | 1440 | } |
<> | 154:37f96f9d4de2 | 1441 | |
<> | 154:37f96f9d4de2 | 1442 | /* preparing passing parameter to verify erase all execute-only segments command */ |
<> | 154:37f96f9d4de2 | 1443 | kFCCOBx[0] = BYTES_JOIN_TO_WORD_1_1_2(FTFx_VERIFY_ALL_EXECUTE_ONLY_SEGMENT, margin, 0xFFFFU); |
<> | 154:37f96f9d4de2 | 1444 | |
<> | 154:37f96f9d4de2 | 1445 | /* calling flash command sequence function to execute the command */ |
<> | 154:37f96f9d4de2 | 1446 | return flash_command_sequence(config); |
<> | 154:37f96f9d4de2 | 1447 | } |
<> | 154:37f96f9d4de2 | 1448 | |
<> | 154:37f96f9d4de2 | 1449 | status_t FLASH_IsProtected(flash_config_t *config, |
<> | 154:37f96f9d4de2 | 1450 | uint32_t start, |
<> | 154:37f96f9d4de2 | 1451 | uint32_t lengthInBytes, |
<> | 154:37f96f9d4de2 | 1452 | flash_protection_state_t *protection_state) |
<> | 154:37f96f9d4de2 | 1453 | { |
<> | 154:37f96f9d4de2 | 1454 | uint32_t endAddress; /* end address for protection check */ |
<> | 154:37f96f9d4de2 | 1455 | uint32_t regionCheckedCounter; /* increments each time the flash address was checked for |
<> | 154:37f96f9d4de2 | 1456 | * protection status */ |
<> | 154:37f96f9d4de2 | 1457 | uint32_t regionCounter; /* incrementing variable used to increment through the flash |
<> | 154:37f96f9d4de2 | 1458 | * protection regions */ |
<> | 154:37f96f9d4de2 | 1459 | uint32_t protectStatusCounter; /* increments each time a flash region was detected as protected */ |
<> | 154:37f96f9d4de2 | 1460 | |
<> | 154:37f96f9d4de2 | 1461 | uint8_t flashRegionProtectStatus[FSL_FEATURE_FLASH_PFLASH_PROTECTION_REGION_COUNT]; /* array of the protection |
<> | 154:37f96f9d4de2 | 1462 | * status for each |
<> | 154:37f96f9d4de2 | 1463 | * protection region */ |
<> | 154:37f96f9d4de2 | 1464 | uint32_t flashRegionAddress[FSL_FEATURE_FLASH_PFLASH_PROTECTION_REGION_COUNT + |
<> | 154:37f96f9d4de2 | 1465 | 1]; /* array of the start addresses for each flash |
<> | 154:37f96f9d4de2 | 1466 | * protection region. Note this is REGION_COUNT+1 |
<> | 154:37f96f9d4de2 | 1467 | * due to requiring the next start address after |
<> | 154:37f96f9d4de2 | 1468 | * the end of flash for loop-check purposes below */ |
<> | 154:37f96f9d4de2 | 1469 | flash_protection_config_t flashProtectionInfo; /* flash protection information */ |
<> | 154:37f96f9d4de2 | 1470 | status_t returnCode; |
<> | 154:37f96f9d4de2 | 1471 | |
<> | 154:37f96f9d4de2 | 1472 | if (protection_state == NULL) |
<> | 154:37f96f9d4de2 | 1473 | { |
<> | 154:37f96f9d4de2 | 1474 | return kStatus_FLASH_InvalidArgument; |
<> | 154:37f96f9d4de2 | 1475 | } |
<> | 154:37f96f9d4de2 | 1476 | |
<> | 154:37f96f9d4de2 | 1477 | /* Check the supplied address range. */ |
<> | 154:37f96f9d4de2 | 1478 | returnCode = flash_check_range(config, start, lengthInBytes, FSL_FEATURE_FLASH_PFLASH_BLOCK_WRITE_UNIT_SIZE); |
<> | 154:37f96f9d4de2 | 1479 | if (returnCode) |
<> | 154:37f96f9d4de2 | 1480 | { |
<> | 154:37f96f9d4de2 | 1481 | return returnCode; |
<> | 154:37f96f9d4de2 | 1482 | } |
<> | 154:37f96f9d4de2 | 1483 | |
<> | 154:37f96f9d4de2 | 1484 | /* Get necessary flash protection information. */ |
<> | 154:37f96f9d4de2 | 1485 | returnCode = flash_get_protection_info(config, &flashProtectionInfo); |
<> | 154:37f96f9d4de2 | 1486 | if (returnCode) |
<> | 154:37f96f9d4de2 | 1487 | { |
<> | 154:37f96f9d4de2 | 1488 | return returnCode; |
<> | 154:37f96f9d4de2 | 1489 | } |
<> | 154:37f96f9d4de2 | 1490 | |
<> | 154:37f96f9d4de2 | 1491 | /* calculating Flash end address */ |
<> | 154:37f96f9d4de2 | 1492 | endAddress = start + lengthInBytes; |
<> | 154:37f96f9d4de2 | 1493 | |
<> | 154:37f96f9d4de2 | 1494 | /* populate the flashRegionAddress array with the start address of each flash region */ |
<> | 154:37f96f9d4de2 | 1495 | regionCounter = 0; /* make sure regionCounter is initialized to 0 first */ |
<> | 154:37f96f9d4de2 | 1496 | |
<> | 154:37f96f9d4de2 | 1497 | /* populate up to 33rd element of array, this is the next address after end of flash array */ |
<> | 154:37f96f9d4de2 | 1498 | while (regionCounter <= flashProtectionInfo.regionCount) |
<> | 154:37f96f9d4de2 | 1499 | { |
<> | 154:37f96f9d4de2 | 1500 | flashRegionAddress[regionCounter] = |
<> | 154:37f96f9d4de2 | 1501 | flashProtectionInfo.regionBase + flashProtectionInfo.regionSize * regionCounter; |
<> | 154:37f96f9d4de2 | 1502 | regionCounter++; |
<> | 154:37f96f9d4de2 | 1503 | } |
<> | 154:37f96f9d4de2 | 1504 | |
<> | 154:37f96f9d4de2 | 1505 | /* populate flashRegionProtectStatus array with status information |
<> | 154:37f96f9d4de2 | 1506 | * Protection status for each region is stored in the FPROT[3:0] registers |
<> | 154:37f96f9d4de2 | 1507 | * Each bit represents one region of flash |
<> | 154:37f96f9d4de2 | 1508 | * 4 registers * 8-bits-per-register = 32-bits (32-regions) |
<> | 154:37f96f9d4de2 | 1509 | * The convention is: |
<> | 154:37f96f9d4de2 | 1510 | * FPROT3[bit 0] is the first protection region (start of flash memory) |
<> | 154:37f96f9d4de2 | 1511 | * FPROT0[bit 7] is the last protection region (end of flash memory) |
<> | 154:37f96f9d4de2 | 1512 | * regionCounter is used to determine which FPROT[3:0] register to check for protection status |
<> | 154:37f96f9d4de2 | 1513 | * Note: FPROT=1 means NOT protected, FPROT=0 means protected */ |
<> | 154:37f96f9d4de2 | 1514 | regionCounter = 0; /* make sure regionCounter is initialized to 0 first */ |
<> | 154:37f96f9d4de2 | 1515 | while (regionCounter < flashProtectionInfo.regionCount) |
<> | 154:37f96f9d4de2 | 1516 | { |
<> | 154:37f96f9d4de2 | 1517 | #if FLASH_SSD_IS_SECONDARY_FLASH_SUPPORTED && FLASH_SSD_SECONDARY_FLASH_HAS_ITS_OWN_PROTECTION_REGISTER |
<> | 154:37f96f9d4de2 | 1518 | if (config->FlashMemoryIndex == (uint32_t)kFLASH_MemoryIndexSecondaryFlash) |
<> | 154:37f96f9d4de2 | 1519 | { |
<> | 154:37f96f9d4de2 | 1520 | if (regionCounter < 8) |
<> | 154:37f96f9d4de2 | 1521 | { |
<> | 154:37f96f9d4de2 | 1522 | flashRegionProtectStatus[regionCounter] = (FTFx_FPROTSL_REG >> regionCounter) & (0x01u); |
<> | 154:37f96f9d4de2 | 1523 | } |
<> | 154:37f96f9d4de2 | 1524 | else if ((regionCounter >= 8) && (regionCounter < 16)) |
<> | 154:37f96f9d4de2 | 1525 | { |
<> | 154:37f96f9d4de2 | 1526 | flashRegionProtectStatus[regionCounter] = (FTFx_FPROTSH_REG >> (regionCounter - 8)) & (0x01u); |
<> | 154:37f96f9d4de2 | 1527 | } |
<> | 154:37f96f9d4de2 | 1528 | else |
<> | 154:37f96f9d4de2 | 1529 | { |
<> | 154:37f96f9d4de2 | 1530 | break; |
<> | 154:37f96f9d4de2 | 1531 | } |
<> | 154:37f96f9d4de2 | 1532 | } |
<> | 154:37f96f9d4de2 | 1533 | else |
<> | 154:37f96f9d4de2 | 1534 | #endif |
<> | 154:37f96f9d4de2 | 1535 | { |
<> | 154:37f96f9d4de2 | 1536 | /* Note: So far protection region count may be 16/20/24/32/64 */ |
<> | 154:37f96f9d4de2 | 1537 | if (regionCounter < 8) |
<> | 154:37f96f9d4de2 | 1538 | { |
<> | 154:37f96f9d4de2 | 1539 | flashRegionProtectStatus[regionCounter] = (FTFx_FPROTL3_REG >> regionCounter) & (0x01u); |
<> | 154:37f96f9d4de2 | 1540 | } |
<> | 154:37f96f9d4de2 | 1541 | else if ((regionCounter >= 8) && (regionCounter < 16)) |
<> | 154:37f96f9d4de2 | 1542 | { |
<> | 154:37f96f9d4de2 | 1543 | flashRegionProtectStatus[regionCounter] = (FTFx_FPROTL2_REG >> (regionCounter - 8)) & (0x01u); |
<> | 154:37f96f9d4de2 | 1544 | } |
<> | 154:37f96f9d4de2 | 1545 | #if defined(FSL_FEATURE_FLASH_PFLASH_PROTECTION_REGION_COUNT) && (FSL_FEATURE_FLASH_PFLASH_PROTECTION_REGION_COUNT > 16) |
<> | 154:37f96f9d4de2 | 1546 | #if (FSL_FEATURE_FLASH_PFLASH_PROTECTION_REGION_COUNT == 20) |
<> | 154:37f96f9d4de2 | 1547 | else if ((regionCounter >= 16) && (regionCounter < 20)) |
<> | 154:37f96f9d4de2 | 1548 | { |
<> | 154:37f96f9d4de2 | 1549 | flashRegionProtectStatus[regionCounter] = (FTFx_FPROTL1_REG >> (regionCounter - 16)) & (0x01u); |
<> | 154:37f96f9d4de2 | 1550 | } |
<> | 154:37f96f9d4de2 | 1551 | #else |
<> | 154:37f96f9d4de2 | 1552 | else if ((regionCounter >= 16) && (regionCounter < 24)) |
<> | 154:37f96f9d4de2 | 1553 | { |
<> | 154:37f96f9d4de2 | 1554 | flashRegionProtectStatus[regionCounter] = (FTFx_FPROTL1_REG >> (regionCounter - 16)) & (0x01u); |
<> | 154:37f96f9d4de2 | 1555 | } |
<> | 154:37f96f9d4de2 | 1556 | #endif /* (FSL_FEATURE_FLASH_PFLASH_PROTECTION_REGION_COUNT == 20) */ |
<> | 154:37f96f9d4de2 | 1557 | #endif |
<> | 154:37f96f9d4de2 | 1558 | #if defined(FSL_FEATURE_FLASH_PFLASH_PROTECTION_REGION_COUNT) && (FSL_FEATURE_FLASH_PFLASH_PROTECTION_REGION_COUNT > 24) |
<> | 154:37f96f9d4de2 | 1559 | else if ((regionCounter >= 24) && (regionCounter < 32)) |
<> | 154:37f96f9d4de2 | 1560 | { |
<> | 154:37f96f9d4de2 | 1561 | flashRegionProtectStatus[regionCounter] = (FTFx_FPROTL0_REG >> (regionCounter - 24)) & (0x01u); |
<> | 154:37f96f9d4de2 | 1562 | } |
<> | 154:37f96f9d4de2 | 1563 | #endif |
<> | 154:37f96f9d4de2 | 1564 | #if defined(FSL_FEATURE_FLASH_PFLASH_PROTECTION_REGION_COUNT) && \ |
<> | 154:37f96f9d4de2 | 1565 | (FSL_FEATURE_FLASH_PFLASH_PROTECTION_REGION_COUNT == 64) |
<> | 154:37f96f9d4de2 | 1566 | else if (regionCounter < 40) |
<> | 154:37f96f9d4de2 | 1567 | { |
<> | 154:37f96f9d4de2 | 1568 | flashRegionProtectStatus[regionCounter] = (FTFx_FPROTH3_REG >> (regionCounter - 32)) & (0x01u); |
<> | 154:37f96f9d4de2 | 1569 | } |
<> | 154:37f96f9d4de2 | 1570 | else if (regionCounter < 48) |
<> | 154:37f96f9d4de2 | 1571 | { |
<> | 154:37f96f9d4de2 | 1572 | flashRegionProtectStatus[regionCounter] = (FTFx_FPROTH2_REG >> (regionCounter - 40)) & (0x01u); |
<> | 154:37f96f9d4de2 | 1573 | } |
<> | 154:37f96f9d4de2 | 1574 | else if (regionCounter < 56) |
<> | 154:37f96f9d4de2 | 1575 | { |
<> | 154:37f96f9d4de2 | 1576 | flashRegionProtectStatus[regionCounter] = (FTFx_FPROTH1_REG >> (regionCounter - 48)) & (0x01u); |
<> | 154:37f96f9d4de2 | 1577 | } |
<> | 154:37f96f9d4de2 | 1578 | else if (regionCounter < 64) |
<> | 154:37f96f9d4de2 | 1579 | { |
<> | 154:37f96f9d4de2 | 1580 | flashRegionProtectStatus[regionCounter] = (FTFx_FPROTH0_REG >> (regionCounter - 56)) & (0x01u); |
<> | 154:37f96f9d4de2 | 1581 | } |
<> | 154:37f96f9d4de2 | 1582 | #endif |
<> | 154:37f96f9d4de2 | 1583 | else |
<> | 154:37f96f9d4de2 | 1584 | { |
<> | 154:37f96f9d4de2 | 1585 | break; |
<> | 154:37f96f9d4de2 | 1586 | } |
<> | 154:37f96f9d4de2 | 1587 | } |
<> | 154:37f96f9d4de2 | 1588 | |
<> | 154:37f96f9d4de2 | 1589 | regionCounter++; |
<> | 154:37f96f9d4de2 | 1590 | } |
<> | 154:37f96f9d4de2 | 1591 | |
<> | 154:37f96f9d4de2 | 1592 | /* loop through the flash regions and check |
<> | 154:37f96f9d4de2 | 1593 | * desired flash address range for protection status |
<> | 154:37f96f9d4de2 | 1594 | * loop stops when it is detected that start has exceeded the endAddress */ |
<> | 154:37f96f9d4de2 | 1595 | regionCounter = 0; /* make sure regionCounter is initialized to 0 first */ |
<> | 154:37f96f9d4de2 | 1596 | regionCheckedCounter = 0; |
<> | 154:37f96f9d4de2 | 1597 | protectStatusCounter = 0; /* make sure protectStatusCounter is initialized to 0 first */ |
<> | 154:37f96f9d4de2 | 1598 | while (start < endAddress) |
<> | 154:37f96f9d4de2 | 1599 | { |
<> | 154:37f96f9d4de2 | 1600 | /* check to see if the address falls within this protection region |
<> | 154:37f96f9d4de2 | 1601 | * Note that if the entire flash is to be checked, the last protection |
<> | 154:37f96f9d4de2 | 1602 | * region checked would consist of the last protection start address and |
<> | 154:37f96f9d4de2 | 1603 | * the start address following the end of flash */ |
<> | 154:37f96f9d4de2 | 1604 | if ((start >= flashRegionAddress[regionCounter]) && (start < flashRegionAddress[regionCounter + 1])) |
<> | 154:37f96f9d4de2 | 1605 | { |
<> | 154:37f96f9d4de2 | 1606 | /* increment regionCheckedCounter to indicate this region was checked */ |
<> | 154:37f96f9d4de2 | 1607 | regionCheckedCounter++; |
<> | 154:37f96f9d4de2 | 1608 | |
<> | 154:37f96f9d4de2 | 1609 | /* check the protection status of this region |
<> | 154:37f96f9d4de2 | 1610 | * Note: FPROT=1 means NOT protected, FPROT=0 means protected */ |
<> | 154:37f96f9d4de2 | 1611 | if (!flashRegionProtectStatus[regionCounter]) |
<> | 154:37f96f9d4de2 | 1612 | { |
<> | 154:37f96f9d4de2 | 1613 | /* increment protectStatusCounter to indicate this region is protected */ |
<> | 154:37f96f9d4de2 | 1614 | protectStatusCounter++; |
<> | 154:37f96f9d4de2 | 1615 | } |
<> | 154:37f96f9d4de2 | 1616 | start += flashProtectionInfo.regionSize; /* increment to an address within the next region */ |
<> | 154:37f96f9d4de2 | 1617 | } |
<> | 154:37f96f9d4de2 | 1618 | regionCounter++; /* increment regionCounter to check for the next flash protection region */ |
<> | 154:37f96f9d4de2 | 1619 | } |
<> | 154:37f96f9d4de2 | 1620 | |
<> | 154:37f96f9d4de2 | 1621 | /* if protectStatusCounter == 0, then no region of the desired flash region is protected */ |
<> | 154:37f96f9d4de2 | 1622 | if (protectStatusCounter == 0) |
<> | 154:37f96f9d4de2 | 1623 | { |
<> | 154:37f96f9d4de2 | 1624 | *protection_state = kFLASH_ProtectionStateUnprotected; |
<> | 154:37f96f9d4de2 | 1625 | } |
<> | 154:37f96f9d4de2 | 1626 | /* if protectStatusCounter == regionCheckedCounter, then each region checked was protected */ |
<> | 154:37f96f9d4de2 | 1627 | else if (protectStatusCounter == regionCheckedCounter) |
<> | 154:37f96f9d4de2 | 1628 | { |
<> | 154:37f96f9d4de2 | 1629 | *protection_state = kFLASH_ProtectionStateProtected; |
<> | 154:37f96f9d4de2 | 1630 | } |
<> | 154:37f96f9d4de2 | 1631 | /* if protectStatusCounter != regionCheckedCounter, then protection status is mixed |
<> | 154:37f96f9d4de2 | 1632 | * In other words, some regions are protected while others are unprotected */ |
<> | 154:37f96f9d4de2 | 1633 | else |
<> | 154:37f96f9d4de2 | 1634 | { |
<> | 154:37f96f9d4de2 | 1635 | *protection_state = kFLASH_ProtectionStateMixed; |
<> | 154:37f96f9d4de2 | 1636 | } |
<> | 154:37f96f9d4de2 | 1637 | |
<> | 154:37f96f9d4de2 | 1638 | return (returnCode); |
<> | 154:37f96f9d4de2 | 1639 | } |
<> | 154:37f96f9d4de2 | 1640 | |
<> | 154:37f96f9d4de2 | 1641 | status_t FLASH_IsExecuteOnly(flash_config_t *config, |
<> | 154:37f96f9d4de2 | 1642 | uint32_t start, |
<> | 154:37f96f9d4de2 | 1643 | uint32_t lengthInBytes, |
<> | 154:37f96f9d4de2 | 1644 | flash_execute_only_access_state_t *access_state) |
<> | 154:37f96f9d4de2 | 1645 | { |
<> | 154:37f96f9d4de2 | 1646 | #if defined(FSL_FEATURE_FLASH_HAS_ACCESS_CONTROL) && FSL_FEATURE_FLASH_HAS_ACCESS_CONTROL |
<> | 154:37f96f9d4de2 | 1647 | flash_access_config_t flashAccessInfo; /* flash Execute-Only information */ |
<> | 154:37f96f9d4de2 | 1648 | #endif /* FSL_FEATURE_FLASH_HAS_ACCESS_CONTROL */ |
<> | 154:37f96f9d4de2 | 1649 | status_t returnCode; |
<> | 154:37f96f9d4de2 | 1650 | |
<> | 154:37f96f9d4de2 | 1651 | if (access_state == NULL) |
<> | 154:37f96f9d4de2 | 1652 | { |
<> | 154:37f96f9d4de2 | 1653 | return kStatus_FLASH_InvalidArgument; |
<> | 154:37f96f9d4de2 | 1654 | } |
<> | 154:37f96f9d4de2 | 1655 | |
<> | 154:37f96f9d4de2 | 1656 | /* Check the supplied address range. */ |
<> | 154:37f96f9d4de2 | 1657 | returnCode = flash_check_range(config, start, lengthInBytes, FSL_FEATURE_FLASH_PFLASH_BLOCK_WRITE_UNIT_SIZE); |
<> | 154:37f96f9d4de2 | 1658 | if (returnCode) |
<> | 154:37f96f9d4de2 | 1659 | { |
<> | 154:37f96f9d4de2 | 1660 | return returnCode; |
<> | 154:37f96f9d4de2 | 1661 | } |
<> | 154:37f96f9d4de2 | 1662 | |
<> | 154:37f96f9d4de2 | 1663 | #if defined(FSL_FEATURE_FLASH_HAS_ACCESS_CONTROL) && FSL_FEATURE_FLASH_HAS_ACCESS_CONTROL |
<> | 154:37f96f9d4de2 | 1664 | /* Get necessary flash Execute-Only information. */ |
<> | 154:37f96f9d4de2 | 1665 | returnCode = flash_get_access_info(config, &flashAccessInfo); |
<> | 154:37f96f9d4de2 | 1666 | if (returnCode) |
<> | 154:37f96f9d4de2 | 1667 | { |
<> | 154:37f96f9d4de2 | 1668 | return returnCode; |
<> | 154:37f96f9d4de2 | 1669 | } |
<> | 154:37f96f9d4de2 | 1670 | |
<> | 154:37f96f9d4de2 | 1671 | { |
<> | 154:37f96f9d4de2 | 1672 | uint32_t executeOnlySegmentCounter = 0; |
<> | 154:37f96f9d4de2 | 1673 | |
<> | 154:37f96f9d4de2 | 1674 | /* calculating end address */ |
<> | 154:37f96f9d4de2 | 1675 | uint32_t endAddress = start + lengthInBytes; |
<> | 154:37f96f9d4de2 | 1676 | |
<> | 154:37f96f9d4de2 | 1677 | /* Aligning start address and end address */ |
<> | 154:37f96f9d4de2 | 1678 | uint32_t alignedStartAddress = ALIGN_DOWN(start, flashAccessInfo.SegmentSize); |
<> | 154:37f96f9d4de2 | 1679 | uint32_t alignedEndAddress = ALIGN_UP(endAddress, flashAccessInfo.SegmentSize); |
<> | 154:37f96f9d4de2 | 1680 | |
<> | 154:37f96f9d4de2 | 1681 | uint32_t segmentIndex = 0; |
<> | 154:37f96f9d4de2 | 1682 | uint32_t maxSupportedExecuteOnlySegmentCount = |
<> | 154:37f96f9d4de2 | 1683 | (alignedEndAddress - alignedStartAddress) / flashAccessInfo.SegmentSize; |
<> | 154:37f96f9d4de2 | 1684 | |
<> | 154:37f96f9d4de2 | 1685 | while (start < endAddress) |
<> | 154:37f96f9d4de2 | 1686 | { |
<> | 154:37f96f9d4de2 | 1687 | uint32_t xacc; |
<> | 154:37f96f9d4de2 | 1688 | |
<> | 154:37f96f9d4de2 | 1689 | segmentIndex = (start - flashAccessInfo.SegmentBase) / flashAccessInfo.SegmentSize; |
<> | 154:37f96f9d4de2 | 1690 | |
<> | 154:37f96f9d4de2 | 1691 | #if FLASH_SSD_IS_SECONDARY_FLASH_SUPPORTED && FLASH_SSD_SECONDARY_FLASH_HAS_ITS_OWN_ACCESS_REGISTER |
<> | 154:37f96f9d4de2 | 1692 | if (config->FlashMemoryIndex == (uint32_t)kFLASH_MemoryIndexSecondaryFlash) |
<> | 154:37f96f9d4de2 | 1693 | { |
<> | 154:37f96f9d4de2 | 1694 | /* For secondary flash, The two XACCS registers allow up to 16 restricted segments of equal memory size. |
<> | 154:37f96f9d4de2 | 1695 | */ |
<> | 154:37f96f9d4de2 | 1696 | if (segmentIndex < 8) |
<> | 154:37f96f9d4de2 | 1697 | { |
<> | 154:37f96f9d4de2 | 1698 | xacc = *(const volatile uint8_t *)&FTFx_XACCSL_REG; |
<> | 154:37f96f9d4de2 | 1699 | } |
<> | 154:37f96f9d4de2 | 1700 | else if (segmentIndex < flashAccessInfo.SegmentCount) |
<> | 154:37f96f9d4de2 | 1701 | { |
<> | 154:37f96f9d4de2 | 1702 | xacc = *(const volatile uint8_t *)&FTFx_XACCSH_REG; |
<> | 154:37f96f9d4de2 | 1703 | segmentIndex -= 8; |
<> | 154:37f96f9d4de2 | 1704 | } |
<> | 154:37f96f9d4de2 | 1705 | else |
<> | 154:37f96f9d4de2 | 1706 | { |
<> | 154:37f96f9d4de2 | 1707 | break; |
<> | 154:37f96f9d4de2 | 1708 | } |
<> | 154:37f96f9d4de2 | 1709 | } |
<> | 154:37f96f9d4de2 | 1710 | else |
<> | 154:37f96f9d4de2 | 1711 | #endif |
<> | 154:37f96f9d4de2 | 1712 | { |
<> | 154:37f96f9d4de2 | 1713 | /* For primary flash, The eight XACC registers allow up to 64 restricted segments of equal memory size. |
<> | 154:37f96f9d4de2 | 1714 | */ |
<> | 154:37f96f9d4de2 | 1715 | if (segmentIndex < 32) |
<> | 154:37f96f9d4de2 | 1716 | { |
<> | 154:37f96f9d4de2 | 1717 | xacc = *(const volatile uint32_t *)&FTFx_XACCL3_REG; |
<> | 154:37f96f9d4de2 | 1718 | } |
<> | 154:37f96f9d4de2 | 1719 | else if (segmentIndex < flashAccessInfo.SegmentCount) |
<> | 154:37f96f9d4de2 | 1720 | { |
<> | 154:37f96f9d4de2 | 1721 | xacc = *(const volatile uint32_t *)&FTFx_XACCH3_REG; |
<> | 154:37f96f9d4de2 | 1722 | segmentIndex -= 32; |
<> | 154:37f96f9d4de2 | 1723 | } |
<> | 154:37f96f9d4de2 | 1724 | else |
<> | 154:37f96f9d4de2 | 1725 | { |
<> | 154:37f96f9d4de2 | 1726 | break; |
<> | 154:37f96f9d4de2 | 1727 | } |
<> | 154:37f96f9d4de2 | 1728 | } |
<> | 154:37f96f9d4de2 | 1729 | |
<> | 154:37f96f9d4de2 | 1730 | /* Determine if this address range is in a execute-only protection flash segment. */ |
<> | 154:37f96f9d4de2 | 1731 | if ((~xacc) & (1u << segmentIndex)) |
<> | 154:37f96f9d4de2 | 1732 | { |
<> | 154:37f96f9d4de2 | 1733 | executeOnlySegmentCounter++; |
<> | 154:37f96f9d4de2 | 1734 | } |
<> | 154:37f96f9d4de2 | 1735 | |
<> | 154:37f96f9d4de2 | 1736 | start += flashAccessInfo.SegmentSize; |
<> | 154:37f96f9d4de2 | 1737 | } |
<> | 154:37f96f9d4de2 | 1738 | |
<> | 154:37f96f9d4de2 | 1739 | if (executeOnlySegmentCounter < 1u) |
<> | 154:37f96f9d4de2 | 1740 | { |
<> | 154:37f96f9d4de2 | 1741 | *access_state = kFLASH_AccessStateUnLimited; |
<> | 154:37f96f9d4de2 | 1742 | } |
<> | 154:37f96f9d4de2 | 1743 | else if (executeOnlySegmentCounter < maxSupportedExecuteOnlySegmentCount) |
<> | 154:37f96f9d4de2 | 1744 | { |
<> | 154:37f96f9d4de2 | 1745 | *access_state = kFLASH_AccessStateMixed; |
<> | 154:37f96f9d4de2 | 1746 | } |
<> | 154:37f96f9d4de2 | 1747 | else |
<> | 154:37f96f9d4de2 | 1748 | { |
<> | 154:37f96f9d4de2 | 1749 | *access_state = kFLASH_AccessStateExecuteOnly; |
<> | 154:37f96f9d4de2 | 1750 | } |
<> | 154:37f96f9d4de2 | 1751 | } |
<> | 154:37f96f9d4de2 | 1752 | #else |
<> | 154:37f96f9d4de2 | 1753 | *access_state = kFLASH_AccessStateUnLimited; |
<> | 154:37f96f9d4de2 | 1754 | #endif /* FSL_FEATURE_FLASH_HAS_ACCESS_CONTROL */ |
<> | 154:37f96f9d4de2 | 1755 | |
<> | 154:37f96f9d4de2 | 1756 | return (returnCode); |
<> | 154:37f96f9d4de2 | 1757 | } |
<> | 154:37f96f9d4de2 | 1758 | |
<> | 154:37f96f9d4de2 | 1759 | status_t FLASH_GetProperty(flash_config_t *config, flash_property_tag_t whichProperty, uint32_t *value) |
<> | 154:37f96f9d4de2 | 1760 | { |
<> | 154:37f96f9d4de2 | 1761 | if ((config == NULL) || (value == NULL)) |
<> | 154:37f96f9d4de2 | 1762 | { |
<> | 154:37f96f9d4de2 | 1763 | return kStatus_FLASH_InvalidArgument; |
<> | 154:37f96f9d4de2 | 1764 | } |
<> | 154:37f96f9d4de2 | 1765 | |
<> | 154:37f96f9d4de2 | 1766 | switch (whichProperty) |
<> | 154:37f96f9d4de2 | 1767 | { |
<> | 154:37f96f9d4de2 | 1768 | case kFLASH_PropertyPflashSectorSize: |
<> | 154:37f96f9d4de2 | 1769 | *value = config->PFlashSectorSize; |
<> | 154:37f96f9d4de2 | 1770 | break; |
<> | 154:37f96f9d4de2 | 1771 | |
<> | 154:37f96f9d4de2 | 1772 | case kFLASH_PropertyPflashTotalSize: |
<> | 154:37f96f9d4de2 | 1773 | *value = config->PFlashTotalSize; |
<> | 154:37f96f9d4de2 | 1774 | break; |
<> | 154:37f96f9d4de2 | 1775 | |
<> | 154:37f96f9d4de2 | 1776 | case kFLASH_PropertyPflashBlockSize: |
<> | 154:37f96f9d4de2 | 1777 | *value = config->PFlashTotalSize / FSL_FEATURE_FLASH_PFLASH_BLOCK_COUNT; |
<> | 154:37f96f9d4de2 | 1778 | break; |
<> | 154:37f96f9d4de2 | 1779 | |
<> | 154:37f96f9d4de2 | 1780 | case kFLASH_PropertyPflashBlockCount: |
<> | 154:37f96f9d4de2 | 1781 | *value = config->PFlashBlockCount; |
<> | 154:37f96f9d4de2 | 1782 | break; |
<> | 154:37f96f9d4de2 | 1783 | |
<> | 154:37f96f9d4de2 | 1784 | case kFLASH_PropertyPflashBlockBaseAddr: |
<> | 154:37f96f9d4de2 | 1785 | *value = config->PFlashBlockBase; |
<> | 154:37f96f9d4de2 | 1786 | break; |
<> | 154:37f96f9d4de2 | 1787 | |
<> | 154:37f96f9d4de2 | 1788 | case kFLASH_PropertyPflashFacSupport: |
<> | 154:37f96f9d4de2 | 1789 | #if defined(FSL_FEATURE_FLASH_HAS_ACCESS_CONTROL) |
<> | 154:37f96f9d4de2 | 1790 | *value = FSL_FEATURE_FLASH_HAS_ACCESS_CONTROL; |
<> | 154:37f96f9d4de2 | 1791 | #else |
<> | 154:37f96f9d4de2 | 1792 | *value = 0; |
<> | 154:37f96f9d4de2 | 1793 | #endif /* FSL_FEATURE_FLASH_HAS_ACCESS_CONTROL */ |
<> | 154:37f96f9d4de2 | 1794 | break; |
<> | 154:37f96f9d4de2 | 1795 | |
<> | 154:37f96f9d4de2 | 1796 | case kFLASH_PropertyPflashAccessSegmentSize: |
<> | 154:37f96f9d4de2 | 1797 | *value = config->PFlashAccessSegmentSize; |
<> | 154:37f96f9d4de2 | 1798 | break; |
<> | 154:37f96f9d4de2 | 1799 | |
<> | 154:37f96f9d4de2 | 1800 | case kFLASH_PropertyPflashAccessSegmentCount: |
<> | 154:37f96f9d4de2 | 1801 | *value = config->PFlashAccessSegmentCount; |
<> | 154:37f96f9d4de2 | 1802 | break; |
<> | 154:37f96f9d4de2 | 1803 | |
<> | 154:37f96f9d4de2 | 1804 | case kFLASH_PropertyFlexRamBlockBaseAddr: |
<> | 154:37f96f9d4de2 | 1805 | *value = config->FlexRAMBlockBase; |
<> | 154:37f96f9d4de2 | 1806 | break; |
<> | 154:37f96f9d4de2 | 1807 | |
<> | 154:37f96f9d4de2 | 1808 | case kFLASH_PropertyFlexRamTotalSize: |
<> | 154:37f96f9d4de2 | 1809 | *value = config->FlexRAMTotalSize; |
<> | 154:37f96f9d4de2 | 1810 | break; |
<> | 154:37f96f9d4de2 | 1811 | |
<> | 154:37f96f9d4de2 | 1812 | #if FLASH_SSD_IS_FLEXNVM_ENABLED |
<> | 154:37f96f9d4de2 | 1813 | case kFLASH_PropertyDflashSectorSize: |
<> | 154:37f96f9d4de2 | 1814 | *value = FSL_FEATURE_FLASH_FLEX_NVM_BLOCK_SECTOR_SIZE; |
<> | 154:37f96f9d4de2 | 1815 | break; |
<> | 154:37f96f9d4de2 | 1816 | case kFLASH_PropertyDflashTotalSize: |
<> | 154:37f96f9d4de2 | 1817 | *value = config->DFlashTotalSize; |
<> | 154:37f96f9d4de2 | 1818 | break; |
<> | 154:37f96f9d4de2 | 1819 | case kFLASH_PropertyDflashBlockSize: |
<> | 154:37f96f9d4de2 | 1820 | *value = FSL_FEATURE_FLASH_FLEX_NVM_BLOCK_SIZE; |
<> | 154:37f96f9d4de2 | 1821 | break; |
<> | 154:37f96f9d4de2 | 1822 | case kFLASH_PropertyDflashBlockCount: |
<> | 154:37f96f9d4de2 | 1823 | *value = FSL_FEATURE_FLASH_FLEX_NVM_BLOCK_COUNT; |
<> | 154:37f96f9d4de2 | 1824 | break; |
<> | 154:37f96f9d4de2 | 1825 | case kFLASH_PropertyDflashBlockBaseAddr: |
<> | 154:37f96f9d4de2 | 1826 | *value = config->DFlashBlockBase; |
<> | 154:37f96f9d4de2 | 1827 | break; |
<> | 154:37f96f9d4de2 | 1828 | case kFLASH_PropertyEepromTotalSize: |
<> | 154:37f96f9d4de2 | 1829 | *value = config->EEpromTotalSize; |
<> | 154:37f96f9d4de2 | 1830 | break; |
<> | 154:37f96f9d4de2 | 1831 | #endif /* FLASH_SSD_IS_FLEXNVM_ENABLED */ |
<> | 154:37f96f9d4de2 | 1832 | |
<> | 154:37f96f9d4de2 | 1833 | default: /* catch inputs that are not recognized */ |
<> | 154:37f96f9d4de2 | 1834 | return kStatus_FLASH_UnknownProperty; |
<> | 154:37f96f9d4de2 | 1835 | } |
<> | 154:37f96f9d4de2 | 1836 | |
<> | 154:37f96f9d4de2 | 1837 | return kStatus_FLASH_Success; |
<> | 154:37f96f9d4de2 | 1838 | } |
<> | 154:37f96f9d4de2 | 1839 | |
<> | 154:37f96f9d4de2 | 1840 | #if FLASH_SSD_IS_SECONDARY_FLASH_SUPPORTED |
<> | 154:37f96f9d4de2 | 1841 | status_t FLASH_SetProperty(flash_config_t *config, flash_property_tag_t whichProperty, uint32_t value) |
<> | 154:37f96f9d4de2 | 1842 | { |
<> | 154:37f96f9d4de2 | 1843 | status_t status = kStatus_FLASH_Success; |
<> | 154:37f96f9d4de2 | 1844 | |
<> | 154:37f96f9d4de2 | 1845 | if (config == NULL) |
<> | 154:37f96f9d4de2 | 1846 | { |
<> | 154:37f96f9d4de2 | 1847 | return kStatus_FLASH_InvalidArgument; |
<> | 154:37f96f9d4de2 | 1848 | } |
<> | 154:37f96f9d4de2 | 1849 | |
<> | 154:37f96f9d4de2 | 1850 | switch (whichProperty) |
<> | 154:37f96f9d4de2 | 1851 | { |
<> | 154:37f96f9d4de2 | 1852 | case kFLASH_PropertyFlashMemoryIndex: |
<> | 154:37f96f9d4de2 | 1853 | if ((value != (uint32_t)kFLASH_MemoryIndexPrimaryFlash) && |
<> | 154:37f96f9d4de2 | 1854 | (value != (uint32_t)kFLASH_MemoryIndexSecondaryFlash)) |
<> | 154:37f96f9d4de2 | 1855 | { |
<> | 154:37f96f9d4de2 | 1856 | return kStatus_FLASH_InvalidPropertyValue; |
<> | 154:37f96f9d4de2 | 1857 | } |
<> | 154:37f96f9d4de2 | 1858 | config->FlashMemoryIndex = value; |
<> | 154:37f96f9d4de2 | 1859 | break; |
<> | 154:37f96f9d4de2 | 1860 | |
<> | 154:37f96f9d4de2 | 1861 | case kFLASH_PropertyPflashSectorSize: |
<> | 154:37f96f9d4de2 | 1862 | case kFLASH_PropertyPflashTotalSize: |
<> | 154:37f96f9d4de2 | 1863 | case kFLASH_PropertyPflashBlockSize: |
<> | 154:37f96f9d4de2 | 1864 | case kFLASH_PropertyPflashBlockCount: |
<> | 154:37f96f9d4de2 | 1865 | case kFLASH_PropertyPflashBlockBaseAddr: |
<> | 154:37f96f9d4de2 | 1866 | case kFLASH_PropertyPflashFacSupport: |
<> | 154:37f96f9d4de2 | 1867 | case kFLASH_PropertyPflashAccessSegmentSize: |
<> | 154:37f96f9d4de2 | 1868 | case kFLASH_PropertyPflashAccessSegmentCount: |
<> | 154:37f96f9d4de2 | 1869 | case kFLASH_PropertyFlexRamBlockBaseAddr: |
<> | 154:37f96f9d4de2 | 1870 | case kFLASH_PropertyFlexRamTotalSize: |
<> | 154:37f96f9d4de2 | 1871 | #if FLASH_SSD_IS_FLEXNVM_ENABLED |
<> | 154:37f96f9d4de2 | 1872 | case kFLASH_PropertyDflashSectorSize: |
<> | 154:37f96f9d4de2 | 1873 | case kFLASH_PropertyDflashTotalSize: |
<> | 154:37f96f9d4de2 | 1874 | case kFLASH_PropertyDflashBlockSize: |
<> | 154:37f96f9d4de2 | 1875 | case kFLASH_PropertyDflashBlockCount: |
<> | 154:37f96f9d4de2 | 1876 | case kFLASH_PropertyDflashBlockBaseAddr: |
<> | 154:37f96f9d4de2 | 1877 | case kFLASH_PropertyEepromTotalSize: |
<> | 154:37f96f9d4de2 | 1878 | #endif /* FLASH_SSD_IS_FLEXNVM_ENABLED */ |
<> | 154:37f96f9d4de2 | 1879 | status = kStatus_FLASH_ReadOnlyProperty; |
<> | 154:37f96f9d4de2 | 1880 | break; |
<> | 154:37f96f9d4de2 | 1881 | default: /* catch inputs that are not recognized */ |
<> | 154:37f96f9d4de2 | 1882 | status = kStatus_FLASH_UnknownProperty; |
<> | 154:37f96f9d4de2 | 1883 | break; |
<> | 154:37f96f9d4de2 | 1884 | } |
<> | 154:37f96f9d4de2 | 1885 | |
<> | 154:37f96f9d4de2 | 1886 | return status; |
<> | 154:37f96f9d4de2 | 1887 | } |
<> | 154:37f96f9d4de2 | 1888 | #endif /* FLASH_SSD_IS_SECONDARY_FLASH_SUPPORTED */ |
<> | 154:37f96f9d4de2 | 1889 | |
<> | 154:37f96f9d4de2 | 1890 | #if defined(FSL_FEATURE_FLASH_HAS_SET_FLEXRAM_FUNCTION_CMD) && FSL_FEATURE_FLASH_HAS_SET_FLEXRAM_FUNCTION_CMD |
<> | 154:37f96f9d4de2 | 1891 | status_t FLASH_SetFlexramFunction(flash_config_t *config, flash_flexram_function_option_t option) |
<> | 154:37f96f9d4de2 | 1892 | { |
<> | 154:37f96f9d4de2 | 1893 | status_t status; |
<> | 154:37f96f9d4de2 | 1894 | |
<> | 154:37f96f9d4de2 | 1895 | if (config == NULL) |
<> | 154:37f96f9d4de2 | 1896 | { |
<> | 154:37f96f9d4de2 | 1897 | return kStatus_FLASH_InvalidArgument; |
<> | 154:37f96f9d4de2 | 1898 | } |
<> | 154:37f96f9d4de2 | 1899 | |
<> | 154:37f96f9d4de2 | 1900 | status = flasn_check_flexram_function_option_range(option); |
<> | 154:37f96f9d4de2 | 1901 | if (status != kStatus_FLASH_Success) |
<> | 154:37f96f9d4de2 | 1902 | { |
<> | 154:37f96f9d4de2 | 1903 | return status; |
<> | 154:37f96f9d4de2 | 1904 | } |
<> | 154:37f96f9d4de2 | 1905 | |
<> | 154:37f96f9d4de2 | 1906 | /* preparing passing parameter to verify all block command */ |
<> | 154:37f96f9d4de2 | 1907 | kFCCOBx[0] = BYTES_JOIN_TO_WORD_1_1_2(FTFx_SET_FLEXRAM_FUNCTION, option, 0xFFFFU); |
<> | 154:37f96f9d4de2 | 1908 | |
<> | 154:37f96f9d4de2 | 1909 | /* calling flash command sequence function to execute the command */ |
<> | 154:37f96f9d4de2 | 1910 | return flash_command_sequence(config); |
<> | 154:37f96f9d4de2 | 1911 | } |
<> | 154:37f96f9d4de2 | 1912 | #endif /* FSL_FEATURE_FLASH_HAS_SET_FLEXRAM_FUNCTION_CMD */ |
<> | 154:37f96f9d4de2 | 1913 | |
<> | 154:37f96f9d4de2 | 1914 | #if defined(FSL_FEATURE_FLASH_HAS_SWAP_CONTROL_CMD) && FSL_FEATURE_FLASH_HAS_SWAP_CONTROL_CMD |
<> | 154:37f96f9d4de2 | 1915 | status_t FLASH_SwapControl(flash_config_t *config, |
<> | 154:37f96f9d4de2 | 1916 | uint32_t address, |
<> | 154:37f96f9d4de2 | 1917 | flash_swap_control_option_t option, |
<> | 154:37f96f9d4de2 | 1918 | flash_swap_state_config_t *returnInfo) |
<> | 154:37f96f9d4de2 | 1919 | { |
<> | 154:37f96f9d4de2 | 1920 | status_t returnCode; |
<> | 154:37f96f9d4de2 | 1921 | |
<> | 154:37f96f9d4de2 | 1922 | if ((config == NULL) || (returnInfo == NULL)) |
<> | 154:37f96f9d4de2 | 1923 | { |
<> | 154:37f96f9d4de2 | 1924 | return kStatus_FLASH_InvalidArgument; |
<> | 154:37f96f9d4de2 | 1925 | } |
<> | 154:37f96f9d4de2 | 1926 | |
<> | 154:37f96f9d4de2 | 1927 | if (address & (FSL_FEATURE_FLASH_PFLASH_SWAP_CONTROL_CMD_ADDRESS_ALIGMENT - 1)) |
<> | 154:37f96f9d4de2 | 1928 | { |
<> | 154:37f96f9d4de2 | 1929 | return kStatus_FLASH_AlignmentError; |
<> | 154:37f96f9d4de2 | 1930 | } |
<> | 154:37f96f9d4de2 | 1931 | |
<> | 154:37f96f9d4de2 | 1932 | /* Make sure address provided is in the lower half of Program flash but not in the Flash Configuration Field */ |
<> | 154:37f96f9d4de2 | 1933 | if ((address >= (config->PFlashTotalSize / 2)) || |
<> | 154:37f96f9d4de2 | 1934 | ((address >= kFLASH_ConfigAreaStart) && (address <= kFLASH_ConfigAreaEnd))) |
<> | 154:37f96f9d4de2 | 1935 | { |
<> | 154:37f96f9d4de2 | 1936 | return kStatus_FLASH_SwapIndicatorAddressError; |
<> | 154:37f96f9d4de2 | 1937 | } |
<> | 154:37f96f9d4de2 | 1938 | |
<> | 154:37f96f9d4de2 | 1939 | /* Check the option. */ |
<> | 154:37f96f9d4de2 | 1940 | returnCode = flash_check_swap_control_option(option); |
<> | 154:37f96f9d4de2 | 1941 | if (returnCode) |
<> | 154:37f96f9d4de2 | 1942 | { |
<> | 154:37f96f9d4de2 | 1943 | return returnCode; |
<> | 154:37f96f9d4de2 | 1944 | } |
<> | 154:37f96f9d4de2 | 1945 | |
<> | 154:37f96f9d4de2 | 1946 | kFCCOBx[0] = BYTES_JOIN_TO_WORD_1_3(FTFx_SWAP_CONTROL, address); |
<> | 154:37f96f9d4de2 | 1947 | kFCCOBx[1] = BYTES_JOIN_TO_WORD_1_3(option, 0xFFFFFFU); |
<> | 154:37f96f9d4de2 | 1948 | |
<> | 154:37f96f9d4de2 | 1949 | returnCode = flash_command_sequence(config); |
<> | 154:37f96f9d4de2 | 1950 | |
<> | 154:37f96f9d4de2 | 1951 | returnInfo->flashSwapState = (flash_swap_state_t)FTFx_FCCOB5_REG; |
<> | 154:37f96f9d4de2 | 1952 | returnInfo->currentSwapBlockStatus = (flash_swap_block_status_t)FTFx_FCCOB6_REG; |
<> | 154:37f96f9d4de2 | 1953 | returnInfo->nextSwapBlockStatus = (flash_swap_block_status_t)FTFx_FCCOB7_REG; |
<> | 154:37f96f9d4de2 | 1954 | |
<> | 154:37f96f9d4de2 | 1955 | return returnCode; |
<> | 154:37f96f9d4de2 | 1956 | } |
<> | 154:37f96f9d4de2 | 1957 | #endif /* FSL_FEATURE_FLASH_HAS_SWAP_CONTROL_CMD */ |
<> | 154:37f96f9d4de2 | 1958 | |
<> | 154:37f96f9d4de2 | 1959 | #if defined(FSL_FEATURE_FLASH_HAS_PFLASH_BLOCK_SWAP) && FSL_FEATURE_FLASH_HAS_PFLASH_BLOCK_SWAP |
<> | 154:37f96f9d4de2 | 1960 | status_t FLASH_Swap(flash_config_t *config, uint32_t address, flash_swap_function_option_t option) |
<> | 154:37f96f9d4de2 | 1961 | { |
<> | 154:37f96f9d4de2 | 1962 | flash_swap_state_config_t returnInfo; |
<> | 154:37f96f9d4de2 | 1963 | status_t returnCode; |
<> | 154:37f96f9d4de2 | 1964 | |
<> | 154:37f96f9d4de2 | 1965 | memset(&returnInfo, 0xFFU, sizeof(returnInfo)); |
<> | 154:37f96f9d4de2 | 1966 | |
<> | 154:37f96f9d4de2 | 1967 | do |
<> | 154:37f96f9d4de2 | 1968 | { |
<> | 154:37f96f9d4de2 | 1969 | returnCode = FLASH_SwapControl(config, address, kFLASH_SwapControlOptionReportStatus, &returnInfo); |
<> | 154:37f96f9d4de2 | 1970 | if (returnCode != kStatus_FLASH_Success) |
<> | 154:37f96f9d4de2 | 1971 | { |
<> | 154:37f96f9d4de2 | 1972 | return returnCode; |
<> | 154:37f96f9d4de2 | 1973 | } |
<> | 154:37f96f9d4de2 | 1974 | |
<> | 154:37f96f9d4de2 | 1975 | if (kFLASH_SwapFunctionOptionDisable == option) |
<> | 154:37f96f9d4de2 | 1976 | { |
<> | 154:37f96f9d4de2 | 1977 | if (returnInfo.flashSwapState == kFLASH_SwapStateDisabled) |
<> | 154:37f96f9d4de2 | 1978 | { |
<> | 154:37f96f9d4de2 | 1979 | return kStatus_FLASH_Success; |
<> | 154:37f96f9d4de2 | 1980 | } |
<> | 154:37f96f9d4de2 | 1981 | else if (returnInfo.flashSwapState == kFLASH_SwapStateUninitialized) |
<> | 154:37f96f9d4de2 | 1982 | { |
<> | 154:37f96f9d4de2 | 1983 | /* The swap system changed to the DISABLED state with Program flash block 0 |
<> | 154:37f96f9d4de2 | 1984 | * located at relative flash address 0x0_0000 */ |
<> | 154:37f96f9d4de2 | 1985 | returnCode = FLASH_SwapControl(config, address, kFLASH_SwapControlOptionDisableSystem, &returnInfo); |
<> | 154:37f96f9d4de2 | 1986 | } |
<> | 154:37f96f9d4de2 | 1987 | else |
<> | 154:37f96f9d4de2 | 1988 | { |
<> | 154:37f96f9d4de2 | 1989 | /* Swap disable should be requested only when swap system is in the uninitialized state */ |
<> | 154:37f96f9d4de2 | 1990 | return kStatus_FLASH_SwapSystemNotInUninitialized; |
<> | 154:37f96f9d4de2 | 1991 | } |
<> | 154:37f96f9d4de2 | 1992 | } |
<> | 154:37f96f9d4de2 | 1993 | else |
<> | 154:37f96f9d4de2 | 1994 | { |
<> | 154:37f96f9d4de2 | 1995 | /* When first swap: the initial swap state is Uninitialized, flash swap inidicator address is unset, |
<> | 154:37f96f9d4de2 | 1996 | * the swap procedure should be Uninitialized -> Update-Erased -> Complete. |
<> | 154:37f96f9d4de2 | 1997 | * After the first swap has been completed, the flash swap inidicator address cannot be modified |
<> | 154:37f96f9d4de2 | 1998 | * unless EraseAllBlocks command is issued, the swap procedure is changed to Update -> Update-Erased -> |
<> | 154:37f96f9d4de2 | 1999 | * Complete. */ |
<> | 154:37f96f9d4de2 | 2000 | switch (returnInfo.flashSwapState) |
<> | 154:37f96f9d4de2 | 2001 | { |
<> | 154:37f96f9d4de2 | 2002 | case kFLASH_SwapStateUninitialized: |
<> | 154:37f96f9d4de2 | 2003 | /* If current swap mode is Uninitialized, Initialize Swap to Initialized/READY state. */ |
<> | 154:37f96f9d4de2 | 2004 | returnCode = |
<> | 154:37f96f9d4de2 | 2005 | FLASH_SwapControl(config, address, kFLASH_SwapControlOptionIntializeSystem, &returnInfo); |
<> | 154:37f96f9d4de2 | 2006 | break; |
<> | 154:37f96f9d4de2 | 2007 | case kFLASH_SwapStateReady: |
<> | 154:37f96f9d4de2 | 2008 | /* Validate whether the address provided to the swap system is matched to |
<> | 154:37f96f9d4de2 | 2009 | * swap indicator address in the IFR */ |
<> | 154:37f96f9d4de2 | 2010 | returnCode = flash_validate_swap_indicator_address(config, address); |
<> | 154:37f96f9d4de2 | 2011 | if (returnCode == kStatus_FLASH_Success) |
<> | 154:37f96f9d4de2 | 2012 | { |
<> | 154:37f96f9d4de2 | 2013 | /* If current swap mode is Initialized/Ready, Initialize Swap to UPDATE state. */ |
<> | 154:37f96f9d4de2 | 2014 | returnCode = |
<> | 154:37f96f9d4de2 | 2015 | FLASH_SwapControl(config, address, kFLASH_SwapControlOptionSetInUpdateState, &returnInfo); |
<> | 154:37f96f9d4de2 | 2016 | } |
<> | 154:37f96f9d4de2 | 2017 | break; |
<> | 154:37f96f9d4de2 | 2018 | case kFLASH_SwapStateUpdate: |
<> | 154:37f96f9d4de2 | 2019 | /* If current swap mode is Update, Erase indicator sector in non active block |
<> | 154:37f96f9d4de2 | 2020 | * to proceed swap system to update-erased state */ |
<> | 154:37f96f9d4de2 | 2021 | returnCode = FLASH_Erase(config, address + (config->PFlashTotalSize >> 1), |
<> | 154:37f96f9d4de2 | 2022 | FSL_FEATURE_FLASH_PFLASH_SECTOR_CMD_ADDRESS_ALIGMENT, kFLASH_ApiEraseKey); |
<> | 154:37f96f9d4de2 | 2023 | break; |
<> | 154:37f96f9d4de2 | 2024 | case kFLASH_SwapStateUpdateErased: |
<> | 154:37f96f9d4de2 | 2025 | /* If current swap mode is Update or Update-Erased, progress Swap to COMPLETE State */ |
<> | 154:37f96f9d4de2 | 2026 | returnCode = |
<> | 154:37f96f9d4de2 | 2027 | FLASH_SwapControl(config, address, kFLASH_SwapControlOptionSetInCompleteState, &returnInfo); |
<> | 154:37f96f9d4de2 | 2028 | break; |
<> | 154:37f96f9d4de2 | 2029 | case kFLASH_SwapStateComplete: |
<> | 154:37f96f9d4de2 | 2030 | break; |
<> | 154:37f96f9d4de2 | 2031 | case kFLASH_SwapStateDisabled: |
<> | 154:37f96f9d4de2 | 2032 | /* When swap system is in disabled state, We need to clear swap system back to uninitialized |
<> | 154:37f96f9d4de2 | 2033 | * by issuing EraseAllBlocks command */ |
<> | 154:37f96f9d4de2 | 2034 | returnCode = kStatus_FLASH_SwapSystemNotInUninitialized; |
<> | 154:37f96f9d4de2 | 2035 | break; |
<> | 154:37f96f9d4de2 | 2036 | default: |
<> | 154:37f96f9d4de2 | 2037 | returnCode = kStatus_FLASH_InvalidArgument; |
<> | 154:37f96f9d4de2 | 2038 | break; |
<> | 154:37f96f9d4de2 | 2039 | } |
<> | 154:37f96f9d4de2 | 2040 | } |
<> | 154:37f96f9d4de2 | 2041 | if (returnCode != kStatus_FLASH_Success) |
<> | 154:37f96f9d4de2 | 2042 | { |
<> | 154:37f96f9d4de2 | 2043 | break; |
<> | 154:37f96f9d4de2 | 2044 | } |
<> | 154:37f96f9d4de2 | 2045 | } while (!((kFLASH_SwapStateComplete == returnInfo.flashSwapState) && (kFLASH_SwapFunctionOptionEnable == option))); |
<> | 154:37f96f9d4de2 | 2046 | |
<> | 154:37f96f9d4de2 | 2047 | return returnCode; |
<> | 154:37f96f9d4de2 | 2048 | } |
<> | 154:37f96f9d4de2 | 2049 | #endif /* FSL_FEATURE_FLASH_HAS_PFLASH_BLOCK_SWAP */ |
<> | 154:37f96f9d4de2 | 2050 | |
<> | 154:37f96f9d4de2 | 2051 | #if defined(FSL_FEATURE_FLASH_HAS_PROGRAM_PARTITION_CMD) && FSL_FEATURE_FLASH_HAS_PROGRAM_PARTITION_CMD |
<> | 154:37f96f9d4de2 | 2052 | status_t FLASH_ProgramPartition(flash_config_t *config, |
<> | 154:37f96f9d4de2 | 2053 | flash_partition_flexram_load_option_t option, |
<> | 154:37f96f9d4de2 | 2054 | uint32_t eepromDataSizeCode, |
<> | 154:37f96f9d4de2 | 2055 | uint32_t flexnvmPartitionCode) |
<> | 154:37f96f9d4de2 | 2056 | { |
<> | 154:37f96f9d4de2 | 2057 | status_t returnCode; |
<> | 154:37f96f9d4de2 | 2058 | |
<> | 154:37f96f9d4de2 | 2059 | if (config == NULL) |
<> | 154:37f96f9d4de2 | 2060 | { |
<> | 154:37f96f9d4de2 | 2061 | return kStatus_FLASH_InvalidArgument; |
<> | 154:37f96f9d4de2 | 2062 | } |
<> | 154:37f96f9d4de2 | 2063 | |
<> | 154:37f96f9d4de2 | 2064 | /* eepromDataSizeCode[7:6], flexnvmPartitionCode[7:4] should be all 1'b0 |
<> | 154:37f96f9d4de2 | 2065 | * or it will cause access error. */ |
<> | 154:37f96f9d4de2 | 2066 | /* eepromDataSizeCode &= 0x3FU; */ |
<> | 154:37f96f9d4de2 | 2067 | /* flexnvmPartitionCode &= 0x0FU; */ |
<> | 154:37f96f9d4de2 | 2068 | |
<> | 154:37f96f9d4de2 | 2069 | /* preparing passing parameter to program the flash block */ |
<> | 154:37f96f9d4de2 | 2070 | kFCCOBx[0] = BYTES_JOIN_TO_WORD_1_2_1(FTFx_PROGRAM_PARTITION, 0xFFFFU, option); |
<> | 154:37f96f9d4de2 | 2071 | kFCCOBx[1] = BYTES_JOIN_TO_WORD_1_1_2(eepromDataSizeCode, flexnvmPartitionCode, 0xFFFFU); |
<> | 154:37f96f9d4de2 | 2072 | |
<> | 154:37f96f9d4de2 | 2073 | /* calling flash command sequence function to execute the command */ |
<> | 154:37f96f9d4de2 | 2074 | returnCode = flash_command_sequence(config); |
<> | 154:37f96f9d4de2 | 2075 | |
<> | 154:37f96f9d4de2 | 2076 | flash_cache_clear(config); |
<> | 154:37f96f9d4de2 | 2077 | |
<> | 154:37f96f9d4de2 | 2078 | #if FLASH_SSD_IS_FLEXNVM_ENABLED |
<> | 154:37f96f9d4de2 | 2079 | /* Data flash IFR will be updated by program partition command during reset sequence, |
<> | 154:37f96f9d4de2 | 2080 | * so we just set reserved values for partitioned FlexNVM size here */ |
<> | 154:37f96f9d4de2 | 2081 | config->EEpromTotalSize = FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_RESERVED; |
<> | 154:37f96f9d4de2 | 2082 | config->DFlashTotalSize = FLEX_NVM_DFLASH_SIZE_FOR_DEPART_RESERVED; |
<> | 154:37f96f9d4de2 | 2083 | #endif |
<> | 154:37f96f9d4de2 | 2084 | |
<> | 154:37f96f9d4de2 | 2085 | return (returnCode); |
<> | 154:37f96f9d4de2 | 2086 | } |
<> | 154:37f96f9d4de2 | 2087 | #endif /* FSL_FEATURE_FLASH_HAS_PROGRAM_PARTITION_CMD */ |
<> | 154:37f96f9d4de2 | 2088 | |
<> | 154:37f96f9d4de2 | 2089 | status_t FLASH_PflashSetProtection(flash_config_t *config, pflash_protection_status_t *protectStatus) |
<> | 154:37f96f9d4de2 | 2090 | { |
<> | 154:37f96f9d4de2 | 2091 | if (config == NULL) |
<> | 154:37f96f9d4de2 | 2092 | { |
<> | 154:37f96f9d4de2 | 2093 | return kStatus_FLASH_InvalidArgument; |
<> | 154:37f96f9d4de2 | 2094 | } |
<> | 154:37f96f9d4de2 | 2095 | |
<> | 154:37f96f9d4de2 | 2096 | #if FLASH_SSD_IS_SECONDARY_FLASH_SUPPORTED && FLASH_SSD_SECONDARY_FLASH_HAS_ITS_OWN_PROTECTION_REGISTER |
<> | 154:37f96f9d4de2 | 2097 | if (config->FlashMemoryIndex == (uint32_t)kFLASH_MemoryIndexSecondaryFlash) |
<> | 154:37f96f9d4de2 | 2098 | { |
<> | 154:37f96f9d4de2 | 2099 | *kFPROTSL = protectStatus->valueLow32b.prots16b.protsl; |
<> | 154:37f96f9d4de2 | 2100 | if (protectStatus->valueLow32b.prots16b.protsl != *kFPROTSL) |
<> | 154:37f96f9d4de2 | 2101 | { |
<> | 154:37f96f9d4de2 | 2102 | return kStatus_FLASH_CommandFailure; |
<> | 154:37f96f9d4de2 | 2103 | } |
<> | 154:37f96f9d4de2 | 2104 | |
<> | 154:37f96f9d4de2 | 2105 | *kFPROTSH = protectStatus->valueLow32b.prots16b.protsh; |
<> | 154:37f96f9d4de2 | 2106 | if (protectStatus->valueLow32b.prots16b.protsh != *kFPROTSH) |
<> | 154:37f96f9d4de2 | 2107 | { |
<> | 154:37f96f9d4de2 | 2108 | return kStatus_FLASH_CommandFailure; |
<> | 154:37f96f9d4de2 | 2109 | } |
<> | 154:37f96f9d4de2 | 2110 | } |
<> | 154:37f96f9d4de2 | 2111 | else |
<> | 154:37f96f9d4de2 | 2112 | #endif |
<> | 154:37f96f9d4de2 | 2113 | { |
<> | 154:37f96f9d4de2 | 2114 | *kFPROTL = protectStatus->valueLow32b.protl32b; |
<> | 154:37f96f9d4de2 | 2115 | if (protectStatus->valueLow32b.protl32b != *kFPROTL) |
<> | 154:37f96f9d4de2 | 2116 | { |
<> | 154:37f96f9d4de2 | 2117 | return kStatus_FLASH_CommandFailure; |
<> | 154:37f96f9d4de2 | 2118 | } |
<> | 154:37f96f9d4de2 | 2119 | |
<> | 154:37f96f9d4de2 | 2120 | #if defined(FTFx_FPROT_HIGH_REG) |
<> | 154:37f96f9d4de2 | 2121 | *kFPROTH = protectStatus->valueHigh32b.proth32b; |
<> | 154:37f96f9d4de2 | 2122 | if (protectStatus->valueHigh32b.proth32b != *kFPROTH) |
<> | 154:37f96f9d4de2 | 2123 | { |
<> | 154:37f96f9d4de2 | 2124 | return kStatus_FLASH_CommandFailure; |
<> | 154:37f96f9d4de2 | 2125 | } |
<> | 154:37f96f9d4de2 | 2126 | #endif |
<> | 154:37f96f9d4de2 | 2127 | } |
<> | 154:37f96f9d4de2 | 2128 | |
<> | 154:37f96f9d4de2 | 2129 | return kStatus_FLASH_Success; |
<> | 154:37f96f9d4de2 | 2130 | } |
<> | 154:37f96f9d4de2 | 2131 | |
<> | 154:37f96f9d4de2 | 2132 | status_t FLASH_PflashGetProtection(flash_config_t *config, pflash_protection_status_t *protectStatus) |
<> | 154:37f96f9d4de2 | 2133 | { |
<> | 154:37f96f9d4de2 | 2134 | if ((config == NULL) || (protectStatus == NULL)) |
<> | 154:37f96f9d4de2 | 2135 | { |
<> | 154:37f96f9d4de2 | 2136 | return kStatus_FLASH_InvalidArgument; |
<> | 154:37f96f9d4de2 | 2137 | } |
<> | 154:37f96f9d4de2 | 2138 | |
<> | 154:37f96f9d4de2 | 2139 | #if FLASH_SSD_IS_SECONDARY_FLASH_SUPPORTED && FLASH_SSD_SECONDARY_FLASH_HAS_ITS_OWN_PROTECTION_REGISTER |
<> | 154:37f96f9d4de2 | 2140 | if (config->FlashMemoryIndex == (uint32_t)kFLASH_MemoryIndexSecondaryFlash) |
<> | 154:37f96f9d4de2 | 2141 | { |
<> | 154:37f96f9d4de2 | 2142 | protectStatus->valueLow32b.prots16b.protsl = *kFPROTSL; |
<> | 154:37f96f9d4de2 | 2143 | protectStatus->valueLow32b.prots16b.protsh = *kFPROTSH; |
<> | 154:37f96f9d4de2 | 2144 | } |
<> | 154:37f96f9d4de2 | 2145 | else |
<> | 154:37f96f9d4de2 | 2146 | #endif |
<> | 154:37f96f9d4de2 | 2147 | { |
<> | 154:37f96f9d4de2 | 2148 | protectStatus->valueLow32b.protl32b = *kFPROTL; |
<> | 154:37f96f9d4de2 | 2149 | #if defined(FTFx_FPROT_HIGH_REG) |
<> | 154:37f96f9d4de2 | 2150 | protectStatus->valueHigh32b.proth32b = *kFPROTH; |
<> | 154:37f96f9d4de2 | 2151 | #endif |
<> | 154:37f96f9d4de2 | 2152 | } |
<> | 154:37f96f9d4de2 | 2153 | |
<> | 154:37f96f9d4de2 | 2154 | return kStatus_FLASH_Success; |
<> | 154:37f96f9d4de2 | 2155 | } |
<> | 154:37f96f9d4de2 | 2156 | |
<> | 154:37f96f9d4de2 | 2157 | #if FLASH_SSD_IS_FLEXNVM_ENABLED |
<> | 154:37f96f9d4de2 | 2158 | status_t FLASH_DflashSetProtection(flash_config_t *config, uint8_t protectStatus) |
<> | 154:37f96f9d4de2 | 2159 | { |
<> | 154:37f96f9d4de2 | 2160 | if (config == NULL) |
<> | 154:37f96f9d4de2 | 2161 | { |
<> | 154:37f96f9d4de2 | 2162 | return kStatus_FLASH_InvalidArgument; |
<> | 154:37f96f9d4de2 | 2163 | } |
<> | 154:37f96f9d4de2 | 2164 | |
<> | 154:37f96f9d4de2 | 2165 | if ((config->DFlashTotalSize == 0) || (config->DFlashTotalSize == FLEX_NVM_DFLASH_SIZE_FOR_DEPART_RESERVED)) |
<> | 154:37f96f9d4de2 | 2166 | { |
<> | 154:37f96f9d4de2 | 2167 | return kStatus_FLASH_CommandNotSupported; |
<> | 154:37f96f9d4de2 | 2168 | } |
<> | 154:37f96f9d4de2 | 2169 | |
<> | 154:37f96f9d4de2 | 2170 | FTFx->FDPROT = protectStatus; |
<> | 154:37f96f9d4de2 | 2171 | |
<> | 154:37f96f9d4de2 | 2172 | if (FTFx->FDPROT != protectStatus) |
<> | 154:37f96f9d4de2 | 2173 | { |
<> | 154:37f96f9d4de2 | 2174 | return kStatus_FLASH_CommandFailure; |
<> | 154:37f96f9d4de2 | 2175 | } |
<> | 154:37f96f9d4de2 | 2176 | |
<> | 154:37f96f9d4de2 | 2177 | return kStatus_FLASH_Success; |
<> | 154:37f96f9d4de2 | 2178 | } |
<> | 154:37f96f9d4de2 | 2179 | #endif /* FLASH_SSD_IS_FLEXNVM_ENABLED */ |
<> | 154:37f96f9d4de2 | 2180 | |
<> | 154:37f96f9d4de2 | 2181 | #if FLASH_SSD_IS_FLEXNVM_ENABLED |
<> | 154:37f96f9d4de2 | 2182 | status_t FLASH_DflashGetProtection(flash_config_t *config, uint8_t *protectStatus) |
<> | 154:37f96f9d4de2 | 2183 | { |
<> | 154:37f96f9d4de2 | 2184 | if ((config == NULL) || (protectStatus == NULL)) |
<> | 154:37f96f9d4de2 | 2185 | { |
<> | 154:37f96f9d4de2 | 2186 | return kStatus_FLASH_InvalidArgument; |
<> | 154:37f96f9d4de2 | 2187 | } |
<> | 154:37f96f9d4de2 | 2188 | |
<> | 154:37f96f9d4de2 | 2189 | if ((config->DFlashTotalSize == 0) || (config->DFlashTotalSize == FLEX_NVM_DFLASH_SIZE_FOR_DEPART_RESERVED)) |
<> | 154:37f96f9d4de2 | 2190 | { |
<> | 154:37f96f9d4de2 | 2191 | return kStatus_FLASH_CommandNotSupported; |
<> | 154:37f96f9d4de2 | 2192 | } |
<> | 154:37f96f9d4de2 | 2193 | |
<> | 154:37f96f9d4de2 | 2194 | *protectStatus = FTFx->FDPROT; |
<> | 154:37f96f9d4de2 | 2195 | |
<> | 154:37f96f9d4de2 | 2196 | return kStatus_FLASH_Success; |
<> | 154:37f96f9d4de2 | 2197 | } |
<> | 154:37f96f9d4de2 | 2198 | #endif /* FLASH_SSD_IS_FLEXNVM_ENABLED */ |
<> | 154:37f96f9d4de2 | 2199 | |
<> | 154:37f96f9d4de2 | 2200 | #if FLASH_SSD_IS_FLEXNVM_ENABLED |
<> | 154:37f96f9d4de2 | 2201 | status_t FLASH_EepromSetProtection(flash_config_t *config, uint8_t protectStatus) |
<> | 154:37f96f9d4de2 | 2202 | { |
<> | 154:37f96f9d4de2 | 2203 | if (config == NULL) |
<> | 154:37f96f9d4de2 | 2204 | { |
<> | 154:37f96f9d4de2 | 2205 | return kStatus_FLASH_InvalidArgument; |
<> | 154:37f96f9d4de2 | 2206 | } |
<> | 154:37f96f9d4de2 | 2207 | |
<> | 154:37f96f9d4de2 | 2208 | if ((config->EEpromTotalSize == 0) || (config->EEpromTotalSize == FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_RESERVED)) |
<> | 154:37f96f9d4de2 | 2209 | { |
<> | 154:37f96f9d4de2 | 2210 | return kStatus_FLASH_CommandNotSupported; |
<> | 154:37f96f9d4de2 | 2211 | } |
<> | 154:37f96f9d4de2 | 2212 | |
<> | 154:37f96f9d4de2 | 2213 | FTFx->FEPROT = protectStatus; |
<> | 154:37f96f9d4de2 | 2214 | |
<> | 154:37f96f9d4de2 | 2215 | if (FTFx->FEPROT != protectStatus) |
<> | 154:37f96f9d4de2 | 2216 | { |
<> | 154:37f96f9d4de2 | 2217 | return kStatus_FLASH_CommandFailure; |
<> | 154:37f96f9d4de2 | 2218 | } |
<> | 154:37f96f9d4de2 | 2219 | |
<> | 154:37f96f9d4de2 | 2220 | return kStatus_FLASH_Success; |
<> | 154:37f96f9d4de2 | 2221 | } |
<> | 154:37f96f9d4de2 | 2222 | #endif /* FLASH_SSD_IS_FLEXNVM_ENABLED */ |
<> | 154:37f96f9d4de2 | 2223 | |
<> | 154:37f96f9d4de2 | 2224 | #if FLASH_SSD_IS_FLEXNVM_ENABLED |
<> | 154:37f96f9d4de2 | 2225 | status_t FLASH_EepromGetProtection(flash_config_t *config, uint8_t *protectStatus) |
<> | 154:37f96f9d4de2 | 2226 | { |
<> | 154:37f96f9d4de2 | 2227 | if ((config == NULL) || (protectStatus == NULL)) |
<> | 154:37f96f9d4de2 | 2228 | { |
<> | 154:37f96f9d4de2 | 2229 | return kStatus_FLASH_InvalidArgument; |
<> | 154:37f96f9d4de2 | 2230 | } |
<> | 154:37f96f9d4de2 | 2231 | |
<> | 154:37f96f9d4de2 | 2232 | if ((config->EEpromTotalSize == 0) || (config->EEpromTotalSize == FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_RESERVED)) |
<> | 154:37f96f9d4de2 | 2233 | { |
<> | 154:37f96f9d4de2 | 2234 | return kStatus_FLASH_CommandNotSupported; |
<> | 154:37f96f9d4de2 | 2235 | } |
<> | 154:37f96f9d4de2 | 2236 | |
<> | 154:37f96f9d4de2 | 2237 | *protectStatus = FTFx->FEPROT; |
<> | 154:37f96f9d4de2 | 2238 | |
<> | 154:37f96f9d4de2 | 2239 | return kStatus_FLASH_Success; |
<> | 154:37f96f9d4de2 | 2240 | } |
<> | 154:37f96f9d4de2 | 2241 | #endif /* FLASH_SSD_IS_FLEXNVM_ENABLED */ |
<> | 154:37f96f9d4de2 | 2242 | |
<> | 154:37f96f9d4de2 | 2243 | status_t FLASH_PflashSetPrefetchSpeculation(flash_prefetch_speculation_status_t *speculationStatus) |
<> | 154:37f96f9d4de2 | 2244 | { |
<> | 154:37f96f9d4de2 | 2245 | #if FLASH_DRIVER_IS_FLASH_RESIDENT |
<> | 154:37f96f9d4de2 | 2246 | void (*flashCommonBitOperationCallback)(FTFx_REG32_ACCESS_TYPE base, uint32_t bitMask, uint32_t bitShift, |
<> | 154:37f96f9d4de2 | 2247 | uint32_t bitValue); |
<> | 154:37f96f9d4de2 | 2248 | uint32_t flashCommonBitOperationBuffer[kFLASH_ExecuteInRamFunctionMaxSizeInWords]; |
<> | 154:37f96f9d4de2 | 2249 | |
<> | 154:37f96f9d4de2 | 2250 | assert(sizeof(s_flashCommonBitOperationFunctionCode) <= (kFLASH_ExecuteInRamFunctionMaxSizeInWords * 4)); |
<> | 154:37f96f9d4de2 | 2251 | |
<> | 154:37f96f9d4de2 | 2252 | memcpy((void *)flashCommonBitOperationBuffer, (void *)s_flashCommonBitOperationFunctionCode, |
<> | 154:37f96f9d4de2 | 2253 | sizeof(s_flashCommonBitOperationFunctionCode)); |
<> | 154:37f96f9d4de2 | 2254 | flashCommonBitOperationCallback = (void (*)(FTFx_REG32_ACCESS_TYPE base, uint32_t bitMask, uint32_t bitShift, |
<> | 154:37f96f9d4de2 | 2255 | uint32_t bitValue))((uint32_t)flashCommonBitOperationBuffer + 1); |
<> | 154:37f96f9d4de2 | 2256 | #endif /* FLASH_DRIVER_IS_FLASH_RESIDENT */ |
<> | 154:37f96f9d4de2 | 2257 | |
<> | 154:37f96f9d4de2 | 2258 | #if defined(FSL_FEATURE_FLASH_HAS_MCM_FLASH_CACHE_CONTROLS) && FSL_FEATURE_FLASH_HAS_MCM_FLASH_CACHE_CONTROLS |
<> | 154:37f96f9d4de2 | 2259 | { |
<> | 154:37f96f9d4de2 | 2260 | FTFx_REG32_ACCESS_TYPE regBase; |
<> | 154:37f96f9d4de2 | 2261 | #if defined(MCM) |
<> | 154:37f96f9d4de2 | 2262 | regBase = (FTFx_REG32_ACCESS_TYPE)&MCM->PLACR; |
<> | 154:37f96f9d4de2 | 2263 | #elif defined(MCM0) |
<> | 154:37f96f9d4de2 | 2264 | regBase = (FTFx_REG32_ACCESS_TYPE)&MCM0->PLACR; |
<> | 154:37f96f9d4de2 | 2265 | #endif |
<> | 154:37f96f9d4de2 | 2266 | if (speculationStatus->instructionOption == kFLASH_prefetchSpeculationOptionDisable) |
<> | 154:37f96f9d4de2 | 2267 | { |
<> | 154:37f96f9d4de2 | 2268 | if (speculationStatus->dataOption == kFLASH_prefetchSpeculationOptionEnable) |
<> | 154:37f96f9d4de2 | 2269 | { |
<> | 154:37f96f9d4de2 | 2270 | return kStatus_FLASH_InvalidSpeculationOption; |
<> | 154:37f96f9d4de2 | 2271 | } |
<> | 154:37f96f9d4de2 | 2272 | else |
<> | 154:37f96f9d4de2 | 2273 | { |
<> | 154:37f96f9d4de2 | 2274 | #if FLASH_DRIVER_IS_FLASH_RESIDENT |
<> | 154:37f96f9d4de2 | 2275 | flashCommonBitOperationCallback(regBase, MCM_PLACR_DFCS_MASK, MCM_PLACR_DFCS_SHIFT, 1U); |
<> | 154:37f96f9d4de2 | 2276 | #else |
<> | 154:37f96f9d4de2 | 2277 | *regBase |= MCM_PLACR_DFCS_MASK; |
<> | 154:37f96f9d4de2 | 2278 | #endif |
<> | 154:37f96f9d4de2 | 2279 | } |
<> | 154:37f96f9d4de2 | 2280 | } |
<> | 154:37f96f9d4de2 | 2281 | else |
<> | 154:37f96f9d4de2 | 2282 | { |
<> | 154:37f96f9d4de2 | 2283 | #if FLASH_DRIVER_IS_FLASH_RESIDENT |
<> | 154:37f96f9d4de2 | 2284 | flashCommonBitOperationCallback(regBase, MCM_PLACR_DFCS_MASK, MCM_PLACR_DFCS_SHIFT, 0U); |
<> | 154:37f96f9d4de2 | 2285 | #else |
<> | 154:37f96f9d4de2 | 2286 | *regBase &= ~MCM_PLACR_DFCS_MASK; |
<> | 154:37f96f9d4de2 | 2287 | #endif |
<> | 154:37f96f9d4de2 | 2288 | if (speculationStatus->dataOption == kFLASH_prefetchSpeculationOptionEnable) |
<> | 154:37f96f9d4de2 | 2289 | { |
<> | 154:37f96f9d4de2 | 2290 | #if FLASH_DRIVER_IS_FLASH_RESIDENT |
<> | 154:37f96f9d4de2 | 2291 | flashCommonBitOperationCallback(regBase, MCM_PLACR_EFDS_MASK, MCM_PLACR_EFDS_SHIFT, 1U); |
<> | 154:37f96f9d4de2 | 2292 | #else |
<> | 154:37f96f9d4de2 | 2293 | *regBase |= MCM_PLACR_EFDS_MASK; |
<> | 154:37f96f9d4de2 | 2294 | #endif |
<> | 154:37f96f9d4de2 | 2295 | } |
<> | 154:37f96f9d4de2 | 2296 | else |
<> | 154:37f96f9d4de2 | 2297 | { |
<> | 154:37f96f9d4de2 | 2298 | #if FLASH_DRIVER_IS_FLASH_RESIDENT |
<> | 154:37f96f9d4de2 | 2299 | flashCommonBitOperationCallback(regBase, MCM_PLACR_EFDS_MASK, MCM_PLACR_EFDS_SHIFT, 0U); |
<> | 154:37f96f9d4de2 | 2300 | #else |
<> | 154:37f96f9d4de2 | 2301 | *regBase &= ~MCM_PLACR_EFDS_MASK; |
<> | 154:37f96f9d4de2 | 2302 | #endif |
<> | 154:37f96f9d4de2 | 2303 | } |
<> | 154:37f96f9d4de2 | 2304 | } |
<> | 154:37f96f9d4de2 | 2305 | } |
<> | 154:37f96f9d4de2 | 2306 | #elif defined(FSL_FEATURE_FLASH_HAS_FMC_FLASH_CACHE_CONTROLS) && FSL_FEATURE_FLASH_HAS_FMC_FLASH_CACHE_CONTROLS |
<> | 154:37f96f9d4de2 | 2307 | { |
<> | 154:37f96f9d4de2 | 2308 | FTFx_REG32_ACCESS_TYPE regBase; |
<> | 154:37f96f9d4de2 | 2309 | uint32_t b0dpeMask, b0ipeMask; |
<> | 154:37f96f9d4de2 | 2310 | #if FLASH_DRIVER_IS_FLASH_RESIDENT |
<> | 154:37f96f9d4de2 | 2311 | uint32_t b0dpeShift, b0ipeShift; |
<> | 154:37f96f9d4de2 | 2312 | #endif |
<> | 154:37f96f9d4de2 | 2313 | #if defined(FMC_PFB01CR_B0DPE_MASK) |
<> | 154:37f96f9d4de2 | 2314 | regBase = (FTFx_REG32_ACCESS_TYPE)&FMC->PFB01CR; |
<> | 154:37f96f9d4de2 | 2315 | b0dpeMask = FMC_PFB01CR_B0DPE_MASK; |
<> | 154:37f96f9d4de2 | 2316 | b0ipeMask = FMC_PFB01CR_B0IPE_MASK; |
<> | 154:37f96f9d4de2 | 2317 | #if FLASH_DRIVER_IS_FLASH_RESIDENT |
<> | 154:37f96f9d4de2 | 2318 | b0dpeShift = FMC_PFB01CR_B0DPE_SHIFT; |
<> | 154:37f96f9d4de2 | 2319 | b0ipeShift = FMC_PFB01CR_B0IPE_SHIFT; |
<> | 154:37f96f9d4de2 | 2320 | #endif |
<> | 154:37f96f9d4de2 | 2321 | #elif defined(FMC_PFB0CR_B0DPE_MASK) |
<> | 154:37f96f9d4de2 | 2322 | regBase = (FTFx_REG32_ACCESS_TYPE)&FMC->PFB0CR; |
<> | 154:37f96f9d4de2 | 2323 | b0dpeMask = FMC_PFB0CR_B0DPE_MASK; |
<> | 154:37f96f9d4de2 | 2324 | b0ipeMask = FMC_PFB0CR_B0IPE_MASK; |
<> | 154:37f96f9d4de2 | 2325 | #if FLASH_DRIVER_IS_FLASH_RESIDENT |
<> | 154:37f96f9d4de2 | 2326 | b0dpeShift = FMC_PFB0CR_B0DPE_SHIFT; |
<> | 154:37f96f9d4de2 | 2327 | b0ipeShift = FMC_PFB0CR_B0IPE_SHIFT; |
<> | 154:37f96f9d4de2 | 2328 | #endif |
<> | 154:37f96f9d4de2 | 2329 | #endif |
<> | 154:37f96f9d4de2 | 2330 | if (speculationStatus->instructionOption == kFLASH_prefetchSpeculationOptionEnable) |
<> | 154:37f96f9d4de2 | 2331 | { |
<> | 154:37f96f9d4de2 | 2332 | #if FLASH_DRIVER_IS_FLASH_RESIDENT |
<> | 154:37f96f9d4de2 | 2333 | flashCommonBitOperationCallback(regBase, b0ipeMask, b0ipeShift, 1U); |
<> | 154:37f96f9d4de2 | 2334 | #else |
<> | 154:37f96f9d4de2 | 2335 | *regBase |= b0ipeMask; |
<> | 154:37f96f9d4de2 | 2336 | #endif |
<> | 154:37f96f9d4de2 | 2337 | } |
<> | 154:37f96f9d4de2 | 2338 | else |
<> | 154:37f96f9d4de2 | 2339 | { |
<> | 154:37f96f9d4de2 | 2340 | #if FLASH_DRIVER_IS_FLASH_RESIDENT |
<> | 154:37f96f9d4de2 | 2341 | flashCommonBitOperationCallback(regBase, b0ipeMask, b0ipeShift, 0U); |
<> | 154:37f96f9d4de2 | 2342 | #else |
<> | 154:37f96f9d4de2 | 2343 | *regBase &= ~b0ipeMask; |
<> | 154:37f96f9d4de2 | 2344 | #endif |
<> | 154:37f96f9d4de2 | 2345 | } |
<> | 154:37f96f9d4de2 | 2346 | if (speculationStatus->dataOption == kFLASH_prefetchSpeculationOptionEnable) |
<> | 154:37f96f9d4de2 | 2347 | { |
<> | 154:37f96f9d4de2 | 2348 | #if FLASH_DRIVER_IS_FLASH_RESIDENT |
<> | 154:37f96f9d4de2 | 2349 | flashCommonBitOperationCallback(regBase, b0dpeMask, b0dpeShift, 1U); |
<> | 154:37f96f9d4de2 | 2350 | #else |
<> | 154:37f96f9d4de2 | 2351 | *regBase |= b0dpeMask; |
<> | 154:37f96f9d4de2 | 2352 | #endif |
<> | 154:37f96f9d4de2 | 2353 | } |
<> | 154:37f96f9d4de2 | 2354 | else |
<> | 154:37f96f9d4de2 | 2355 | { |
<> | 154:37f96f9d4de2 | 2356 | #if FLASH_DRIVER_IS_FLASH_RESIDENT |
<> | 154:37f96f9d4de2 | 2357 | flashCommonBitOperationCallback(regBase, b0dpeMask, b0dpeShift, 0U); |
<> | 154:37f96f9d4de2 | 2358 | #else |
<> | 154:37f96f9d4de2 | 2359 | *regBase &= ~b0dpeMask; |
<> | 154:37f96f9d4de2 | 2360 | #endif |
<> | 154:37f96f9d4de2 | 2361 | } |
<> | 154:37f96f9d4de2 | 2362 | |
<> | 154:37f96f9d4de2 | 2363 | /* Invalidate Prefetch Speculation Buffer */ |
<> | 154:37f96f9d4de2 | 2364 | #if defined(FMC_PFB01CR_S_INV_MASK) |
<> | 154:37f96f9d4de2 | 2365 | FMC->PFB01CR |= FMC_PFB01CR_S_INV_MASK; |
<> | 154:37f96f9d4de2 | 2366 | #elif defined(FMC_PFB0CR_S_INV_MASK) |
<> | 154:37f96f9d4de2 | 2367 | FMC->PFB0CR |= FMC_PFB0CR_S_INV_MASK; |
<> | 154:37f96f9d4de2 | 2368 | #endif |
<> | 154:37f96f9d4de2 | 2369 | } |
<> | 154:37f96f9d4de2 | 2370 | #elif defined(FSL_FEATURE_FLASH_HAS_MSCM_FLASH_CACHE_CONTROLS) && FSL_FEATURE_FLASH_HAS_MSCM_FLASH_CACHE_CONTROLS |
<> | 154:37f96f9d4de2 | 2371 | { |
<> | 154:37f96f9d4de2 | 2372 | FTFx_REG32_ACCESS_TYPE regBase; |
<> | 154:37f96f9d4de2 | 2373 | uint32_t flashSpeculationMask, dataPrefetchMask; |
<> | 154:37f96f9d4de2 | 2374 | #if FLASH_DRIVER_IS_FLASH_RESIDENT |
<> | 154:37f96f9d4de2 | 2375 | uint32_t flashSpeculationShift, dataPrefetchShift; |
<> | 154:37f96f9d4de2 | 2376 | flashSpeculationShift = MSCM_OCMDR_OCMC1_DFCS_SHIFT; |
<> | 154:37f96f9d4de2 | 2377 | dataPrefetchShift = MSCM_OCMDR_OCMC1_DFDS_SHIFT; |
<> | 154:37f96f9d4de2 | 2378 | #endif |
<> | 154:37f96f9d4de2 | 2379 | |
<> | 154:37f96f9d4de2 | 2380 | regBase = (FTFx_REG32_ACCESS_TYPE)&MSCM->OCMDR[0]; |
<> | 154:37f96f9d4de2 | 2381 | flashSpeculationMask = MSCM_OCMDR_OCMC1_DFCS_MASK; |
<> | 154:37f96f9d4de2 | 2382 | dataPrefetchMask = MSCM_OCMDR_OCMC1_DFDS_MASK; |
<> | 154:37f96f9d4de2 | 2383 | |
<> | 154:37f96f9d4de2 | 2384 | if (speculationStatus->instructionOption == kFLASH_prefetchSpeculationOptionDisable) |
<> | 154:37f96f9d4de2 | 2385 | { |
<> | 154:37f96f9d4de2 | 2386 | if (speculationStatus->dataOption == kFLASH_prefetchSpeculationOptionEnable) |
<> | 154:37f96f9d4de2 | 2387 | { |
<> | 154:37f96f9d4de2 | 2388 | return kStatus_FLASH_InvalidSpeculationOption; |
<> | 154:37f96f9d4de2 | 2389 | } |
<> | 154:37f96f9d4de2 | 2390 | else |
<> | 154:37f96f9d4de2 | 2391 | { |
<> | 154:37f96f9d4de2 | 2392 | #if FLASH_DRIVER_IS_FLASH_RESIDENT |
<> | 154:37f96f9d4de2 | 2393 | flashCommonBitOperationCallback(regBase, flashSpeculationMask, flashSpeculationShift, 1U); |
<> | 154:37f96f9d4de2 | 2394 | #else |
<> | 154:37f96f9d4de2 | 2395 | *regBase |= flashSpeculationMask; |
<> | 154:37f96f9d4de2 | 2396 | #endif |
<> | 154:37f96f9d4de2 | 2397 | } |
<> | 154:37f96f9d4de2 | 2398 | } |
<> | 154:37f96f9d4de2 | 2399 | else |
<> | 154:37f96f9d4de2 | 2400 | { |
<> | 154:37f96f9d4de2 | 2401 | *regBase &= ~flashSpeculationMask; |
<> | 154:37f96f9d4de2 | 2402 | if (speculationStatus->dataOption == kFLASH_prefetchSpeculationOptionEnable) |
<> | 154:37f96f9d4de2 | 2403 | { |
<> | 154:37f96f9d4de2 | 2404 | #if FLASH_DRIVER_IS_FLASH_RESIDENT |
<> | 154:37f96f9d4de2 | 2405 | flashCommonBitOperationCallback(regBase, dataPrefetchMask, dataPrefetchShift, 0U); |
<> | 154:37f96f9d4de2 | 2406 | #else |
<> | 154:37f96f9d4de2 | 2407 | *regBase &= ~dataPrefetchMask; |
<> | 154:37f96f9d4de2 | 2408 | #endif |
<> | 154:37f96f9d4de2 | 2409 | } |
<> | 154:37f96f9d4de2 | 2410 | else |
<> | 154:37f96f9d4de2 | 2411 | { |
<> | 154:37f96f9d4de2 | 2412 | #if FLASH_DRIVER_IS_FLASH_RESIDENT |
<> | 154:37f96f9d4de2 | 2413 | flashCommonBitOperationCallback(regBase, dataPrefetchMask, dataPrefetchShift, 1U); |
<> | 154:37f96f9d4de2 | 2414 | #else |
<> | 154:37f96f9d4de2 | 2415 | *regBase |= dataPrefetchMask; |
<> | 154:37f96f9d4de2 | 2416 | #endif |
<> | 154:37f96f9d4de2 | 2417 | } |
<> | 154:37f96f9d4de2 | 2418 | } |
<> | 154:37f96f9d4de2 | 2419 | } |
<> | 154:37f96f9d4de2 | 2420 | #else |
<> | 154:37f96f9d4de2 | 2421 | #if FLASH_DRIVER_IS_FLASH_RESIDENT |
<> | 154:37f96f9d4de2 | 2422 | flashCommonBitOperationCallback((FTFx_REG32_ACCESS_TYPE)0, 0, 0, 0); |
<> | 154:37f96f9d4de2 | 2423 | #endif |
<> | 154:37f96f9d4de2 | 2424 | #endif /* FSL_FEATURE_FTFx_MCM_FLASH_CACHE_CONTROLS */ |
<> | 154:37f96f9d4de2 | 2425 | |
<> | 154:37f96f9d4de2 | 2426 | return kStatus_FLASH_Success; |
<> | 154:37f96f9d4de2 | 2427 | } |
<> | 154:37f96f9d4de2 | 2428 | |
<> | 154:37f96f9d4de2 | 2429 | status_t FLASH_PflashGetPrefetchSpeculation(flash_prefetch_speculation_status_t *speculationStatus) |
<> | 154:37f96f9d4de2 | 2430 | { |
<> | 154:37f96f9d4de2 | 2431 | memset(speculationStatus, 0, sizeof(flash_prefetch_speculation_status_t)); |
<> | 154:37f96f9d4de2 | 2432 | |
<> | 154:37f96f9d4de2 | 2433 | /* Assuming that all speculation options are enabled. */ |
<> | 154:37f96f9d4de2 | 2434 | speculationStatus->instructionOption = kFLASH_prefetchSpeculationOptionEnable; |
<> | 154:37f96f9d4de2 | 2435 | speculationStatus->dataOption = kFLASH_prefetchSpeculationOptionEnable; |
<> | 154:37f96f9d4de2 | 2436 | |
<> | 154:37f96f9d4de2 | 2437 | #if defined(FSL_FEATURE_FLASH_HAS_MCM_FLASH_CACHE_CONTROLS) && FSL_FEATURE_FLASH_HAS_MCM_FLASH_CACHE_CONTROLS |
<> | 154:37f96f9d4de2 | 2438 | { |
<> | 154:37f96f9d4de2 | 2439 | uint32_t value; |
<> | 154:37f96f9d4de2 | 2440 | #if defined(MCM) |
<> | 154:37f96f9d4de2 | 2441 | value = MCM->PLACR; |
<> | 154:37f96f9d4de2 | 2442 | #elif defined(MCM0) |
<> | 154:37f96f9d4de2 | 2443 | value = MCM0->PLACR; |
<> | 154:37f96f9d4de2 | 2444 | #endif |
<> | 154:37f96f9d4de2 | 2445 | if (value & MCM_PLACR_DFCS_MASK) |
<> | 154:37f96f9d4de2 | 2446 | { |
<> | 154:37f96f9d4de2 | 2447 | /* Speculation buffer is off. */ |
<> | 154:37f96f9d4de2 | 2448 | speculationStatus->instructionOption = kFLASH_prefetchSpeculationOptionDisable; |
<> | 154:37f96f9d4de2 | 2449 | speculationStatus->dataOption = kFLASH_prefetchSpeculationOptionDisable; |
<> | 154:37f96f9d4de2 | 2450 | } |
<> | 154:37f96f9d4de2 | 2451 | else |
<> | 154:37f96f9d4de2 | 2452 | { |
<> | 154:37f96f9d4de2 | 2453 | /* Speculation buffer is on for instruction. */ |
<> | 154:37f96f9d4de2 | 2454 | if (!(value & MCM_PLACR_EFDS_MASK)) |
<> | 154:37f96f9d4de2 | 2455 | { |
<> | 154:37f96f9d4de2 | 2456 | /* Speculation buffer is off for data. */ |
<> | 154:37f96f9d4de2 | 2457 | speculationStatus->dataOption = kFLASH_prefetchSpeculationOptionDisable; |
<> | 154:37f96f9d4de2 | 2458 | } |
<> | 154:37f96f9d4de2 | 2459 | } |
<> | 154:37f96f9d4de2 | 2460 | } |
<> | 154:37f96f9d4de2 | 2461 | #elif defined(FSL_FEATURE_FLASH_HAS_FMC_FLASH_CACHE_CONTROLS) && FSL_FEATURE_FLASH_HAS_FMC_FLASH_CACHE_CONTROLS |
<> | 154:37f96f9d4de2 | 2462 | { |
<> | 154:37f96f9d4de2 | 2463 | uint32_t value; |
<> | 154:37f96f9d4de2 | 2464 | uint32_t b0dpeMask, b0ipeMask; |
<> | 154:37f96f9d4de2 | 2465 | #if defined(FMC_PFB01CR_B0DPE_MASK) |
<> | 154:37f96f9d4de2 | 2466 | value = FMC->PFB01CR; |
<> | 154:37f96f9d4de2 | 2467 | b0dpeMask = FMC_PFB01CR_B0DPE_MASK; |
<> | 154:37f96f9d4de2 | 2468 | b0ipeMask = FMC_PFB01CR_B0IPE_MASK; |
<> | 154:37f96f9d4de2 | 2469 | #elif defined(FMC_PFB0CR_B0DPE_MASK) |
<> | 154:37f96f9d4de2 | 2470 | value = FMC->PFB0CR; |
<> | 154:37f96f9d4de2 | 2471 | b0dpeMask = FMC_PFB0CR_B0DPE_MASK; |
<> | 154:37f96f9d4de2 | 2472 | b0ipeMask = FMC_PFB0CR_B0IPE_MASK; |
<> | 154:37f96f9d4de2 | 2473 | #endif |
<> | 154:37f96f9d4de2 | 2474 | if (!(value & b0dpeMask)) |
<> | 154:37f96f9d4de2 | 2475 | { |
<> | 154:37f96f9d4de2 | 2476 | /* Do not prefetch in response to data references. */ |
<> | 154:37f96f9d4de2 | 2477 | speculationStatus->dataOption = kFLASH_prefetchSpeculationOptionDisable; |
<> | 154:37f96f9d4de2 | 2478 | } |
<> | 154:37f96f9d4de2 | 2479 | if (!(value & b0ipeMask)) |
<> | 154:37f96f9d4de2 | 2480 | { |
<> | 154:37f96f9d4de2 | 2481 | /* Do not prefetch in response to instruction fetches. */ |
<> | 154:37f96f9d4de2 | 2482 | speculationStatus->instructionOption = kFLASH_prefetchSpeculationOptionDisable; |
<> | 154:37f96f9d4de2 | 2483 | } |
<> | 154:37f96f9d4de2 | 2484 | } |
<> | 154:37f96f9d4de2 | 2485 | #elif defined(FSL_FEATURE_FLASH_HAS_MSCM_FLASH_CACHE_CONTROLS) && FSL_FEATURE_FLASH_HAS_MSCM_FLASH_CACHE_CONTROLS |
<> | 154:37f96f9d4de2 | 2486 | { |
<> | 154:37f96f9d4de2 | 2487 | uint32_t value; |
<> | 154:37f96f9d4de2 | 2488 | uint32_t flashSpeculationMask, dataPrefetchMask; |
<> | 154:37f96f9d4de2 | 2489 | value = MSCM->OCMDR[0]; |
<> | 154:37f96f9d4de2 | 2490 | flashSpeculationMask = MSCM_OCMDR_OCMC1_DFCS_MASK; |
<> | 154:37f96f9d4de2 | 2491 | dataPrefetchMask = MSCM_OCMDR_OCMC1_DFDS_MASK; |
<> | 154:37f96f9d4de2 | 2492 | |
<> | 154:37f96f9d4de2 | 2493 | if (value & flashSpeculationMask) |
<> | 154:37f96f9d4de2 | 2494 | { |
<> | 154:37f96f9d4de2 | 2495 | /* Speculation buffer is off. */ |
<> | 154:37f96f9d4de2 | 2496 | speculationStatus->instructionOption = kFLASH_prefetchSpeculationOptionDisable; |
<> | 154:37f96f9d4de2 | 2497 | speculationStatus->dataOption = kFLASH_prefetchSpeculationOptionDisable; |
<> | 154:37f96f9d4de2 | 2498 | } |
<> | 154:37f96f9d4de2 | 2499 | else |
<> | 154:37f96f9d4de2 | 2500 | { |
<> | 154:37f96f9d4de2 | 2501 | /* Speculation buffer is on for instruction. */ |
<> | 154:37f96f9d4de2 | 2502 | if (value & dataPrefetchMask) |
<> | 154:37f96f9d4de2 | 2503 | { |
<> | 154:37f96f9d4de2 | 2504 | /* Speculation buffer is off for data. */ |
<> | 154:37f96f9d4de2 | 2505 | speculationStatus->dataOption = kFLASH_prefetchSpeculationOptionDisable; |
<> | 154:37f96f9d4de2 | 2506 | } |
<> | 154:37f96f9d4de2 | 2507 | } |
<> | 154:37f96f9d4de2 | 2508 | } |
<> | 154:37f96f9d4de2 | 2509 | #endif |
<> | 154:37f96f9d4de2 | 2510 | |
<> | 154:37f96f9d4de2 | 2511 | return kStatus_FLASH_Success; |
<> | 154:37f96f9d4de2 | 2512 | } |
<> | 154:37f96f9d4de2 | 2513 | |
<> | 154:37f96f9d4de2 | 2514 | #if FLASH_DRIVER_IS_FLASH_RESIDENT |
<> | 154:37f96f9d4de2 | 2515 | /*! |
<> | 154:37f96f9d4de2 | 2516 | * @brief Copy PIC of flash_run_command() to RAM |
<> | 154:37f96f9d4de2 | 2517 | */ |
<> | 154:37f96f9d4de2 | 2518 | static void copy_flash_run_command(uint32_t *flashRunCommand) |
<> | 154:37f96f9d4de2 | 2519 | { |
<> | 154:37f96f9d4de2 | 2520 | assert(sizeof(s_flashRunCommandFunctionCode) <= (kFLASH_ExecuteInRamFunctionMaxSizeInWords * 4)); |
<> | 154:37f96f9d4de2 | 2521 | |
<> | 154:37f96f9d4de2 | 2522 | /* Since the value of ARM function pointer is always odd, but the real start address |
<> | 154:37f96f9d4de2 | 2523 | * of function memory should be even, that's why +1 operation exist. */ |
<> | 154:37f96f9d4de2 | 2524 | memcpy((void *)flashRunCommand, (void *)s_flashRunCommandFunctionCode, sizeof(s_flashRunCommandFunctionCode)); |
<> | 154:37f96f9d4de2 | 2525 | callFlashRunCommand = (void (*)(FTFx_REG8_ACCESS_TYPE ftfx_fstat))((uint32_t)flashRunCommand + 1); |
<> | 154:37f96f9d4de2 | 2526 | } |
<> | 154:37f96f9d4de2 | 2527 | #endif /* FLASH_DRIVER_IS_FLASH_RESIDENT */ |
<> | 154:37f96f9d4de2 | 2528 | |
<> | 154:37f96f9d4de2 | 2529 | /*! |
<> | 154:37f96f9d4de2 | 2530 | * @brief Flash Command Sequence |
<> | 154:37f96f9d4de2 | 2531 | * |
<> | 154:37f96f9d4de2 | 2532 | * This function is used to perform the command write sequence to the flash. |
<> | 154:37f96f9d4de2 | 2533 | * |
<> | 154:37f96f9d4de2 | 2534 | * @param driver Pointer to storage for the driver runtime state. |
<> | 154:37f96f9d4de2 | 2535 | * @return An error code or kStatus_FLASH_Success |
<> | 154:37f96f9d4de2 | 2536 | */ |
<> | 154:37f96f9d4de2 | 2537 | static status_t flash_command_sequence(flash_config_t *config) |
<> | 154:37f96f9d4de2 | 2538 | { |
<> | 154:37f96f9d4de2 | 2539 | uint8_t registerValue; |
<> | 154:37f96f9d4de2 | 2540 | |
<> | 154:37f96f9d4de2 | 2541 | #if FLASH_DRIVER_IS_FLASH_RESIDENT |
<> | 154:37f96f9d4de2 | 2542 | /* clear RDCOLERR & ACCERR & FPVIOL flag in flash status register */ |
<> | 154:37f96f9d4de2 | 2543 | FTFx->FSTAT = FTFx_FSTAT_RDCOLERR_MASK | FTFx_FSTAT_ACCERR_MASK | FTFx_FSTAT_FPVIOL_MASK; |
<> | 154:37f96f9d4de2 | 2544 | |
<> | 154:37f96f9d4de2 | 2545 | status_t returnCode = flash_check_execute_in_ram_function_info(config); |
<> | 154:37f96f9d4de2 | 2546 | if (kStatus_FLASH_Success != returnCode) |
<> | 154:37f96f9d4de2 | 2547 | { |
<> | 154:37f96f9d4de2 | 2548 | return returnCode; |
<> | 154:37f96f9d4de2 | 2549 | } |
<> | 154:37f96f9d4de2 | 2550 | |
<> | 154:37f96f9d4de2 | 2551 | /* We pass the ftfx_fstat address as a parameter to flash_run_comamnd() instead of using |
<> | 154:37f96f9d4de2 | 2552 | * pre-processed MICRO sentences or operating global variable in flash_run_comamnd() |
<> | 154:37f96f9d4de2 | 2553 | * to make sure that flash_run_command() will be compiled into position-independent code (PIC). */ |
<> | 154:37f96f9d4de2 | 2554 | callFlashRunCommand((FTFx_REG8_ACCESS_TYPE)(&FTFx->FSTAT)); |
<> | 154:37f96f9d4de2 | 2555 | #else |
<> | 154:37f96f9d4de2 | 2556 | /* clear RDCOLERR & ACCERR & FPVIOL flag in flash status register */ |
<> | 154:37f96f9d4de2 | 2557 | FTFx->FSTAT = FTFx_FSTAT_RDCOLERR_MASK | FTFx_FSTAT_ACCERR_MASK | FTFx_FSTAT_FPVIOL_MASK; |
<> | 154:37f96f9d4de2 | 2558 | |
<> | 154:37f96f9d4de2 | 2559 | /* clear CCIF bit */ |
<> | 154:37f96f9d4de2 | 2560 | FTFx->FSTAT = FTFx_FSTAT_CCIF_MASK; |
<> | 154:37f96f9d4de2 | 2561 | |
<> | 154:37f96f9d4de2 | 2562 | /* Check CCIF bit of the flash status register, wait till it is set. |
<> | 154:37f96f9d4de2 | 2563 | * IP team indicates that this loop will always complete. */ |
<> | 154:37f96f9d4de2 | 2564 | while (!(FTFx->FSTAT & FTFx_FSTAT_CCIF_MASK)) |
<> | 154:37f96f9d4de2 | 2565 | { |
<> | 154:37f96f9d4de2 | 2566 | } |
<> | 154:37f96f9d4de2 | 2567 | #endif /* FLASH_DRIVER_IS_FLASH_RESIDENT */ |
<> | 154:37f96f9d4de2 | 2568 | |
<> | 154:37f96f9d4de2 | 2569 | /* Check error bits */ |
<> | 154:37f96f9d4de2 | 2570 | /* Get flash status register value */ |
<> | 154:37f96f9d4de2 | 2571 | registerValue = FTFx->FSTAT; |
<> | 154:37f96f9d4de2 | 2572 | |
<> | 154:37f96f9d4de2 | 2573 | /* checking access error */ |
<> | 154:37f96f9d4de2 | 2574 | if (registerValue & FTFx_FSTAT_ACCERR_MASK) |
<> | 154:37f96f9d4de2 | 2575 | { |
<> | 154:37f96f9d4de2 | 2576 | return kStatus_FLASH_AccessError; |
<> | 154:37f96f9d4de2 | 2577 | } |
<> | 154:37f96f9d4de2 | 2578 | /* checking protection error */ |
<> | 154:37f96f9d4de2 | 2579 | else if (registerValue & FTFx_FSTAT_FPVIOL_MASK) |
<> | 154:37f96f9d4de2 | 2580 | { |
<> | 154:37f96f9d4de2 | 2581 | return kStatus_FLASH_ProtectionViolation; |
<> | 154:37f96f9d4de2 | 2582 | } |
<> | 154:37f96f9d4de2 | 2583 | /* checking MGSTAT0 non-correctable error */ |
<> | 154:37f96f9d4de2 | 2584 | else if (registerValue & FTFx_FSTAT_MGSTAT0_MASK) |
<> | 154:37f96f9d4de2 | 2585 | { |
<> | 154:37f96f9d4de2 | 2586 | return kStatus_FLASH_CommandFailure; |
<> | 154:37f96f9d4de2 | 2587 | } |
<> | 154:37f96f9d4de2 | 2588 | else |
<> | 154:37f96f9d4de2 | 2589 | { |
<> | 154:37f96f9d4de2 | 2590 | return kStatus_FLASH_Success; |
<> | 154:37f96f9d4de2 | 2591 | } |
<> | 154:37f96f9d4de2 | 2592 | } |
<> | 154:37f96f9d4de2 | 2593 | |
<> | 154:37f96f9d4de2 | 2594 | #if FLASH_DRIVER_IS_FLASH_RESIDENT |
<> | 154:37f96f9d4de2 | 2595 | /*! |
<> | 154:37f96f9d4de2 | 2596 | * @brief Copy PIC of flash_common_bit_operation() to RAM |
<> | 154:37f96f9d4de2 | 2597 | * |
<> | 154:37f96f9d4de2 | 2598 | */ |
<> | 154:37f96f9d4de2 | 2599 | static void copy_flash_common_bit_operation(uint32_t *flashCommonBitOperation) |
<> | 154:37f96f9d4de2 | 2600 | { |
<> | 154:37f96f9d4de2 | 2601 | assert(sizeof(s_flashCommonBitOperationFunctionCode) <= (kFLASH_ExecuteInRamFunctionMaxSizeInWords * 4)); |
<> | 154:37f96f9d4de2 | 2602 | |
<> | 154:37f96f9d4de2 | 2603 | /* Since the value of ARM function pointer is always odd, but the real start address |
<> | 154:37f96f9d4de2 | 2604 | * of function memory should be even, that's why +1 operation exist. */ |
<> | 154:37f96f9d4de2 | 2605 | memcpy((void *)flashCommonBitOperation, (void *)s_flashCommonBitOperationFunctionCode, |
<> | 154:37f96f9d4de2 | 2606 | sizeof(s_flashCommonBitOperationFunctionCode)); |
<> | 154:37f96f9d4de2 | 2607 | callFlashCommonBitOperation = (void (*)(FTFx_REG32_ACCESS_TYPE base, uint32_t bitMask, uint32_t bitShift, |
<> | 154:37f96f9d4de2 | 2608 | uint32_t bitValue))((uint32_t)flashCommonBitOperation + 1); |
<> | 154:37f96f9d4de2 | 2609 | } |
<> | 154:37f96f9d4de2 | 2610 | #endif /* FLASH_DRIVER_IS_FLASH_RESIDENT */ |
<> | 154:37f96f9d4de2 | 2611 | |
<> | 154:37f96f9d4de2 | 2612 | /*! |
<> | 154:37f96f9d4de2 | 2613 | * @brief Flash Cache Clear |
<> | 154:37f96f9d4de2 | 2614 | * |
<> | 154:37f96f9d4de2 | 2615 | * This function is used to perform the cache clear to the flash. |
<> | 154:37f96f9d4de2 | 2616 | */ |
<> | 154:37f96f9d4de2 | 2617 | #if (defined(__GNUC__)) |
<> | 154:37f96f9d4de2 | 2618 | /* #pragma GCC push_options */ |
<> | 154:37f96f9d4de2 | 2619 | /* #pragma GCC optimize("O0") */ |
<> | 154:37f96f9d4de2 | 2620 | void __attribute__((optimize("O0"))) flash_cache_clear(flash_config_t *config) |
<> | 154:37f96f9d4de2 | 2621 | #else |
<> | 154:37f96f9d4de2 | 2622 | #if (defined(__ICCARM__)) |
<> | 154:37f96f9d4de2 | 2623 | #pragma optimize = none |
<> | 154:37f96f9d4de2 | 2624 | #endif |
<> | 154:37f96f9d4de2 | 2625 | #if (defined(__CC_ARM)) |
<> | 154:37f96f9d4de2 | 2626 | #pragma push |
<> | 154:37f96f9d4de2 | 2627 | #pragma O0 |
<> | 154:37f96f9d4de2 | 2628 | #endif |
<> | 154:37f96f9d4de2 | 2629 | void flash_cache_clear(flash_config_t *config) |
<> | 154:37f96f9d4de2 | 2630 | #endif |
<> | 154:37f96f9d4de2 | 2631 | { |
<> | 154:37f96f9d4de2 | 2632 | #if FLASH_DRIVER_IS_FLASH_RESIDENT |
<> | 154:37f96f9d4de2 | 2633 | FTFx_REG32_ACCESS_TYPE regBase = (FTFx_REG32_ACCESS_TYPE)0; |
<> | 154:37f96f9d4de2 | 2634 | status_t returnCode = flash_check_execute_in_ram_function_info(config); |
<> | 154:37f96f9d4de2 | 2635 | if (kStatus_FLASH_Success != returnCode) |
<> | 154:37f96f9d4de2 | 2636 | { |
<> | 154:37f96f9d4de2 | 2637 | return; |
<> | 154:37f96f9d4de2 | 2638 | } |
<> | 154:37f96f9d4de2 | 2639 | |
<> | 154:37f96f9d4de2 | 2640 | /* We pass the ftfx register address as a parameter to flash_common_bit_operation() instead of using |
<> | 154:37f96f9d4de2 | 2641 | * pre-processed MACROs or a global variable in flash_common_bit_operation() |
<> | 154:37f96f9d4de2 | 2642 | * to make sure that flash_common_bit_operation() will be compiled into position-independent code (PIC). */ |
<> | 154:37f96f9d4de2 | 2643 | #if defined(FSL_FEATURE_FLASH_HAS_MCM_FLASH_CACHE_CONTROLS) && FSL_FEATURE_FLASH_HAS_MCM_FLASH_CACHE_CONTROLS |
<> | 154:37f96f9d4de2 | 2644 | #if defined(MCM) |
<> | 154:37f96f9d4de2 | 2645 | regBase = (FTFx_REG32_ACCESS_TYPE)&MCM->PLACR; |
<> | 154:37f96f9d4de2 | 2646 | callFlashCommonBitOperation(regBase, MCM_PLACR_CFCC_MASK, MCM_PLACR_CFCC_SHIFT, 1U); |
<> | 154:37f96f9d4de2 | 2647 | #endif |
<> | 154:37f96f9d4de2 | 2648 | #if defined(MCM0) |
<> | 154:37f96f9d4de2 | 2649 | regBase = (FTFx_REG32_ACCESS_TYPE)&MCM0->PLACR; |
<> | 154:37f96f9d4de2 | 2650 | callFlashCommonBitOperation(regBase, MCM_PLACR_CFCC_MASK, MCM_PLACR_CFCC_SHIFT, 1U); |
<> | 154:37f96f9d4de2 | 2651 | #endif |
<> | 154:37f96f9d4de2 | 2652 | #if defined(MCM1) |
<> | 154:37f96f9d4de2 | 2653 | regBase = (FTFx_REG32_ACCESS_TYPE)&MCM1->PLACR; |
<> | 154:37f96f9d4de2 | 2654 | callFlashCommonBitOperation(regBase, MCM_PLACR_CFCC_MASK, MCM_PLACR_CFCC_SHIFT, 1U); |
<> | 154:37f96f9d4de2 | 2655 | #endif |
<> | 154:37f96f9d4de2 | 2656 | #elif defined(FSL_FEATURE_FLASH_HAS_FMC_FLASH_CACHE_CONTROLS) && FSL_FEATURE_FLASH_HAS_FMC_FLASH_CACHE_CONTROLS |
<> | 154:37f96f9d4de2 | 2657 | #if defined(FMC_PFB01CR_CINV_WAY_MASK) |
<> | 154:37f96f9d4de2 | 2658 | regBase = (FTFx_REG32_ACCESS_TYPE)&FMC->PFB01CR; |
<> | 154:37f96f9d4de2 | 2659 | callFlashCommonBitOperation(regBase, FMC_PFB01CR_CINV_WAY_MASK, FMC_PFB01CR_CINV_WAY_SHIFT, 0xFU); |
<> | 154:37f96f9d4de2 | 2660 | #else |
<> | 154:37f96f9d4de2 | 2661 | regBase = (FTFx_REG32_ACCESS_TYPE)&FMC->PFB0CR; |
<> | 154:37f96f9d4de2 | 2662 | callFlashCommonBitOperation(regBase, FMC_PFB0CR_CINV_WAY_MASK, FMC_PFB0CR_CINV_WAY_SHIFT, 0xFU); |
<> | 154:37f96f9d4de2 | 2663 | #endif |
<> | 154:37f96f9d4de2 | 2664 | #elif defined(FSL_FEATURE_FLASH_HAS_MSCM_FLASH_CACHE_CONTROLS) && FSL_FEATURE_FLASH_HAS_MSCM_FLASH_CACHE_CONTROLS |
<> | 154:37f96f9d4de2 | 2665 | regBase = (FTFx_REG32_ACCESS_TYPE)&MSCM->OCMDR[0]; |
<> | 154:37f96f9d4de2 | 2666 | #if defined(MSCM_OCMDR_OCM1_MASK) |
<> | 154:37f96f9d4de2 | 2667 | callFlashCommonBitOperation(regBase, MSCM_OCMDR_OCM1_MASK, MSCM_OCMDR_OCM1_SHIFT, 0x3U); |
<> | 154:37f96f9d4de2 | 2668 | #else |
<> | 154:37f96f9d4de2 | 2669 | callFlashCommonBitOperation(regBase, MSCM_OCMDR_OCMC1_MASK, MSCM_OCMDR_OCMC1_SHIFT, 0x3U); |
<> | 154:37f96f9d4de2 | 2670 | #endif |
<> | 154:37f96f9d4de2 | 2671 | #if FLASH_SSD_IS_FLEXNVM_ENABLED |
<> | 154:37f96f9d4de2 | 2672 | regBase = (FTFx_REG32_ACCESS_TYPE)&MSCM->OCMDR[1]; |
<> | 154:37f96f9d4de2 | 2673 | #if defined(MSCM_OCMDR_OCM1_MASK) |
<> | 154:37f96f9d4de2 | 2674 | callFlashCommonBitOperation(regBase, MSCM_OCMDR_OCM1_MASK, MSCM_OCMDR_OCM1_SHIFT, 0x3U); |
<> | 154:37f96f9d4de2 | 2675 | #else |
<> | 154:37f96f9d4de2 | 2676 | callFlashCommonBitOperation(regBase, MSCM_OCMDR_OCMC1_MASK, MSCM_OCMDR_OCMC1_SHIFT, 0x3U); |
<> | 154:37f96f9d4de2 | 2677 | #endif |
<> | 154:37f96f9d4de2 | 2678 | #endif |
<> | 154:37f96f9d4de2 | 2679 | #else |
<> | 154:37f96f9d4de2 | 2680 | #if defined(FMC_PFB0CR_S_INV_MASK) |
<> | 154:37f96f9d4de2 | 2681 | regBase = (FTFx_REG32_ACCESS_TYPE)&FMC->PFB0CR; |
<> | 154:37f96f9d4de2 | 2682 | callFlashCommonBitOperation(regBase, FMC_PFB0CR_S_INV_MASK, FMC_PFB0CR_S_INV_SHIFT, 1U); |
<> | 154:37f96f9d4de2 | 2683 | #elif defined(FMC_PFB01CR_S_INV_MASK) |
<> | 154:37f96f9d4de2 | 2684 | regBase = (FTFx_REG32_ACCESS_TYPE)&FMC->PFB01CR; |
<> | 154:37f96f9d4de2 | 2685 | callFlashCommonBitOperation(regBase, FMC_PFB01CR_S_INV_MASK, FMC_PFB01CR_S_INV_SHIFT, 1U); |
<> | 154:37f96f9d4de2 | 2686 | #endif |
<> | 154:37f96f9d4de2 | 2687 | /* #error "Unknown flash cache controller" */ |
<> | 154:37f96f9d4de2 | 2688 | #endif /* FSL_FEATURE_FTFx_MCM_FLASH_CACHE_CONTROLS */ |
<> | 154:37f96f9d4de2 | 2689 | |
<> | 154:37f96f9d4de2 | 2690 | callFlashCommonBitOperation(regBase, 0, 0, 0); |
<> | 154:37f96f9d4de2 | 2691 | #else |
<> | 154:37f96f9d4de2 | 2692 | |
<> | 154:37f96f9d4de2 | 2693 | #if defined(FSL_FEATURE_FLASH_HAS_MCM_FLASH_CACHE_CONTROLS) && FSL_FEATURE_FLASH_HAS_MCM_FLASH_CACHE_CONTROLS |
<> | 154:37f96f9d4de2 | 2694 | #if defined(MCM) |
<> | 154:37f96f9d4de2 | 2695 | MCM->PLACR |= MCM_PLACR_CFCC_MASK; |
<> | 154:37f96f9d4de2 | 2696 | #endif |
<> | 154:37f96f9d4de2 | 2697 | #if defined(MCM0) |
<> | 154:37f96f9d4de2 | 2698 | MCM0->PLACR |= MCM_PLACR_CFCC_MASK; |
<> | 154:37f96f9d4de2 | 2699 | #endif |
<> | 154:37f96f9d4de2 | 2700 | #if defined(MCM1) |
<> | 154:37f96f9d4de2 | 2701 | MCM1->PLACR |= MCM_PLACR_CFCC_MASK; |
<> | 154:37f96f9d4de2 | 2702 | #endif |
<> | 154:37f96f9d4de2 | 2703 | #elif defined(FSL_FEATURE_FLASH_HAS_FMC_FLASH_CACHE_CONTROLS) && FSL_FEATURE_FLASH_HAS_FMC_FLASH_CACHE_CONTROLS |
<> | 154:37f96f9d4de2 | 2704 | #if defined(FMC_PFB01CR_CINV_WAY_MASK) |
<> | 154:37f96f9d4de2 | 2705 | FMC->PFB01CR = (FMC->PFB01CR & ~FMC_PFB01CR_CINV_WAY_MASK) | FMC_PFB01CR_CINV_WAY(~0); |
<> | 154:37f96f9d4de2 | 2706 | #else |
<> | 154:37f96f9d4de2 | 2707 | FMC->PFB0CR = (FMC->PFB0CR & ~FMC_PFB0CR_CINV_WAY_MASK) | FMC_PFB0CR_CINV_WAY(~0); |
<> | 154:37f96f9d4de2 | 2708 | #endif |
<> | 154:37f96f9d4de2 | 2709 | #elif defined(FSL_FEATURE_FLASH_HAS_MSCM_FLASH_CACHE_CONTROLS) && FSL_FEATURE_FLASH_HAS_MSCM_FLASH_CACHE_CONTROLS |
<> | 154:37f96f9d4de2 | 2710 | #if defined(MSCM_OCMDR_OCM1_MASK) |
<> | 154:37f96f9d4de2 | 2711 | MSCM->OCMDR[0] |= MSCM_OCMDR_OCM1(3); |
<> | 154:37f96f9d4de2 | 2712 | #else |
<> | 154:37f96f9d4de2 | 2713 | MSCM->OCMDR[0] |= MSCM_OCMDR_OCMC1(3); |
<> | 154:37f96f9d4de2 | 2714 | #endif |
<> | 154:37f96f9d4de2 | 2715 | #if FLASH_SSD_IS_FLEXNVM_ENABLED |
<> | 154:37f96f9d4de2 | 2716 | #if defined(MSCM_OCMDR_OCM1_MASK) |
<> | 154:37f96f9d4de2 | 2717 | MSCM->OCMDR[1] |= MSCM_OCMDR_OCM1(3); |
<> | 154:37f96f9d4de2 | 2718 | #else |
<> | 154:37f96f9d4de2 | 2719 | MSCM->OCMDR[1] |= MSCM_OCMDR_OCMC1(3); |
<> | 154:37f96f9d4de2 | 2720 | #endif |
<> | 154:37f96f9d4de2 | 2721 | #endif |
<> | 154:37f96f9d4de2 | 2722 | #else |
<> | 154:37f96f9d4de2 | 2723 | #if defined(FMC_PFB0CR_S_INV_MASK) |
<> | 154:37f96f9d4de2 | 2724 | FMC->PFB0CR |= FMC_PFB0CR_S_INV_MASK; |
<> | 154:37f96f9d4de2 | 2725 | #elif defined(FMC_PFB01CR_S_INV_MASK) |
<> | 154:37f96f9d4de2 | 2726 | FMC->PFB01CR |= FMC_PFB01CR_S_INV_MASK; |
<> | 154:37f96f9d4de2 | 2727 | #endif |
<> | 154:37f96f9d4de2 | 2728 | /* #error "Unknown flash cache controller" */ |
<> | 154:37f96f9d4de2 | 2729 | #endif /* FSL_FEATURE_FTFx_MCM_FLASH_CACHE_CONTROLS */ |
<> | 154:37f96f9d4de2 | 2730 | |
<> | 154:37f96f9d4de2 | 2731 | /* Memory barriers for good measure. |
<> | 154:37f96f9d4de2 | 2732 | * All Cache, Branch predictor and TLB maintenance operations before this instruction complete */ |
<> | 154:37f96f9d4de2 | 2733 | __ISB(); |
<> | 154:37f96f9d4de2 | 2734 | __DSB(); |
<> | 154:37f96f9d4de2 | 2735 | #endif /* FLASH_DRIVER_IS_FLASH_RESIDENT */ |
<> | 154:37f96f9d4de2 | 2736 | } |
Kojto | 169:e3b6fe271b81 | 2737 | #if (defined(__GNUC__)) |
Kojto | 169:e3b6fe271b81 | 2738 | /* #pragma GCC pop_options */ |
Kojto | 169:e3b6fe271b81 | 2739 | #else |
<> | 154:37f96f9d4de2 | 2740 | #if (defined(__CC_ARM)) |
<> | 154:37f96f9d4de2 | 2741 | #pragma pop |
<> | 154:37f96f9d4de2 | 2742 | #endif |
<> | 154:37f96f9d4de2 | 2743 | #endif |
<> | 154:37f96f9d4de2 | 2744 | |
<> | 154:37f96f9d4de2 | 2745 | #if FLASH_DRIVER_IS_FLASH_RESIDENT |
<> | 154:37f96f9d4de2 | 2746 | /*! @brief Check whether flash execute-in-ram functions are ready */ |
<> | 154:37f96f9d4de2 | 2747 | static status_t flash_check_execute_in_ram_function_info(flash_config_t *config) |
<> | 154:37f96f9d4de2 | 2748 | { |
<> | 154:37f96f9d4de2 | 2749 | flash_execute_in_ram_function_config_t *flashExecuteInRamFunctionInfo; |
<> | 154:37f96f9d4de2 | 2750 | |
<> | 154:37f96f9d4de2 | 2751 | if (config == NULL) |
<> | 154:37f96f9d4de2 | 2752 | { |
<> | 154:37f96f9d4de2 | 2753 | return kStatus_FLASH_InvalidArgument; |
<> | 154:37f96f9d4de2 | 2754 | } |
<> | 154:37f96f9d4de2 | 2755 | |
<> | 154:37f96f9d4de2 | 2756 | flashExecuteInRamFunctionInfo = (flash_execute_in_ram_function_config_t *)config->flashExecuteInRamFunctionInfo; |
<> | 154:37f96f9d4de2 | 2757 | |
<> | 154:37f96f9d4de2 | 2758 | if ((config->flashExecuteInRamFunctionInfo) && |
<> | 154:37f96f9d4de2 | 2759 | (kFLASH_ExecuteInRamFunctionTotalNum == flashExecuteInRamFunctionInfo->activeFunctionCount)) |
<> | 154:37f96f9d4de2 | 2760 | { |
<> | 154:37f96f9d4de2 | 2761 | return kStatus_FLASH_Success; |
<> | 154:37f96f9d4de2 | 2762 | } |
<> | 154:37f96f9d4de2 | 2763 | |
<> | 154:37f96f9d4de2 | 2764 | return kStatus_FLASH_ExecuteInRamFunctionNotReady; |
<> | 154:37f96f9d4de2 | 2765 | } |
<> | 154:37f96f9d4de2 | 2766 | #endif /* FLASH_DRIVER_IS_FLASH_RESIDENT */ |
<> | 154:37f96f9d4de2 | 2767 | |
<> | 154:37f96f9d4de2 | 2768 | /*! @brief Validates the range and alignment of the given address range.*/ |
<> | 154:37f96f9d4de2 | 2769 | static status_t flash_check_range(flash_config_t *config, |
<> | 154:37f96f9d4de2 | 2770 | uint32_t startAddress, |
<> | 154:37f96f9d4de2 | 2771 | uint32_t lengthInBytes, |
<> | 154:37f96f9d4de2 | 2772 | uint32_t alignmentBaseline) |
<> | 154:37f96f9d4de2 | 2773 | { |
<> | 154:37f96f9d4de2 | 2774 | if (config == NULL) |
<> | 154:37f96f9d4de2 | 2775 | { |
<> | 154:37f96f9d4de2 | 2776 | return kStatus_FLASH_InvalidArgument; |
<> | 154:37f96f9d4de2 | 2777 | } |
<> | 154:37f96f9d4de2 | 2778 | |
<> | 154:37f96f9d4de2 | 2779 | /* Verify the start and length are alignmentBaseline aligned. */ |
<> | 154:37f96f9d4de2 | 2780 | if ((startAddress & (alignmentBaseline - 1)) || (lengthInBytes & (alignmentBaseline - 1))) |
<> | 154:37f96f9d4de2 | 2781 | { |
<> | 154:37f96f9d4de2 | 2782 | return kStatus_FLASH_AlignmentError; |
<> | 154:37f96f9d4de2 | 2783 | } |
<> | 154:37f96f9d4de2 | 2784 | |
<> | 154:37f96f9d4de2 | 2785 | /* check for valid range of the target addresses */ |
<> | 154:37f96f9d4de2 | 2786 | if ( |
<> | 154:37f96f9d4de2 | 2787 | #if FLASH_SSD_IS_FLEXNVM_ENABLED |
<> | 154:37f96f9d4de2 | 2788 | ((startAddress >= config->DFlashBlockBase) && |
<> | 154:37f96f9d4de2 | 2789 | ((startAddress + lengthInBytes) <= (config->DFlashBlockBase + config->DFlashTotalSize))) || |
<> | 154:37f96f9d4de2 | 2790 | #endif |
<> | 154:37f96f9d4de2 | 2791 | ((startAddress >= config->PFlashBlockBase) && |
<> | 154:37f96f9d4de2 | 2792 | ((startAddress + lengthInBytes) <= (config->PFlashBlockBase + config->PFlashTotalSize)))) |
<> | 154:37f96f9d4de2 | 2793 | { |
<> | 154:37f96f9d4de2 | 2794 | return kStatus_FLASH_Success; |
<> | 154:37f96f9d4de2 | 2795 | } |
<> | 154:37f96f9d4de2 | 2796 | |
<> | 154:37f96f9d4de2 | 2797 | return kStatus_FLASH_AddressError; |
<> | 154:37f96f9d4de2 | 2798 | } |
<> | 154:37f96f9d4de2 | 2799 | |
<> | 154:37f96f9d4de2 | 2800 | /*! @brief Gets the right address, sector and block size of current flash type which is indicated by address.*/ |
<> | 154:37f96f9d4de2 | 2801 | static status_t flash_get_matched_operation_info(flash_config_t *config, |
<> | 154:37f96f9d4de2 | 2802 | uint32_t address, |
<> | 154:37f96f9d4de2 | 2803 | flash_operation_config_t *info) |
<> | 154:37f96f9d4de2 | 2804 | { |
<> | 154:37f96f9d4de2 | 2805 | if (config == NULL) |
<> | 154:37f96f9d4de2 | 2806 | { |
<> | 154:37f96f9d4de2 | 2807 | return kStatus_FLASH_InvalidArgument; |
<> | 154:37f96f9d4de2 | 2808 | } |
<> | 154:37f96f9d4de2 | 2809 | |
<> | 154:37f96f9d4de2 | 2810 | /* Clean up info Structure*/ |
<> | 154:37f96f9d4de2 | 2811 | memset(info, 0, sizeof(flash_operation_config_t)); |
<> | 154:37f96f9d4de2 | 2812 | |
<> | 154:37f96f9d4de2 | 2813 | #if FLASH_SSD_IS_FLEXNVM_ENABLED |
<> | 154:37f96f9d4de2 | 2814 | if ((address >= config->DFlashBlockBase) && (address <= (config->DFlashBlockBase + config->DFlashTotalSize))) |
<> | 154:37f96f9d4de2 | 2815 | { |
<> | 154:37f96f9d4de2 | 2816 | /* When required by the command, address bit 23 selects between program flash memory |
<> | 154:37f96f9d4de2 | 2817 | * (=0) and data flash memory (=1).*/ |
<> | 154:37f96f9d4de2 | 2818 | info->convertedAddress = address - config->DFlashBlockBase + 0x800000U; |
<> | 154:37f96f9d4de2 | 2819 | info->activeSectorSize = FSL_FEATURE_FLASH_FLEX_NVM_BLOCK_SECTOR_SIZE; |
<> | 154:37f96f9d4de2 | 2820 | info->activeBlockSize = config->DFlashTotalSize / FSL_FEATURE_FLASH_FLEX_NVM_BLOCK_COUNT; |
<> | 154:37f96f9d4de2 | 2821 | |
<> | 154:37f96f9d4de2 | 2822 | info->blockWriteUnitSize = FSL_FEATURE_FLASH_FLEX_NVM_BLOCK_WRITE_UNIT_SIZE; |
<> | 154:37f96f9d4de2 | 2823 | info->sectorCmdAddressAligment = FSL_FEATURE_FLASH_FLEX_NVM_SECTOR_CMD_ADDRESS_ALIGMENT; |
<> | 154:37f96f9d4de2 | 2824 | info->sectionCmdAddressAligment = FSL_FEATURE_FLASH_FLEX_NVM_SECTION_CMD_ADDRESS_ALIGMENT; |
<> | 154:37f96f9d4de2 | 2825 | info->resourceCmdAddressAligment = FSL_FEATURE_FLASH_FLEX_NVM_RESOURCE_CMD_ADDRESS_ALIGMENT; |
<> | 154:37f96f9d4de2 | 2826 | info->checkCmdAddressAligment = FSL_FEATURE_FLASH_FLEX_NVM_CHECK_CMD_ADDRESS_ALIGMENT; |
<> | 154:37f96f9d4de2 | 2827 | } |
<> | 154:37f96f9d4de2 | 2828 | else |
<> | 154:37f96f9d4de2 | 2829 | #endif /* FLASH_SSD_IS_FLEXNVM_ENABLED */ |
<> | 154:37f96f9d4de2 | 2830 | { |
<> | 154:37f96f9d4de2 | 2831 | info->convertedAddress = address - config->PFlashBlockBase; |
<> | 154:37f96f9d4de2 | 2832 | info->activeSectorSize = config->PFlashSectorSize; |
<> | 154:37f96f9d4de2 | 2833 | info->activeBlockSize = config->PFlashTotalSize / config->PFlashBlockCount; |
<> | 154:37f96f9d4de2 | 2834 | #if FLASH_SSD_IS_SECONDARY_FLASH_SUPPORTED |
<> | 154:37f96f9d4de2 | 2835 | if (config->FlashMemoryIndex == (uint32_t)kFLASH_MemoryIndexSecondaryFlash) |
<> | 154:37f96f9d4de2 | 2836 | { |
<> | 154:37f96f9d4de2 | 2837 | #if FLASH_SSD_SECONDARY_FLASH_HAS_ITS_OWN_PROTECTION_REGISTER || FLASH_SSD_SECONDARY_FLASH_HAS_ITS_OWN_ACCESS_REGISTER |
<> | 154:37f96f9d4de2 | 2838 | /* When required by the command, address bit 23 selects between main flash memory |
<> | 154:37f96f9d4de2 | 2839 | * (=0) and secondary flash memory (=1).*/ |
<> | 154:37f96f9d4de2 | 2840 | info->convertedAddress += 0x800000U; |
<> | 154:37f96f9d4de2 | 2841 | #endif |
<> | 154:37f96f9d4de2 | 2842 | info->blockWriteUnitSize = FSL_FEATURE_FLASH_PFLASH_1_BLOCK_WRITE_UNIT_SIZE; |
<> | 154:37f96f9d4de2 | 2843 | } |
<> | 154:37f96f9d4de2 | 2844 | else |
<> | 154:37f96f9d4de2 | 2845 | #endif /* FLASH_SSD_IS_SECONDARY_FLASH_SUPPORTED */ |
<> | 154:37f96f9d4de2 | 2846 | { |
<> | 154:37f96f9d4de2 | 2847 | info->blockWriteUnitSize = FSL_FEATURE_FLASH_PFLASH_BLOCK_WRITE_UNIT_SIZE; |
<> | 154:37f96f9d4de2 | 2848 | } |
<> | 154:37f96f9d4de2 | 2849 | |
<> | 154:37f96f9d4de2 | 2850 | info->sectorCmdAddressAligment = FSL_FEATURE_FLASH_PFLASH_SECTOR_CMD_ADDRESS_ALIGMENT; |
<> | 154:37f96f9d4de2 | 2851 | info->sectionCmdAddressAligment = FSL_FEATURE_FLASH_PFLASH_SECTION_CMD_ADDRESS_ALIGMENT; |
<> | 154:37f96f9d4de2 | 2852 | info->resourceCmdAddressAligment = FSL_FEATURE_FLASH_PFLASH_RESOURCE_CMD_ADDRESS_ALIGMENT; |
<> | 154:37f96f9d4de2 | 2853 | info->checkCmdAddressAligment = FSL_FEATURE_FLASH_PFLASH_CHECK_CMD_ADDRESS_ALIGMENT; |
<> | 154:37f96f9d4de2 | 2854 | } |
<> | 154:37f96f9d4de2 | 2855 | |
<> | 154:37f96f9d4de2 | 2856 | return kStatus_FLASH_Success; |
<> | 154:37f96f9d4de2 | 2857 | } |
<> | 154:37f96f9d4de2 | 2858 | |
<> | 154:37f96f9d4de2 | 2859 | /*! @brief Validates the given user key for flash erase APIs.*/ |
<> | 154:37f96f9d4de2 | 2860 | static status_t flash_check_user_key(uint32_t key) |
<> | 154:37f96f9d4de2 | 2861 | { |
<> | 154:37f96f9d4de2 | 2862 | /* Validate the user key */ |
<> | 154:37f96f9d4de2 | 2863 | if (key != kFLASH_ApiEraseKey) |
<> | 154:37f96f9d4de2 | 2864 | { |
<> | 154:37f96f9d4de2 | 2865 | return kStatus_FLASH_EraseKeyError; |
<> | 154:37f96f9d4de2 | 2866 | } |
<> | 154:37f96f9d4de2 | 2867 | |
<> | 154:37f96f9d4de2 | 2868 | return kStatus_FLASH_Success; |
<> | 154:37f96f9d4de2 | 2869 | } |
<> | 154:37f96f9d4de2 | 2870 | |
<> | 154:37f96f9d4de2 | 2871 | #if FLASH_SSD_IS_FLEXNVM_ENABLED |
<> | 154:37f96f9d4de2 | 2872 | /*! @brief Updates FlexNVM memory partition status according to data flash 0 IFR.*/ |
<> | 154:37f96f9d4de2 | 2873 | static status_t flash_update_flexnvm_memory_partition_status(flash_config_t *config) |
<> | 154:37f96f9d4de2 | 2874 | { |
<> | 154:37f96f9d4de2 | 2875 | struct |
<> | 154:37f96f9d4de2 | 2876 | { |
<> | 154:37f96f9d4de2 | 2877 | uint32_t reserved0; |
<> | 154:37f96f9d4de2 | 2878 | uint8_t FlexNVMPartitionCode; |
<> | 154:37f96f9d4de2 | 2879 | uint8_t EEPROMDataSetSize; |
<> | 154:37f96f9d4de2 | 2880 | uint16_t reserved1; |
<> | 154:37f96f9d4de2 | 2881 | } dataIFRReadOut; |
<> | 154:37f96f9d4de2 | 2882 | status_t returnCode; |
<> | 154:37f96f9d4de2 | 2883 | |
<> | 154:37f96f9d4de2 | 2884 | if (config == NULL) |
<> | 154:37f96f9d4de2 | 2885 | { |
<> | 154:37f96f9d4de2 | 2886 | return kStatus_FLASH_InvalidArgument; |
<> | 154:37f96f9d4de2 | 2887 | } |
<> | 154:37f96f9d4de2 | 2888 | |
<> | 154:37f96f9d4de2 | 2889 | /* Get FlexNVM memory partition info from data flash IFR */ |
<> | 154:37f96f9d4de2 | 2890 | returnCode = FLASH_ReadResource(config, DFLASH_IFR_READRESOURCE_START_ADDRESS, (uint32_t *)&dataIFRReadOut, |
<> | 154:37f96f9d4de2 | 2891 | sizeof(dataIFRReadOut), kFLASH_ResourceOptionFlashIfr); |
<> | 154:37f96f9d4de2 | 2892 | if (returnCode != kStatus_FLASH_Success) |
<> | 154:37f96f9d4de2 | 2893 | { |
<> | 154:37f96f9d4de2 | 2894 | return kStatus_FLASH_PartitionStatusUpdateFailure; |
<> | 154:37f96f9d4de2 | 2895 | } |
<> | 154:37f96f9d4de2 | 2896 | |
<> | 154:37f96f9d4de2 | 2897 | /* Fill out partitioned EEPROM size */ |
<> | 154:37f96f9d4de2 | 2898 | dataIFRReadOut.EEPROMDataSetSize &= 0x0FU; |
<> | 154:37f96f9d4de2 | 2899 | switch (dataIFRReadOut.EEPROMDataSetSize) |
<> | 154:37f96f9d4de2 | 2900 | { |
<> | 154:37f96f9d4de2 | 2901 | case 0x00U: |
<> | 154:37f96f9d4de2 | 2902 | config->EEpromTotalSize = FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_0000; |
<> | 154:37f96f9d4de2 | 2903 | break; |
<> | 154:37f96f9d4de2 | 2904 | case 0x01U: |
<> | 154:37f96f9d4de2 | 2905 | config->EEpromTotalSize = FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_0001; |
<> | 154:37f96f9d4de2 | 2906 | break; |
<> | 154:37f96f9d4de2 | 2907 | case 0x02U: |
<> | 154:37f96f9d4de2 | 2908 | config->EEpromTotalSize = FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_0010; |
<> | 154:37f96f9d4de2 | 2909 | break; |
<> | 154:37f96f9d4de2 | 2910 | case 0x03U: |
<> | 154:37f96f9d4de2 | 2911 | config->EEpromTotalSize = FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_0011; |
<> | 154:37f96f9d4de2 | 2912 | break; |
<> | 154:37f96f9d4de2 | 2913 | case 0x04U: |
<> | 154:37f96f9d4de2 | 2914 | config->EEpromTotalSize = FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_0100; |
<> | 154:37f96f9d4de2 | 2915 | break; |
<> | 154:37f96f9d4de2 | 2916 | case 0x05U: |
<> | 154:37f96f9d4de2 | 2917 | config->EEpromTotalSize = FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_0101; |
<> | 154:37f96f9d4de2 | 2918 | break; |
<> | 154:37f96f9d4de2 | 2919 | case 0x06U: |
<> | 154:37f96f9d4de2 | 2920 | config->EEpromTotalSize = FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_0110; |
<> | 154:37f96f9d4de2 | 2921 | break; |
<> | 154:37f96f9d4de2 | 2922 | case 0x07U: |
<> | 154:37f96f9d4de2 | 2923 | config->EEpromTotalSize = FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_0111; |
<> | 154:37f96f9d4de2 | 2924 | break; |
<> | 154:37f96f9d4de2 | 2925 | case 0x08U: |
<> | 154:37f96f9d4de2 | 2926 | config->EEpromTotalSize = FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_1000; |
<> | 154:37f96f9d4de2 | 2927 | break; |
<> | 154:37f96f9d4de2 | 2928 | case 0x09U: |
<> | 154:37f96f9d4de2 | 2929 | config->EEpromTotalSize = FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_1001; |
<> | 154:37f96f9d4de2 | 2930 | break; |
<> | 154:37f96f9d4de2 | 2931 | case 0x0AU: |
<> | 154:37f96f9d4de2 | 2932 | config->EEpromTotalSize = FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_1010; |
<> | 154:37f96f9d4de2 | 2933 | break; |
<> | 154:37f96f9d4de2 | 2934 | case 0x0BU: |
<> | 154:37f96f9d4de2 | 2935 | config->EEpromTotalSize = FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_1011; |
<> | 154:37f96f9d4de2 | 2936 | break; |
<> | 154:37f96f9d4de2 | 2937 | case 0x0CU: |
<> | 154:37f96f9d4de2 | 2938 | config->EEpromTotalSize = FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_1100; |
<> | 154:37f96f9d4de2 | 2939 | break; |
<> | 154:37f96f9d4de2 | 2940 | case 0x0DU: |
<> | 154:37f96f9d4de2 | 2941 | config->EEpromTotalSize = FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_1101; |
<> | 154:37f96f9d4de2 | 2942 | break; |
<> | 154:37f96f9d4de2 | 2943 | case 0x0EU: |
<> | 154:37f96f9d4de2 | 2944 | config->EEpromTotalSize = FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_1110; |
<> | 154:37f96f9d4de2 | 2945 | break; |
<> | 154:37f96f9d4de2 | 2946 | case 0x0FU: |
<> | 154:37f96f9d4de2 | 2947 | config->EEpromTotalSize = FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_1111; |
<> | 154:37f96f9d4de2 | 2948 | break; |
<> | 154:37f96f9d4de2 | 2949 | default: |
<> | 154:37f96f9d4de2 | 2950 | config->EEpromTotalSize = FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_RESERVED; |
<> | 154:37f96f9d4de2 | 2951 | break; |
<> | 154:37f96f9d4de2 | 2952 | } |
<> | 154:37f96f9d4de2 | 2953 | |
<> | 154:37f96f9d4de2 | 2954 | /* Fill out partitioned DFlash size */ |
<> | 154:37f96f9d4de2 | 2955 | dataIFRReadOut.FlexNVMPartitionCode &= 0x0FU; |
<> | 154:37f96f9d4de2 | 2956 | switch (dataIFRReadOut.FlexNVMPartitionCode) |
<> | 154:37f96f9d4de2 | 2957 | { |
<> | 154:37f96f9d4de2 | 2958 | case 0x00U: |
<> | 154:37f96f9d4de2 | 2959 | #if (FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_0000 != 0xFFFFFFFF) |
<> | 154:37f96f9d4de2 | 2960 | config->DFlashTotalSize = FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_0000; |
<> | 154:37f96f9d4de2 | 2961 | #else |
<> | 154:37f96f9d4de2 | 2962 | config->DFlashTotalSize = FLEX_NVM_DFLASH_SIZE_FOR_DEPART_RESERVED; |
<> | 154:37f96f9d4de2 | 2963 | #endif /* FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_0000 */ |
<> | 154:37f96f9d4de2 | 2964 | break; |
<> | 154:37f96f9d4de2 | 2965 | case 0x01U: |
<> | 154:37f96f9d4de2 | 2966 | #if (FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_0001 != 0xFFFFFFFF) |
<> | 154:37f96f9d4de2 | 2967 | config->DFlashTotalSize = FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_0001; |
<> | 154:37f96f9d4de2 | 2968 | #else |
<> | 154:37f96f9d4de2 | 2969 | config->DFlashTotalSize = FLEX_NVM_DFLASH_SIZE_FOR_DEPART_RESERVED; |
<> | 154:37f96f9d4de2 | 2970 | #endif /* FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_0001 */ |
<> | 154:37f96f9d4de2 | 2971 | break; |
<> | 154:37f96f9d4de2 | 2972 | case 0x02U: |
<> | 154:37f96f9d4de2 | 2973 | #if (FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_0010 != 0xFFFFFFFF) |
<> | 154:37f96f9d4de2 | 2974 | config->DFlashTotalSize = FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_0010; |
<> | 154:37f96f9d4de2 | 2975 | #else |
<> | 154:37f96f9d4de2 | 2976 | config->DFlashTotalSize = FLEX_NVM_DFLASH_SIZE_FOR_DEPART_RESERVED; |
<> | 154:37f96f9d4de2 | 2977 | #endif /* FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_0010 */ |
<> | 154:37f96f9d4de2 | 2978 | break; |
<> | 154:37f96f9d4de2 | 2979 | case 0x03U: |
<> | 154:37f96f9d4de2 | 2980 | #if (FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_0011 != 0xFFFFFFFF) |
<> | 154:37f96f9d4de2 | 2981 | config->DFlashTotalSize = FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_0011; |
<> | 154:37f96f9d4de2 | 2982 | #else |
<> | 154:37f96f9d4de2 | 2983 | config->DFlashTotalSize = FLEX_NVM_DFLASH_SIZE_FOR_DEPART_RESERVED; |
<> | 154:37f96f9d4de2 | 2984 | #endif /* FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_0011 */ |
<> | 154:37f96f9d4de2 | 2985 | break; |
<> | 154:37f96f9d4de2 | 2986 | case 0x04U: |
<> | 154:37f96f9d4de2 | 2987 | #if (FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_0100 != 0xFFFFFFFF) |
<> | 154:37f96f9d4de2 | 2988 | config->DFlashTotalSize = FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_0100; |
<> | 154:37f96f9d4de2 | 2989 | #else |
<> | 154:37f96f9d4de2 | 2990 | config->DFlashTotalSize = FLEX_NVM_DFLASH_SIZE_FOR_DEPART_RESERVED; |
<> | 154:37f96f9d4de2 | 2991 | #endif /* FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_0100 */ |
<> | 154:37f96f9d4de2 | 2992 | break; |
<> | 154:37f96f9d4de2 | 2993 | case 0x05U: |
<> | 154:37f96f9d4de2 | 2994 | #if (FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_0101 != 0xFFFFFFFF) |
<> | 154:37f96f9d4de2 | 2995 | config->DFlashTotalSize = FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_0101; |
<> | 154:37f96f9d4de2 | 2996 | #else |
<> | 154:37f96f9d4de2 | 2997 | config->DFlashTotalSize = FLEX_NVM_DFLASH_SIZE_FOR_DEPART_RESERVED; |
<> | 154:37f96f9d4de2 | 2998 | #endif /* FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_0101 */ |
<> | 154:37f96f9d4de2 | 2999 | break; |
<> | 154:37f96f9d4de2 | 3000 | case 0x06U: |
<> | 154:37f96f9d4de2 | 3001 | #if (FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_0110 != 0xFFFFFFFF) |
<> | 154:37f96f9d4de2 | 3002 | config->DFlashTotalSize = FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_0110; |
<> | 154:37f96f9d4de2 | 3003 | #else |
<> | 154:37f96f9d4de2 | 3004 | config->DFlashTotalSize = FLEX_NVM_DFLASH_SIZE_FOR_DEPART_RESERVED; |
<> | 154:37f96f9d4de2 | 3005 | #endif /* FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_0110 */ |
<> | 154:37f96f9d4de2 | 3006 | break; |
<> | 154:37f96f9d4de2 | 3007 | case 0x07U: |
<> | 154:37f96f9d4de2 | 3008 | #if (FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_0111 != 0xFFFFFFFF) |
<> | 154:37f96f9d4de2 | 3009 | config->DFlashTotalSize = FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_0111; |
<> | 154:37f96f9d4de2 | 3010 | #else |
<> | 154:37f96f9d4de2 | 3011 | config->DFlashTotalSize = FLEX_NVM_DFLASH_SIZE_FOR_DEPART_RESERVED; |
<> | 154:37f96f9d4de2 | 3012 | #endif /* FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_0111 */ |
<> | 154:37f96f9d4de2 | 3013 | break; |
<> | 154:37f96f9d4de2 | 3014 | case 0x08U: |
<> | 154:37f96f9d4de2 | 3015 | #if (FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_1000 != 0xFFFFFFFF) |
<> | 154:37f96f9d4de2 | 3016 | config->DFlashTotalSize = FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_1000; |
<> | 154:37f96f9d4de2 | 3017 | #else |
<> | 154:37f96f9d4de2 | 3018 | config->DFlashTotalSize = FLEX_NVM_DFLASH_SIZE_FOR_DEPART_RESERVED; |
<> | 154:37f96f9d4de2 | 3019 | #endif /* FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_1000 */ |
<> | 154:37f96f9d4de2 | 3020 | break; |
<> | 154:37f96f9d4de2 | 3021 | case 0x09U: |
<> | 154:37f96f9d4de2 | 3022 | #if (FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_1001 != 0xFFFFFFFF) |
<> | 154:37f96f9d4de2 | 3023 | config->DFlashTotalSize = FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_1001; |
<> | 154:37f96f9d4de2 | 3024 | #else |
<> | 154:37f96f9d4de2 | 3025 | config->DFlashTotalSize = FLEX_NVM_DFLASH_SIZE_FOR_DEPART_RESERVED; |
<> | 154:37f96f9d4de2 | 3026 | #endif /* FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_1001 */ |
<> | 154:37f96f9d4de2 | 3027 | break; |
<> | 154:37f96f9d4de2 | 3028 | case 0x0AU: |
<> | 154:37f96f9d4de2 | 3029 | #if (FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_1010 != 0xFFFFFFFF) |
<> | 154:37f96f9d4de2 | 3030 | config->DFlashTotalSize = FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_1010; |
<> | 154:37f96f9d4de2 | 3031 | #else |
<> | 154:37f96f9d4de2 | 3032 | config->DFlashTotalSize = FLEX_NVM_DFLASH_SIZE_FOR_DEPART_RESERVED; |
<> | 154:37f96f9d4de2 | 3033 | #endif /* FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_1010 */ |
<> | 154:37f96f9d4de2 | 3034 | break; |
<> | 154:37f96f9d4de2 | 3035 | case 0x0BU: |
<> | 154:37f96f9d4de2 | 3036 | #if (FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_1011 != 0xFFFFFFFF) |
<> | 154:37f96f9d4de2 | 3037 | config->DFlashTotalSize = FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_1011; |
<> | 154:37f96f9d4de2 | 3038 | #else |
<> | 154:37f96f9d4de2 | 3039 | config->DFlashTotalSize = FLEX_NVM_DFLASH_SIZE_FOR_DEPART_RESERVED; |
<> | 154:37f96f9d4de2 | 3040 | #endif /* FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_1011 */ |
<> | 154:37f96f9d4de2 | 3041 | break; |
<> | 154:37f96f9d4de2 | 3042 | case 0x0CU: |
<> | 154:37f96f9d4de2 | 3043 | #if (FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_1100 != 0xFFFFFFFF) |
<> | 154:37f96f9d4de2 | 3044 | config->DFlashTotalSize = FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_1100; |
<> | 154:37f96f9d4de2 | 3045 | #else |
<> | 154:37f96f9d4de2 | 3046 | config->DFlashTotalSize = FLEX_NVM_DFLASH_SIZE_FOR_DEPART_RESERVED; |
<> | 154:37f96f9d4de2 | 3047 | #endif /* FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_1100 */ |
<> | 154:37f96f9d4de2 | 3048 | break; |
<> | 154:37f96f9d4de2 | 3049 | case 0x0DU: |
<> | 154:37f96f9d4de2 | 3050 | #if (FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_1101 != 0xFFFFFFFF) |
<> | 154:37f96f9d4de2 | 3051 | config->DFlashTotalSize = FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_1101; |
<> | 154:37f96f9d4de2 | 3052 | #else |
<> | 154:37f96f9d4de2 | 3053 | config->DFlashTotalSize = FLEX_NVM_DFLASH_SIZE_FOR_DEPART_RESERVED; |
<> | 154:37f96f9d4de2 | 3054 | #endif /* FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_1101 */ |
<> | 154:37f96f9d4de2 | 3055 | break; |
<> | 154:37f96f9d4de2 | 3056 | case 0x0EU: |
<> | 154:37f96f9d4de2 | 3057 | #if (FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_1110 != 0xFFFFFFFF) |
<> | 154:37f96f9d4de2 | 3058 | config->DFlashTotalSize = FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_1110; |
<> | 154:37f96f9d4de2 | 3059 | #else |
<> | 154:37f96f9d4de2 | 3060 | config->DFlashTotalSize = FLEX_NVM_DFLASH_SIZE_FOR_DEPART_RESERVED; |
<> | 154:37f96f9d4de2 | 3061 | #endif /* FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_1110 */ |
<> | 154:37f96f9d4de2 | 3062 | break; |
<> | 154:37f96f9d4de2 | 3063 | case 0x0FU: |
<> | 154:37f96f9d4de2 | 3064 | #if (FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_1111 != 0xFFFFFFFF) |
<> | 154:37f96f9d4de2 | 3065 | config->DFlashTotalSize = FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_1111; |
<> | 154:37f96f9d4de2 | 3066 | #else |
<> | 154:37f96f9d4de2 | 3067 | config->DFlashTotalSize = FLEX_NVM_DFLASH_SIZE_FOR_DEPART_RESERVED; |
<> | 154:37f96f9d4de2 | 3068 | #endif /* FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_1111 */ |
<> | 154:37f96f9d4de2 | 3069 | break; |
<> | 154:37f96f9d4de2 | 3070 | default: |
<> | 154:37f96f9d4de2 | 3071 | config->DFlashTotalSize = FLEX_NVM_DFLASH_SIZE_FOR_DEPART_RESERVED; |
<> | 154:37f96f9d4de2 | 3072 | break; |
<> | 154:37f96f9d4de2 | 3073 | } |
<> | 154:37f96f9d4de2 | 3074 | |
<> | 154:37f96f9d4de2 | 3075 | return kStatus_FLASH_Success; |
<> | 154:37f96f9d4de2 | 3076 | } |
<> | 154:37f96f9d4de2 | 3077 | #endif /* FLASH_SSD_IS_FLEXNVM_ENABLED */ |
<> | 154:37f96f9d4de2 | 3078 | |
<> | 154:37f96f9d4de2 | 3079 | #if defined(FSL_FEATURE_FLASH_HAS_READ_RESOURCE_CMD) && FSL_FEATURE_FLASH_HAS_READ_RESOURCE_CMD |
<> | 154:37f96f9d4de2 | 3080 | /*! @brief Validates the range of the given resource address.*/ |
<> | 154:37f96f9d4de2 | 3081 | static status_t flash_check_resource_range(uint32_t start, |
<> | 154:37f96f9d4de2 | 3082 | uint32_t lengthInBytes, |
<> | 154:37f96f9d4de2 | 3083 | uint32_t alignmentBaseline, |
<> | 154:37f96f9d4de2 | 3084 | flash_read_resource_option_t option) |
<> | 154:37f96f9d4de2 | 3085 | { |
<> | 154:37f96f9d4de2 | 3086 | status_t status; |
<> | 154:37f96f9d4de2 | 3087 | uint32_t maxReadbleAddress; |
<> | 154:37f96f9d4de2 | 3088 | |
<> | 154:37f96f9d4de2 | 3089 | if ((start & (alignmentBaseline - 1)) || (lengthInBytes & (alignmentBaseline - 1))) |
<> | 154:37f96f9d4de2 | 3090 | { |
<> | 154:37f96f9d4de2 | 3091 | return kStatus_FLASH_AlignmentError; |
<> | 154:37f96f9d4de2 | 3092 | } |
<> | 154:37f96f9d4de2 | 3093 | |
<> | 154:37f96f9d4de2 | 3094 | status = kStatus_FLASH_Success; |
<> | 154:37f96f9d4de2 | 3095 | |
<> | 154:37f96f9d4de2 | 3096 | maxReadbleAddress = start + lengthInBytes - 1; |
<> | 154:37f96f9d4de2 | 3097 | if (option == kFLASH_ResourceOptionVersionId) |
<> | 154:37f96f9d4de2 | 3098 | { |
<> | 154:37f96f9d4de2 | 3099 | if ((start != kFLASH_ResourceRangeVersionIdStart) || |
<> | 154:37f96f9d4de2 | 3100 | ((start + lengthInBytes - 1) != kFLASH_ResourceRangeVersionIdEnd)) |
<> | 154:37f96f9d4de2 | 3101 | { |
<> | 154:37f96f9d4de2 | 3102 | status = kStatus_FLASH_InvalidArgument; |
<> | 154:37f96f9d4de2 | 3103 | } |
<> | 154:37f96f9d4de2 | 3104 | } |
<> | 154:37f96f9d4de2 | 3105 | else if (option == kFLASH_ResourceOptionFlashIfr) |
<> | 154:37f96f9d4de2 | 3106 | { |
<> | 154:37f96f9d4de2 | 3107 | if (maxReadbleAddress < kFLASH_ResourceRangePflashIfrSizeInBytes) |
<> | 154:37f96f9d4de2 | 3108 | { |
<> | 154:37f96f9d4de2 | 3109 | } |
<> | 154:37f96f9d4de2 | 3110 | #if defined(FSL_FEATURE_FLASH_HAS_PFLASH_BLOCK_SWAP) && FSL_FEATURE_FLASH_HAS_PFLASH_BLOCK_SWAP |
<> | 154:37f96f9d4de2 | 3111 | else if ((start >= kFLASH_ResourceRangePflashSwapIfrStart) && |
<> | 154:37f96f9d4de2 | 3112 | (maxReadbleAddress <= kFLASH_ResourceRangePflashSwapIfrEnd)) |
<> | 154:37f96f9d4de2 | 3113 | { |
<> | 154:37f96f9d4de2 | 3114 | } |
<> | 154:37f96f9d4de2 | 3115 | #endif /* FSL_FEATURE_FLASH_HAS_PFLASH_BLOCK_SWAP */ |
<> | 154:37f96f9d4de2 | 3116 | else if ((start >= kFLASH_ResourceRangeDflashIfrStart) && |
<> | 154:37f96f9d4de2 | 3117 | (maxReadbleAddress <= kFLASH_ResourceRangeDflashIfrEnd)) |
<> | 154:37f96f9d4de2 | 3118 | { |
<> | 154:37f96f9d4de2 | 3119 | } |
<> | 154:37f96f9d4de2 | 3120 | else |
<> | 154:37f96f9d4de2 | 3121 | { |
<> | 154:37f96f9d4de2 | 3122 | status = kStatus_FLASH_InvalidArgument; |
<> | 154:37f96f9d4de2 | 3123 | } |
<> | 154:37f96f9d4de2 | 3124 | } |
<> | 154:37f96f9d4de2 | 3125 | else |
<> | 154:37f96f9d4de2 | 3126 | { |
<> | 154:37f96f9d4de2 | 3127 | status = kStatus_FLASH_InvalidArgument; |
<> | 154:37f96f9d4de2 | 3128 | } |
<> | 154:37f96f9d4de2 | 3129 | |
<> | 154:37f96f9d4de2 | 3130 | return status; |
<> | 154:37f96f9d4de2 | 3131 | } |
<> | 154:37f96f9d4de2 | 3132 | #endif /* FSL_FEATURE_FLASH_HAS_READ_RESOURCE_CMD */ |
<> | 154:37f96f9d4de2 | 3133 | |
<> | 154:37f96f9d4de2 | 3134 | #if defined(FSL_FEATURE_FLASH_HAS_SWAP_CONTROL_CMD) && FSL_FEATURE_FLASH_HAS_SWAP_CONTROL_CMD |
<> | 154:37f96f9d4de2 | 3135 | /*! @brief Validates the gived swap control option.*/ |
<> | 154:37f96f9d4de2 | 3136 | static status_t flash_check_swap_control_option(flash_swap_control_option_t option) |
<> | 154:37f96f9d4de2 | 3137 | { |
<> | 154:37f96f9d4de2 | 3138 | if ((option == kFLASH_SwapControlOptionIntializeSystem) || (option == kFLASH_SwapControlOptionSetInUpdateState) || |
<> | 154:37f96f9d4de2 | 3139 | (option == kFLASH_SwapControlOptionSetInCompleteState) || (option == kFLASH_SwapControlOptionReportStatus) || |
<> | 154:37f96f9d4de2 | 3140 | (option == kFLASH_SwapControlOptionDisableSystem)) |
<> | 154:37f96f9d4de2 | 3141 | { |
<> | 154:37f96f9d4de2 | 3142 | return kStatus_FLASH_Success; |
<> | 154:37f96f9d4de2 | 3143 | } |
<> | 154:37f96f9d4de2 | 3144 | |
<> | 154:37f96f9d4de2 | 3145 | return kStatus_FLASH_InvalidArgument; |
<> | 154:37f96f9d4de2 | 3146 | } |
<> | 154:37f96f9d4de2 | 3147 | #endif /* FSL_FEATURE_FLASH_HAS_SWAP_CONTROL_CMD */ |
<> | 154:37f96f9d4de2 | 3148 | |
<> | 154:37f96f9d4de2 | 3149 | #if defined(FSL_FEATURE_FLASH_HAS_PFLASH_BLOCK_SWAP) && FSL_FEATURE_FLASH_HAS_PFLASH_BLOCK_SWAP |
<> | 154:37f96f9d4de2 | 3150 | /*! @brief Validates the gived address to see if it is equal to swap indicator address in pflash swap IFR.*/ |
<> | 154:37f96f9d4de2 | 3151 | static status_t flash_validate_swap_indicator_address(flash_config_t *config, uint32_t address) |
<> | 154:37f96f9d4de2 | 3152 | { |
<> | 154:37f96f9d4de2 | 3153 | flash_swap_ifr_field_data_t flashSwapIfrFieldData; |
<> | 154:37f96f9d4de2 | 3154 | uint32_t swapIndicatorAddress; |
<> | 154:37f96f9d4de2 | 3155 | |
<> | 154:37f96f9d4de2 | 3156 | status_t returnCode; |
<> | 154:37f96f9d4de2 | 3157 | returnCode = |
<> | 154:37f96f9d4de2 | 3158 | FLASH_ReadResource(config, kFLASH_ResourceRangePflashSwapIfrStart, flashSwapIfrFieldData.flashSwapIfrData, |
<> | 154:37f96f9d4de2 | 3159 | sizeof(flashSwapIfrFieldData.flashSwapIfrData), kFLASH_ResourceOptionFlashIfr); |
<> | 154:37f96f9d4de2 | 3160 | |
<> | 154:37f96f9d4de2 | 3161 | if (returnCode != kStatus_FLASH_Success) |
<> | 154:37f96f9d4de2 | 3162 | { |
<> | 154:37f96f9d4de2 | 3163 | return returnCode; |
<> | 154:37f96f9d4de2 | 3164 | } |
<> | 154:37f96f9d4de2 | 3165 | |
<> | 154:37f96f9d4de2 | 3166 | /* The high bits value of Swap Indicator Address is stored in Program Flash Swap IFR Field, |
<> | 154:37f96f9d4de2 | 3167 | * the low severval bit value of Swap Indicator Address is always 1'b0 */ |
<> | 154:37f96f9d4de2 | 3168 | swapIndicatorAddress = (uint32_t)flashSwapIfrFieldData.flashSwapIfrField.swapIndicatorAddress * |
<> | 154:37f96f9d4de2 | 3169 | FSL_FEATURE_FLASH_PFLASH_SWAP_CONTROL_CMD_ADDRESS_ALIGMENT; |
<> | 154:37f96f9d4de2 | 3170 | if (address != swapIndicatorAddress) |
<> | 154:37f96f9d4de2 | 3171 | { |
<> | 154:37f96f9d4de2 | 3172 | return kStatus_FLASH_SwapIndicatorAddressError; |
<> | 154:37f96f9d4de2 | 3173 | } |
<> | 154:37f96f9d4de2 | 3174 | |
<> | 154:37f96f9d4de2 | 3175 | return returnCode; |
<> | 154:37f96f9d4de2 | 3176 | } |
<> | 154:37f96f9d4de2 | 3177 | #endif /* FSL_FEATURE_FLASH_HAS_PFLASH_BLOCK_SWAP */ |
<> | 154:37f96f9d4de2 | 3178 | |
<> | 154:37f96f9d4de2 | 3179 | #if defined(FSL_FEATURE_FLASH_HAS_SET_FLEXRAM_FUNCTION_CMD) && FSL_FEATURE_FLASH_HAS_SET_FLEXRAM_FUNCTION_CMD |
<> | 154:37f96f9d4de2 | 3180 | /*! @brief Validates the gived flexram function option.*/ |
<> | 154:37f96f9d4de2 | 3181 | static inline status_t flasn_check_flexram_function_option_range(flash_flexram_function_option_t option) |
<> | 154:37f96f9d4de2 | 3182 | { |
<> | 154:37f96f9d4de2 | 3183 | if ((option != kFLASH_FlexramFunctionOptionAvailableAsRam) && |
<> | 154:37f96f9d4de2 | 3184 | (option != kFLASH_FlexramFunctionOptionAvailableForEeprom)) |
<> | 154:37f96f9d4de2 | 3185 | { |
<> | 154:37f96f9d4de2 | 3186 | return kStatus_FLASH_InvalidArgument; |
<> | 154:37f96f9d4de2 | 3187 | } |
<> | 154:37f96f9d4de2 | 3188 | |
<> | 154:37f96f9d4de2 | 3189 | return kStatus_FLASH_Success; |
<> | 154:37f96f9d4de2 | 3190 | } |
<> | 154:37f96f9d4de2 | 3191 | #endif /* FSL_FEATURE_FLASH_HAS_SET_FLEXRAM_FUNCTION_CMD */ |
<> | 154:37f96f9d4de2 | 3192 | |
<> | 154:37f96f9d4de2 | 3193 | /*! @brief Gets the flash protection information (region size, region count).*/ |
<> | 154:37f96f9d4de2 | 3194 | static status_t flash_get_protection_info(flash_config_t *config, flash_protection_config_t *info) |
<> | 154:37f96f9d4de2 | 3195 | { |
<> | 154:37f96f9d4de2 | 3196 | uint32_t pflashTotalSize; |
<> | 154:37f96f9d4de2 | 3197 | |
<> | 154:37f96f9d4de2 | 3198 | if (config == NULL) |
<> | 154:37f96f9d4de2 | 3199 | { |
<> | 154:37f96f9d4de2 | 3200 | return kStatus_FLASH_InvalidArgument; |
<> | 154:37f96f9d4de2 | 3201 | } |
<> | 154:37f96f9d4de2 | 3202 | |
<> | 154:37f96f9d4de2 | 3203 | /* Clean up info Structure*/ |
<> | 154:37f96f9d4de2 | 3204 | memset(info, 0, sizeof(flash_protection_config_t)); |
<> | 154:37f96f9d4de2 | 3205 | |
<> | 154:37f96f9d4de2 | 3206 | /* Note: KW40 has a secondary flash, but it doesn't have independent protection register*/ |
<> | 154:37f96f9d4de2 | 3207 | #if FLASH_SSD_IS_SECONDARY_FLASH_SUPPORTED && (!FLASH_SSD_SECONDARY_FLASH_HAS_ITS_OWN_PROTECTION_REGISTER) |
<> | 154:37f96f9d4de2 | 3208 | pflashTotalSize = FSL_FEATURE_FLASH_PFLASH_BLOCK_COUNT * FSL_FEATURE_FLASH_PFLASH_BLOCK_SIZE + |
<> | 154:37f96f9d4de2 | 3209 | FSL_FEATURE_FLASH_PFLASH_1_BLOCK_COUNT * FSL_FEATURE_FLASH_PFLASH_1_BLOCK_SIZE; |
<> | 154:37f96f9d4de2 | 3210 | info->regionBase = FSL_FEATURE_FLASH_PFLASH_START_ADDRESS; |
<> | 154:37f96f9d4de2 | 3211 | #else |
<> | 154:37f96f9d4de2 | 3212 | pflashTotalSize = config->PFlashTotalSize; |
<> | 154:37f96f9d4de2 | 3213 | info->regionBase = config->PFlashBlockBase; |
<> | 154:37f96f9d4de2 | 3214 | #endif |
<> | 154:37f96f9d4de2 | 3215 | |
<> | 154:37f96f9d4de2 | 3216 | #if FLASH_SSD_IS_SECONDARY_FLASH_SUPPORTED && FLASH_SSD_SECONDARY_FLASH_HAS_ITS_OWN_PROTECTION_REGISTER |
<> | 154:37f96f9d4de2 | 3217 | if (config->FlashMemoryIndex == (uint32_t)kFLASH_MemoryIndexSecondaryFlash) |
<> | 154:37f96f9d4de2 | 3218 | { |
<> | 154:37f96f9d4de2 | 3219 | info->regionCount = FSL_FEATURE_FLASH_PFLASH_1_PROTECTION_REGION_COUNT; |
<> | 154:37f96f9d4de2 | 3220 | } |
<> | 154:37f96f9d4de2 | 3221 | else |
<> | 154:37f96f9d4de2 | 3222 | #endif |
<> | 154:37f96f9d4de2 | 3223 | { |
<> | 154:37f96f9d4de2 | 3224 | info->regionCount = FSL_FEATURE_FLASH_PFLASH_PROTECTION_REGION_COUNT; |
<> | 154:37f96f9d4de2 | 3225 | } |
<> | 154:37f96f9d4de2 | 3226 | |
<> | 154:37f96f9d4de2 | 3227 | /* Calculate the size of the flash protection region |
<> | 154:37f96f9d4de2 | 3228 | * If the flash density is > 32KB, then protection region is 1/32 of total flash density |
<> | 154:37f96f9d4de2 | 3229 | * Else if flash density is < 32KB, then flash protection region is set to 1KB */ |
<> | 154:37f96f9d4de2 | 3230 | if (pflashTotalSize > info->regionCount * 1024) |
<> | 154:37f96f9d4de2 | 3231 | { |
<> | 154:37f96f9d4de2 | 3232 | info->regionSize = (pflashTotalSize) / info->regionCount; |
<> | 154:37f96f9d4de2 | 3233 | } |
<> | 154:37f96f9d4de2 | 3234 | else |
<> | 154:37f96f9d4de2 | 3235 | { |
<> | 154:37f96f9d4de2 | 3236 | info->regionSize = 1024; |
<> | 154:37f96f9d4de2 | 3237 | } |
<> | 154:37f96f9d4de2 | 3238 | |
<> | 154:37f96f9d4de2 | 3239 | return kStatus_FLASH_Success; |
<> | 154:37f96f9d4de2 | 3240 | } |
<> | 154:37f96f9d4de2 | 3241 | |
<> | 154:37f96f9d4de2 | 3242 | #if defined(FSL_FEATURE_FLASH_HAS_ACCESS_CONTROL) && FSL_FEATURE_FLASH_HAS_ACCESS_CONTROL |
<> | 154:37f96f9d4de2 | 3243 | /*! @brief Gets the flash Execute-Only access information (Segment size, Segment count).*/ |
<> | 154:37f96f9d4de2 | 3244 | static status_t flash_get_access_info(flash_config_t *config, flash_access_config_t *info) |
<> | 154:37f96f9d4de2 | 3245 | { |
<> | 154:37f96f9d4de2 | 3246 | if (config == NULL) |
<> | 154:37f96f9d4de2 | 3247 | { |
<> | 154:37f96f9d4de2 | 3248 | return kStatus_FLASH_InvalidArgument; |
<> | 154:37f96f9d4de2 | 3249 | } |
<> | 154:37f96f9d4de2 | 3250 | |
<> | 154:37f96f9d4de2 | 3251 | /* Clean up info Structure*/ |
<> | 154:37f96f9d4de2 | 3252 | memset(info, 0, sizeof(flash_access_config_t)); |
<> | 154:37f96f9d4de2 | 3253 | |
<> | 154:37f96f9d4de2 | 3254 | /* Note: KW40 has a secondary flash, but it doesn't have independent access register*/ |
<> | 154:37f96f9d4de2 | 3255 | #if FLASH_SSD_IS_SECONDARY_FLASH_SUPPORTED && (!FLASH_SSD_SECONDARY_FLASH_HAS_ITS_OWN_ACCESS_REGISTER) |
<> | 154:37f96f9d4de2 | 3256 | info->SegmentBase = FSL_FEATURE_FLASH_PFLASH_START_ADDRESS; |
<> | 154:37f96f9d4de2 | 3257 | #else |
<> | 154:37f96f9d4de2 | 3258 | info->SegmentBase = config->PFlashBlockBase; |
<> | 154:37f96f9d4de2 | 3259 | #endif |
<> | 154:37f96f9d4de2 | 3260 | info->SegmentSize = config->PFlashAccessSegmentSize; |
<> | 154:37f96f9d4de2 | 3261 | info->SegmentCount = config->PFlashAccessSegmentCount; |
<> | 154:37f96f9d4de2 | 3262 | |
<> | 154:37f96f9d4de2 | 3263 | return kStatus_FLASH_Success; |
<> | 154:37f96f9d4de2 | 3264 | } |
<> | 154:37f96f9d4de2 | 3265 | #endif /* FSL_FEATURE_FLASH_HAS_ACCESS_CONTROL */ |