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FlashWriter/stm32f4xx_flash.c@79:d0b1bb3dcf68, 2017-02-28 (annotated)

Committer:: bwang
Date:: Tue Feb 28 03:32:21 2017 +0000
Revision:: 79:d0b1bb3dcf68

added FlashWriter class

Who changed what in which revision?

User	Revision	Line number	New contents of line
bwang	79:d0b1bb3dcf68	1	/**
bwang	79:d0b1bb3dcf68	2	******************************************************************************
bwang	79:d0b1bb3dcf68	3	* @file stm32f4xx_flash.c
bwang	79:d0b1bb3dcf68	4	* @author MCD Application Team
bwang	79:d0b1bb3dcf68	5	* @version V1.7.1
bwang	79:d0b1bb3dcf68	6	* @date 20-May-2016
bwang	79:d0b1bb3dcf68	7	* @brief This file provides firmware functions to manage the following
bwang	79:d0b1bb3dcf68	8	* functionalities of the FLASH peripheral:
bwang	79:d0b1bb3dcf68	9	* + FLASH Interface configuration
bwang	79:d0b1bb3dcf68	10	* + FLASH Memory Programming
bwang	79:d0b1bb3dcf68	11	* + Option Bytes Programming
bwang	79:d0b1bb3dcf68	12	* + Interrupts and flags management
bwang	79:d0b1bb3dcf68	13	*
bwang	79:d0b1bb3dcf68	14	@verbatim
bwang	79:d0b1bb3dcf68	15	===============================================================================
bwang	79:d0b1bb3dcf68	16	##### How to use this driver #####
bwang	79:d0b1bb3dcf68	17	===============================================================================
bwang	79:d0b1bb3dcf68	18	[..]
bwang	79:d0b1bb3dcf68	19	This driver provides functions to configure and program the FLASH memory
bwang	79:d0b1bb3dcf68	20	of all STM32F4xx devices. These functions are split in 4 groups:
bwang	79:d0b1bb3dcf68	21
bwang	79:d0b1bb3dcf68	22	(#) FLASH Interface configuration functions: this group includes the
bwang	79:d0b1bb3dcf68	23	management of the following features:
bwang	79:d0b1bb3dcf68	24	(++) Set the latency
bwang	79:d0b1bb3dcf68	25	(++) Enable/Disable the prefetch buffer
bwang	79:d0b1bb3dcf68	26	(++) Enable/Disable the Instruction cache and the Data cache
bwang	79:d0b1bb3dcf68	27	(++) Reset the Instruction cache and the Data cache
bwang	79:d0b1bb3dcf68	28
bwang	79:d0b1bb3dcf68	29	(#) FLASH Memory Programming functions: this group includes all needed
bwang	79:d0b1bb3dcf68	30	functions to erase and program the main memory:
bwang	79:d0b1bb3dcf68	31	(++) Lock and Unlock the FLASH interface
bwang	79:d0b1bb3dcf68	32	(++) Erase function: Erase sector, erase all sectors
bwang	79:d0b1bb3dcf68	33	(++) Program functions: byte, half word, word and double word
bwang	79:d0b1bb3dcf68	34
bwang	79:d0b1bb3dcf68	35	(#) Option Bytes Programming functions: this group includes all needed
bwang	79:d0b1bb3dcf68	36	functions to manage the Option Bytes:
bwang	79:d0b1bb3dcf68	37	(++) Set/Reset the write protection
bwang	79:d0b1bb3dcf68	38	(++) Set the Read protection Level
bwang	79:d0b1bb3dcf68	39	(++) Set the BOR level
bwang	79:d0b1bb3dcf68	40	(++) Program the user Option Bytes
bwang	79:d0b1bb3dcf68	41	(++) Launch the Option Bytes loader
bwang	79:d0b1bb3dcf68	42
bwang	79:d0b1bb3dcf68	43	(#) Interrupts and flags management functions: this group
bwang	79:d0b1bb3dcf68	44	includes all needed functions to:
bwang	79:d0b1bb3dcf68	45	(++) Enable/Disable the FLASH interrupt sources
bwang	79:d0b1bb3dcf68	46	(++) Get flags status
bwang	79:d0b1bb3dcf68	47	(++) Clear flags
bwang	79:d0b1bb3dcf68	48	(++) Get FLASH operation status
bwang	79:d0b1bb3dcf68	49	(++) Wait for last FLASH operation
bwang	79:d0b1bb3dcf68	50	@endverbatim
bwang	79:d0b1bb3dcf68	51	******************************************************************************
bwang	79:d0b1bb3dcf68	52	* @attention
bwang	79:d0b1bb3dcf68	53	*
bwang	79:d0b1bb3dcf68	54	* <h2><center>© COPYRIGHT 2016 STMicroelectronics</center></h2>
bwang	79:d0b1bb3dcf68	55	*
bwang	79:d0b1bb3dcf68	56	* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
bwang	79:d0b1bb3dcf68	57	* You may not use this file except in compliance with the License.
bwang	79:d0b1bb3dcf68	58	* You may obtain a copy of the License at:
bwang	79:d0b1bb3dcf68	59	*
bwang	79:d0b1bb3dcf68	60	* http://www.st.com/software_license_agreement_liberty_v2
bwang	79:d0b1bb3dcf68	61	*
bwang	79:d0b1bb3dcf68	62	* Unless required by applicable law or agreed to in writing, software
bwang	79:d0b1bb3dcf68	63	* distributed under the License is distributed on an "AS IS" BASIS,
bwang	79:d0b1bb3dcf68	64	* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
bwang	79:d0b1bb3dcf68	65	* See the License for the specific language governing permissions and
bwang	79:d0b1bb3dcf68	66	* limitations under the License.
bwang	79:d0b1bb3dcf68	67	*
bwang	79:d0b1bb3dcf68	68	******************************************************************************
bwang	79:d0b1bb3dcf68	69	*/
bwang	79:d0b1bb3dcf68	70
bwang	79:d0b1bb3dcf68	71	/* Includes ------------------------------------------------------------------*/
bwang	79:d0b1bb3dcf68	72	#include "stm32f4xx_flash.h"
bwang	79:d0b1bb3dcf68	73
bwang	79:d0b1bb3dcf68	74	/** @addtogroup STM32F4xx_StdPeriph_Driver
bwang	79:d0b1bb3dcf68	75	* @{
bwang	79:d0b1bb3dcf68	76	*/
bwang	79:d0b1bb3dcf68	77
bwang	79:d0b1bb3dcf68	78	/** @defgroup FLASH
bwang	79:d0b1bb3dcf68	79	* @brief FLASH driver modules
bwang	79:d0b1bb3dcf68	80	* @{
bwang	79:d0b1bb3dcf68	81	*/
bwang	79:d0b1bb3dcf68	82
bwang	79:d0b1bb3dcf68	83	/* Private typedef -----------------------------------------------------------*/
bwang	79:d0b1bb3dcf68	84	/* Private define ------------------------------------------------------------*/
bwang	79:d0b1bb3dcf68	85	#define SECTOR_MASK ((uint32_t)0xFFFFFF07)
bwang	79:d0b1bb3dcf68	86
bwang	79:d0b1bb3dcf68	87	/* Private macro -------------------------------------------------------------*/
bwang	79:d0b1bb3dcf68	88	/* Private variables ---------------------------------------------------------*/
bwang	79:d0b1bb3dcf68	89	/* Private function prototypes -----------------------------------------------*/
bwang	79:d0b1bb3dcf68	90	/* Private functions ---------------------------------------------------------*/
bwang	79:d0b1bb3dcf68	91
bwang	79:d0b1bb3dcf68	92	/** @defgroup FLASH_Private_Functions
bwang	79:d0b1bb3dcf68	93	* @{
bwang	79:d0b1bb3dcf68	94	*/
bwang	79:d0b1bb3dcf68	95
bwang	79:d0b1bb3dcf68	96	/** @defgroup FLASH_Group1 FLASH Interface configuration functions
bwang	79:d0b1bb3dcf68	97	* @brief FLASH Interface configuration functions
bwang	79:d0b1bb3dcf68	98	*
bwang	79:d0b1bb3dcf68	99
bwang	79:d0b1bb3dcf68	100	@verbatim
bwang	79:d0b1bb3dcf68	101	===============================================================================
bwang	79:d0b1bb3dcf68	102	##### FLASH Interface configuration functions #####
bwang	79:d0b1bb3dcf68	103	===============================================================================
bwang	79:d0b1bb3dcf68	104	[..]
bwang	79:d0b1bb3dcf68	105	This group includes the following functions:
bwang	79:d0b1bb3dcf68	106	(+) void FLASH_SetLatency(uint32_t FLASH_Latency)
bwang	79:d0b1bb3dcf68	107	To correctly read data from FLASH memory, the number of wait states (LATENCY)
bwang	79:d0b1bb3dcf68	108	must be correctly programmed according to the frequency of the CPU clock
bwang	79:d0b1bb3dcf68	109	(HCLK) and the supply voltage of the device.
bwang	79:d0b1bb3dcf68	110	[..]
bwang	79:d0b1bb3dcf68	111	For STM32F405xx/07xx and STM32F415xx/17xx devices
bwang	79:d0b1bb3dcf68	112	+-------------------------------------------------------------------------------------+
bwang	79:d0b1bb3dcf68	113	\| Latency \| HCLK clock frequency (MHz) \|
bwang	79:d0b1bb3dcf68	114	\| \|---------------------------------------------------------------------\|
bwang	79:d0b1bb3dcf68	115	\| \| voltage range \| voltage range \| voltage range \| voltage range \|
bwang	79:d0b1bb3dcf68	116	\| \| 2.7 V - 3.6 V \| 2.4 V - 2.7 V \| 2.1 V - 2.4 V \| 1.8 V - 2.1 V \|
bwang	79:d0b1bb3dcf68	117	\|---------------\|----------------\|----------------\|-----------------\|-----------------\|
bwang	79:d0b1bb3dcf68	118	\|0WS(1CPU cycle)\|0 < HCLK <= 30 \|0 < HCLK <= 24 \|0 < HCLK <= 22 \|0 < HCLK <= 20 \|
bwang	79:d0b1bb3dcf68	119	\|---------------\|----------------\|----------------\|-----------------\|-----------------\|
bwang	79:d0b1bb3dcf68	120	\|1WS(2CPU cycle)\|30 < HCLK <= 60 \|24 < HCLK <= 48 \|22 < HCLK <= 44 \|20 < HCLK <= 40 \|
bwang	79:d0b1bb3dcf68	121	\|---------------\|----------------\|----------------\|-----------------\|-----------------\|
bwang	79:d0b1bb3dcf68	122	\|2WS(3CPU cycle)\|60 < HCLK <= 90 \|48 < HCLK <= 72 \|44 < HCLK <= 66 \|40 < HCLK <= 60 \|
bwang	79:d0b1bb3dcf68	123	\|---------------\|----------------\|----------------\|-----------------\|-----------------\|
bwang	79:d0b1bb3dcf68	124	\|3WS(4CPU cycle)\|90 < HCLK <= 120\|72 < HCLK <= 96 \|66 < HCLK <= 88 \|60 < HCLK <= 80 \|
bwang	79:d0b1bb3dcf68	125	\|---------------\|----------------\|----------------\|-----------------\|-----------------\|
bwang	79:d0b1bb3dcf68	126	\|4WS(5CPU cycle)\|120< HCLK <= 150\|96 < HCLK <= 120\|88 < HCLK <= 110 \|80 < HCLK <= 100 \|
bwang	79:d0b1bb3dcf68	127	\|---------------\|----------------\|----------------\|-----------------\|-----------------\|
bwang	79:d0b1bb3dcf68	128	\|5WS(6CPU cycle)\|150< HCLK <= 168\|120< HCLK <= 144\|110 < HCLK <= 132\|100 < HCLK <= 120\|
bwang	79:d0b1bb3dcf68	129	\|---------------\|----------------\|----------------\|-----------------\|-----------------\|
bwang	79:d0b1bb3dcf68	130	\|6WS(7CPU cycle)\| NA \|144< HCLK <= 168\|132 < HCLK <= 154\|120 < HCLK <= 140\|
bwang	79:d0b1bb3dcf68	131	\|---------------\|----------------\|----------------\|-----------------\|-----------------\|
bwang	79:d0b1bb3dcf68	132	\|7WS(8CPU cycle)\| NA \| NA \|154 < HCLK <= 168\|140 < HCLK <= 160\|
bwang	79:d0b1bb3dcf68	133	+---------------\|----------------\|----------------\|-----------------\|-----------------+
bwang	79:d0b1bb3dcf68	134
bwang	79:d0b1bb3dcf68	135	[..]
bwang	79:d0b1bb3dcf68	136	For STM32F42xxx/43xxx devices
bwang	79:d0b1bb3dcf68	137	+-------------------------------------------------------------------------------------+
bwang	79:d0b1bb3dcf68	138	\| Latency \| HCLK clock frequency (MHz) \|
bwang	79:d0b1bb3dcf68	139	\| \|---------------------------------------------------------------------\|
bwang	79:d0b1bb3dcf68	140	\| \| voltage range \| voltage range \| voltage range \| voltage range \|
bwang	79:d0b1bb3dcf68	141	\| \| 2.7 V - 3.6 V \| 2.4 V - 2.7 V \| 2.1 V - 2.4 V \| 1.8 V - 2.1 V \|
bwang	79:d0b1bb3dcf68	142	\|---------------\|----------------\|----------------\|-----------------\|-----------------\|
bwang	79:d0b1bb3dcf68	143	\|0WS(1CPU cycle)\|0 < HCLK <= 30 \|0 < HCLK <= 24 \|0 < HCLK <= 22 \|0 < HCLK <= 20 \|
bwang	79:d0b1bb3dcf68	144	\|---------------\|----------------\|----------------\|-----------------\|-----------------\|
bwang	79:d0b1bb3dcf68	145	\|1WS(2CPU cycle)\|30 < HCLK <= 60 \|24 < HCLK <= 48 \|22 < HCLK <= 44 \|20 < HCLK <= 40 \|
bwang	79:d0b1bb3dcf68	146	\|---------------\|----------------\|----------------\|-----------------\|-----------------\|
bwang	79:d0b1bb3dcf68	147	\|2WS(3CPU cycle)\|60 < HCLK <= 90 \|48 < HCLK <= 72 \|44 < HCLK <= 66 \|40 < HCLK <= 60 \|
bwang	79:d0b1bb3dcf68	148	\|---------------\|----------------\|----------------\|-----------------\|-----------------\|
bwang	79:d0b1bb3dcf68	149	\|3WS(4CPU cycle)\|90 < HCLK <= 120\|72 < HCLK <= 96 \|66 < HCLK <= 88 \|60 < HCLK <= 80 \|
bwang	79:d0b1bb3dcf68	150	\|---------------\|----------------\|----------------\|-----------------\|-----------------\|
bwang	79:d0b1bb3dcf68	151	\|4WS(5CPU cycle)\|120< HCLK <= 150\|96 < HCLK <= 120\|88 < HCLK <= 110 \|80 < HCLK <= 100 \|
bwang	79:d0b1bb3dcf68	152	\|---------------\|----------------\|----------------\|-----------------\|-----------------\|
bwang	79:d0b1bb3dcf68	153	\|5WS(6CPU cycle)\|120< HCLK <= 180\|120< HCLK <= 144\|110 < HCLK <= 132\|100 < HCLK <= 120\|
bwang	79:d0b1bb3dcf68	154	\|---------------\|----------------\|----------------\|-----------------\|-----------------\|
bwang	79:d0b1bb3dcf68	155	\|6WS(7CPU cycle)\| NA \|144< HCLK <= 168\|132 < HCLK <= 154\|120 < HCLK <= 140\|
bwang	79:d0b1bb3dcf68	156	\|---------------\|----------------\|----------------\|-----------------\|-----------------\|
bwang	79:d0b1bb3dcf68	157	\|7WS(8CPU cycle)\| NA \|168< HCLK <= 180\|154 < HCLK <= 176\|140 < HCLK <= 160\|
bwang	79:d0b1bb3dcf68	158	\|---------------\|----------------\|----------------\|-----------------\|-----------------\|
bwang	79:d0b1bb3dcf68	159	\|8WS(9CPU cycle)\| NA \| NA \|176 < HCLK <= 180\|160 < HCLK <= 168\|
bwang	79:d0b1bb3dcf68	160	+-------------------------------------------------------------------------------------+
bwang	79:d0b1bb3dcf68	161
bwang	79:d0b1bb3dcf68	162	[..]
bwang	79:d0b1bb3dcf68	163	For STM32F401x devices
bwang	79:d0b1bb3dcf68	164	+-------------------------------------------------------------------------------------+
bwang	79:d0b1bb3dcf68	165	\| Latency \| HCLK clock frequency (MHz) \|
bwang	79:d0b1bb3dcf68	166	\| \|---------------------------------------------------------------------\|
bwang	79:d0b1bb3dcf68	167	\| \| voltage range \| voltage range \| voltage range \| voltage range \|
bwang	79:d0b1bb3dcf68	168	\| \| 2.7 V - 3.6 V \| 2.4 V - 2.7 V \| 2.1 V - 2.4 V \| 1.8 V - 2.1 V \|
bwang	79:d0b1bb3dcf68	169	\|---------------\|----------------\|----------------\|-----------------\|-----------------\|
bwang	79:d0b1bb3dcf68	170	\|0WS(1CPU cycle)\|0 < HCLK <= 30 \|0 < HCLK <= 24 \|0 < HCLK <= 22 \|0 < HCLK <= 20 \|
bwang	79:d0b1bb3dcf68	171	\|---------------\|----------------\|----------------\|-----------------\|-----------------\|
bwang	79:d0b1bb3dcf68	172	\|1WS(2CPU cycle)\|30 < HCLK <= 60 \|24 < HCLK <= 48 \|22 < HCLK <= 44 \|20 < HCLK <= 40 \|
bwang	79:d0b1bb3dcf68	173	\|---------------\|----------------\|----------------\|-----------------\|-----------------\|
bwang	79:d0b1bb3dcf68	174	\|2WS(3CPU cycle)\|60 < HCLK <= 84 \|48 < HCLK <= 72 \|44 < HCLK <= 66 \|40 < HCLK <= 60 \|
bwang	79:d0b1bb3dcf68	175	\|---------------\|----------------\|----------------\|-----------------\|-----------------\|
bwang	79:d0b1bb3dcf68	176	\|3WS(4CPU cycle)\| NA \|72 < HCLK <= 84 \|66 < HCLK <= 84 \|60 < HCLK <= 80 \|
bwang	79:d0b1bb3dcf68	177	\|---------------\|----------------\|----------------\|-----------------\|-----------------\|
bwang	79:d0b1bb3dcf68	178	\|4WS(5CPU cycle)\| NA \| NA \| NA \|80 < HCLK <= 84 \|
bwang	79:d0b1bb3dcf68	179	+-------------------------------------------------------------------------------------+
bwang	79:d0b1bb3dcf68	180
bwang	79:d0b1bb3dcf68	181	[..]
bwang	79:d0b1bb3dcf68	182	For STM32F410xx/STM32F411xE devices
bwang	79:d0b1bb3dcf68	183	+-------------------------------------------------------------------------------------+
bwang	79:d0b1bb3dcf68	184	\| Latency \| HCLK clock frequency (MHz) \|
bwang	79:d0b1bb3dcf68	185	\| \|---------------------------------------------------------------------\|
bwang	79:d0b1bb3dcf68	186	\| \| voltage range \| voltage range \| voltage range \| voltage range \|
bwang	79:d0b1bb3dcf68	187	\| \| 2.7 V - 3.6 V \| 2.4 V - 2.7 V \| 2.1 V - 2.4 V \| 1.8 V - 2.1 V \|
bwang	79:d0b1bb3dcf68	188	\|---------------\|----------------\|----------------\|-----------------\|-----------------\|
bwang	79:d0b1bb3dcf68	189	\|0WS(1CPU cycle)\|0 < HCLK <= 30 \|0 < HCLK <= 24 \|0 < HCLK <= 18 \|0 < HCLK <= 16 \|
bwang	79:d0b1bb3dcf68	190	\|---------------\|----------------\|----------------\|-----------------\|-----------------\|
bwang	79:d0b1bb3dcf68	191	\|1WS(2CPU cycle)\|30 < HCLK <= 64 \|24 < HCLK <= 48 \|18 < HCLK <= 36 \|16 < HCLK <= 32 \|
bwang	79:d0b1bb3dcf68	192	\|---------------\|----------------\|----------------\|-----------------\|-----------------\|
bwang	79:d0b1bb3dcf68	193	\|2WS(3CPU cycle)\|64 < HCLK <= 90 \|48 < HCLK <= 72 \|36 < HCLK <= 54 \|32 < HCLK <= 48 \|
bwang	79:d0b1bb3dcf68	194	\|---------------\|----------------\|----------------\|-----------------\|-----------------\|
bwang	79:d0b1bb3dcf68	195	\|3WS(4CPU cycle)\|90 < HCLK <= 100\|72 < HCLK <= 96 \|54 < HCLK <= 72 \|48 < HCLK <= 64 \|
bwang	79:d0b1bb3dcf68	196	\|---------------\|----------------\|----------------\|-----------------\|-----------------\|
bwang	79:d0b1bb3dcf68	197	\|4WS(5CPU cycle)\| NA \|96 < HCLK <= 100\|72 < HCLK <= 90 \|64 < HCLK <= 80 \|
bwang	79:d0b1bb3dcf68	198	\|---------------\|----------------\|----------------\|-----------------\|-----------------\|
bwang	79:d0b1bb3dcf68	199	\|5WS(6CPU cycle)\| NA \| NA \|90 < HCLK <= 100 \|80 < HCLK <= 96 \|
bwang	79:d0b1bb3dcf68	200	\|---------------\|----------------\|----------------\|-----------------\|-----------------\|
bwang	79:d0b1bb3dcf68	201	\|6WS(7CPU cycle)\| NA \| NA \| NA \|96 < HCLK <= 100 \|
bwang	79:d0b1bb3dcf68	202	+-------------------------------------------------------------------------------------+
bwang	79:d0b1bb3dcf68	203
bwang	79:d0b1bb3dcf68	204	[..]
bwang	79:d0b1bb3dcf68	205	+-------------------------------------------------------------------------------------------------------------------+
bwang	79:d0b1bb3dcf68	206	\| \| voltage range \| voltage range \| voltage range \| voltage range \| voltage range 2.7 V - 3.6 V \|
bwang	79:d0b1bb3dcf68	207	\| \| 2.7 V - 3.6 V \| 2.4 V - 2.7 V \| 2.1 V - 2.4 V \| 1.8 V - 2.1 V \| with External Vpp = 9V \|
bwang	79:d0b1bb3dcf68	208	\|---------------\|----------------\|----------------\|-----------------\|-----------------\|-----------------------------\|
bwang	79:d0b1bb3dcf68	209	\|Max Parallelism\| x32 \| x16 \| x8 \| x64 \|
bwang	79:d0b1bb3dcf68	210	\|---------------\|----------------\|----------------\|-----------------\|-----------------\|-----------------------------\|
bwang	79:d0b1bb3dcf68	211	\|PSIZE[1:0] \| 10 \| 01 \| 00 \| 11 \|
bwang	79:d0b1bb3dcf68	212	+-------------------------------------------------------------------------------------------------------------------+
bwang	79:d0b1bb3dcf68	213
bwang	79:d0b1bb3dcf68	214	-@- On STM32F405xx/407xx and STM32F415xx/417xx devices:
bwang	79:d0b1bb3dcf68	215	(++) when VOS = '0' Scale 2 mode, the maximum value of fHCLK = 144MHz.
bwang	79:d0b1bb3dcf68	216	(++) when VOS = '1' Scale 1 mode, the maximum value of fHCLK = 168MHz.
bwang	79:d0b1bb3dcf68	217	[..]
bwang	79:d0b1bb3dcf68	218	On STM32F42xxx/43xxx devices:
bwang	79:d0b1bb3dcf68	219	(++) when VOS[1:0] = '0x01' Scale 3 mode, the maximum value of fHCLK is 120MHz.
bwang	79:d0b1bb3dcf68	220	(++) when VOS[1:0] = '0x10' Scale 2 mode, the maximum value of fHCLK is 144MHz if OverDrive OFF and 168MHz if OverDrive ON.
bwang	79:d0b1bb3dcf68	221	(++) when VOS[1:0] = '0x11' Scale 1 mode, the maximum value of fHCLK is 168MHz if OverDrive OFF and 180MHz if OverDrive ON.
bwang	79:d0b1bb3dcf68	222	[..]
bwang	79:d0b1bb3dcf68	223	On STM32F401x devices:
bwang	79:d0b1bb3dcf68	224	(++) when VOS[1:0] = '0x01' Scale 3 mode, the maximum value of fHCLK is 60MHz.
bwang	79:d0b1bb3dcf68	225	(++) when VOS[1:0] = '0x10' Scale 2 mode, the maximum value of fHCLK is 84MHz.
bwang	79:d0b1bb3dcf68	226	[..]
bwang	79:d0b1bb3dcf68	227	On STM32F410xx/STM32F411xE devices:
bwang	79:d0b1bb3dcf68	228	(++) when VOS[1:0] = '0x01' Scale 3 mode, the maximum value of fHCLK is 64MHz.
bwang	79:d0b1bb3dcf68	229	(++) when VOS[1:0] = '0x10' Scale 2 mode, the maximum value of fHCLK is 84MHz.
bwang	79:d0b1bb3dcf68	230	(++) when VOS[1:0] = '0x11' Scale 1 mode, the maximum value of fHCLK is 100MHz.
bwang	79:d0b1bb3dcf68	231
bwang	79:d0b1bb3dcf68	232	For more details please refer product DataSheet
bwang	79:d0b1bb3dcf68	233	You can use PWR_MainRegulatorModeConfig() function to control VOS bits.
bwang	79:d0b1bb3dcf68	234
bwang	79:d0b1bb3dcf68	235	(+) void FLASH_PrefetchBufferCmd(FunctionalState NewState)
bwang	79:d0b1bb3dcf68	236	(+) void FLASH_InstructionCacheCmd(FunctionalState NewState)
bwang	79:d0b1bb3dcf68	237	(+) void FLASH_DataCacheCmd(FunctionalState NewState)
bwang	79:d0b1bb3dcf68	238	(+) void FLASH_InstructionCacheReset(void)
bwang	79:d0b1bb3dcf68	239	(+) void FLASH_DataCacheReset(void)
bwang	79:d0b1bb3dcf68	240
bwang	79:d0b1bb3dcf68	241	[..]
bwang	79:d0b1bb3dcf68	242	The unlock sequence is not needed for these functions.
bwang	79:d0b1bb3dcf68	243
bwang	79:d0b1bb3dcf68	244	@endverbatim
bwang	79:d0b1bb3dcf68	245	* @{
bwang	79:d0b1bb3dcf68	246	*/
bwang	79:d0b1bb3dcf68	247
bwang	79:d0b1bb3dcf68	248	/**
bwang	79:d0b1bb3dcf68	249	* @brief Sets the code latency value.
bwang	79:d0b1bb3dcf68	250	* @param FLASH_Latency: specifies the FLASH Latency value.
bwang	79:d0b1bb3dcf68	251	* This parameter can be one of the following values:
bwang	79:d0b1bb3dcf68	252	* @arg FLASH_Latency_0: FLASH Zero Latency cycle
bwang	79:d0b1bb3dcf68	253	* @arg FLASH_Latency_1: FLASH One Latency cycle
bwang	79:d0b1bb3dcf68	254	* @arg FLASH_Latency_2: FLASH Two Latency cycles
bwang	79:d0b1bb3dcf68	255	* @arg FLASH_Latency_3: FLASH Three Latency cycles
bwang	79:d0b1bb3dcf68	256	* @arg FLASH_Latency_4: FLASH Four Latency cycles
bwang	79:d0b1bb3dcf68	257	* @arg FLASH_Latency_5: FLASH Five Latency cycles
bwang	79:d0b1bb3dcf68	258	* @arg FLASH_Latency_6: FLASH Six Latency cycles
bwang	79:d0b1bb3dcf68	259	* @arg FLASH_Latency_7: FLASH Seven Latency cycles
bwang	79:d0b1bb3dcf68	260	* @arg FLASH_Latency_8: FLASH Eight Latency cycles
bwang	79:d0b1bb3dcf68	261	* @arg FLASH_Latency_9: FLASH Nine Latency cycles
bwang	79:d0b1bb3dcf68	262	* @arg FLASH_Latency_10: FLASH Teen Latency cycles
bwang	79:d0b1bb3dcf68	263	* @arg FLASH_Latency_11: FLASH Eleven Latency cycles
bwang	79:d0b1bb3dcf68	264	* @arg FLASH_Latency_12: FLASH Twelve Latency cycles
bwang	79:d0b1bb3dcf68	265	* @arg FLASH_Latency_13: FLASH Thirteen Latency cycles
bwang	79:d0b1bb3dcf68	266	* @arg FLASH_Latency_14: FLASH Fourteen Latency cycles
bwang	79:d0b1bb3dcf68	267	* @arg FLASH_Latency_15: FLASH Fifteen Latency cycles
bwang	79:d0b1bb3dcf68	268	*
bwang	79:d0b1bb3dcf68	269	* @note For STM32F405xx/407xx, STM32F415xx/417xx, STM32F401xx/411xE and STM32F412xG devices
bwang	79:d0b1bb3dcf68	270	* this parameter can be a value between FLASH_Latency_0 and FLASH_Latency_7.
bwang	79:d0b1bb3dcf68	271	*
bwang	79:d0b1bb3dcf68	272	* @note For STM32F42xxx/43xxx devices this parameter can be a value between
bwang	79:d0b1bb3dcf68	273	* FLASH_Latency_0 and FLASH_Latency_15.
bwang	79:d0b1bb3dcf68	274	*
bwang	79:d0b1bb3dcf68	275	* @retval None
bwang	79:d0b1bb3dcf68	276	*/
bwang	79:d0b1bb3dcf68	277	void FLASH_SetLatency(uint32_t FLASH_Latency)
bwang	79:d0b1bb3dcf68	278	{
bwang	79:d0b1bb3dcf68	279	/* Check the parameters */
bwang	79:d0b1bb3dcf68	280	assert_param(IS_FLASH_LATENCY(FLASH_Latency));
bwang	79:d0b1bb3dcf68	281
bwang	79:d0b1bb3dcf68	282	/* Perform Byte access to FLASH_ACR[8:0] to set the Latency value */
bwang	79:d0b1bb3dcf68	283	(__IO uint8_t )ACR_BYTE0_ADDRESS = (uint8_t)FLASH_Latency;
bwang	79:d0b1bb3dcf68	284	}
bwang	79:d0b1bb3dcf68	285
bwang	79:d0b1bb3dcf68	286	/**
bwang	79:d0b1bb3dcf68	287	* @brief Enables or disables the Prefetch Buffer.
bwang	79:d0b1bb3dcf68	288	* @param NewState: new state of the Prefetch Buffer.
bwang	79:d0b1bb3dcf68	289	* This parameter can be: ENABLE or DISABLE.
bwang	79:d0b1bb3dcf68	290	* @retval None
bwang	79:d0b1bb3dcf68	291	*/
bwang	79:d0b1bb3dcf68	292	void FLASH_PrefetchBufferCmd(FunctionalState NewState)
bwang	79:d0b1bb3dcf68	293	{
bwang	79:d0b1bb3dcf68	294	/* Check the parameters */
bwang	79:d0b1bb3dcf68	295	assert_param(IS_FUNCTIONAL_STATE(NewState));
bwang	79:d0b1bb3dcf68	296
bwang	79:d0b1bb3dcf68	297	/* Enable or disable the Prefetch Buffer */
bwang	79:d0b1bb3dcf68	298	if(NewState != DISABLE)
bwang	79:d0b1bb3dcf68	299	{
bwang	79:d0b1bb3dcf68	300	FLASH->ACR \|= FLASH_ACR_PRFTEN;
bwang	79:d0b1bb3dcf68	301	}
bwang	79:d0b1bb3dcf68	302	else
bwang	79:d0b1bb3dcf68	303	{
bwang	79:d0b1bb3dcf68	304	FLASH->ACR &= (~FLASH_ACR_PRFTEN);
bwang	79:d0b1bb3dcf68	305	}
bwang	79:d0b1bb3dcf68	306	}
bwang	79:d0b1bb3dcf68	307
bwang	79:d0b1bb3dcf68	308	/**
bwang	79:d0b1bb3dcf68	309	* @brief Enables or disables the Instruction Cache feature.
bwang	79:d0b1bb3dcf68	310	* @param NewState: new state of the Instruction Cache.
bwang	79:d0b1bb3dcf68	311	* This parameter can be: ENABLE or DISABLE.
bwang	79:d0b1bb3dcf68	312	* @retval None
bwang	79:d0b1bb3dcf68	313	*/
bwang	79:d0b1bb3dcf68	314	void FLASH_InstructionCacheCmd(FunctionalState NewState)
bwang	79:d0b1bb3dcf68	315	{
bwang	79:d0b1bb3dcf68	316	/* Check the parameters */
bwang	79:d0b1bb3dcf68	317	assert_param(IS_FUNCTIONAL_STATE(NewState));
bwang	79:d0b1bb3dcf68	318
bwang	79:d0b1bb3dcf68	319	if(NewState != DISABLE)
bwang	79:d0b1bb3dcf68	320	{
bwang	79:d0b1bb3dcf68	321	FLASH->ACR \|= FLASH_ACR_ICEN;
bwang	79:d0b1bb3dcf68	322	}
bwang	79:d0b1bb3dcf68	323	else
bwang	79:d0b1bb3dcf68	324	{
bwang	79:d0b1bb3dcf68	325	FLASH->ACR &= (~FLASH_ACR_ICEN);
bwang	79:d0b1bb3dcf68	326	}
bwang	79:d0b1bb3dcf68	327	}
bwang	79:d0b1bb3dcf68	328
bwang	79:d0b1bb3dcf68	329	/**
bwang	79:d0b1bb3dcf68	330	* @brief Enables or disables the Data Cache feature.
bwang	79:d0b1bb3dcf68	331	* @param NewState: new state of the Data Cache.
bwang	79:d0b1bb3dcf68	332	* This parameter can be: ENABLE or DISABLE.
bwang	79:d0b1bb3dcf68	333	* @retval None
bwang	79:d0b1bb3dcf68	334	*/
bwang	79:d0b1bb3dcf68	335	void FLASH_DataCacheCmd(FunctionalState NewState)
bwang	79:d0b1bb3dcf68	336	{
bwang	79:d0b1bb3dcf68	337	/* Check the parameters */
bwang	79:d0b1bb3dcf68	338	assert_param(IS_FUNCTIONAL_STATE(NewState));
bwang	79:d0b1bb3dcf68	339
bwang	79:d0b1bb3dcf68	340	if(NewState != DISABLE)
bwang	79:d0b1bb3dcf68	341	{
bwang	79:d0b1bb3dcf68	342	FLASH->ACR \|= FLASH_ACR_DCEN;
bwang	79:d0b1bb3dcf68	343	}
bwang	79:d0b1bb3dcf68	344	else
bwang	79:d0b1bb3dcf68	345	{
bwang	79:d0b1bb3dcf68	346	FLASH->ACR &= (~FLASH_ACR_DCEN);
bwang	79:d0b1bb3dcf68	347	}
bwang	79:d0b1bb3dcf68	348	}
bwang	79:d0b1bb3dcf68	349
bwang	79:d0b1bb3dcf68	350	/**
bwang	79:d0b1bb3dcf68	351	* @brief Resets the Instruction Cache.
bwang	79:d0b1bb3dcf68	352	* @note This function must be used only when the Instruction Cache is disabled.
bwang	79:d0b1bb3dcf68	353	* @param None
bwang	79:d0b1bb3dcf68	354	* @retval None
bwang	79:d0b1bb3dcf68	355	*/
bwang	79:d0b1bb3dcf68	356	void FLASH_InstructionCacheReset(void)
bwang	79:d0b1bb3dcf68	357	{
bwang	79:d0b1bb3dcf68	358	FLASH->ACR \|= FLASH_ACR_ICRST;
bwang	79:d0b1bb3dcf68	359	}
bwang	79:d0b1bb3dcf68	360
bwang	79:d0b1bb3dcf68	361	/**
bwang	79:d0b1bb3dcf68	362	* @brief Resets the Data Cache.
bwang	79:d0b1bb3dcf68	363	* @note This function must be used only when the Data Cache is disabled.
bwang	79:d0b1bb3dcf68	364	* @param None
bwang	79:d0b1bb3dcf68	365	* @retval None
bwang	79:d0b1bb3dcf68	366	*/
bwang	79:d0b1bb3dcf68	367	void FLASH_DataCacheReset(void)
bwang	79:d0b1bb3dcf68	368	{
bwang	79:d0b1bb3dcf68	369	FLASH->ACR \|= FLASH_ACR_DCRST;
bwang	79:d0b1bb3dcf68	370	}
bwang	79:d0b1bb3dcf68	371
bwang	79:d0b1bb3dcf68	372	/**
bwang	79:d0b1bb3dcf68	373	* @}
bwang	79:d0b1bb3dcf68	374	*/
bwang	79:d0b1bb3dcf68	375
bwang	79:d0b1bb3dcf68	376	/** @defgroup FLASH_Group2 FLASH Memory Programming functions
bwang	79:d0b1bb3dcf68	377	* @brief FLASH Memory Programming functions
bwang	79:d0b1bb3dcf68	378	*
bwang	79:d0b1bb3dcf68	379	@verbatim
bwang	79:d0b1bb3dcf68	380	===============================================================================
bwang	79:d0b1bb3dcf68	381	##### FLASH Memory Programming functions #####
bwang	79:d0b1bb3dcf68	382	===============================================================================
bwang	79:d0b1bb3dcf68	383	[..]
bwang	79:d0b1bb3dcf68	384	This group includes the following functions:
bwang	79:d0b1bb3dcf68	385	(+) void FLASH_Unlock(void)
bwang	79:d0b1bb3dcf68	386	(+) void FLASH_Lock(void)
bwang	79:d0b1bb3dcf68	387	(+) FLASH_Status FLASH_EraseSector(uint32_t FLASH_Sector, uint8_t VoltageRange)
bwang	79:d0b1bb3dcf68	388	(+) FLASH_Status FLASH_EraseAllSectors(uint8_t VoltageRange)
bwang	79:d0b1bb3dcf68	389	(+) FLASH_Status FLASH_ProgramDoubleWord(uint32_t Address, uint64_t Data)
bwang	79:d0b1bb3dcf68	390	(+) FLASH_Status FLASH_ProgramWord(uint32_t Address, uint32_t Data)
bwang	79:d0b1bb3dcf68	391	(+) FLASH_Status FLASH_ProgramHalfWord(uint32_t Address, uint16_t Data)
bwang	79:d0b1bb3dcf68	392	(+) FLASH_Status FLASH_ProgramByte(uint32_t Address, uint8_t Data)
bwang	79:d0b1bb3dcf68	393	The following functions can be used only for STM32F42xxx/43xxx devices.
bwang	79:d0b1bb3dcf68	394	(+) FLASH_Status FLASH_EraseAllBank1Sectors(uint8_t VoltageRange)
bwang	79:d0b1bb3dcf68	395	(+) FLASH_Status FLASH_EraseAllBank2Sectors(uint8_t VoltageRange)
bwang	79:d0b1bb3dcf68	396	[..]
bwang	79:d0b1bb3dcf68	397	Any operation of erase or program should follow these steps:
bwang	79:d0b1bb3dcf68	398	(#) Call the FLASH_Unlock() function to enable the FLASH control register access
bwang	79:d0b1bb3dcf68	399
bwang	79:d0b1bb3dcf68	400	(#) Call the desired function to erase sector(s) or program data
bwang	79:d0b1bb3dcf68	401
bwang	79:d0b1bb3dcf68	402	(#) Call the FLASH_Lock() function to disable the FLASH control register access
bwang	79:d0b1bb3dcf68	403	(recommended to protect the FLASH memory against possible unwanted operation)
bwang	79:d0b1bb3dcf68	404
bwang	79:d0b1bb3dcf68	405	@endverbatim
bwang	79:d0b1bb3dcf68	406	* @{
bwang	79:d0b1bb3dcf68	407	*/
bwang	79:d0b1bb3dcf68	408
bwang	79:d0b1bb3dcf68	409	/**
bwang	79:d0b1bb3dcf68	410	* @brief Unlocks the FLASH control register access
bwang	79:d0b1bb3dcf68	411	* @param None
bwang	79:d0b1bb3dcf68	412	* @retval None
bwang	79:d0b1bb3dcf68	413	*/
bwang	79:d0b1bb3dcf68	414	void FLASH_Unlock(void)
bwang	79:d0b1bb3dcf68	415	{
bwang	79:d0b1bb3dcf68	416	if((FLASH->CR & FLASH_CR_LOCK) != RESET)
bwang	79:d0b1bb3dcf68	417	{
bwang	79:d0b1bb3dcf68	418	/* Authorize the FLASH Registers access */
bwang	79:d0b1bb3dcf68	419	FLASH->KEYR = FLASH_KEY1;
bwang	79:d0b1bb3dcf68	420	FLASH->KEYR = FLASH_KEY2;
bwang	79:d0b1bb3dcf68	421	}
bwang	79:d0b1bb3dcf68	422	}
bwang	79:d0b1bb3dcf68	423
bwang	79:d0b1bb3dcf68	424	/**
bwang	79:d0b1bb3dcf68	425	* @brief Locks the FLASH control register access
bwang	79:d0b1bb3dcf68	426	* @param None
bwang	79:d0b1bb3dcf68	427	* @retval None
bwang	79:d0b1bb3dcf68	428	*/
bwang	79:d0b1bb3dcf68	429	void FLASH_Lock(void)
bwang	79:d0b1bb3dcf68	430	{
bwang	79:d0b1bb3dcf68	431	/* Set the LOCK Bit to lock the FLASH Registers access */
bwang	79:d0b1bb3dcf68	432	FLASH->CR \|= FLASH_CR_LOCK;
bwang	79:d0b1bb3dcf68	433	}
bwang	79:d0b1bb3dcf68	434
bwang	79:d0b1bb3dcf68	435	/**
bwang	79:d0b1bb3dcf68	436	* @brief Erases a specified FLASH Sector.
bwang	79:d0b1bb3dcf68	437	*
bwang	79:d0b1bb3dcf68	438	* @note If an erase and a program operations are requested simultaneously,
bwang	79:d0b1bb3dcf68	439	* the erase operation is performed before the program one.
bwang	79:d0b1bb3dcf68	440	*
bwang	79:d0b1bb3dcf68	441	* @param FLASH_Sector: The Sector number to be erased.
bwang	79:d0b1bb3dcf68	442	*
bwang	79:d0b1bb3dcf68	443	* @note For STM32F405xx/407xx and STM32F415xx/417xx devices this parameter can
bwang	79:d0b1bb3dcf68	444	* be a value between FLASH_Sector_0 and FLASH_Sector_11.
bwang	79:d0b1bb3dcf68	445	*
bwang	79:d0b1bb3dcf68	446	* For STM32F42xxx/43xxx devices this parameter can be a value between
bwang	79:d0b1bb3dcf68	447	* FLASH_Sector_0 and FLASH_Sector_23.
bwang	79:d0b1bb3dcf68	448	*
bwang	79:d0b1bb3dcf68	449	* For STM32F401xx devices this parameter can be a value between
bwang	79:d0b1bb3dcf68	450	* FLASH_Sector_0 and FLASH_Sector_5.
bwang	79:d0b1bb3dcf68	451	*
bwang	79:d0b1bb3dcf68	452	* For STM32F411xE and STM32F412xG devices this parameter can be a value between
bwang	79:d0b1bb3dcf68	453	* FLASH_Sector_0 and FLASH_Sector_7.
bwang	79:d0b1bb3dcf68	454	*
bwang	79:d0b1bb3dcf68	455	* For STM32F410xx devices this parameter can be a value between
bwang	79:d0b1bb3dcf68	456	* FLASH_Sector_0 and FLASH_Sector_4.
bwang	79:d0b1bb3dcf68	457	*
bwang	79:d0b1bb3dcf68	458	* @param VoltageRange: The device voltage range which defines the erase parallelism.
bwang	79:d0b1bb3dcf68	459	* This parameter can be one of the following values:
bwang	79:d0b1bb3dcf68	460	* @arg VoltageRange_1: when the device voltage range is 1.8V to 2.1V,
bwang	79:d0b1bb3dcf68	461	* the operation will be done by byte (8-bit)
bwang	79:d0b1bb3dcf68	462	* @arg VoltageRange_2: when the device voltage range is 2.1V to 2.7V,
bwang	79:d0b1bb3dcf68	463	* the operation will be done by half word (16-bit)
bwang	79:d0b1bb3dcf68	464	* @arg VoltageRange_3: when the device voltage range is 2.7V to 3.6V,
bwang	79:d0b1bb3dcf68	465	* the operation will be done by word (32-bit)
bwang	79:d0b1bb3dcf68	466	* @arg VoltageRange_4: when the device voltage range is 2.7V to 3.6V + External Vpp,
bwang	79:d0b1bb3dcf68	467	* the operation will be done by double word (64-bit)
bwang	79:d0b1bb3dcf68	468	*
bwang	79:d0b1bb3dcf68	469	* @retval FLASH Status: The returned value can be: FLASH_BUSY2, FLASH_ERROR_PROGRAM2,
bwang	79:d0b1bb3dcf68	470	* FLASH_ERROR_WRP2, FLASH_ERROR_OPERATION2 or FLASH_COMPLETE2.
bwang	79:d0b1bb3dcf68	471	*/
bwang	79:d0b1bb3dcf68	472	FLASH_Status FLASH_EraseSector(uint32_t FLASH_Sector, uint8_t VoltageRange)
bwang	79:d0b1bb3dcf68	473	{
bwang	79:d0b1bb3dcf68	474	uint32_t tmp_psize = 0x0;
bwang	79:d0b1bb3dcf68	475	FLASH_Status status = FLASH_COMPLETE2;
bwang	79:d0b1bb3dcf68	476
bwang	79:d0b1bb3dcf68	477	/* Check the parameters */
bwang	79:d0b1bb3dcf68	478	assert_param(IS_FLASH_SECTOR(FLASH_Sector));
bwang	79:d0b1bb3dcf68	479	assert_param(IS_VOLTAGERANGE(VoltageRange));
bwang	79:d0b1bb3dcf68	480
bwang	79:d0b1bb3dcf68	481	if(VoltageRange == VoltageRange_1)
bwang	79:d0b1bb3dcf68	482	{
bwang	79:d0b1bb3dcf68	483	tmp_psize = FLASH_PSIZE_BYTE;
bwang	79:d0b1bb3dcf68	484	}
bwang	79:d0b1bb3dcf68	485	else if(VoltageRange == VoltageRange_2)
bwang	79:d0b1bb3dcf68	486	{
bwang	79:d0b1bb3dcf68	487	tmp_psize = FLASH_PSIZE_HALF_WORD;
bwang	79:d0b1bb3dcf68	488	}
bwang	79:d0b1bb3dcf68	489	else if(VoltageRange == VoltageRange_3)
bwang	79:d0b1bb3dcf68	490	{
bwang	79:d0b1bb3dcf68	491	tmp_psize = FLASH_PSIZE_WORD;
bwang	79:d0b1bb3dcf68	492	}
bwang	79:d0b1bb3dcf68	493	else
bwang	79:d0b1bb3dcf68	494	{
bwang	79:d0b1bb3dcf68	495	tmp_psize = FLASH_PSIZE_DOUBLE_WORD;
bwang	79:d0b1bb3dcf68	496	}
bwang	79:d0b1bb3dcf68	497	/* Wait for last operation to be completed */
bwang	79:d0b1bb3dcf68	498	status = FLASH_WaitForLastOperation2();
bwang	79:d0b1bb3dcf68	499
bwang	79:d0b1bb3dcf68	500	if(status == FLASH_COMPLETE2)
bwang	79:d0b1bb3dcf68	501	{
bwang	79:d0b1bb3dcf68	502	/* if the previous operation is completed, proceed to erase the sector */
bwang	79:d0b1bb3dcf68	503	FLASH->CR &= CR_PSIZE_MASK;
bwang	79:d0b1bb3dcf68	504	FLASH->CR \|= tmp_psize;
bwang	79:d0b1bb3dcf68	505	FLASH->CR &= SECTOR_MASK;
bwang	79:d0b1bb3dcf68	506	FLASH->CR \|= FLASH_CR_SER \| FLASH_Sector;
bwang	79:d0b1bb3dcf68	507	FLASH->CR \|= FLASH_CR_STRT;
bwang	79:d0b1bb3dcf68	508
bwang	79:d0b1bb3dcf68	509	/* Wait for last operation to be completed */
bwang	79:d0b1bb3dcf68	510	status = FLASH_WaitForLastOperation2();
bwang	79:d0b1bb3dcf68	511
bwang	79:d0b1bb3dcf68	512	/* if the erase operation is completed, disable the SER Bit */
bwang	79:d0b1bb3dcf68	513	FLASH->CR &= (~FLASH_CR_SER);
bwang	79:d0b1bb3dcf68	514	FLASH->CR &= SECTOR_MASK;
bwang	79:d0b1bb3dcf68	515	}
bwang	79:d0b1bb3dcf68	516	/* Return the Erase Status */
bwang	79:d0b1bb3dcf68	517	return status;
bwang	79:d0b1bb3dcf68	518	}
bwang	79:d0b1bb3dcf68	519
bwang	79:d0b1bb3dcf68	520	/**
bwang	79:d0b1bb3dcf68	521	* @brief Erases all FLASH Sectors.
bwang	79:d0b1bb3dcf68	522	*
bwang	79:d0b1bb3dcf68	523	* @note If an erase and a program operations are requested simultaneously,
bwang	79:d0b1bb3dcf68	524	* the erase operation is performed before the program one.
bwang	79:d0b1bb3dcf68	525	*
bwang	79:d0b1bb3dcf68	526	* @param VoltageRange: The device voltage range which defines the erase parallelism.
bwang	79:d0b1bb3dcf68	527	* This parameter can be one of the following values:
bwang	79:d0b1bb3dcf68	528	* @arg VoltageRange_1: when the device voltage range is 1.8V to 2.1V,
bwang	79:d0b1bb3dcf68	529	* the operation will be done by byte (8-bit)
bwang	79:d0b1bb3dcf68	530	* @arg VoltageRange_2: when the device voltage range is 2.1V to 2.7V,
bwang	79:d0b1bb3dcf68	531	* the operation will be done by half word (16-bit)
bwang	79:d0b1bb3dcf68	532	* @arg VoltageRange_3: when the device voltage range is 2.7V to 3.6V,
bwang	79:d0b1bb3dcf68	533	* the operation will be done by word (32-bit)
bwang	79:d0b1bb3dcf68	534	* @arg VoltageRange_4: when the device voltage range is 2.7V to 3.6V + External Vpp,
bwang	79:d0b1bb3dcf68	535	* the operation will be done by double word (64-bit)
bwang	79:d0b1bb3dcf68	536	*
bwang	79:d0b1bb3dcf68	537	* @retval FLASH Status: The returned value can be: FLASH_BUSY2, FLASH_ERROR_PROGRAM2,
bwang	79:d0b1bb3dcf68	538	* FLASH_ERROR_WRP2, FLASH_ERROR_OPERATION2 or FLASH_COMPLETE2.
bwang	79:d0b1bb3dcf68	539	*/
bwang	79:d0b1bb3dcf68	540	FLASH_Status FLASH_EraseAllSectors(uint8_t VoltageRange)
bwang	79:d0b1bb3dcf68	541	{
bwang	79:d0b1bb3dcf68	542	uint32_t tmp_psize = 0x0;
bwang	79:d0b1bb3dcf68	543	FLASH_Status status = FLASH_COMPLETE2;
bwang	79:d0b1bb3dcf68	544
bwang	79:d0b1bb3dcf68	545	/* Wait for last operation to be completed */
bwang	79:d0b1bb3dcf68	546	status = FLASH_WaitForLastOperation2();
bwang	79:d0b1bb3dcf68	547	assert_param(IS_VOLTAGERANGE(VoltageRange));
bwang	79:d0b1bb3dcf68	548
bwang	79:d0b1bb3dcf68	549	if(VoltageRange == VoltageRange_1)
bwang	79:d0b1bb3dcf68	550	{
bwang	79:d0b1bb3dcf68	551	tmp_psize = FLASH_PSIZE_BYTE;
bwang	79:d0b1bb3dcf68	552	}
bwang	79:d0b1bb3dcf68	553	else if(VoltageRange == VoltageRange_2)
bwang	79:d0b1bb3dcf68	554	{
bwang	79:d0b1bb3dcf68	555	tmp_psize = FLASH_PSIZE_HALF_WORD;
bwang	79:d0b1bb3dcf68	556	}
bwang	79:d0b1bb3dcf68	557	else if(VoltageRange == VoltageRange_3)
bwang	79:d0b1bb3dcf68	558	{
bwang	79:d0b1bb3dcf68	559	tmp_psize = FLASH_PSIZE_WORD;
bwang	79:d0b1bb3dcf68	560	}
bwang	79:d0b1bb3dcf68	561	else
bwang	79:d0b1bb3dcf68	562	{
bwang	79:d0b1bb3dcf68	563	tmp_psize = FLASH_PSIZE_DOUBLE_WORD;
bwang	79:d0b1bb3dcf68	564	}
bwang	79:d0b1bb3dcf68	565	if(status == FLASH_COMPLETE2)
bwang	79:d0b1bb3dcf68	566	{
bwang	79:d0b1bb3dcf68	567	/* if the previous operation is completed, proceed to erase all sectors */
bwang	79:d0b1bb3dcf68	568	#if defined(STM32F427_437xx) \|\| defined(STM32F429_439xx) \|\| defined(STM32F469_479xx)
bwang	79:d0b1bb3dcf68	569	FLASH->CR &= CR_PSIZE_MASK;
bwang	79:d0b1bb3dcf68	570	FLASH->CR \|= tmp_psize;
bwang	79:d0b1bb3dcf68	571	FLASH->CR \|= (FLASH_CR_MER1 \| FLASH_CR_MER2);
bwang	79:d0b1bb3dcf68	572	FLASH->CR \|= FLASH_CR_STRT;
bwang	79:d0b1bb3dcf68	573
bwang	79:d0b1bb3dcf68	574	/* Wait for last operation to be completed */
bwang	79:d0b1bb3dcf68	575	status = FLASH_WaitForLastOperation2();
bwang	79:d0b1bb3dcf68	576
bwang	79:d0b1bb3dcf68	577	/* if the erase operation is completed, disable the MER Bit */
bwang	79:d0b1bb3dcf68	578	FLASH->CR &= ~(FLASH_CR_MER1 \| FLASH_CR_MER2);
bwang	79:d0b1bb3dcf68	579	#endif /* STM32F427_437xx \|\| STM32F429_439xx \|\| STM32F469_479xx */
bwang	79:d0b1bb3dcf68	580
bwang	79:d0b1bb3dcf68	581	#if defined(STM32F40_41xxx) \|\| defined(STM32F401xx) \|\| defined(STM32F410xx) \|\| defined(STM32F411xE) \|\| defined(STM32F412xG) \|\| defined(STM32F446xx)
bwang	79:d0b1bb3dcf68	582	FLASH->CR &= CR_PSIZE_MASK;
bwang	79:d0b1bb3dcf68	583	FLASH->CR \|= tmp_psize;
bwang	79:d0b1bb3dcf68	584	FLASH->CR \|= FLASH_CR_MER;
bwang	79:d0b1bb3dcf68	585	FLASH->CR \|= FLASH_CR_STRT;
bwang	79:d0b1bb3dcf68	586
bwang	79:d0b1bb3dcf68	587	/* Wait for last operation to be completed */
bwang	79:d0b1bb3dcf68	588	status = FLASH_WaitForLastOperation2();
bwang	79:d0b1bb3dcf68	589
bwang	79:d0b1bb3dcf68	590	/* if the erase operation is completed, disable the MER Bit */
bwang	79:d0b1bb3dcf68	591	FLASH->CR &= (~FLASH_CR_MER);
bwang	79:d0b1bb3dcf68	592	#endif /* STM32F40_41xxx \|\| STM32F401xx \|\| STM32F410xx \|\| STM32F411xE \|\| STM32F412xG \|\| STM32F446xx */
bwang	79:d0b1bb3dcf68	593
bwang	79:d0b1bb3dcf68	594	}
bwang	79:d0b1bb3dcf68	595	/* Return the Erase Status */
bwang	79:d0b1bb3dcf68	596	return status;
bwang	79:d0b1bb3dcf68	597	}
bwang	79:d0b1bb3dcf68	598
bwang	79:d0b1bb3dcf68	599	/**
bwang	79:d0b1bb3dcf68	600	* @brief Erases all FLASH Sectors in Bank 1.
bwang	79:d0b1bb3dcf68	601	*
bwang	79:d0b1bb3dcf68	602	* @note This function can be used only for STM32F42xxx/43xxx devices.
bwang	79:d0b1bb3dcf68	603	*
bwang	79:d0b1bb3dcf68	604	* @note If an erase and a program operations are requested simultaneously,
bwang	79:d0b1bb3dcf68	605	* the erase operation is performed before the program one.
bwang	79:d0b1bb3dcf68	606	*
bwang	79:d0b1bb3dcf68	607	* @param VoltageRange: The device voltage range which defines the erase parallelism.
bwang	79:d0b1bb3dcf68	608	* This parameter can be one of the following values:
bwang	79:d0b1bb3dcf68	609	* @arg VoltageRange_1: when the device voltage range is 1.8V to 2.1V,
bwang	79:d0b1bb3dcf68	610	* the operation will be done by byte (8-bit)
bwang	79:d0b1bb3dcf68	611	* @arg VoltageRange_2: when the device voltage range is 2.1V to 2.7V,
bwang	79:d0b1bb3dcf68	612	* the operation will be done by half word (16-bit)
bwang	79:d0b1bb3dcf68	613	* @arg VoltageRange_3: when the device voltage range is 2.7V to 3.6V,
bwang	79:d0b1bb3dcf68	614	* the operation will be done by word (32-bit)
bwang	79:d0b1bb3dcf68	615	* @arg VoltageRange_4: when the device voltage range is 2.7V to 3.6V + External Vpp,
bwang	79:d0b1bb3dcf68	616	* the operation will be done by double word (64-bit)
bwang	79:d0b1bb3dcf68	617	*
bwang	79:d0b1bb3dcf68	618	* @retval FLASH Status: The returned value can be: FLASH_BUSY2, FLASH_ERROR_PROGRAM2,
bwang	79:d0b1bb3dcf68	619	* FLASH_ERROR_WRP2, FLASH_ERROR_OPERATION2 or FLASH_COMPLETE2.
bwang	79:d0b1bb3dcf68	620	*/
bwang	79:d0b1bb3dcf68	621	FLASH_Status FLASH_EraseAllBank1Sectors(uint8_t VoltageRange)
bwang	79:d0b1bb3dcf68	622	{
bwang	79:d0b1bb3dcf68	623	uint32_t tmp_psize = 0x0;
bwang	79:d0b1bb3dcf68	624	FLASH_Status status = FLASH_COMPLETE2;
bwang	79:d0b1bb3dcf68	625
bwang	79:d0b1bb3dcf68	626	/* Wait for last operation to be completed */
bwang	79:d0b1bb3dcf68	627	status = FLASH_WaitForLastOperation2();
bwang	79:d0b1bb3dcf68	628	assert_param(IS_VOLTAGERANGE(VoltageRange));
bwang	79:d0b1bb3dcf68	629
bwang	79:d0b1bb3dcf68	630	if(VoltageRange == VoltageRange_1)
bwang	79:d0b1bb3dcf68	631	{
bwang	79:d0b1bb3dcf68	632	tmp_psize = FLASH_PSIZE_BYTE;
bwang	79:d0b1bb3dcf68	633	}
bwang	79:d0b1bb3dcf68	634	else if(VoltageRange == VoltageRange_2)
bwang	79:d0b1bb3dcf68	635	{
bwang	79:d0b1bb3dcf68	636	tmp_psize = FLASH_PSIZE_HALF_WORD;
bwang	79:d0b1bb3dcf68	637	}
bwang	79:d0b1bb3dcf68	638	else if(VoltageRange == VoltageRange_3)
bwang	79:d0b1bb3dcf68	639	{
bwang	79:d0b1bb3dcf68	640	tmp_psize = FLASH_PSIZE_WORD;
bwang	79:d0b1bb3dcf68	641	}
bwang	79:d0b1bb3dcf68	642	else
bwang	79:d0b1bb3dcf68	643	{
bwang	79:d0b1bb3dcf68	644	tmp_psize = FLASH_PSIZE_DOUBLE_WORD;
bwang	79:d0b1bb3dcf68	645	}
bwang	79:d0b1bb3dcf68	646	if(status == FLASH_COMPLETE2)
bwang	79:d0b1bb3dcf68	647	{
bwang	79:d0b1bb3dcf68	648	/* if the previous operation is completed, proceed to erase all sectors */
bwang	79:d0b1bb3dcf68	649	FLASH->CR &= CR_PSIZE_MASK;
bwang	79:d0b1bb3dcf68	650	FLASH->CR \|= tmp_psize;
bwang	79:d0b1bb3dcf68	651	FLASH->CR \|= FLASH_CR_MER1;
bwang	79:d0b1bb3dcf68	652	FLASH->CR \|= FLASH_CR_STRT;
bwang	79:d0b1bb3dcf68	653
bwang	79:d0b1bb3dcf68	654	/* Wait for last operation to be completed */
bwang	79:d0b1bb3dcf68	655	status = FLASH_WaitForLastOperation2();
bwang	79:d0b1bb3dcf68	656
bwang	79:d0b1bb3dcf68	657	/* if the erase operation is completed, disable the MER Bit */
bwang	79:d0b1bb3dcf68	658	FLASH->CR &= (~FLASH_CR_MER1);
bwang	79:d0b1bb3dcf68	659
bwang	79:d0b1bb3dcf68	660	}
bwang	79:d0b1bb3dcf68	661	/* Return the Erase Status */
bwang	79:d0b1bb3dcf68	662	return status;
bwang	79:d0b1bb3dcf68	663	}
bwang	79:d0b1bb3dcf68	664
bwang	79:d0b1bb3dcf68	665
bwang	79:d0b1bb3dcf68	666	/**
bwang	79:d0b1bb3dcf68	667	* @brief Erases all FLASH Sectors in Bank 2.
bwang	79:d0b1bb3dcf68	668	*
bwang	79:d0b1bb3dcf68	669	* @note This function can be used only for STM32F42xxx/43xxx devices.
bwang	79:d0b1bb3dcf68	670	*
bwang	79:d0b1bb3dcf68	671	* @note If an erase and a program operations are requested simultaneously,
bwang	79:d0b1bb3dcf68	672	* the erase operation is performed before the program one.
bwang	79:d0b1bb3dcf68	673	*
bwang	79:d0b1bb3dcf68	674	* @param VoltageRange: The device voltage range which defines the erase parallelism.
bwang	79:d0b1bb3dcf68	675	* This parameter can be one of the following values:
bwang	79:d0b1bb3dcf68	676	* @arg VoltageRange_1: when the device voltage range is 1.8V to 2.1V,
bwang	79:d0b1bb3dcf68	677	* the operation will be done by byte (8-bit)
bwang	79:d0b1bb3dcf68	678	* @arg VoltageRange_2: when the device voltage range is 2.1V to 2.7V,
bwang	79:d0b1bb3dcf68	679	* the operation will be done by half word (16-bit)
bwang	79:d0b1bb3dcf68	680	* @arg VoltageRange_3: when the device voltage range is 2.7V to 3.6V,
bwang	79:d0b1bb3dcf68	681	* the operation will be done by word (32-bit)
bwang	79:d0b1bb3dcf68	682	* @arg VoltageRange_4: when the device voltage range is 2.7V to 3.6V + External Vpp,
bwang	79:d0b1bb3dcf68	683	* the operation will be done by double word (64-bit)
bwang	79:d0b1bb3dcf68	684	*
bwang	79:d0b1bb3dcf68	685	* @retval FLASH Status: The returned value can be: FLASH_BUSY2, FLASH_ERROR_PROGRAM2,
bwang	79:d0b1bb3dcf68	686	* FLASH_ERROR_WRP2, FLASH_ERROR_OPERATION2 or FLASH_COMPLETE2.
bwang	79:d0b1bb3dcf68	687	*/
bwang	79:d0b1bb3dcf68	688	FLASH_Status FLASH_EraseAllBank2Sectors(uint8_t VoltageRange)
bwang	79:d0b1bb3dcf68	689	{
bwang	79:d0b1bb3dcf68	690	uint32_t tmp_psize = 0x0;
bwang	79:d0b1bb3dcf68	691	FLASH_Status status = FLASH_COMPLETE2;
bwang	79:d0b1bb3dcf68	692
bwang	79:d0b1bb3dcf68	693	/* Wait for last operation to be completed */
bwang	79:d0b1bb3dcf68	694	status = FLASH_WaitForLastOperation2();
bwang	79:d0b1bb3dcf68	695	assert_param(IS_VOLTAGERANGE(VoltageRange));
bwang	79:d0b1bb3dcf68	696
bwang	79:d0b1bb3dcf68	697	if(VoltageRange == VoltageRange_1)
bwang	79:d0b1bb3dcf68	698	{
bwang	79:d0b1bb3dcf68	699	tmp_psize = FLASH_PSIZE_BYTE;
bwang	79:d0b1bb3dcf68	700	}
bwang	79:d0b1bb3dcf68	701	else if(VoltageRange == VoltageRange_2)
bwang	79:d0b1bb3dcf68	702	{
bwang	79:d0b1bb3dcf68	703	tmp_psize = FLASH_PSIZE_HALF_WORD;
bwang	79:d0b1bb3dcf68	704	}
bwang	79:d0b1bb3dcf68	705	else if(VoltageRange == VoltageRange_3)
bwang	79:d0b1bb3dcf68	706	{
bwang	79:d0b1bb3dcf68	707	tmp_psize = FLASH_PSIZE_WORD;
bwang	79:d0b1bb3dcf68	708	}
bwang	79:d0b1bb3dcf68	709	else
bwang	79:d0b1bb3dcf68	710	{
bwang	79:d0b1bb3dcf68	711	tmp_psize = FLASH_PSIZE_DOUBLE_WORD;
bwang	79:d0b1bb3dcf68	712	}
bwang	79:d0b1bb3dcf68	713	if(status == FLASH_COMPLETE2)
bwang	79:d0b1bb3dcf68	714	{
bwang	79:d0b1bb3dcf68	715	/* if the previous operation is completed, proceed to erase all sectors */
bwang	79:d0b1bb3dcf68	716	FLASH->CR &= CR_PSIZE_MASK;
bwang	79:d0b1bb3dcf68	717	FLASH->CR \|= tmp_psize;
bwang	79:d0b1bb3dcf68	718	FLASH->CR \|= FLASH_CR_MER2;
bwang	79:d0b1bb3dcf68	719	FLASH->CR \|= FLASH_CR_STRT;
bwang	79:d0b1bb3dcf68	720
bwang	79:d0b1bb3dcf68	721	/* Wait for last operation to be completed */
bwang	79:d0b1bb3dcf68	722	status = FLASH_WaitForLastOperation2();
bwang	79:d0b1bb3dcf68	723
bwang	79:d0b1bb3dcf68	724	/* if the erase operation is completed, disable the MER Bit */
bwang	79:d0b1bb3dcf68	725	FLASH->CR &= (~FLASH_CR_MER2);
bwang	79:d0b1bb3dcf68	726
bwang	79:d0b1bb3dcf68	727	}
bwang	79:d0b1bb3dcf68	728	/* Return the Erase Status */
bwang	79:d0b1bb3dcf68	729	return status;
bwang	79:d0b1bb3dcf68	730	}
bwang	79:d0b1bb3dcf68	731
bwang	79:d0b1bb3dcf68	732	/**
bwang	79:d0b1bb3dcf68	733	* @brief Programs a double word (64-bit) at a specified address.
bwang	79:d0b1bb3dcf68	734	* @note This function must be used when the device voltage range is from
bwang	79:d0b1bb3dcf68	735	* 2.7V to 3.6V and an External Vpp is present.
bwang	79:d0b1bb3dcf68	736	*
bwang	79:d0b1bb3dcf68	737	* @note If an erase and a program operations are requested simultaneously,
bwang	79:d0b1bb3dcf68	738	* the erase operation is performed before the program one.
bwang	79:d0b1bb3dcf68	739	*
bwang	79:d0b1bb3dcf68	740	* @param Address: specifies the address to be programmed.
bwang	79:d0b1bb3dcf68	741	* @param Data: specifies the data to be programmed.
bwang	79:d0b1bb3dcf68	742	* @retval FLASH Status: The returned value can be: FLASH_BUSY2, FLASH_ERROR_PROGRAM2,
bwang	79:d0b1bb3dcf68	743	* FLASH_ERROR_WRP2, FLASH_ERROR_OPERATION2 or FLASH_COMPLETE2.
bwang	79:d0b1bb3dcf68	744	*/
bwang	79:d0b1bb3dcf68	745	FLASH_Status FLASH_ProgramDoubleWord(uint32_t Address, uint64_t Data)
bwang	79:d0b1bb3dcf68	746	{
bwang	79:d0b1bb3dcf68	747	FLASH_Status status = FLASH_COMPLETE2;
bwang	79:d0b1bb3dcf68	748
bwang	79:d0b1bb3dcf68	749	/* Check the parameters */
bwang	79:d0b1bb3dcf68	750	assert_param(IS_FLASH_ADDRESS(Address));
bwang	79:d0b1bb3dcf68	751
bwang	79:d0b1bb3dcf68	752	/* Wait for last operation to be completed */
bwang	79:d0b1bb3dcf68	753	status = FLASH_WaitForLastOperation2();
bwang	79:d0b1bb3dcf68	754
bwang	79:d0b1bb3dcf68	755	if(status == FLASH_COMPLETE2)
bwang	79:d0b1bb3dcf68	756	{
bwang	79:d0b1bb3dcf68	757	/* if the previous operation is completed, proceed to program the new data */
bwang	79:d0b1bb3dcf68	758	FLASH->CR &= CR_PSIZE_MASK;
bwang	79:d0b1bb3dcf68	759	FLASH->CR \|= FLASH_PSIZE_DOUBLE_WORD;
bwang	79:d0b1bb3dcf68	760	FLASH->CR \|= FLASH_CR_PG;
bwang	79:d0b1bb3dcf68	761
bwang	79:d0b1bb3dcf68	762	(__IO uint64_t)Address = Data;
bwang	79:d0b1bb3dcf68	763
bwang	79:d0b1bb3dcf68	764	/* Wait for last operation to be completed */
bwang	79:d0b1bb3dcf68	765	status = FLASH_WaitForLastOperation2();
bwang	79:d0b1bb3dcf68	766
bwang	79:d0b1bb3dcf68	767	/* if the program operation is completed, disable the PG Bit */
bwang	79:d0b1bb3dcf68	768	FLASH->CR &= (~FLASH_CR_PG);
bwang	79:d0b1bb3dcf68	769	}
bwang	79:d0b1bb3dcf68	770	/* Return the Program Status */
bwang	79:d0b1bb3dcf68	771	return status;
bwang	79:d0b1bb3dcf68	772	}
bwang	79:d0b1bb3dcf68	773
bwang	79:d0b1bb3dcf68	774	/**
bwang	79:d0b1bb3dcf68	775	* @brief Programs a word (32-bit) at a specified address.
bwang	79:d0b1bb3dcf68	776	*
bwang	79:d0b1bb3dcf68	777	* @note This function must be used when the device voltage range is from 2.7V to 3.6V.
bwang	79:d0b1bb3dcf68	778	*
bwang	79:d0b1bb3dcf68	779	* @note If an erase and a program operations are requested simultaneously,
bwang	79:d0b1bb3dcf68	780	* the erase operation is performed before the program one.
bwang	79:d0b1bb3dcf68	781	*
bwang	79:d0b1bb3dcf68	782	* @param Address: specifies the address to be programmed.
bwang	79:d0b1bb3dcf68	783	* This parameter can be any address in Program memory zone or in OTP zone.
bwang	79:d0b1bb3dcf68	784	* @param Data: specifies the data to be programmed.
bwang	79:d0b1bb3dcf68	785	* @retval FLASH Status: The returned value can be: FLASH_BUSY2, FLASH_ERROR_PROGRAM2,
bwang	79:d0b1bb3dcf68	786	* FLASH_ERROR_WRP2, FLASH_ERROR_OPERATION2 or FLASH_COMPLETE2.
bwang	79:d0b1bb3dcf68	787	*/
bwang	79:d0b1bb3dcf68	788	FLASH_Status FLASH_ProgramWord(uint32_t Address, uint32_t Data)
bwang	79:d0b1bb3dcf68	789	{
bwang	79:d0b1bb3dcf68	790	FLASH_Status status = FLASH_COMPLETE2;
bwang	79:d0b1bb3dcf68	791
bwang	79:d0b1bb3dcf68	792	/* Check the parameters */
bwang	79:d0b1bb3dcf68	793	assert_param(IS_FLASH_ADDRESS(Address));
bwang	79:d0b1bb3dcf68	794
bwang	79:d0b1bb3dcf68	795	/* Wait for last operation to be completed */
bwang	79:d0b1bb3dcf68	796	status = FLASH_WaitForLastOperation2();
bwang	79:d0b1bb3dcf68	797
bwang	79:d0b1bb3dcf68	798	if(status == FLASH_COMPLETE2)
bwang	79:d0b1bb3dcf68	799	{
bwang	79:d0b1bb3dcf68	800	/* if the previous operation is completed, proceed to program the new data */
bwang	79:d0b1bb3dcf68	801	FLASH->CR &= CR_PSIZE_MASK;
bwang	79:d0b1bb3dcf68	802	FLASH->CR \|= FLASH_PSIZE_WORD;
bwang	79:d0b1bb3dcf68	803	FLASH->CR \|= FLASH_CR_PG;
bwang	79:d0b1bb3dcf68	804
bwang	79:d0b1bb3dcf68	805	(__IO uint32_t)Address = Data;
bwang	79:d0b1bb3dcf68	806
bwang	79:d0b1bb3dcf68	807	/* Wait for last operation to be completed */
bwang	79:d0b1bb3dcf68	808	status = FLASH_WaitForLastOperation2();
bwang	79:d0b1bb3dcf68	809
bwang	79:d0b1bb3dcf68	810	/* if the program operation is completed, disable the PG Bit */
bwang	79:d0b1bb3dcf68	811	FLASH->CR &= (~FLASH_CR_PG);
bwang	79:d0b1bb3dcf68	812	}
bwang	79:d0b1bb3dcf68	813	/* Return the Program Status */
bwang	79:d0b1bb3dcf68	814	return status;
bwang	79:d0b1bb3dcf68	815	}
bwang	79:d0b1bb3dcf68	816
bwang	79:d0b1bb3dcf68	817	/**
bwang	79:d0b1bb3dcf68	818	* @brief Programs a half word (16-bit) at a specified address.
bwang	79:d0b1bb3dcf68	819	* @note This function must be used when the device voltage range is from 2.1V to 3.6V.
bwang	79:d0b1bb3dcf68	820	*
bwang	79:d0b1bb3dcf68	821	* @note If an erase and a program operations are requested simultaneously,
bwang	79:d0b1bb3dcf68	822	* the erase operation is performed before the program one.
bwang	79:d0b1bb3dcf68	823	*
bwang	79:d0b1bb3dcf68	824	* @param Address: specifies the address to be programmed.
bwang	79:d0b1bb3dcf68	825	* This parameter can be any address in Program memory zone or in OTP zone.
bwang	79:d0b1bb3dcf68	826	* @param Data: specifies the data to be programmed.
bwang	79:d0b1bb3dcf68	827	* @retval FLASH Status: The returned value can be: FLASH_BUSY2, FLASH_ERROR_PROGRAM2,
bwang	79:d0b1bb3dcf68	828	* FLASH_ERROR_WRP2, FLASH_ERROR_OPERATION2 or FLASH_COMPLETE2.
bwang	79:d0b1bb3dcf68	829	*/
bwang	79:d0b1bb3dcf68	830	FLASH_Status FLASH_ProgramHalfWord(uint32_t Address, uint16_t Data)
bwang	79:d0b1bb3dcf68	831	{
bwang	79:d0b1bb3dcf68	832	FLASH_Status status = FLASH_COMPLETE2;
bwang	79:d0b1bb3dcf68	833
bwang	79:d0b1bb3dcf68	834	/* Check the parameters */
bwang	79:d0b1bb3dcf68	835	assert_param(IS_FLASH_ADDRESS(Address));
bwang	79:d0b1bb3dcf68	836
bwang	79:d0b1bb3dcf68	837	/* Wait for last operation to be completed */
bwang	79:d0b1bb3dcf68	838	status = FLASH_WaitForLastOperation2();
bwang	79:d0b1bb3dcf68	839
bwang	79:d0b1bb3dcf68	840	if(status == FLASH_COMPLETE2)
bwang	79:d0b1bb3dcf68	841	{
bwang	79:d0b1bb3dcf68	842	/* if the previous operation is completed, proceed to program the new data */
bwang	79:d0b1bb3dcf68	843	FLASH->CR &= CR_PSIZE_MASK;
bwang	79:d0b1bb3dcf68	844	FLASH->CR \|= FLASH_PSIZE_HALF_WORD;
bwang	79:d0b1bb3dcf68	845	FLASH->CR \|= FLASH_CR_PG;
bwang	79:d0b1bb3dcf68	846
bwang	79:d0b1bb3dcf68	847	(__IO uint16_t)Address = Data;
bwang	79:d0b1bb3dcf68	848
bwang	79:d0b1bb3dcf68	849	/* Wait for last operation to be completed */
bwang	79:d0b1bb3dcf68	850	status = FLASH_WaitForLastOperation2();
bwang	79:d0b1bb3dcf68	851
bwang	79:d0b1bb3dcf68	852	/* if the program operation is completed, disable the PG Bit */
bwang	79:d0b1bb3dcf68	853	FLASH->CR &= (~FLASH_CR_PG);
bwang	79:d0b1bb3dcf68	854	}
bwang	79:d0b1bb3dcf68	855	/* Return the Program Status */
bwang	79:d0b1bb3dcf68	856	return status;
bwang	79:d0b1bb3dcf68	857	}
bwang	79:d0b1bb3dcf68	858
bwang	79:d0b1bb3dcf68	859	/**
bwang	79:d0b1bb3dcf68	860	* @brief Programs a byte (8-bit) at a specified address.
bwang	79:d0b1bb3dcf68	861	* @note This function can be used within all the device supply voltage ranges.
bwang	79:d0b1bb3dcf68	862	*
bwang	79:d0b1bb3dcf68	863	* @note If an erase and a program operations are requested simultaneously,
bwang	79:d0b1bb3dcf68	864	* the erase operation is performed before the program one.
bwang	79:d0b1bb3dcf68	865	*
bwang	79:d0b1bb3dcf68	866	* @param Address: specifies the address to be programmed.
bwang	79:d0b1bb3dcf68	867	* This parameter can be any address in Program memory zone or in OTP zone.
bwang	79:d0b1bb3dcf68	868	* @param Data: specifies the data to be programmed.
bwang	79:d0b1bb3dcf68	869	* @retval FLASH Status: The returned value can be: FLASH_BUSY2, FLASH_ERROR_PROGRAM2,
bwang	79:d0b1bb3dcf68	870	* FLASH_ERROR_WRP2, FLASH_ERROR_OPERATION2 or FLASH_COMPLETE2.
bwang	79:d0b1bb3dcf68	871	*/
bwang	79:d0b1bb3dcf68	872	FLASH_Status FLASH_ProgramByte(uint32_t Address, uint8_t Data)
bwang	79:d0b1bb3dcf68	873	{
bwang	79:d0b1bb3dcf68	874	FLASH_Status status = FLASH_COMPLETE2;
bwang	79:d0b1bb3dcf68	875
bwang	79:d0b1bb3dcf68	876	/* Check the parameters */
bwang	79:d0b1bb3dcf68	877	assert_param(IS_FLASH_ADDRESS(Address));
bwang	79:d0b1bb3dcf68	878
bwang	79:d0b1bb3dcf68	879	/* Wait for last operation to be completed */
bwang	79:d0b1bb3dcf68	880	status = FLASH_WaitForLastOperation2();
bwang	79:d0b1bb3dcf68	881
bwang	79:d0b1bb3dcf68	882	if(status == FLASH_COMPLETE2)
bwang	79:d0b1bb3dcf68	883	{
bwang	79:d0b1bb3dcf68	884	/* if the previous operation is completed, proceed to program the new data */
bwang	79:d0b1bb3dcf68	885	FLASH->CR &= CR_PSIZE_MASK;
bwang	79:d0b1bb3dcf68	886	FLASH->CR \|= FLASH_PSIZE_BYTE;
bwang	79:d0b1bb3dcf68	887	FLASH->CR \|= FLASH_CR_PG;
bwang	79:d0b1bb3dcf68	888
bwang	79:d0b1bb3dcf68	889	(__IO uint8_t)Address = Data;
bwang	79:d0b1bb3dcf68	890
bwang	79:d0b1bb3dcf68	891	/* Wait for last operation to be completed */
bwang	79:d0b1bb3dcf68	892	status = FLASH_WaitForLastOperation2();
bwang	79:d0b1bb3dcf68	893
bwang	79:d0b1bb3dcf68	894	/* if the program operation is completed, disable the PG Bit */
bwang	79:d0b1bb3dcf68	895	FLASH->CR &= (~FLASH_CR_PG);
bwang	79:d0b1bb3dcf68	896	}
bwang	79:d0b1bb3dcf68	897
bwang	79:d0b1bb3dcf68	898	/* Return the Program Status */
bwang	79:d0b1bb3dcf68	899	return status;
bwang	79:d0b1bb3dcf68	900	}
bwang	79:d0b1bb3dcf68	901
bwang	79:d0b1bb3dcf68	902	/**
bwang	79:d0b1bb3dcf68	903	* @}
bwang	79:d0b1bb3dcf68	904	*/
bwang	79:d0b1bb3dcf68	905
bwang	79:d0b1bb3dcf68	906	/** @defgroup FLASH_Group3 Option Bytes Programming functions
bwang	79:d0b1bb3dcf68	907	* @brief Option Bytes Programming functions
bwang	79:d0b1bb3dcf68	908	*
bwang	79:d0b1bb3dcf68	909	@verbatim
bwang	79:d0b1bb3dcf68	910	===============================================================================
bwang	79:d0b1bb3dcf68	911	##### Option Bytes Programming functions #####
bwang	79:d0b1bb3dcf68	912	===============================================================================
bwang	79:d0b1bb3dcf68	913	[..]
bwang	79:d0b1bb3dcf68	914	This group includes the following functions:
bwang	79:d0b1bb3dcf68	915	(+) void FLASH_OB_Unlock(void)
bwang	79:d0b1bb3dcf68	916	(+) void FLASH_OB_Lock(void)
bwang	79:d0b1bb3dcf68	917	(+) void FLASH_OB_WRPConfig(uint32_t OB_WRP, FunctionalState NewState)
bwang	79:d0b1bb3dcf68	918	(+) void FLASH_OB_WRP1Config(uint32_t OB_WRP, FunctionalState NewState)
bwang	79:d0b1bb3dcf68	919	(+) void FLASH_OB_PCROPSelectionConfig(uint8_t OB_PCROPSelect)
bwang	79:d0b1bb3dcf68	920	(+) void FLASH_OB_PCROPConfig(uint32_t OB_PCROP, FunctionalState NewState)
bwang	79:d0b1bb3dcf68	921	(+) void FLASH_OB_PCROP1Config(uint32_t OB_PCROP, FunctionalState NewState)
bwang	79:d0b1bb3dcf68	922	(+) void FLASH_OB_RDPConfig(uint8_t OB_RDP)
bwang	79:d0b1bb3dcf68	923	(+) void FLASH_OB_UserConfig(uint8_t OB_IWDG, uint8_t OB_STOP, uint8_t OB_STDBY)
bwang	79:d0b1bb3dcf68	924	(+) void FLASH_OB_BORConfig(uint8_t OB_BOR)
bwang	79:d0b1bb3dcf68	925	(+) FLASH_Status FLASH_ProgramOTP(uint32_t Address, uint32_t Data)
bwang	79:d0b1bb3dcf68	926	(+) FLASH_Status FLASH_OB_Launch(void)
bwang	79:d0b1bb3dcf68	927	(+) uint32_t FLASH_OB_GetUser(void)
bwang	79:d0b1bb3dcf68	928	(+) uint8_t FLASH_OB_GetWRP(void)
bwang	79:d0b1bb3dcf68	929	(+) uint8_t FLASH_OB_GetWRP1(void)
bwang	79:d0b1bb3dcf68	930	(+) uint8_t FLASH_OB_GetPCROP(void)
bwang	79:d0b1bb3dcf68	931	(+) uint8_t FLASH_OB_GetPCROP1(void)
bwang	79:d0b1bb3dcf68	932	(+) uint8_t FLASH_OB_GetRDP(void)
bwang	79:d0b1bb3dcf68	933	(+) uint8_t FLASH_OB_GetBOR(void)
bwang	79:d0b1bb3dcf68	934	[..]
bwang	79:d0b1bb3dcf68	935	The following function can be used only for STM32F42xxx/43xxx devices.
bwang	79:d0b1bb3dcf68	936	(+) void FLASH_OB_BootConfig(uint8_t OB_BOOT)
bwang	79:d0b1bb3dcf68	937	[..]
bwang	79:d0b1bb3dcf68	938	Any operation of erase or program should follow these steps:
bwang	79:d0b1bb3dcf68	939	(#) Call the FLASH_OB_Unlock() function to enable the FLASH option control
bwang	79:d0b1bb3dcf68	940	register access
bwang	79:d0b1bb3dcf68	941
bwang	79:d0b1bb3dcf68	942	(#) Call one or several functions to program the desired Option Bytes:
bwang	79:d0b1bb3dcf68	943	(++) void FLASH_OB_WRPConfig(uint32_t OB_WRP, FunctionalState NewState)
bwang	79:d0b1bb3dcf68	944	=> to Enable/Disable the desired sector write protection
bwang	79:d0b1bb3dcf68	945	(++) void FLASH_OB_RDPConfig(uint8_t OB_RDP) => to set the desired read
bwang	79:d0b1bb3dcf68	946	Protection Level
bwang	79:d0b1bb3dcf68	947	(++) void FLASH_OB_UserConfig(uint8_t OB_IWDG, uint8_t OB_STOP, uint8_t OB_STDBY)
bwang	79:d0b1bb3dcf68	948	=> to configure the user Option Bytes.
bwang	79:d0b1bb3dcf68	949	(++) void FLASH_OB_BORConfig(uint8_t OB_BOR) => to set the BOR Level
bwang	79:d0b1bb3dcf68	950
bwang	79:d0b1bb3dcf68	951	(#) Once all needed Option Bytes to be programmed are correctly written,
bwang	79:d0b1bb3dcf68	952	call the FLASH_OB_Launch() function to launch the Option Bytes
bwang	79:d0b1bb3dcf68	953	programming process.
bwang	79:d0b1bb3dcf68	954
bwang	79:d0b1bb3dcf68	955	-@- When changing the IWDG mode from HW to SW or from SW to HW, a system
bwang	79:d0b1bb3dcf68	956	reset is needed to make the change effective.
bwang	79:d0b1bb3dcf68	957
bwang	79:d0b1bb3dcf68	958	(#) Call the FLASH_OB_Lock() function to disable the FLASH option control
bwang	79:d0b1bb3dcf68	959	register access (recommended to protect the Option Bytes against
bwang	79:d0b1bb3dcf68	960	possible unwanted operations)
bwang	79:d0b1bb3dcf68	961
bwang	79:d0b1bb3dcf68	962	@endverbatim
bwang	79:d0b1bb3dcf68	963	* @{
bwang	79:d0b1bb3dcf68	964	*/
bwang	79:d0b1bb3dcf68	965
bwang	79:d0b1bb3dcf68	966	/**
bwang	79:d0b1bb3dcf68	967	* @brief Unlocks the FLASH Option Control Registers access.
bwang	79:d0b1bb3dcf68	968	* @param None
bwang	79:d0b1bb3dcf68	969	* @retval None
bwang	79:d0b1bb3dcf68	970	*/
bwang	79:d0b1bb3dcf68	971	void FLASH_OB_Unlock(void)
bwang	79:d0b1bb3dcf68	972	{
bwang	79:d0b1bb3dcf68	973	if((FLASH->OPTCR & FLASH_OPTCR_OPTLOCK) != RESET)
bwang	79:d0b1bb3dcf68	974	{
bwang	79:d0b1bb3dcf68	975	/* Authorizes the Option Byte register programming */
bwang	79:d0b1bb3dcf68	976	FLASH->OPTKEYR = FLASH_OPT_KEY1;
bwang	79:d0b1bb3dcf68	977	FLASH->OPTKEYR = FLASH_OPT_KEY2;
bwang	79:d0b1bb3dcf68	978	}
bwang	79:d0b1bb3dcf68	979	}
bwang	79:d0b1bb3dcf68	980
bwang	79:d0b1bb3dcf68	981	/**
bwang	79:d0b1bb3dcf68	982	* @brief Locks the FLASH Option Control Registers access.
bwang	79:d0b1bb3dcf68	983	* @param None
bwang	79:d0b1bb3dcf68	984	* @retval None
bwang	79:d0b1bb3dcf68	985	*/
bwang	79:d0b1bb3dcf68	986	void FLASH_OB_Lock(void)
bwang	79:d0b1bb3dcf68	987	{
bwang	79:d0b1bb3dcf68	988	/* Set the OPTLOCK Bit to lock the FLASH Option Byte Registers access */
bwang	79:d0b1bb3dcf68	989	FLASH->OPTCR \|= FLASH_OPTCR_OPTLOCK;
bwang	79:d0b1bb3dcf68	990	}
bwang	79:d0b1bb3dcf68	991
bwang	79:d0b1bb3dcf68	992	/**
bwang	79:d0b1bb3dcf68	993	* @brief Enables or disables the write protection of the desired sectors, for the first
bwang	79:d0b1bb3dcf68	994	* 1 Mb of the Flash
bwang	79:d0b1bb3dcf68	995	*
bwang	79:d0b1bb3dcf68	996	* @note When the memory read protection level is selected (RDP level = 1),
bwang	79:d0b1bb3dcf68	997	* it is not possible to program or erase the flash sector i if CortexM4
bwang	79:d0b1bb3dcf68	998	* debug features are connected or boot code is executed in RAM, even if nWRPi = 1
bwang	79:d0b1bb3dcf68	999	* @note Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1).
bwang	79:d0b1bb3dcf68	1000	*
bwang	79:d0b1bb3dcf68	1001	* @param OB_WRP: specifies the sector(s) to be write protected or unprotected.
bwang	79:d0b1bb3dcf68	1002	* This parameter can be one of the following values:
bwang	79:d0b1bb3dcf68	1003	* @arg OB_WRP: A value between OB_WRP_Sector0 and OB_WRP_Sector11
bwang	79:d0b1bb3dcf68	1004	* @arg OB_WRP_Sector_All
bwang	79:d0b1bb3dcf68	1005	* @param Newstate: new state of the Write Protection.
bwang	79:d0b1bb3dcf68	1006	* This parameter can be: ENABLE or DISABLE.
bwang	79:d0b1bb3dcf68	1007	* @retval None
bwang	79:d0b1bb3dcf68	1008	*/
bwang	79:d0b1bb3dcf68	1009	void FLASH_OB_WRPConfig(uint32_t OB_WRP, FunctionalState NewState)
bwang	79:d0b1bb3dcf68	1010	{
bwang	79:d0b1bb3dcf68	1011	FLASH_Status status = FLASH_COMPLETE2;
bwang	79:d0b1bb3dcf68	1012
bwang	79:d0b1bb3dcf68	1013	/* Check the parameters */
bwang	79:d0b1bb3dcf68	1014	assert_param(IS_OB_WRP(OB_WRP));
bwang	79:d0b1bb3dcf68	1015	assert_param(IS_FUNCTIONAL_STATE(NewState));
bwang	79:d0b1bb3dcf68	1016
bwang	79:d0b1bb3dcf68	1017	status = FLASH_WaitForLastOperation2();
bwang	79:d0b1bb3dcf68	1018
bwang	79:d0b1bb3dcf68	1019	if(status == FLASH_COMPLETE2)
bwang	79:d0b1bb3dcf68	1020	{
bwang	79:d0b1bb3dcf68	1021	if(NewState != DISABLE)
bwang	79:d0b1bb3dcf68	1022	{
bwang	79:d0b1bb3dcf68	1023	(__IO uint16_t)OPTCR_BYTE2_ADDRESS &= (~OB_WRP);
bwang	79:d0b1bb3dcf68	1024	}
bwang	79:d0b1bb3dcf68	1025	else
bwang	79:d0b1bb3dcf68	1026	{
bwang	79:d0b1bb3dcf68	1027	(__IO uint16_t)OPTCR_BYTE2_ADDRESS \|= (uint16_t)OB_WRP;
bwang	79:d0b1bb3dcf68	1028	}
bwang	79:d0b1bb3dcf68	1029	}
bwang	79:d0b1bb3dcf68	1030	}
bwang	79:d0b1bb3dcf68	1031
bwang	79:d0b1bb3dcf68	1032	/**
bwang	79:d0b1bb3dcf68	1033	* @brief Enables or disables the write protection of the desired sectors, for the second
bwang	79:d0b1bb3dcf68	1034	* 1 Mb of the Flash
bwang	79:d0b1bb3dcf68	1035	*
bwang	79:d0b1bb3dcf68	1036	* @note This function can be used only for STM32F42xxx/43xxx devices.
bwang	79:d0b1bb3dcf68	1037	*
bwang	79:d0b1bb3dcf68	1038	* @note When the memory read out protection is selected (RDP level = 1),
bwang	79:d0b1bb3dcf68	1039	* it is not possible to program or erase the flash sector i if CortexM4
bwang	79:d0b1bb3dcf68	1040	* debug features are connected or boot code is executed in RAM, even if nWRPi = 1
bwang	79:d0b1bb3dcf68	1041	* @note Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1).
bwang	79:d0b1bb3dcf68	1042	*
bwang	79:d0b1bb3dcf68	1043	* @param OB_WRP: specifies the sector(s) to be write protected or unprotected.
bwang	79:d0b1bb3dcf68	1044	* This parameter can be one of the following values:
bwang	79:d0b1bb3dcf68	1045	* @arg OB_WRP: A value between OB_WRP_Sector12 and OB_WRP_Sector23
bwang	79:d0b1bb3dcf68	1046	* @arg OB_WRP_Sector_All
bwang	79:d0b1bb3dcf68	1047	* @param Newstate: new state of the Write Protection.
bwang	79:d0b1bb3dcf68	1048	* This parameter can be: ENABLE or DISABLE.
bwang	79:d0b1bb3dcf68	1049	* @retval None
bwang	79:d0b1bb3dcf68	1050	*/
bwang	79:d0b1bb3dcf68	1051	void FLASH_OB_WRP1Config(uint32_t OB_WRP, FunctionalState NewState)
bwang	79:d0b1bb3dcf68	1052	{
bwang	79:d0b1bb3dcf68	1053	FLASH_Status status = FLASH_COMPLETE2;
bwang	79:d0b1bb3dcf68	1054
bwang	79:d0b1bb3dcf68	1055	/* Check the parameters */
bwang	79:d0b1bb3dcf68	1056	assert_param(IS_OB_WRP(OB_WRP));
bwang	79:d0b1bb3dcf68	1057	assert_param(IS_FUNCTIONAL_STATE(NewState));
bwang	79:d0b1bb3dcf68	1058
bwang	79:d0b1bb3dcf68	1059	status = FLASH_WaitForLastOperation2();
bwang	79:d0b1bb3dcf68	1060
bwang	79:d0b1bb3dcf68	1061	if(status == FLASH_COMPLETE2)
bwang	79:d0b1bb3dcf68	1062	{
bwang	79:d0b1bb3dcf68	1063	if(NewState != DISABLE)
bwang	79:d0b1bb3dcf68	1064	{
bwang	79:d0b1bb3dcf68	1065	(__IO uint16_t)OPTCR1_BYTE2_ADDRESS &= (~OB_WRP);
bwang	79:d0b1bb3dcf68	1066	}
bwang	79:d0b1bb3dcf68	1067	else
bwang	79:d0b1bb3dcf68	1068	{
bwang	79:d0b1bb3dcf68	1069	(__IO uint16_t)OPTCR1_BYTE2_ADDRESS \|= (uint16_t)OB_WRP;
bwang	79:d0b1bb3dcf68	1070	}
bwang	79:d0b1bb3dcf68	1071	}
bwang	79:d0b1bb3dcf68	1072	}
bwang	79:d0b1bb3dcf68	1073
bwang	79:d0b1bb3dcf68	1074	/**
bwang	79:d0b1bb3dcf68	1075	* @brief Select the Protection Mode (SPRMOD).
bwang	79:d0b1bb3dcf68	1076	*
bwang	79:d0b1bb3dcf68	1077	* @note This function can be used only for STM32F42xxx/43xxx and STM32F401xx/411xE devices.
bwang	79:d0b1bb3dcf68	1078	*
bwang	79:d0b1bb3dcf68	1079	* @note After PCROP activation, Option Byte modification is not possible.
bwang	79:d0b1bb3dcf68	1080	* Exception made for the global Read Out Protection modification level (level1 to level0)
bwang	79:d0b1bb3dcf68	1081	* @note Once SPRMOD bit is active unprotection of a protected sector is not possible
bwang	79:d0b1bb3dcf68	1082	*
bwang	79:d0b1bb3dcf68	1083	* @note Read a protected sector will set RDERR Flag and write a protected sector will set WRPERR Flag
bwang	79:d0b1bb3dcf68	1084	*
bwang	79:d0b1bb3dcf68	1085	* @note Some Precautions should be taken when activating the PCROP feature :
bwang	79:d0b1bb3dcf68	1086	* The active value of nWRPi bits is inverted when PCROP mode is active, this means if SPRMOD = 1
bwang	79:d0b1bb3dcf68	1087	* and WRPi = 1 (default value), then the user sector i is read/write protected.
bwang	79:d0b1bb3dcf68	1088	* In order to avoid activation of PCROP Mode for undesired sectors, please follow the
bwang	79:d0b1bb3dcf68	1089	* below safety sequence :
bwang	79:d0b1bb3dcf68	1090	* - Disable PCROP for all Sectors using FLASH_OB_PCROPConfig(OB_PCROP_Sector_All, DISABLE) function
bwang	79:d0b1bb3dcf68	1091	* for Bank1 or FLASH_OB_PCROP1Config(OB_PCROP_Sector_All, DISABLE) function for Bank2
bwang	79:d0b1bb3dcf68	1092	* - Enable PCROP for the desired Sector i using FLASH_OB_PCROPConfig(Sector i, ENABLE) function
bwang	79:d0b1bb3dcf68	1093	* - Activate the PCROP Mode FLASH_OB_PCROPSelectionConfig() function.
bwang	79:d0b1bb3dcf68	1094	*
bwang	79:d0b1bb3dcf68	1095	* @param OB_PCROP: Select the Protection Mode of nWPRi bits
bwang	79:d0b1bb3dcf68	1096	* This parameter can be one of the following values:
bwang	79:d0b1bb3dcf68	1097	* @arg OB_PcROP_Disable: nWRPi control the write protection of respective user sectors.
bwang	79:d0b1bb3dcf68	1098	* @arg OB_PcROP_Enable: nWRPi control the read&write protection (PCROP) of respective user sectors.
bwang	79:d0b1bb3dcf68	1099	* @retval None
bwang	79:d0b1bb3dcf68	1100	*/
bwang	79:d0b1bb3dcf68	1101	void FLASH_OB_PCROPSelectionConfig(uint8_t OB_PcROP)
bwang	79:d0b1bb3dcf68	1102	{
bwang	79:d0b1bb3dcf68	1103	uint8_t optiontmp = 0xFF;
bwang	79:d0b1bb3dcf68	1104
bwang	79:d0b1bb3dcf68	1105	/* Check the parameters */
bwang	79:d0b1bb3dcf68	1106	assert_param(IS_OB_PCROP_SELECT(OB_PcROP));
bwang	79:d0b1bb3dcf68	1107
bwang	79:d0b1bb3dcf68	1108	/* Mask SPRMOD bit */
bwang	79:d0b1bb3dcf68	1109	optiontmp = (uint8_t)(((__IO uint8_t )OPTCR_BYTE3_ADDRESS) & (uint8_t)0x7F);
bwang	79:d0b1bb3dcf68	1110	/* Update Option Byte */
bwang	79:d0b1bb3dcf68	1111	(__IO uint8_t )OPTCR_BYTE3_ADDRESS = (uint8_t)(OB_PcROP \| optiontmp);
bwang	79:d0b1bb3dcf68	1112
bwang	79:d0b1bb3dcf68	1113	}
bwang	79:d0b1bb3dcf68	1114
bwang	79:d0b1bb3dcf68	1115	/**
bwang	79:d0b1bb3dcf68	1116	* @brief Enables or disables the read/write protection (PCROP) of the desired
bwang	79:d0b1bb3dcf68	1117	* sectors, for the first 1 MB of the Flash.
bwang	79:d0b1bb3dcf68	1118	*
bwang	79:d0b1bb3dcf68	1119	* @note This function can be used only for STM32F42xxx/43xxx , STM32F401xx/411xE
bwang	79:d0b1bb3dcf68	1120	* and STM32F412xG devices.
bwang	79:d0b1bb3dcf68	1121	*
bwang	79:d0b1bb3dcf68	1122	* @param OB_PCROP: specifies the sector(s) to be read/write protected or unprotected.
bwang	79:d0b1bb3dcf68	1123	* This parameter can be one of the following values:
bwang	79:d0b1bb3dcf68	1124	* @arg OB_PCROP: A value between OB_PCROP_Sector0 and OB_PCROP_Sector11 for
bwang	79:d0b1bb3dcf68	1125	* STM32F42xxx/43xxx devices and between OB_PCROP_Sector0 and
bwang	79:d0b1bb3dcf68	1126	* OB_PCROP_Sector5 for STM32F401xx/411xE devices.
bwang	79:d0b1bb3dcf68	1127	* @arg OB_PCROP_Sector_All
bwang	79:d0b1bb3dcf68	1128	* @param Newstate: new state of the Write Protection.
bwang	79:d0b1bb3dcf68	1129	* This parameter can be: ENABLE or DISABLE.
bwang	79:d0b1bb3dcf68	1130	* @retval None
bwang	79:d0b1bb3dcf68	1131	*/
bwang	79:d0b1bb3dcf68	1132	void FLASH_OB_PCROPConfig(uint32_t OB_PCROP, FunctionalState NewState)
bwang	79:d0b1bb3dcf68	1133	{
bwang	79:d0b1bb3dcf68	1134	FLASH_Status status = FLASH_COMPLETE2;
bwang	79:d0b1bb3dcf68	1135
bwang	79:d0b1bb3dcf68	1136	/* Check the parameters */
bwang	79:d0b1bb3dcf68	1137	assert_param(IS_OB_PCROP(OB_PCROP));
bwang	79:d0b1bb3dcf68	1138	assert_param(IS_FUNCTIONAL_STATE(NewState));
bwang	79:d0b1bb3dcf68	1139
bwang	79:d0b1bb3dcf68	1140	status = FLASH_WaitForLastOperation2();
bwang	79:d0b1bb3dcf68	1141
bwang	79:d0b1bb3dcf68	1142	if(status == FLASH_COMPLETE2)
bwang	79:d0b1bb3dcf68	1143	{
bwang	79:d0b1bb3dcf68	1144	if(NewState != DISABLE)
bwang	79:d0b1bb3dcf68	1145	{
bwang	79:d0b1bb3dcf68	1146	(__IO uint16_t)OPTCR_BYTE2_ADDRESS \|= (uint16_t)OB_PCROP;
bwang	79:d0b1bb3dcf68	1147	}
bwang	79:d0b1bb3dcf68	1148	else
bwang	79:d0b1bb3dcf68	1149	{
bwang	79:d0b1bb3dcf68	1150	(__IO uint16_t)OPTCR_BYTE2_ADDRESS &= (~OB_PCROP);
bwang	79:d0b1bb3dcf68	1151	}
bwang	79:d0b1bb3dcf68	1152	}
bwang	79:d0b1bb3dcf68	1153	}
bwang	79:d0b1bb3dcf68	1154
bwang	79:d0b1bb3dcf68	1155	/**
bwang	79:d0b1bb3dcf68	1156	* @brief Enables or disables the read/write protection (PCROP) of the desired
bwang	79:d0b1bb3dcf68	1157	* sectors
bwang	79:d0b1bb3dcf68	1158	*
bwang	79:d0b1bb3dcf68	1159	* @note This function can be used only for STM32F42xxx/43xxx devices.
bwang	79:d0b1bb3dcf68	1160	*
bwang	79:d0b1bb3dcf68	1161	* @param OB_PCROP: specifies the sector(s) to be read/write protected or unprotected.
bwang	79:d0b1bb3dcf68	1162	* This parameter can be one of the following values:
bwang	79:d0b1bb3dcf68	1163	* @arg OB_PCROP: A value between OB_PCROP_Sector12 and OB_PCROP_Sector23
bwang	79:d0b1bb3dcf68	1164	* @arg OB_PCROP_Sector_All
bwang	79:d0b1bb3dcf68	1165	* @param Newstate: new state of the Write Protection.
bwang	79:d0b1bb3dcf68	1166	* This parameter can be: ENABLE or DISABLE.
bwang	79:d0b1bb3dcf68	1167	* @retval None
bwang	79:d0b1bb3dcf68	1168	*/
bwang	79:d0b1bb3dcf68	1169	void FLASH_OB_PCROP1Config(uint32_t OB_PCROP, FunctionalState NewState)
bwang	79:d0b1bb3dcf68	1170	{
bwang	79:d0b1bb3dcf68	1171	FLASH_Status status = FLASH_COMPLETE2;
bwang	79:d0b1bb3dcf68	1172
bwang	79:d0b1bb3dcf68	1173	/* Check the parameters */
bwang	79:d0b1bb3dcf68	1174	assert_param(IS_OB_PCROP(OB_PCROP));
bwang	79:d0b1bb3dcf68	1175	assert_param(IS_FUNCTIONAL_STATE(NewState));
bwang	79:d0b1bb3dcf68	1176
bwang	79:d0b1bb3dcf68	1177	status = FLASH_WaitForLastOperation2();
bwang	79:d0b1bb3dcf68	1178
bwang	79:d0b1bb3dcf68	1179	if(status == FLASH_COMPLETE2)
bwang	79:d0b1bb3dcf68	1180	{
bwang	79:d0b1bb3dcf68	1181	if(NewState != DISABLE)
bwang	79:d0b1bb3dcf68	1182	{
bwang	79:d0b1bb3dcf68	1183	(__IO uint16_t)OPTCR1_BYTE2_ADDRESS \|= (uint16_t)OB_PCROP;
bwang	79:d0b1bb3dcf68	1184	}
bwang	79:d0b1bb3dcf68	1185	else
bwang	79:d0b1bb3dcf68	1186	{
bwang	79:d0b1bb3dcf68	1187	(__IO uint16_t)OPTCR1_BYTE2_ADDRESS &= (~OB_PCROP);
bwang	79:d0b1bb3dcf68	1188	}
bwang	79:d0b1bb3dcf68	1189	}
bwang	79:d0b1bb3dcf68	1190	}
bwang	79:d0b1bb3dcf68	1191
bwang	79:d0b1bb3dcf68	1192
bwang	79:d0b1bb3dcf68	1193	/**
bwang	79:d0b1bb3dcf68	1194	* @brief Sets the read protection level.
bwang	79:d0b1bb3dcf68	1195	* @param OB_RDP: specifies the read protection level.
bwang	79:d0b1bb3dcf68	1196	* This parameter can be one of the following values:
bwang	79:d0b1bb3dcf68	1197	* @arg OB_RDP_Level_0: No protection
bwang	79:d0b1bb3dcf68	1198	* @arg OB_RDP_Level_1: Read protection of the memory
bwang	79:d0b1bb3dcf68	1199	* @arg OB_RDP_Level_2: Full chip protection
bwang	79:d0b1bb3dcf68	1200	*
bwang	79:d0b1bb3dcf68	1201	* /!\ Warning /!\ When enabling OB_RDP level 2 it's no more possible to go back to level 1 or 0
bwang	79:d0b1bb3dcf68	1202	*
bwang	79:d0b1bb3dcf68	1203	* @retval None
bwang	79:d0b1bb3dcf68	1204	*/
bwang	79:d0b1bb3dcf68	1205	void FLASH_OB_RDPConfig(uint8_t OB_RDP)
bwang	79:d0b1bb3dcf68	1206	{
bwang	79:d0b1bb3dcf68	1207	FLASH_Status status = FLASH_COMPLETE2;
bwang	79:d0b1bb3dcf68	1208
bwang	79:d0b1bb3dcf68	1209	/* Check the parameters */
bwang	79:d0b1bb3dcf68	1210	assert_param(IS_OB_RDP(OB_RDP));
bwang	79:d0b1bb3dcf68	1211
bwang	79:d0b1bb3dcf68	1212	status = FLASH_WaitForLastOperation2();
bwang	79:d0b1bb3dcf68	1213
bwang	79:d0b1bb3dcf68	1214	if(status == FLASH_COMPLETE2)
bwang	79:d0b1bb3dcf68	1215	{
bwang	79:d0b1bb3dcf68	1216	(__IO uint8_t)OPTCR_BYTE1_ADDRESS = OB_RDP;
bwang	79:d0b1bb3dcf68	1217
bwang	79:d0b1bb3dcf68	1218	}
bwang	79:d0b1bb3dcf68	1219	}
bwang	79:d0b1bb3dcf68	1220
bwang	79:d0b1bb3dcf68	1221	/**
bwang	79:d0b1bb3dcf68	1222	* @brief Programs the FLASH User Option Byte: IWDG_SW / RST_STOP / RST_STDBY.
bwang	79:d0b1bb3dcf68	1223	* @param OB_IWDG: Selects the IWDG mode
bwang	79:d0b1bb3dcf68	1224	* This parameter can be one of the following values:
bwang	79:d0b1bb3dcf68	1225	* @arg OB_IWDG_SW: Software IWDG selected
bwang	79:d0b1bb3dcf68	1226	* @arg OB_IWDG_HW: Hardware IWDG selected
bwang	79:d0b1bb3dcf68	1227	* @param OB_STOP: Reset event when entering STOP mode.
bwang	79:d0b1bb3dcf68	1228	* This parameter can be one of the following values:
bwang	79:d0b1bb3dcf68	1229	* @arg OB_STOP_NoRST: No reset generated when entering in STOP
bwang	79:d0b1bb3dcf68	1230	* @arg OB_STOP_RST: Reset generated when entering in STOP
bwang	79:d0b1bb3dcf68	1231	* @param OB_STDBY: Reset event when entering Standby mode.
bwang	79:d0b1bb3dcf68	1232	* This parameter can be one of the following values:
bwang	79:d0b1bb3dcf68	1233	* @arg OB_STDBY_NoRST: No reset generated when entering in STANDBY
bwang	79:d0b1bb3dcf68	1234	* @arg OB_STDBY_RST: Reset generated when entering in STANDBY
bwang	79:d0b1bb3dcf68	1235	* @retval None
bwang	79:d0b1bb3dcf68	1236	*/
bwang	79:d0b1bb3dcf68	1237	void FLASH_OB_UserConfig(uint8_t OB_IWDG, uint8_t OB_STOP, uint8_t OB_STDBY)
bwang	79:d0b1bb3dcf68	1238	{
bwang	79:d0b1bb3dcf68	1239	uint8_t optiontmp = 0xFF;
bwang	79:d0b1bb3dcf68	1240	FLASH_Status status = FLASH_COMPLETE2;
bwang	79:d0b1bb3dcf68	1241
bwang	79:d0b1bb3dcf68	1242	/* Check the parameters */
bwang	79:d0b1bb3dcf68	1243	assert_param(IS_OB_IWDG_SOURCE(OB_IWDG));
bwang	79:d0b1bb3dcf68	1244	assert_param(IS_OB_STOP_SOURCE(OB_STOP));
bwang	79:d0b1bb3dcf68	1245	assert_param(IS_OB_STDBY_SOURCE(OB_STDBY));
bwang	79:d0b1bb3dcf68	1246
bwang	79:d0b1bb3dcf68	1247	/* Wait for last operation to be completed */
bwang	79:d0b1bb3dcf68	1248	status = FLASH_WaitForLastOperation2();
bwang	79:d0b1bb3dcf68	1249
bwang	79:d0b1bb3dcf68	1250	if(status == FLASH_COMPLETE2)
bwang	79:d0b1bb3dcf68	1251	{
bwang	79:d0b1bb3dcf68	1252	#if defined(STM32F427_437xx) \|\| defined(STM32F429_439xx) \|\| defined(STM32F469_479xx)
bwang	79:d0b1bb3dcf68	1253	/* Mask OPTLOCK, OPTSTRT, BOR_LEV and BFB2 bits */
bwang	79:d0b1bb3dcf68	1254	optiontmp = (uint8_t)(((__IO uint8_t )OPTCR_BYTE0_ADDRESS) & (uint8_t)0x1F);
bwang	79:d0b1bb3dcf68	1255	#endif /* STM32F427_437xx \|\| STM32F429_439xx \|\| STM32F469_479xx */
bwang	79:d0b1bb3dcf68	1256
bwang	79:d0b1bb3dcf68	1257	#if defined(STM32F40_41xxx) \|\| defined(STM32F401xx) \|\| defined(STM32F410xx) \|\| defined(STM32F411xE) \|\| defined(STM32F446xx)
bwang	79:d0b1bb3dcf68	1258	/* Mask OPTLOCK, OPTSTRT and BOR_LEV bits */
bwang	79:d0b1bb3dcf68	1259	optiontmp = (uint8_t)(((__IO uint8_t )OPTCR_BYTE0_ADDRESS) & (uint8_t)0x0F);
bwang	79:d0b1bb3dcf68	1260	#endif /* STM32F40_41xxx \|\| STM32F401xx \|\| STM32F410xx \|\| STM32F411xE \|\| STM32F446xx */
bwang	79:d0b1bb3dcf68	1261
bwang	79:d0b1bb3dcf68	1262	/* Update User Option Byte */
bwang	79:d0b1bb3dcf68	1263	(__IO uint8_t )OPTCR_BYTE0_ADDRESS = OB_IWDG \| (uint8_t)(OB_STDBY \| (uint8_t)(OB_STOP \| ((uint8_t)optiontmp)));
bwang	79:d0b1bb3dcf68	1264	}
bwang	79:d0b1bb3dcf68	1265	}
bwang	79:d0b1bb3dcf68	1266
bwang	79:d0b1bb3dcf68	1267	/**
bwang	79:d0b1bb3dcf68	1268	* @brief Configure the Dual Bank Boot.
bwang	79:d0b1bb3dcf68	1269	*
bwang	79:d0b1bb3dcf68	1270	* @note This function can be used only for STM32F42xxx/43xxx devices.
bwang	79:d0b1bb3dcf68	1271	*
bwang	79:d0b1bb3dcf68	1272	* @param OB_BOOT: specifies the Dual Bank Boot Option byte.
bwang	79:d0b1bb3dcf68	1273	* This parameter can be one of the following values:
bwang	79:d0b1bb3dcf68	1274	* @arg OB_Dual_BootEnabled: Dual Bank Boot Enable
bwang	79:d0b1bb3dcf68	1275	* @arg OB_Dual_BootDisabled: Dual Bank Boot Disabled
bwang	79:d0b1bb3dcf68	1276	* @retval None
bwang	79:d0b1bb3dcf68	1277	*/
bwang	79:d0b1bb3dcf68	1278	void FLASH_OB_BootConfig(uint8_t OB_BOOT)
bwang	79:d0b1bb3dcf68	1279	{
bwang	79:d0b1bb3dcf68	1280	/* Check the parameters */
bwang	79:d0b1bb3dcf68	1281	assert_param(IS_OB_BOOT(OB_BOOT));
bwang	79:d0b1bb3dcf68	1282
bwang	79:d0b1bb3dcf68	1283	/* Set Dual Bank Boot */
bwang	79:d0b1bb3dcf68	1284	(__IO uint8_t )OPTCR_BYTE0_ADDRESS &= (~FLASH_OPTCR_BFB2);
bwang	79:d0b1bb3dcf68	1285	(__IO uint8_t )OPTCR_BYTE0_ADDRESS \|= OB_BOOT;
bwang	79:d0b1bb3dcf68	1286
bwang	79:d0b1bb3dcf68	1287	}
bwang	79:d0b1bb3dcf68	1288
bwang	79:d0b1bb3dcf68	1289	/**
bwang	79:d0b1bb3dcf68	1290	* @brief Sets the BOR Level.
bwang	79:d0b1bb3dcf68	1291	* @param OB_BOR: specifies the Option Bytes BOR Reset Level.
bwang	79:d0b1bb3dcf68	1292	* This parameter can be one of the following values:
bwang	79:d0b1bb3dcf68	1293	* @arg OB_BOR_LEVEL3: Supply voltage ranges from 2.7 to 3.6 V
bwang	79:d0b1bb3dcf68	1294	* @arg OB_BOR_LEVEL2: Supply voltage ranges from 2.4 to 2.7 V
bwang	79:d0b1bb3dcf68	1295	* @arg OB_BOR_LEVEL1: Supply voltage ranges from 2.1 to 2.4 V
bwang	79:d0b1bb3dcf68	1296	* @arg OB_BOR_OFF: Supply voltage ranges from 1.62 to 2.1 V
bwang	79:d0b1bb3dcf68	1297	* @retval None
bwang	79:d0b1bb3dcf68	1298	*/
bwang	79:d0b1bb3dcf68	1299	void FLASH_OB_BORConfig(uint8_t OB_BOR)
bwang	79:d0b1bb3dcf68	1300	{
bwang	79:d0b1bb3dcf68	1301	/* Check the parameters */
bwang	79:d0b1bb3dcf68	1302	assert_param(IS_OB_BOR(OB_BOR));
bwang	79:d0b1bb3dcf68	1303
bwang	79:d0b1bb3dcf68	1304	/* Set the BOR Level */
bwang	79:d0b1bb3dcf68	1305	(__IO uint8_t )OPTCR_BYTE0_ADDRESS &= (~FLASH_OPTCR_BOR_LEV);
bwang	79:d0b1bb3dcf68	1306	(__IO uint8_t )OPTCR_BYTE0_ADDRESS \|= OB_BOR;
bwang	79:d0b1bb3dcf68	1307
bwang	79:d0b1bb3dcf68	1308	}
bwang	79:d0b1bb3dcf68	1309
bwang	79:d0b1bb3dcf68	1310	/**
bwang	79:d0b1bb3dcf68	1311	* @brief Launch the option byte loading.
bwang	79:d0b1bb3dcf68	1312	* @param None
bwang	79:d0b1bb3dcf68	1313	* @retval FLASH Status: The returned value can be: FLASH_BUSY2, FLASH_ERROR_PROGRAM2,
bwang	79:d0b1bb3dcf68	1314	* FLASH_ERROR_WRP2, FLASH_ERROR_OPERATION2 or FLASH_COMPLETE2.
bwang	79:d0b1bb3dcf68	1315	*/
bwang	79:d0b1bb3dcf68	1316	FLASH_Status FLASH_OB_Launch(void)
bwang	79:d0b1bb3dcf68	1317	{
bwang	79:d0b1bb3dcf68	1318	FLASH_Status status = FLASH_COMPLETE2;
bwang	79:d0b1bb3dcf68	1319
bwang	79:d0b1bb3dcf68	1320	/* Set the OPTSTRT bit in OPTCR register */
bwang	79:d0b1bb3dcf68	1321	(__IO uint8_t )OPTCR_BYTE0_ADDRESS \|= FLASH_OPTCR_OPTSTRT;
bwang	79:d0b1bb3dcf68	1322
bwang	79:d0b1bb3dcf68	1323	/* Wait for last operation to be completed */
bwang	79:d0b1bb3dcf68	1324	status = FLASH_WaitForLastOperation2();
bwang	79:d0b1bb3dcf68	1325
bwang	79:d0b1bb3dcf68	1326	return status;
bwang	79:d0b1bb3dcf68	1327	}
bwang	79:d0b1bb3dcf68	1328
bwang	79:d0b1bb3dcf68	1329	/**
bwang	79:d0b1bb3dcf68	1330	* @brief Returns the FLASH User Option Bytes values.
bwang	79:d0b1bb3dcf68	1331	* @param None
bwang	79:d0b1bb3dcf68	1332	* @retval The FLASH User Option Bytes values: IWDG_SW(Bit0), RST_STOP(Bit1)
bwang	79:d0b1bb3dcf68	1333	* and RST_STDBY(Bit2).
bwang	79:d0b1bb3dcf68	1334	*/
bwang	79:d0b1bb3dcf68	1335	uint8_t FLASH_OB_GetUser(void)
bwang	79:d0b1bb3dcf68	1336	{
bwang	79:d0b1bb3dcf68	1337	/* Return the User Option Byte */
bwang	79:d0b1bb3dcf68	1338	return (uint8_t)(FLASH->OPTCR >> 5);
bwang	79:d0b1bb3dcf68	1339	}
bwang	79:d0b1bb3dcf68	1340
bwang	79:d0b1bb3dcf68	1341	/**
bwang	79:d0b1bb3dcf68	1342	* @brief Returns the FLASH Write Protection Option Bytes value.
bwang	79:d0b1bb3dcf68	1343	* @param None
bwang	79:d0b1bb3dcf68	1344	* @retval The FLASH Write Protection Option Bytes value
bwang	79:d0b1bb3dcf68	1345	*/
bwang	79:d0b1bb3dcf68	1346	uint16_t FLASH_OB_GetWRP(void)
bwang	79:d0b1bb3dcf68	1347	{
bwang	79:d0b1bb3dcf68	1348	/* Return the FLASH write protection Register value */
bwang	79:d0b1bb3dcf68	1349	return ((__IO uint16_t )(OPTCR_BYTE2_ADDRESS));
bwang	79:d0b1bb3dcf68	1350	}
bwang	79:d0b1bb3dcf68	1351
bwang	79:d0b1bb3dcf68	1352	/**
bwang	79:d0b1bb3dcf68	1353	* @brief Returns the FLASH Write Protection Option Bytes value.
bwang	79:d0b1bb3dcf68	1354	*
bwang	79:d0b1bb3dcf68	1355	* @note This function can be used only for STM32F42xxx/43xxx devices.
bwang	79:d0b1bb3dcf68	1356	*
bwang	79:d0b1bb3dcf68	1357	* @param None
bwang	79:d0b1bb3dcf68	1358	* @retval The FLASH Write Protection Option Bytes value
bwang	79:d0b1bb3dcf68	1359	*/
bwang	79:d0b1bb3dcf68	1360	uint16_t FLASH_OB_GetWRP1(void)
bwang	79:d0b1bb3dcf68	1361	{
bwang	79:d0b1bb3dcf68	1362	/* Return the FLASH write protection Register value */
bwang	79:d0b1bb3dcf68	1363	return ((__IO uint16_t )(OPTCR1_BYTE2_ADDRESS));
bwang	79:d0b1bb3dcf68	1364	}
bwang	79:d0b1bb3dcf68	1365
bwang	79:d0b1bb3dcf68	1366	/**
bwang	79:d0b1bb3dcf68	1367	* @brief Returns the FLASH PC Read/Write Protection Option Bytes value.
bwang	79:d0b1bb3dcf68	1368	*
bwang	79:d0b1bb3dcf68	1369	* @note This function can be used only for STM32F42xxx/43xxx devices and STM32F401xx/411xE devices.
bwang	79:d0b1bb3dcf68	1370	*
bwang	79:d0b1bb3dcf68	1371	* @param None
bwang	79:d0b1bb3dcf68	1372	* @retval The FLASH PC Read/Write Protection Option Bytes value
bwang	79:d0b1bb3dcf68	1373	*/
bwang	79:d0b1bb3dcf68	1374	uint16_t FLASH_OB_GetPCROP(void)
bwang	79:d0b1bb3dcf68	1375	{
bwang	79:d0b1bb3dcf68	1376	/* Return the FLASH PC Read/write protection Register value */
bwang	79:d0b1bb3dcf68	1377	return ((__IO uint16_t )(OPTCR_BYTE2_ADDRESS));
bwang	79:d0b1bb3dcf68	1378	}
bwang	79:d0b1bb3dcf68	1379
bwang	79:d0b1bb3dcf68	1380	/**
bwang	79:d0b1bb3dcf68	1381	* @brief Returns the FLASH PC Read/Write Protection Option Bytes value.
bwang	79:d0b1bb3dcf68	1382	*
bwang	79:d0b1bb3dcf68	1383	* @note This function can be used only for STM32F42xxx/43xxx devices.
bwang	79:d0b1bb3dcf68	1384	*
bwang	79:d0b1bb3dcf68	1385	* @param None
bwang	79:d0b1bb3dcf68	1386	* @retval The FLASH PC Read/Write Protection Option Bytes value
bwang	79:d0b1bb3dcf68	1387	*/
bwang	79:d0b1bb3dcf68	1388	uint16_t FLASH_OB_GetPCROP1(void)
bwang	79:d0b1bb3dcf68	1389	{
bwang	79:d0b1bb3dcf68	1390	/* Return the FLASH write protection Register value */
bwang	79:d0b1bb3dcf68	1391	return ((__IO uint16_t )(OPTCR1_BYTE2_ADDRESS));
bwang	79:d0b1bb3dcf68	1392	}
bwang	79:d0b1bb3dcf68	1393
bwang	79:d0b1bb3dcf68	1394	/**
bwang	79:d0b1bb3dcf68	1395	* @brief Returns the FLASH Read Protection level.
bwang	79:d0b1bb3dcf68	1396	* @param None
bwang	79:d0b1bb3dcf68	1397	* @retval FLASH ReadOut Protection Status:
bwang	79:d0b1bb3dcf68	1398	* - SET, when OB_RDP_Level_1 or OB_RDP_Level_2 is set
bwang	79:d0b1bb3dcf68	1399	* - RESET, when OB_RDP_Level_0 is set
bwang	79:d0b1bb3dcf68	1400	*/
bwang	79:d0b1bb3dcf68	1401	FlagStatus FLASH_OB_GetRDP(void)
bwang	79:d0b1bb3dcf68	1402	{
bwang	79:d0b1bb3dcf68	1403	FlagStatus readstatus = RESET;
bwang	79:d0b1bb3dcf68	1404
bwang	79:d0b1bb3dcf68	1405	if (((__IO uint8_t)(OPTCR_BYTE1_ADDRESS) != (uint8_t)OB_RDP_Level_0))
bwang	79:d0b1bb3dcf68	1406	{
bwang	79:d0b1bb3dcf68	1407	readstatus = SET;
bwang	79:d0b1bb3dcf68	1408	}
bwang	79:d0b1bb3dcf68	1409	else
bwang	79:d0b1bb3dcf68	1410	{
bwang	79:d0b1bb3dcf68	1411	readstatus = RESET;
bwang	79:d0b1bb3dcf68	1412	}
bwang	79:d0b1bb3dcf68	1413	return readstatus;
bwang	79:d0b1bb3dcf68	1414	}
bwang	79:d0b1bb3dcf68	1415
bwang	79:d0b1bb3dcf68	1416	/**
bwang	79:d0b1bb3dcf68	1417	* @brief Returns the FLASH BOR level.
bwang	79:d0b1bb3dcf68	1418	* @param None
bwang	79:d0b1bb3dcf68	1419	* @retval The FLASH BOR level:
bwang	79:d0b1bb3dcf68	1420	* - OB_BOR_LEVEL3: Supply voltage ranges from 2.7 to 3.6 V
bwang	79:d0b1bb3dcf68	1421	* - OB_BOR_LEVEL2: Supply voltage ranges from 2.4 to 2.7 V
bwang	79:d0b1bb3dcf68	1422	* - OB_BOR_LEVEL1: Supply voltage ranges from 2.1 to 2.4 V
bwang	79:d0b1bb3dcf68	1423	* - OB_BOR_OFF : Supply voltage ranges from 1.62 to 2.1 V
bwang	79:d0b1bb3dcf68	1424	*/
bwang	79:d0b1bb3dcf68	1425	uint8_t FLASH_OB_GetBOR(void)
bwang	79:d0b1bb3dcf68	1426	{
bwang	79:d0b1bb3dcf68	1427	/* Return the FLASH BOR level */
bwang	79:d0b1bb3dcf68	1428	return (uint8_t)((__IO uint8_t )(OPTCR_BYTE0_ADDRESS) & (uint8_t)0x0C);
bwang	79:d0b1bb3dcf68	1429	}
bwang	79:d0b1bb3dcf68	1430
bwang	79:d0b1bb3dcf68	1431	/**
bwang	79:d0b1bb3dcf68	1432	* @}
bwang	79:d0b1bb3dcf68	1433	*/
bwang	79:d0b1bb3dcf68	1434
bwang	79:d0b1bb3dcf68	1435	/** @defgroup FLASH_Group4 Interrupts and flags management functions
bwang	79:d0b1bb3dcf68	1436	* @brief Interrupts and flags management functions
bwang	79:d0b1bb3dcf68	1437	*
bwang	79:d0b1bb3dcf68	1438	@verbatim
bwang	79:d0b1bb3dcf68	1439	===============================================================================
bwang	79:d0b1bb3dcf68	1440	##### Interrupts and flags management functions #####
bwang	79:d0b1bb3dcf68	1441	===============================================================================
bwang	79:d0b1bb3dcf68	1442	@endverbatim
bwang	79:d0b1bb3dcf68	1443	* @{
bwang	79:d0b1bb3dcf68	1444	*/
bwang	79:d0b1bb3dcf68	1445
bwang	79:d0b1bb3dcf68	1446	/**
bwang	79:d0b1bb3dcf68	1447	* @brief Enables or disables the specified FLASH interrupts.
bwang	79:d0b1bb3dcf68	1448	* @param FLASH_IT: specifies the FLASH interrupt sources to be enabled or disabled.
bwang	79:d0b1bb3dcf68	1449	* This parameter can be any combination of the following values:
bwang	79:d0b1bb3dcf68	1450	* @arg FLASH_IT_ERR: FLASH Error Interrupt
bwang	79:d0b1bb3dcf68	1451	* @arg FLASH_IT_EOP: FLASH end of operation Interrupt
bwang	79:d0b1bb3dcf68	1452	* @retval None
bwang	79:d0b1bb3dcf68	1453	*/
bwang	79:d0b1bb3dcf68	1454	void FLASH_ITConfig(uint32_t FLASH_IT, FunctionalState NewState)
bwang	79:d0b1bb3dcf68	1455	{
bwang	79:d0b1bb3dcf68	1456	/* Check the parameters */
bwang	79:d0b1bb3dcf68	1457	assert_param(IS_FLASH_IT(FLASH_IT));
bwang	79:d0b1bb3dcf68	1458	assert_param(IS_FUNCTIONAL_STATE(NewState));
bwang	79:d0b1bb3dcf68	1459
bwang	79:d0b1bb3dcf68	1460	if(NewState != DISABLE)
bwang	79:d0b1bb3dcf68	1461	{
bwang	79:d0b1bb3dcf68	1462	/* Enable the interrupt sources */
bwang	79:d0b1bb3dcf68	1463	FLASH->CR \|= FLASH_IT;
bwang	79:d0b1bb3dcf68	1464	}
bwang	79:d0b1bb3dcf68	1465	else
bwang	79:d0b1bb3dcf68	1466	{
bwang	79:d0b1bb3dcf68	1467	/* Disable the interrupt sources */
bwang	79:d0b1bb3dcf68	1468	FLASH->CR &= ~(uint32_t)FLASH_IT;
bwang	79:d0b1bb3dcf68	1469	}
bwang	79:d0b1bb3dcf68	1470	}
bwang	79:d0b1bb3dcf68	1471
bwang	79:d0b1bb3dcf68	1472	/**
bwang	79:d0b1bb3dcf68	1473	* @brief Checks whether the specified FLASH flag is set or not.
bwang	79:d0b1bb3dcf68	1474	* @param FLASH_FLAG: specifies the FLASH flag to check.
bwang	79:d0b1bb3dcf68	1475	* This parameter can be one of the following values:
bwang	79:d0b1bb3dcf68	1476	* @arg FLASH_FLAG_EOP: FLASH End of Operation flag
bwang	79:d0b1bb3dcf68	1477	* @arg FLASH_FLAG_OPERR: FLASH operation Error flag
bwang	79:d0b1bb3dcf68	1478	* @arg FLASH_FLAG_WRPERR: FLASH Write protected error flag
bwang	79:d0b1bb3dcf68	1479	* @arg FLASH_FLAG_PGAERR: FLASH Programming Alignment error flag
bwang	79:d0b1bb3dcf68	1480	* @arg FLASH_FLAG_PGPERR: FLASH Programming Parallelism error flag
bwang	79:d0b1bb3dcf68	1481	* @arg FLASH_FLAG_PGSERR: FLASH Programming Sequence error flag
bwang	79:d0b1bb3dcf68	1482	* @arg FLASH_FLAG_RDERR: FLASH (PCROP) Read Protection error flag (STM32F42xx/43xxx and STM32F401xx/411xE devices)
bwang	79:d0b1bb3dcf68	1483	* @arg FLASH_FLAG_BSY: FLASH Busy flag
bwang	79:d0b1bb3dcf68	1484	* @retval The new state of FLASH_FLAG (SET or RESET).
bwang	79:d0b1bb3dcf68	1485	*/
bwang	79:d0b1bb3dcf68	1486	FlagStatus FLASH_GetFlagStatus(uint32_t FLASH_FLAG)
bwang	79:d0b1bb3dcf68	1487	{
bwang	79:d0b1bb3dcf68	1488	FlagStatus bitstatus = RESET;
bwang	79:d0b1bb3dcf68	1489	/* Check the parameters */
bwang	79:d0b1bb3dcf68	1490	assert_param(IS_FLASH_GET_FLAG(FLASH_FLAG));
bwang	79:d0b1bb3dcf68	1491
bwang	79:d0b1bb3dcf68	1492	if((FLASH->SR & FLASH_FLAG) != (uint32_t)RESET)
bwang	79:d0b1bb3dcf68	1493	{
bwang	79:d0b1bb3dcf68	1494	bitstatus = SET;
bwang	79:d0b1bb3dcf68	1495	}
bwang	79:d0b1bb3dcf68	1496	else
bwang	79:d0b1bb3dcf68	1497	{
bwang	79:d0b1bb3dcf68	1498	bitstatus = RESET;
bwang	79:d0b1bb3dcf68	1499	}
bwang	79:d0b1bb3dcf68	1500	/* Return the new state of FLASH_FLAG (SET or RESET) */
bwang	79:d0b1bb3dcf68	1501	return bitstatus;
bwang	79:d0b1bb3dcf68	1502	}
bwang	79:d0b1bb3dcf68	1503
bwang	79:d0b1bb3dcf68	1504	/**
bwang	79:d0b1bb3dcf68	1505	* @brief Clears the FLASH's pending flags.
bwang	79:d0b1bb3dcf68	1506	* @param FLASH_FLAG: specifies the FLASH flags to clear.
bwang	79:d0b1bb3dcf68	1507	* This parameter can be any combination of the following values:
bwang	79:d0b1bb3dcf68	1508	* @arg FLASH_FLAG_EOP: FLASH End of Operation flag
bwang	79:d0b1bb3dcf68	1509	* @arg FLASH_FLAG_OPERR: FLASH operation Error flag
bwang	79:d0b1bb3dcf68	1510	* @arg FLASH_FLAG_WRPERR: FLASH Write protected error flag
bwang	79:d0b1bb3dcf68	1511	* @arg FLASH_FLAG_PGAERR: FLASH Programming Alignment error flag
bwang	79:d0b1bb3dcf68	1512	* @arg FLASH_FLAG_PGPERR: FLASH Programming Parallelism error flag
bwang	79:d0b1bb3dcf68	1513	* @arg FLASH_FLAG_PGSERR: FLASH Programming Sequence error flag
bwang	79:d0b1bb3dcf68	1514	* @arg FLASH_FLAG_RDERR: FLASH Read Protection error flag (STM32F42xx/43xxx and STM32F401xx/411xE devices)
bwang	79:d0b1bb3dcf68	1515	* @retval None
bwang	79:d0b1bb3dcf68	1516	*/
bwang	79:d0b1bb3dcf68	1517	void FLASH_ClearFlag(uint32_t FLASH_FLAG)
bwang	79:d0b1bb3dcf68	1518	{
bwang	79:d0b1bb3dcf68	1519	/* Check the parameters */
bwang	79:d0b1bb3dcf68	1520	assert_param(IS_FLASH_CLEAR_FLAG(FLASH_FLAG));
bwang	79:d0b1bb3dcf68	1521
bwang	79:d0b1bb3dcf68	1522	/* Clear the flags */
bwang	79:d0b1bb3dcf68	1523	FLASH->SR = FLASH_FLAG;
bwang	79:d0b1bb3dcf68	1524	}
bwang	79:d0b1bb3dcf68	1525
bwang	79:d0b1bb3dcf68	1526	/**
bwang	79:d0b1bb3dcf68	1527	* @brief Returns the FLASH Status.
bwang	79:d0b1bb3dcf68	1528	* @param None
bwang	79:d0b1bb3dcf68	1529	* @retval FLASH Status: The returned value can be: FLASH_BUSY2, FLASH_ERROR_PROGRAM2,
bwang	79:d0b1bb3dcf68	1530	* FLASH_ERROR_WRP2, FLASH_ERROR_RD2, FLASH_ERROR_OPERATION2 or FLASH_COMPLETE2.
bwang	79:d0b1bb3dcf68	1531	*/
bwang	79:d0b1bb3dcf68	1532	FLASH_Status FLASH_GetStatus(void)
bwang	79:d0b1bb3dcf68	1533	{
bwang	79:d0b1bb3dcf68	1534	FLASH_Status flashstatus = FLASH_COMPLETE2;
bwang	79:d0b1bb3dcf68	1535
bwang	79:d0b1bb3dcf68	1536	if((FLASH->SR & FLASH_FLAG_BSY) == FLASH_FLAG_BSY)
bwang	79:d0b1bb3dcf68	1537	{
bwang	79:d0b1bb3dcf68	1538	flashstatus = FLASH_BUSY2;
bwang	79:d0b1bb3dcf68	1539	}
bwang	79:d0b1bb3dcf68	1540	else
bwang	79:d0b1bb3dcf68	1541	{
bwang	79:d0b1bb3dcf68	1542	if((FLASH->SR & FLASH_FLAG_WRPERR) != (uint32_t)0x00)
bwang	79:d0b1bb3dcf68	1543	{
bwang	79:d0b1bb3dcf68	1544	flashstatus = FLASH_ERROR_WRP2;
bwang	79:d0b1bb3dcf68	1545	}
bwang	79:d0b1bb3dcf68	1546	else
bwang	79:d0b1bb3dcf68	1547	{
bwang	79:d0b1bb3dcf68	1548	if((FLASH->SR & FLASH_FLAG_RDERR) != (uint32_t)0x00)
bwang	79:d0b1bb3dcf68	1549	{
bwang	79:d0b1bb3dcf68	1550	flashstatus = FLASH_ERROR_RD2;
bwang	79:d0b1bb3dcf68	1551	}
bwang	79:d0b1bb3dcf68	1552	else
bwang	79:d0b1bb3dcf68	1553	{
bwang	79:d0b1bb3dcf68	1554	if((FLASH->SR & (uint32_t)0xE0) != (uint32_t)0x00)
bwang	79:d0b1bb3dcf68	1555	{
bwang	79:d0b1bb3dcf68	1556	flashstatus = FLASH_ERROR_PROGRAM2;
bwang	79:d0b1bb3dcf68	1557	}
bwang	79:d0b1bb3dcf68	1558	else
bwang	79:d0b1bb3dcf68	1559	{
bwang	79:d0b1bb3dcf68	1560	if((FLASH->SR & FLASH_FLAG_OPERR) != (uint32_t)0x00)
bwang	79:d0b1bb3dcf68	1561	{
bwang	79:d0b1bb3dcf68	1562	flashstatus = FLASH_ERROR_OPERATION2;
bwang	79:d0b1bb3dcf68	1563	}
bwang	79:d0b1bb3dcf68	1564	else
bwang	79:d0b1bb3dcf68	1565	{
bwang	79:d0b1bb3dcf68	1566	flashstatus = FLASH_COMPLETE2;
bwang	79:d0b1bb3dcf68	1567	}
bwang	79:d0b1bb3dcf68	1568	}
bwang	79:d0b1bb3dcf68	1569	}
bwang	79:d0b1bb3dcf68	1570	}
bwang	79:d0b1bb3dcf68	1571	}
bwang	79:d0b1bb3dcf68	1572	/* Return the FLASH Status */
bwang	79:d0b1bb3dcf68	1573	return flashstatus;
bwang	79:d0b1bb3dcf68	1574	}
bwang	79:d0b1bb3dcf68	1575
bwang	79:d0b1bb3dcf68	1576	/**
bwang	79:d0b1bb3dcf68	1577	* @brief Waits for a FLASH operation to complete.
bwang	79:d0b1bb3dcf68	1578	* @param None
bwang	79:d0b1bb3dcf68	1579	* @retval FLASH Status: The returned value can be: FLASH_BUSY2, FLASH_ERROR_PROGRAM2,
bwang	79:d0b1bb3dcf68	1580	* FLASH_ERROR_WRP2, FLASH_ERROR_OPERATION2 or FLASH_COMPLETE2.
bwang	79:d0b1bb3dcf68	1581	*/
bwang	79:d0b1bb3dcf68	1582	FLASH_Status FLASH_WaitForLastOperation2(void)
bwang	79:d0b1bb3dcf68	1583	{
bwang	79:d0b1bb3dcf68	1584	__IO FLASH_Status status = FLASH_COMPLETE2;
bwang	79:d0b1bb3dcf68	1585
bwang	79:d0b1bb3dcf68	1586	/* Check for the FLASH Status */
bwang	79:d0b1bb3dcf68	1587	status = FLASH_GetStatus();
bwang	79:d0b1bb3dcf68	1588
bwang	79:d0b1bb3dcf68	1589	/* Wait for the FLASH operation to complete by polling on BUSY flag to be reset.
bwang	79:d0b1bb3dcf68	1590	Even if the FLASH operation fails, the BUSY flag will be reset and an error
bwang	79:d0b1bb3dcf68	1591	flag will be set */
bwang	79:d0b1bb3dcf68	1592	while(status == FLASH_BUSY2)
bwang	79:d0b1bb3dcf68	1593	{
bwang	79:d0b1bb3dcf68	1594	status = FLASH_GetStatus();
bwang	79:d0b1bb3dcf68	1595	}
bwang	79:d0b1bb3dcf68	1596	/* Return the operation status */
bwang	79:d0b1bb3dcf68	1597	return status;
bwang	79:d0b1bb3dcf68	1598	}
bwang	79:d0b1bb3dcf68	1599
bwang	79:d0b1bb3dcf68	1600	/**
bwang	79:d0b1bb3dcf68	1601	* @}
bwang	79:d0b1bb3dcf68	1602	*/
bwang	79:d0b1bb3dcf68	1603
bwang	79:d0b1bb3dcf68	1604	/**
bwang	79:d0b1bb3dcf68	1605	* @}
bwang	79:d0b1bb3dcf68	1606	*/
bwang	79:d0b1bb3dcf68	1607
bwang	79:d0b1bb3dcf68	1608	/**
bwang	79:d0b1bb3dcf68	1609	* @}
bwang	79:d0b1bb3dcf68	1610	*/
bwang	79:d0b1bb3dcf68	1611
bwang	79:d0b1bb3dcf68	1612	/**
bwang	79:d0b1bb3dcf68	1613	* @}
bwang	79:d0b1bb3dcf68	1614	*/
bwang	79:d0b1bb3dcf68	1615
bwang	79:d0b1bb3dcf68	1616	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

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Type:	Program
Mbed OS support:	Mbed 2 deprecated
Created:	23 Apr 2016
Imports:	39
Forks:	2
Commits:	253
Dependents:	0
Dependencies:	2
Followers:	3

FlashWriter/stm32f4xx_flash.c@79:d0b1bb3dcf68, 2017-02-28 (annotated)

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