Bayley Wang / Mbed 2 deprecated foc-ed_in_the_bot_compact

robot

Dependencies:   FastPWM3 mbed

BREMS/BREMSConfig.cpp@155:7c6005933d4c, 2017-05-04 (annotated)

Committer:
bwang
Date:
Thu May 04 17:35:10 2017 +0000
Revision:
155:7c6005933d4c
Parent:
154:0a22dcf91577
Child:
165:2463dbe52eee
05/04/2017 13:34 - changed logic in PwmIn::handle_fall, which no longer resets timer on invalid edges

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bwang 42:030e0ec4eac5 1 #include "mbed.h"
bwang 42:030e0ec4eac5 2
bwang 42:030e0ec4eac5 3 #include "BREMSConfig.h"
bwang 42:030e0ec4eac5 4 #include "BREMSStructs.h"
bwang 154:0a22dcf91577 5 #include "Filter.h"
bwang 42:030e0ec4eac5 6
bwang 42:030e0ec4eac5 7 #include "config_pins.h"
bwang 42:030e0ec4eac5 8 #include "config_inverter.h"
bwang 42:030e0ec4eac5 9 #include "config_motor.h"
bwang 42:030e0ec4eac5 10 #include "config_loop.h"
bwang 42:030e0ec4eac5 11
bwang 42:030e0ec4eac5 12 void BREMSConfigRegisters(IOStruct *io) {
bwang 42:030e0ec4eac5 13 RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN;
bwang 42:030e0ec4eac5 14 RCC->AHB1ENR |= RCC_AHB1ENR_GPIOBEN;
bwang 42:030e0ec4eac5 15 RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN;
bwang 42:030e0ec4eac5 16
bwang 42:030e0ec4eac5 17 RCC->APB2ENR |= RCC_APB2ENR_TIM1EN; //enable TIM1 clock
bwang 42:030e0ec4eac5 18
bwang 42:030e0ec4eac5 19 io->a = new FastPWM(PWMA);
bwang 42:030e0ec4eac5 20 io->b = new FastPWM(PWMB);
bwang 42:030e0ec4eac5 21 io->c = new FastPWM(PWMC);
bwang 42:030e0ec4eac5 22
bwang 42:030e0ec4eac5 23 NVIC_EnableIRQ(TIM1_UP_TIM10_IRQn); //Enable TIM1 IRQ
bwang 42:030e0ec4eac5 24
bwang 42:030e0ec4eac5 25 TIM1->DIER |= TIM_DIER_UIE; //enable update interrupt
bwang 91:f58472ac3fae 26 TIM1->CR1 = 0x00; //CMS = 10, interrupt only when counting up
bwang 42:030e0ec4eac5 27 TIM1->CR1 |= TIM_CR1_ARPE; //autoreload on,
bwang 91:f58472ac3fae 28 TIM1->RCR |= 0x00; //update event once per up/down count of tim1
bwang 42:030e0ec4eac5 29 TIM1->EGR |= TIM_EGR_UG;
bwang 42:030e0ec4eac5 30
bwang 42:030e0ec4eac5 31 TIM1->PSC = 0x00; //no prescaler, timer counts up in sync with the peripheral clock
bwang 91:f58472ac3fae 32 TIM1->ARR = (int) (2 * (float) 9e7 / F_SW);
bwang 90:2ef53b1a22de 33 TIM1->CCER |= ~(TIM_CCER_CC1NP); //Interupt when low side is on.
bwang 42:030e0ec4eac5 34 TIM1->CR1 |= TIM_CR1_CEN;
bwang 42:030e0ec4eac5 35
bwang 42:030e0ec4eac5 36 //ADC Setup
bwang 42:030e0ec4eac5 37 RCC->APB2ENR |= RCC_APB2ENR_ADC1EN; // clock for ADC1
bwang 42:030e0ec4eac5 38 RCC->APB2ENR |= RCC_APB2ENR_ADC2EN; // clock for ADC2
bwang 42:030e0ec4eac5 39
bwang 42:030e0ec4eac5 40 ADC->CCR = 0x00000006; //Regular simultaneous mode, 3 channels
bwang 42:030e0ec4eac5 41
bwang 42:030e0ec4eac5 42 ADC1->CR2 |= ADC_CR2_ADON; //ADC1 on
bwang 42:030e0ec4eac5 43 ADC1->SQR3 = 0x0000004; //PA_4 as ADC1, sequence 0
bwang 42:030e0ec4eac5 44
bwang 42:030e0ec4eac5 45 ADC2->CR2 |= ADC_CR2_ADON; //ADC2 ON
bwang 42:030e0ec4eac5 46 ADC2->SQR3 = 0x00000008; //PB_0 as ADC2, sequence 1
bwang 42:030e0ec4eac5 47
bwang 42:030e0ec4eac5 48 GPIOA->MODER |= (1 << 8);
bwang 42:030e0ec4eac5 49 GPIOA->MODER |= (1 << 9);
bwang 42:030e0ec4eac5 50
bwang 42:030e0ec4eac5 51 GPIOA->MODER |= (1 << 2);
bwang 42:030e0ec4eac5 52 GPIOA->MODER |= (1 << 3);
bwang 42:030e0ec4eac5 53
bwang 42:030e0ec4eac5 54 GPIOA->MODER |= (1 << 0);
bwang 42:030e0ec4eac5 55 GPIOA->MODER |= (1 << 1);
bwang 42:030e0ec4eac5 56
bwang 42:030e0ec4eac5 57 GPIOB->MODER |= (1 << 0);
bwang 42:030e0ec4eac5 58 GPIOB->MODER |= (1 << 1);
bwang 42:030e0ec4eac5 59
bwang 42:030e0ec4eac5 60 GPIOC->MODER |= (1 << 2);
bwang 42:030e0ec4eac5 61 GPIOC->MODER |= (1 << 3);
bwang 42:030e0ec4eac5 62
bwang 42:030e0ec4eac5 63 //DAC setup
bwang 42:030e0ec4eac5 64 RCC->APB1ENR |= 0x20000000;
bwang 42:030e0ec4eac5 65 DAC->CR |= DAC_CR_EN2;
bwang 42:030e0ec4eac5 66
bwang 42:030e0ec4eac5 67 GPIOA->MODER |= (1 << 10);
bwang 42:030e0ec4eac5 68 GPIOA->MODER |= (1 << 11);
bwang 47:1c9868e226d0 69
bwang 47:1c9868e226d0 70 set_dtc(io->a, 0.0f);
bwang 47:1c9868e226d0 71 set_dtc(io->b, 0.0f);
bwang 47:1c9868e226d0 72 set_dtc(io->c, 0.0f);
bwang 42:030e0ec4eac5 73 }
bwang 42:030e0ec4eac5 74
bwang 42:030e0ec4eac5 75 void BREMSZeroCurrent(ReadDataStruct *read) {
bwang 42:030e0ec4eac5 76 for (int i = 0; i < 1000; i++){
bwang 42:030e0ec4eac5 77 read->ia_supp_offset += (float) (ADC1->DR);
bwang 42:030e0ec4eac5 78 read->ib_supp_offset += (float) (ADC2->DR);
bwang 42:030e0ec4eac5 79 ADC1->CR2 |= 0x40000000;
bwang 42:030e0ec4eac5 80 wait_us(100);
bwang 42:030e0ec4eac5 81 }
bwang 42:030e0ec4eac5 82 read->ia_supp_offset /= 1000.0f;
bwang 42:030e0ec4eac5 83 read->ib_supp_offset /= 1000.0f;
bwang 42:030e0ec4eac5 84 read->ia_supp_offset = read->ia_supp_offset / 4096.0f * AVDD - I_OFFSET;
bwang 42:030e0ec4eac5 85 read->ib_supp_offset = read->ib_supp_offset / 4096.0f * AVDD - I_OFFSET;
bwang 42:030e0ec4eac5 86 }
bwang 42:030e0ec4eac5 87
bwang 42:030e0ec4eac5 88 void BREMSStartupMsg(ReadDataStruct *read, Serial *pc) {
bwang 42:030e0ec4eac5 89 pc->printf("%s\n\r\n\r", "FOC'ed in the Bot Rev A.");
bwang 42:030e0ec4eac5 90 pc->printf("%s\n\r", "====Config Data====");
bwang 42:030e0ec4eac5 91 pc->printf("Current Sensor Offset: %f mV\n\r", I_OFFSET);
bwang 42:030e0ec4eac5 92 pc->printf("Current Sensor Scale: %f mv/A\n\r", I_SCALE);
bwang 42:030e0ec4eac5 93 pc->printf("Bus Voltage: %f V\n\r", BUS_VOLTAGE);
bwang 42:030e0ec4eac5 94 pc->printf("Switching Frequency: %f KHz \n\r", F_SW / 1000.0f);
bwang 44:3fd6a43b91f0 95 pc->printf("Polling Frequency: %f Hz \n\r", F_SLOW_LOOP);
bwang 42:030e0ec4eac5 96 pc->printf("Pole pairs: %d\n\r", (int) POLE_PAIRS);
bwang 42:030e0ec4eac5 97 pc->printf("Resolver lobes: %d\n\r", (int) RESOLVER_LOBES);
bwang 59:0416da6c3060 98 pc->printf("Loop KP_D: %f\n\r", KP_D);
bwang 59:0416da6c3060 99 pc->printf("Loop KI_D: %f\n\r", KI_D);
bwang 59:0416da6c3060 100 pc->printf("Loop KP_Q: %f\n\r", KP_Q);
bwang 59:0416da6c3060 101 pc->printf("Loop KI_Q: %f\n\r", KI_Q);
bwang 42:030e0ec4eac5 102 pc->printf("Ia offset: %f mV\n\r", read->ia_supp_offset);
bwang 42:030e0ec4eac5 103 pc->printf("Ib offset: %f mV\n\r", read->ib_supp_offset);
bwang 42:030e0ec4eac5 104 pc->printf("\n\r");
bwang 42:030e0ec4eac5 105 }
bwang 42:030e0ec4eac5 106
bwang 42:030e0ec4eac5 107 void BREMSInit(IOStruct *io, ReadDataStruct *read, FOCStruct *foc, ControlStruct *control, bool tune) {
bwang 42:030e0ec4eac5 108 io->en = new DigitalOut(EN);
bwang 42:030e0ec4eac5 109 io->en->write(0);
bwang 42:030e0ec4eac5 110
bwang 42:030e0ec4eac5 111 io->pc = new Serial(USBTX, USBRX);
bwang 61:85a31897e719 112 io->pc->baud(921600);
bwang 46:748aba7d111d 113
bwang 151:5bbb15351798 114 io->throttle_in = new PwmIn(TH_PIN, TH_LIMIT_LOW, TH_LIMIT_HIGH);
bwang 42:030e0ec4eac5 115 io->pos = new PositionSensorEncoder(CPR, 0);
bwang 42:030e0ec4eac5 116
bwang 154:0a22dcf91577 117 control->throttle_filter = new MedianFilter(THROTTLE_FILTER_WINDOW);
bwang 154:0a22dcf91577 118 control->velocity_filter = new MedianFilter(W_FILTER_WINDOW);
bwang 154:0a22dcf91577 119
bwang 42:030e0ec4eac5 120 read->vbus = BUS_VOLTAGE;
bwang 42:030e0ec4eac5 121 read->w = 0.0f;
bwang 42:030e0ec4eac5 122 read->ia_supp_offset = 0.0f;
bwang 42:030e0ec4eac5 123 read->ib_supp_offset = 0.0f;
bwang 42:030e0ec4eac5 124 read->p_mech = io->pos->GetMechPosition();
bwang 42:030e0ec4eac5 125
bwang 52:fd3d8df99287 126 BREMSConfigRegisters(io);
bwang 52:fd3d8df99287 127 wait_ms(250);
bwang 52:fd3d8df99287 128 BREMSZeroCurrent(read);
bwang 52:fd3d8df99287 129 BREMSStartupMsg(read, io->pc);
bwang 52:fd3d8df99287 130
bwang 42:030e0ec4eac5 131 control->d_integral = 0.0f;
bwang 42:030e0ec4eac5 132 control->q_integral = 0.0f;
bwang 42:030e0ec4eac5 133 control->d_filtered = 0.0f;
bwang 42:030e0ec4eac5 134 control->q_filtered = 0.0f;
bwang 42:030e0ec4eac5 135 control->last_d = 0.0f;
bwang 42:030e0ec4eac5 136 control->last_q = 0.0f;
bwang 42:030e0ec4eac5 137 control->d_ref = 0.0f;
bwang 42:030e0ec4eac5 138 control->q_ref = 0.0f;
bwang 70:5e39beeb4a21 139 control->torque_percent = 0.0f;
bwang 46:748aba7d111d 140
bwang 42:030e0ec4eac5 141 io->en->write(1);
bwang 42:030e0ec4eac5 142 }