Toyomasa Watarai / Mbed OS armcc_info

Describes predefine macros for mbed online compiler (armcc)

mbed/hal/i2c_api.h@6:40e873bbc5f7, 2017-03-16 (annotated)

Committer:
MACRUM
Date:
Thu Mar 16 21:58:09 2017 +0900
Revision:
6:40e873bbc5f7
Add licence header info

Who changed what in which revision?

UserRevisionLine numberNew contents of line
MACRUM 6:40e873bbc5f7 1
MACRUM 6:40e873bbc5f7 2 /** \addtogroup hal */
MACRUM 6:40e873bbc5f7 3 /** @{*/
MACRUM 6:40e873bbc5f7 4 /* mbed Microcontroller Library
MACRUM 6:40e873bbc5f7 5 * Copyright (c) 2006-2015 ARM Limited
MACRUM 6:40e873bbc5f7 6 *
MACRUM 6:40e873bbc5f7 7 * Licensed under the Apache License, Version 2.0 (the "License");
MACRUM 6:40e873bbc5f7 8 * you may not use this file except in compliance with the License.
MACRUM 6:40e873bbc5f7 9 * You may obtain a copy of the License at
MACRUM 6:40e873bbc5f7 10 *
MACRUM 6:40e873bbc5f7 11 * http://www.apache.org/licenses/LICENSE-2.0
MACRUM 6:40e873bbc5f7 12 *
MACRUM 6:40e873bbc5f7 13 * Unless required by applicable law or agreed to in writing, software
MACRUM 6:40e873bbc5f7 14 * distributed under the License is distributed on an "AS IS" BASIS,
MACRUM 6:40e873bbc5f7 15 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
MACRUM 6:40e873bbc5f7 16 * See the License for the specific language governing permissions and
MACRUM 6:40e873bbc5f7 17 * limitations under the License.
MACRUM 6:40e873bbc5f7 18 */
MACRUM 6:40e873bbc5f7 19 #ifndef MBED_I2C_API_H
MACRUM 6:40e873bbc5f7 20 #define MBED_I2C_API_H
MACRUM 6:40e873bbc5f7 21
MACRUM 6:40e873bbc5f7 22 #include "device.h"
MACRUM 6:40e873bbc5f7 23 #include "hal/buffer.h"
MACRUM 6:40e873bbc5f7 24
MACRUM 6:40e873bbc5f7 25 #if DEVICE_I2C_ASYNCH
MACRUM 6:40e873bbc5f7 26 #include "hal/dma_api.h"
MACRUM 6:40e873bbc5f7 27 #endif
MACRUM 6:40e873bbc5f7 28
MACRUM 6:40e873bbc5f7 29 #if DEVICE_I2C
MACRUM 6:40e873bbc5f7 30
MACRUM 6:40e873bbc5f7 31 /**
MACRUM 6:40e873bbc5f7 32 * @defgroup hal_I2CEvents I2C Events Macros
MACRUM 6:40e873bbc5f7 33 *
MACRUM 6:40e873bbc5f7 34 * @{
MACRUM 6:40e873bbc5f7 35 */
MACRUM 6:40e873bbc5f7 36 #define I2C_EVENT_ERROR (1 << 1)
MACRUM 6:40e873bbc5f7 37 #define I2C_EVENT_ERROR_NO_SLAVE (1 << 2)
MACRUM 6:40e873bbc5f7 38 #define I2C_EVENT_TRANSFER_COMPLETE (1 << 3)
MACRUM 6:40e873bbc5f7 39 #define I2C_EVENT_TRANSFER_EARLY_NACK (1 << 4)
MACRUM 6:40e873bbc5f7 40 #define I2C_EVENT_ALL (I2C_EVENT_ERROR | I2C_EVENT_TRANSFER_COMPLETE | I2C_EVENT_ERROR_NO_SLAVE | I2C_EVENT_TRANSFER_EARLY_NACK)
MACRUM 6:40e873bbc5f7 41
MACRUM 6:40e873bbc5f7 42 /**@}*/
MACRUM 6:40e873bbc5f7 43
MACRUM 6:40e873bbc5f7 44 #if DEVICE_I2C_ASYNCH
MACRUM 6:40e873bbc5f7 45 /** Asynch I2C HAL structure
MACRUM 6:40e873bbc5f7 46 */
MACRUM 6:40e873bbc5f7 47 typedef struct {
MACRUM 6:40e873bbc5f7 48 struct i2c_s i2c; /**< Target specific I2C structure */
MACRUM 6:40e873bbc5f7 49 struct buffer_s tx_buff; /**< Tx buffer */
MACRUM 6:40e873bbc5f7 50 struct buffer_s rx_buff; /**< Rx buffer */
MACRUM 6:40e873bbc5f7 51 } i2c_t;
MACRUM 6:40e873bbc5f7 52
MACRUM 6:40e873bbc5f7 53 #else
MACRUM 6:40e873bbc5f7 54 /** Non-asynch I2C HAL structure
MACRUM 6:40e873bbc5f7 55 */
MACRUM 6:40e873bbc5f7 56 typedef struct i2c_s i2c_t;
MACRUM 6:40e873bbc5f7 57
MACRUM 6:40e873bbc5f7 58 #endif
MACRUM 6:40e873bbc5f7 59
MACRUM 6:40e873bbc5f7 60 enum {
MACRUM 6:40e873bbc5f7 61 I2C_ERROR_NO_SLAVE = -1,
MACRUM 6:40e873bbc5f7 62 I2C_ERROR_BUS_BUSY = -2
MACRUM 6:40e873bbc5f7 63 };
MACRUM 6:40e873bbc5f7 64
MACRUM 6:40e873bbc5f7 65 #ifdef __cplusplus
MACRUM 6:40e873bbc5f7 66 extern "C" {
MACRUM 6:40e873bbc5f7 67 #endif
MACRUM 6:40e873bbc5f7 68
MACRUM 6:40e873bbc5f7 69 /**
MACRUM 6:40e873bbc5f7 70 * \defgroup hal_GeneralI2C I2C Configuration Functions
MACRUM 6:40e873bbc5f7 71 * @{
MACRUM 6:40e873bbc5f7 72 */
MACRUM 6:40e873bbc5f7 73
MACRUM 6:40e873bbc5f7 74 /** Initialize the I2C peripheral. It sets the default parameters for I2C
MACRUM 6:40e873bbc5f7 75 * peripheral, and configures its specifieds pins.
MACRUM 6:40e873bbc5f7 76 *
MACRUM 6:40e873bbc5f7 77 * @param obj The I2C object
MACRUM 6:40e873bbc5f7 78 * @param sda The sda pin
MACRUM 6:40e873bbc5f7 79 * @param scl The scl pin
MACRUM 6:40e873bbc5f7 80 */
MACRUM 6:40e873bbc5f7 81 void i2c_init(i2c_t *obj, PinName sda, PinName scl);
MACRUM 6:40e873bbc5f7 82
MACRUM 6:40e873bbc5f7 83 /** Configure the I2C frequency
MACRUM 6:40e873bbc5f7 84 *
MACRUM 6:40e873bbc5f7 85 * @param obj The I2C object
MACRUM 6:40e873bbc5f7 86 * @param hz Frequency in Hz
MACRUM 6:40e873bbc5f7 87 */
MACRUM 6:40e873bbc5f7 88 void i2c_frequency(i2c_t *obj, int hz);
MACRUM 6:40e873bbc5f7 89
MACRUM 6:40e873bbc5f7 90 /** Send START command
MACRUM 6:40e873bbc5f7 91 *
MACRUM 6:40e873bbc5f7 92 * @param obj The I2C object
MACRUM 6:40e873bbc5f7 93 */
MACRUM 6:40e873bbc5f7 94 int i2c_start(i2c_t *obj);
MACRUM 6:40e873bbc5f7 95
MACRUM 6:40e873bbc5f7 96 /** Send STOP command
MACRUM 6:40e873bbc5f7 97 *
MACRUM 6:40e873bbc5f7 98 * @param obj The I2C object
MACRUM 6:40e873bbc5f7 99 */
MACRUM 6:40e873bbc5f7 100 int i2c_stop(i2c_t *obj);
MACRUM 6:40e873bbc5f7 101
MACRUM 6:40e873bbc5f7 102 /** Blocking reading data
MACRUM 6:40e873bbc5f7 103 *
MACRUM 6:40e873bbc5f7 104 * @param obj The I2C object
MACRUM 6:40e873bbc5f7 105 * @param address 7-bit address (last bit is 1)
MACRUM 6:40e873bbc5f7 106 * @param data The buffer for receiving
MACRUM 6:40e873bbc5f7 107 * @param length Number of bytes to read
MACRUM 6:40e873bbc5f7 108 * @param stop Stop to be generated after the transfer is done
MACRUM 6:40e873bbc5f7 109 * @return Number of read bytes
MACRUM 6:40e873bbc5f7 110 */
MACRUM 6:40e873bbc5f7 111 int i2c_read(i2c_t *obj, int address, char *data, int length, int stop);
MACRUM 6:40e873bbc5f7 112
MACRUM 6:40e873bbc5f7 113 /** Blocking sending data
MACRUM 6:40e873bbc5f7 114 *
MACRUM 6:40e873bbc5f7 115 * @param obj The I2C object
MACRUM 6:40e873bbc5f7 116 * @param address 7-bit address (last bit is 0)
MACRUM 6:40e873bbc5f7 117 * @param data The buffer for sending
MACRUM 6:40e873bbc5f7 118 * @param length Number of bytes to write
MACRUM 6:40e873bbc5f7 119 * @param stop Stop to be generated after the transfer is done
MACRUM 6:40e873bbc5f7 120 * @return
MACRUM 6:40e873bbc5f7 121 * zero or non-zero - Number of written bytes
MACRUM 6:40e873bbc5f7 122 * negative - I2C_ERROR_XXX status
MACRUM 6:40e873bbc5f7 123 */
MACRUM 6:40e873bbc5f7 124 int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop);
MACRUM 6:40e873bbc5f7 125
MACRUM 6:40e873bbc5f7 126 /** Reset I2C peripheral. TODO: The action here. Most of the implementation sends stop()
MACRUM 6:40e873bbc5f7 127 *
MACRUM 6:40e873bbc5f7 128 * @param obj The I2C object
MACRUM 6:40e873bbc5f7 129 */
MACRUM 6:40e873bbc5f7 130 void i2c_reset(i2c_t *obj);
MACRUM 6:40e873bbc5f7 131
MACRUM 6:40e873bbc5f7 132 /** Read one byte
MACRUM 6:40e873bbc5f7 133 *
MACRUM 6:40e873bbc5f7 134 * @param obj The I2C object
MACRUM 6:40e873bbc5f7 135 * @param last Acknoledge
MACRUM 6:40e873bbc5f7 136 * @return The read byte
MACRUM 6:40e873bbc5f7 137 */
MACRUM 6:40e873bbc5f7 138 int i2c_byte_read(i2c_t *obj, int last);
MACRUM 6:40e873bbc5f7 139
MACRUM 6:40e873bbc5f7 140 /** Write one byte
MACRUM 6:40e873bbc5f7 141 *
MACRUM 6:40e873bbc5f7 142 * @param obj The I2C object
MACRUM 6:40e873bbc5f7 143 * @param data Byte to be written
MACRUM 6:40e873bbc5f7 144 * @return 0 if NAK was received, 1 if ACK was received, 2 for timeout.
MACRUM 6:40e873bbc5f7 145 */
MACRUM 6:40e873bbc5f7 146 int i2c_byte_write(i2c_t *obj, int data);
MACRUM 6:40e873bbc5f7 147
MACRUM 6:40e873bbc5f7 148 /**@}*/
MACRUM 6:40e873bbc5f7 149
MACRUM 6:40e873bbc5f7 150 #if DEVICE_I2CSLAVE
MACRUM 6:40e873bbc5f7 151
MACRUM 6:40e873bbc5f7 152 /**
MACRUM 6:40e873bbc5f7 153 * \defgroup SynchI2C Synchronous I2C Hardware Abstraction Layer for slave
MACRUM 6:40e873bbc5f7 154 * @{
MACRUM 6:40e873bbc5f7 155 */
MACRUM 6:40e873bbc5f7 156
MACRUM 6:40e873bbc5f7 157 /** Configure I2C as slave or master.
MACRUM 6:40e873bbc5f7 158 * @param obj The I2C object
MACRUM 6:40e873bbc5f7 159 * @return non-zero if a value is available
MACRUM 6:40e873bbc5f7 160 */
MACRUM 6:40e873bbc5f7 161 void i2c_slave_mode(i2c_t *obj, int enable_slave);
MACRUM 6:40e873bbc5f7 162
MACRUM 6:40e873bbc5f7 163 /** Check to see if the I2C slave has been addressed.
MACRUM 6:40e873bbc5f7 164 * @param obj The I2C object
MACRUM 6:40e873bbc5f7 165 * @return The status - 1 - read addresses, 2 - write to all slaves,
MACRUM 6:40e873bbc5f7 166 * 3 write addressed, 0 - the slave has not been addressed
MACRUM 6:40e873bbc5f7 167 */
MACRUM 6:40e873bbc5f7 168 int i2c_slave_receive(i2c_t *obj);
MACRUM 6:40e873bbc5f7 169
MACRUM 6:40e873bbc5f7 170 /** Configure I2C as slave or master.
MACRUM 6:40e873bbc5f7 171 * @param obj The I2C object
MACRUM 6:40e873bbc5f7 172 * @return non-zero if a value is available
MACRUM 6:40e873bbc5f7 173 */
MACRUM 6:40e873bbc5f7 174 int i2c_slave_read(i2c_t *obj, char *data, int length);
MACRUM 6:40e873bbc5f7 175
MACRUM 6:40e873bbc5f7 176 /** Configure I2C as slave or master.
MACRUM 6:40e873bbc5f7 177 * @param obj The I2C object
MACRUM 6:40e873bbc5f7 178 * @return non-zero if a value is available
MACRUM 6:40e873bbc5f7 179 */
MACRUM 6:40e873bbc5f7 180 int i2c_slave_write(i2c_t *obj, const char *data, int length);
MACRUM 6:40e873bbc5f7 181
MACRUM 6:40e873bbc5f7 182 /** Configure I2C address.
MACRUM 6:40e873bbc5f7 183 * @param obj The I2C object
MACRUM 6:40e873bbc5f7 184 * @param idx Currently not used
MACRUM 6:40e873bbc5f7 185 * @param address The address to be set
MACRUM 6:40e873bbc5f7 186 * @param mask Currently not used
MACRUM 6:40e873bbc5f7 187 */
MACRUM 6:40e873bbc5f7 188 void i2c_slave_address(i2c_t *obj, int idx, uint32_t address, uint32_t mask);
MACRUM 6:40e873bbc5f7 189
MACRUM 6:40e873bbc5f7 190 #endif
MACRUM 6:40e873bbc5f7 191
MACRUM 6:40e873bbc5f7 192 /**@}*/
MACRUM 6:40e873bbc5f7 193
MACRUM 6:40e873bbc5f7 194 #if DEVICE_I2C_ASYNCH
MACRUM 6:40e873bbc5f7 195
MACRUM 6:40e873bbc5f7 196 /**
MACRUM 6:40e873bbc5f7 197 * \defgroup hal_AsynchI2C Asynchronous I2C Hardware Abstraction Layer
MACRUM 6:40e873bbc5f7 198 * @{
MACRUM 6:40e873bbc5f7 199 */
MACRUM 6:40e873bbc5f7 200
MACRUM 6:40e873bbc5f7 201 /** Start I2C asynchronous transfer
MACRUM 6:40e873bbc5f7 202 *
MACRUM 6:40e873bbc5f7 203 * @param obj The I2C object
MACRUM 6:40e873bbc5f7 204 * @param tx The transmit buffer
MACRUM 6:40e873bbc5f7 205 * @param tx_length The number of bytes to transmit
MACRUM 6:40e873bbc5f7 206 * @param rx The receive buffer
MACRUM 6:40e873bbc5f7 207 * @param rx_length The number of bytes to receive
MACRUM 6:40e873bbc5f7 208 * @param address The address to be set - 7bit or 9bit
MACRUM 6:40e873bbc5f7 209 * @param stop If true, stop will be generated after the transfer is done
MACRUM 6:40e873bbc5f7 210 * @param handler The I2C IRQ handler to be set
MACRUM 6:40e873bbc5f7 211 * @param hint DMA hint usage
MACRUM 6:40e873bbc5f7 212 */
MACRUM 6:40e873bbc5f7 213 void i2c_transfer_asynch(i2c_t *obj, const void *tx, size_t tx_length, void *rx, size_t rx_length, uint32_t address, uint32_t stop, uint32_t handler, uint32_t event, DMAUsage hint);
MACRUM 6:40e873bbc5f7 214
MACRUM 6:40e873bbc5f7 215 /** The asynchronous IRQ handler
MACRUM 6:40e873bbc5f7 216 *
MACRUM 6:40e873bbc5f7 217 * @param obj The I2C object which holds the transfer information
MACRUM 6:40e873bbc5f7 218 * @return Event flags if a transfer termination condition was met, otherwise return 0.
MACRUM 6:40e873bbc5f7 219 */
MACRUM 6:40e873bbc5f7 220 uint32_t i2c_irq_handler_asynch(i2c_t *obj);
MACRUM 6:40e873bbc5f7 221
MACRUM 6:40e873bbc5f7 222 /** Attempts to determine if the I2C peripheral is already in use
MACRUM 6:40e873bbc5f7 223 *
MACRUM 6:40e873bbc5f7 224 * @param obj The I2C object
MACRUM 6:40e873bbc5f7 225 * @return Non-zero if the I2C module is active or zero if it is not
MACRUM 6:40e873bbc5f7 226 */
MACRUM 6:40e873bbc5f7 227 uint8_t i2c_active(i2c_t *obj);
MACRUM 6:40e873bbc5f7 228
MACRUM 6:40e873bbc5f7 229 /** Abort asynchronous transfer
MACRUM 6:40e873bbc5f7 230 *
MACRUM 6:40e873bbc5f7 231 * This function does not perform any check - that should happen in upper layers.
MACRUM 6:40e873bbc5f7 232 * @param obj The I2C object
MACRUM 6:40e873bbc5f7 233 */
MACRUM 6:40e873bbc5f7 234 void i2c_abort_asynch(i2c_t *obj);
MACRUM 6:40e873bbc5f7 235
MACRUM 6:40e873bbc5f7 236 #endif
MACRUM 6:40e873bbc5f7 237
MACRUM 6:40e873bbc5f7 238 /**@}*/
MACRUM 6:40e873bbc5f7 239
MACRUM 6:40e873bbc5f7 240 #ifdef __cplusplus
MACRUM 6:40e873bbc5f7 241 }
MACRUM 6:40e873bbc5f7 242 #endif
MACRUM 6:40e873bbc5f7 243
MACRUM 6:40e873bbc5f7 244 #endif
MACRUM 6:40e873bbc5f7 245
MACRUM 6:40e873bbc5f7 246 #endif
MACRUM 6:40e873bbc5f7 247
MACRUM 6:40e873bbc5f7 248 /** @}*/