Toyomasa Watarai / Mbed OS armcc_info

Describes predefine macros for mbed online compiler (armcc)

mbed/TARGET_LPC1114/core_ca_mmu.h@6:40e873bbc5f7, 2017-03-16 (annotated)

Committer:
MACRUM
Date:
Thu Mar 16 21:58:09 2017 +0900
Revision:
6:40e873bbc5f7
Add licence header info

Who changed what in which revision?

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MACRUM 6:40e873bbc5f7 1 ;/**************************************************************************//**
MACRUM 6:40e873bbc5f7 2 ; * @file core_ca_mmu.h
MACRUM 6:40e873bbc5f7 3 ; * @brief MMU Startup File for A9_MP Device Series
MACRUM 6:40e873bbc5f7 4 ; * @version V1.01
MACRUM 6:40e873bbc5f7 5 ; * @date 10 Sept 2014
MACRUM 6:40e873bbc5f7 6 ; *
MACRUM 6:40e873bbc5f7 7 ; * @note
MACRUM 6:40e873bbc5f7 8 ; *
MACRUM 6:40e873bbc5f7 9 ; ******************************************************************************/
MACRUM 6:40e873bbc5f7 10 ;/* Copyright (c) 2012-2014 ARM LIMITED
MACRUM 6:40e873bbc5f7 11 ;
MACRUM 6:40e873bbc5f7 12 ; All rights reserved.
MACRUM 6:40e873bbc5f7 13 ; Redistribution and use in source and binary forms, with or without
MACRUM 6:40e873bbc5f7 14 ; modification, are permitted provided that the following conditions are met:
MACRUM 6:40e873bbc5f7 15 ; - Redistributions of source code must retain the above copyright
MACRUM 6:40e873bbc5f7 16 ; notice, this list of conditions and the following disclaimer.
MACRUM 6:40e873bbc5f7 17 ; - Redistributions in binary form must reproduce the above copyright
MACRUM 6:40e873bbc5f7 18 ; notice, this list of conditions and the following disclaimer in the
MACRUM 6:40e873bbc5f7 19 ; documentation and/or other materials provided with the distribution.
MACRUM 6:40e873bbc5f7 20 ; - Neither the name of ARM nor the names of its contributors may be used
MACRUM 6:40e873bbc5f7 21 ; to endorse or promote products derived from this software without
MACRUM 6:40e873bbc5f7 22 ; specific prior written permission.
MACRUM 6:40e873bbc5f7 23 ; *
MACRUM 6:40e873bbc5f7 24 ; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
MACRUM 6:40e873bbc5f7 25 ; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
MACRUM 6:40e873bbc5f7 26 ; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
MACRUM 6:40e873bbc5f7 27 ; ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
MACRUM 6:40e873bbc5f7 28 ; LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
MACRUM 6:40e873bbc5f7 29 ; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
MACRUM 6:40e873bbc5f7 30 ; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
MACRUM 6:40e873bbc5f7 31 ; INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
MACRUM 6:40e873bbc5f7 32 ; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
MACRUM 6:40e873bbc5f7 33 ; ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
MACRUM 6:40e873bbc5f7 34 ; POSSIBILITY OF SUCH DAMAGE.
MACRUM 6:40e873bbc5f7 35 ; ---------------------------------------------------------------------------*/
MACRUM 6:40e873bbc5f7 36
MACRUM 6:40e873bbc5f7 37 #ifdef __cplusplus
MACRUM 6:40e873bbc5f7 38 extern "C" {
MACRUM 6:40e873bbc5f7 39 #endif
MACRUM 6:40e873bbc5f7 40
MACRUM 6:40e873bbc5f7 41 #ifndef _MMU_FUNC_H
MACRUM 6:40e873bbc5f7 42 #define _MMU_FUNC_H
MACRUM 6:40e873bbc5f7 43
MACRUM 6:40e873bbc5f7 44 #define SECTION_DESCRIPTOR (0x2)
MACRUM 6:40e873bbc5f7 45 #define SECTION_MASK (0xFFFFFFFC)
MACRUM 6:40e873bbc5f7 46
MACRUM 6:40e873bbc5f7 47 #define SECTION_TEXCB_MASK (0xFFFF8FF3)
MACRUM 6:40e873bbc5f7 48 #define SECTION_B_SHIFT (2)
MACRUM 6:40e873bbc5f7 49 #define SECTION_C_SHIFT (3)
MACRUM 6:40e873bbc5f7 50 #define SECTION_TEX0_SHIFT (12)
MACRUM 6:40e873bbc5f7 51 #define SECTION_TEX1_SHIFT (13)
MACRUM 6:40e873bbc5f7 52 #define SECTION_TEX2_SHIFT (14)
MACRUM 6:40e873bbc5f7 53
MACRUM 6:40e873bbc5f7 54 #define SECTION_XN_MASK (0xFFFFFFEF)
MACRUM 6:40e873bbc5f7 55 #define SECTION_XN_SHIFT (4)
MACRUM 6:40e873bbc5f7 56
MACRUM 6:40e873bbc5f7 57 #define SECTION_DOMAIN_MASK (0xFFFFFE1F)
MACRUM 6:40e873bbc5f7 58 #define SECTION_DOMAIN_SHIFT (5)
MACRUM 6:40e873bbc5f7 59
MACRUM 6:40e873bbc5f7 60 #define SECTION_P_MASK (0xFFFFFDFF)
MACRUM 6:40e873bbc5f7 61 #define SECTION_P_SHIFT (9)
MACRUM 6:40e873bbc5f7 62
MACRUM 6:40e873bbc5f7 63 #define SECTION_AP_MASK (0xFFFF73FF)
MACRUM 6:40e873bbc5f7 64 #define SECTION_AP_SHIFT (10)
MACRUM 6:40e873bbc5f7 65 #define SECTION_AP2_SHIFT (15)
MACRUM 6:40e873bbc5f7 66
MACRUM 6:40e873bbc5f7 67 #define SECTION_S_MASK (0xFFFEFFFF)
MACRUM 6:40e873bbc5f7 68 #define SECTION_S_SHIFT (16)
MACRUM 6:40e873bbc5f7 69
MACRUM 6:40e873bbc5f7 70 #define SECTION_NG_MASK (0xFFFDFFFF)
MACRUM 6:40e873bbc5f7 71 #define SECTION_NG_SHIFT (17)
MACRUM 6:40e873bbc5f7 72
MACRUM 6:40e873bbc5f7 73 #define SECTION_NS_MASK (0xFFF7FFFF)
MACRUM 6:40e873bbc5f7 74 #define SECTION_NS_SHIFT (19)
MACRUM 6:40e873bbc5f7 75
MACRUM 6:40e873bbc5f7 76
MACRUM 6:40e873bbc5f7 77 #define PAGE_L1_DESCRIPTOR (0x1)
MACRUM 6:40e873bbc5f7 78 #define PAGE_L1_MASK (0xFFFFFFFC)
MACRUM 6:40e873bbc5f7 79
MACRUM 6:40e873bbc5f7 80 #define PAGE_L2_4K_DESC (0x2)
MACRUM 6:40e873bbc5f7 81 #define PAGE_L2_4K_MASK (0xFFFFFFFD)
MACRUM 6:40e873bbc5f7 82
MACRUM 6:40e873bbc5f7 83 #define PAGE_L2_64K_DESC (0x1)
MACRUM 6:40e873bbc5f7 84 #define PAGE_L2_64K_MASK (0xFFFFFFFC)
MACRUM 6:40e873bbc5f7 85
MACRUM 6:40e873bbc5f7 86 #define PAGE_4K_TEXCB_MASK (0xFFFFFE33)
MACRUM 6:40e873bbc5f7 87 #define PAGE_4K_B_SHIFT (2)
MACRUM 6:40e873bbc5f7 88 #define PAGE_4K_C_SHIFT (3)
MACRUM 6:40e873bbc5f7 89 #define PAGE_4K_TEX0_SHIFT (6)
MACRUM 6:40e873bbc5f7 90 #define PAGE_4K_TEX1_SHIFT (7)
MACRUM 6:40e873bbc5f7 91 #define PAGE_4K_TEX2_SHIFT (8)
MACRUM 6:40e873bbc5f7 92
MACRUM 6:40e873bbc5f7 93 #define PAGE_64K_TEXCB_MASK (0xFFFF8FF3)
MACRUM 6:40e873bbc5f7 94 #define PAGE_64K_B_SHIFT (2)
MACRUM 6:40e873bbc5f7 95 #define PAGE_64K_C_SHIFT (3)
MACRUM 6:40e873bbc5f7 96 #define PAGE_64K_TEX0_SHIFT (12)
MACRUM 6:40e873bbc5f7 97 #define PAGE_64K_TEX1_SHIFT (13)
MACRUM 6:40e873bbc5f7 98 #define PAGE_64K_TEX2_SHIFT (14)
MACRUM 6:40e873bbc5f7 99
MACRUM 6:40e873bbc5f7 100 #define PAGE_TEXCB_MASK (0xFFFF8FF3)
MACRUM 6:40e873bbc5f7 101 #define PAGE_B_SHIFT (2)
MACRUM 6:40e873bbc5f7 102 #define PAGE_C_SHIFT (3)
MACRUM 6:40e873bbc5f7 103 #define PAGE_TEX_SHIFT (12)
MACRUM 6:40e873bbc5f7 104
MACRUM 6:40e873bbc5f7 105 #define PAGE_XN_4K_MASK (0xFFFFFFFE)
MACRUM 6:40e873bbc5f7 106 #define PAGE_XN_4K_SHIFT (0)
MACRUM 6:40e873bbc5f7 107 #define PAGE_XN_64K_MASK (0xFFFF7FFF)
MACRUM 6:40e873bbc5f7 108 #define PAGE_XN_64K_SHIFT (15)
MACRUM 6:40e873bbc5f7 109
MACRUM 6:40e873bbc5f7 110
MACRUM 6:40e873bbc5f7 111 #define PAGE_DOMAIN_MASK (0xFFFFFE1F)
MACRUM 6:40e873bbc5f7 112 #define PAGE_DOMAIN_SHIFT (5)
MACRUM 6:40e873bbc5f7 113
MACRUM 6:40e873bbc5f7 114 #define PAGE_P_MASK (0xFFFFFDFF)
MACRUM 6:40e873bbc5f7 115 #define PAGE_P_SHIFT (9)
MACRUM 6:40e873bbc5f7 116
MACRUM 6:40e873bbc5f7 117 #define PAGE_AP_MASK (0xFFFFFDCF)
MACRUM 6:40e873bbc5f7 118 #define PAGE_AP_SHIFT (4)
MACRUM 6:40e873bbc5f7 119 #define PAGE_AP2_SHIFT (9)
MACRUM 6:40e873bbc5f7 120
MACRUM 6:40e873bbc5f7 121 #define PAGE_S_MASK (0xFFFFFBFF)
MACRUM 6:40e873bbc5f7 122 #define PAGE_S_SHIFT (10)
MACRUM 6:40e873bbc5f7 123
MACRUM 6:40e873bbc5f7 124 #define PAGE_NG_MASK (0xFFFFF7FF)
MACRUM 6:40e873bbc5f7 125 #define PAGE_NG_SHIFT (11)
MACRUM 6:40e873bbc5f7 126
MACRUM 6:40e873bbc5f7 127 #define PAGE_NS_MASK (0xFFFFFFF7)
MACRUM 6:40e873bbc5f7 128 #define PAGE_NS_SHIFT (3)
MACRUM 6:40e873bbc5f7 129
MACRUM 6:40e873bbc5f7 130 #define OFFSET_1M (0x00100000)
MACRUM 6:40e873bbc5f7 131 #define OFFSET_64K (0x00010000)
MACRUM 6:40e873bbc5f7 132 #define OFFSET_4K (0x00001000)
MACRUM 6:40e873bbc5f7 133
MACRUM 6:40e873bbc5f7 134 #define DESCRIPTOR_FAULT (0x00000000)
MACRUM 6:40e873bbc5f7 135
MACRUM 6:40e873bbc5f7 136 /* ########################### MMU Function Access ########################### */
MACRUM 6:40e873bbc5f7 137 /** \ingroup MMU_FunctionInterface
MACRUM 6:40e873bbc5f7 138 \defgroup MMU_Functions MMU Functions Interface
MACRUM 6:40e873bbc5f7 139 @{
MACRUM 6:40e873bbc5f7 140 */
MACRUM 6:40e873bbc5f7 141
MACRUM 6:40e873bbc5f7 142 /* Attributes enumerations */
MACRUM 6:40e873bbc5f7 143
MACRUM 6:40e873bbc5f7 144 /* Region size attributes */
MACRUM 6:40e873bbc5f7 145 typedef enum
MACRUM 6:40e873bbc5f7 146 {
MACRUM 6:40e873bbc5f7 147 SECTION,
MACRUM 6:40e873bbc5f7 148 PAGE_4k,
MACRUM 6:40e873bbc5f7 149 PAGE_64k,
MACRUM 6:40e873bbc5f7 150 } mmu_region_size_Type;
MACRUM 6:40e873bbc5f7 151
MACRUM 6:40e873bbc5f7 152 /* Region type attributes */
MACRUM 6:40e873bbc5f7 153 typedef enum
MACRUM 6:40e873bbc5f7 154 {
MACRUM 6:40e873bbc5f7 155 NORMAL,
MACRUM 6:40e873bbc5f7 156 DEVICE,
MACRUM 6:40e873bbc5f7 157 SHARED_DEVICE,
MACRUM 6:40e873bbc5f7 158 NON_SHARED_DEVICE,
MACRUM 6:40e873bbc5f7 159 STRONGLY_ORDERED
MACRUM 6:40e873bbc5f7 160 } mmu_memory_Type;
MACRUM 6:40e873bbc5f7 161
MACRUM 6:40e873bbc5f7 162 /* Region cacheability attributes */
MACRUM 6:40e873bbc5f7 163 typedef enum
MACRUM 6:40e873bbc5f7 164 {
MACRUM 6:40e873bbc5f7 165 NON_CACHEABLE,
MACRUM 6:40e873bbc5f7 166 WB_WA,
MACRUM 6:40e873bbc5f7 167 WT,
MACRUM 6:40e873bbc5f7 168 WB_NO_WA,
MACRUM 6:40e873bbc5f7 169 } mmu_cacheability_Type;
MACRUM 6:40e873bbc5f7 170
MACRUM 6:40e873bbc5f7 171 /* Region parity check attributes */
MACRUM 6:40e873bbc5f7 172 typedef enum
MACRUM 6:40e873bbc5f7 173 {
MACRUM 6:40e873bbc5f7 174 ECC_DISABLED,
MACRUM 6:40e873bbc5f7 175 ECC_ENABLED,
MACRUM 6:40e873bbc5f7 176 } mmu_ecc_check_Type;
MACRUM 6:40e873bbc5f7 177
MACRUM 6:40e873bbc5f7 178 /* Region execution attributes */
MACRUM 6:40e873bbc5f7 179 typedef enum
MACRUM 6:40e873bbc5f7 180 {
MACRUM 6:40e873bbc5f7 181 EXECUTE,
MACRUM 6:40e873bbc5f7 182 NON_EXECUTE,
MACRUM 6:40e873bbc5f7 183 } mmu_execute_Type;
MACRUM 6:40e873bbc5f7 184
MACRUM 6:40e873bbc5f7 185 /* Region global attributes */
MACRUM 6:40e873bbc5f7 186 typedef enum
MACRUM 6:40e873bbc5f7 187 {
MACRUM 6:40e873bbc5f7 188 GLOBAL,
MACRUM 6:40e873bbc5f7 189 NON_GLOBAL,
MACRUM 6:40e873bbc5f7 190 } mmu_global_Type;
MACRUM 6:40e873bbc5f7 191
MACRUM 6:40e873bbc5f7 192 /* Region shareability attributes */
MACRUM 6:40e873bbc5f7 193 typedef enum
MACRUM 6:40e873bbc5f7 194 {
MACRUM 6:40e873bbc5f7 195 NON_SHARED,
MACRUM 6:40e873bbc5f7 196 SHARED,
MACRUM 6:40e873bbc5f7 197 } mmu_shared_Type;
MACRUM 6:40e873bbc5f7 198
MACRUM 6:40e873bbc5f7 199 /* Region security attributes */
MACRUM 6:40e873bbc5f7 200 typedef enum
MACRUM 6:40e873bbc5f7 201 {
MACRUM 6:40e873bbc5f7 202 SECURE,
MACRUM 6:40e873bbc5f7 203 NON_SECURE,
MACRUM 6:40e873bbc5f7 204 } mmu_secure_Type;
MACRUM 6:40e873bbc5f7 205
MACRUM 6:40e873bbc5f7 206 /* Region access attributes */
MACRUM 6:40e873bbc5f7 207 typedef enum
MACRUM 6:40e873bbc5f7 208 {
MACRUM 6:40e873bbc5f7 209 NO_ACCESS,
MACRUM 6:40e873bbc5f7 210 RW,
MACRUM 6:40e873bbc5f7 211 READ,
MACRUM 6:40e873bbc5f7 212 } mmu_access_Type;
MACRUM 6:40e873bbc5f7 213
MACRUM 6:40e873bbc5f7 214 /* Memory Region definition */
MACRUM 6:40e873bbc5f7 215 typedef struct RegionStruct {
MACRUM 6:40e873bbc5f7 216 mmu_region_size_Type rg_t;
MACRUM 6:40e873bbc5f7 217 mmu_memory_Type mem_t;
MACRUM 6:40e873bbc5f7 218 uint8_t domain;
MACRUM 6:40e873bbc5f7 219 mmu_cacheability_Type inner_norm_t;
MACRUM 6:40e873bbc5f7 220 mmu_cacheability_Type outer_norm_t;
MACRUM 6:40e873bbc5f7 221 mmu_ecc_check_Type e_t;
MACRUM 6:40e873bbc5f7 222 mmu_execute_Type xn_t;
MACRUM 6:40e873bbc5f7 223 mmu_global_Type g_t;
MACRUM 6:40e873bbc5f7 224 mmu_secure_Type sec_t;
MACRUM 6:40e873bbc5f7 225 mmu_access_Type priv_t;
MACRUM 6:40e873bbc5f7 226 mmu_access_Type user_t;
MACRUM 6:40e873bbc5f7 227 mmu_shared_Type sh_t;
MACRUM 6:40e873bbc5f7 228
MACRUM 6:40e873bbc5f7 229 } mmu_region_attributes_Type;
MACRUM 6:40e873bbc5f7 230
MACRUM 6:40e873bbc5f7 231 /** \brief Set section execution-never attribute
MACRUM 6:40e873bbc5f7 232
MACRUM 6:40e873bbc5f7 233 The function sets section execution-never attribute
MACRUM 6:40e873bbc5f7 234
MACRUM 6:40e873bbc5f7 235 \param [out] descriptor_l1 L1 descriptor.
MACRUM 6:40e873bbc5f7 236 \param [in] xn Section execution-never attribute : EXECUTE , NON_EXECUTE.
MACRUM 6:40e873bbc5f7 237
MACRUM 6:40e873bbc5f7 238 \return 0
MACRUM 6:40e873bbc5f7 239 */
MACRUM 6:40e873bbc5f7 240 __STATIC_INLINE int __xn_section(uint32_t *descriptor_l1, mmu_execute_Type xn)
MACRUM 6:40e873bbc5f7 241 {
MACRUM 6:40e873bbc5f7 242 *descriptor_l1 &= SECTION_XN_MASK;
MACRUM 6:40e873bbc5f7 243 *descriptor_l1 |= ((xn & 0x1) << SECTION_XN_SHIFT);
MACRUM 6:40e873bbc5f7 244 return 0;
MACRUM 6:40e873bbc5f7 245 }
MACRUM 6:40e873bbc5f7 246
MACRUM 6:40e873bbc5f7 247 /** \brief Set section domain
MACRUM 6:40e873bbc5f7 248
MACRUM 6:40e873bbc5f7 249 The function sets section domain
MACRUM 6:40e873bbc5f7 250
MACRUM 6:40e873bbc5f7 251 \param [out] descriptor_l1 L1 descriptor.
MACRUM 6:40e873bbc5f7 252 \param [in] domain Section domain
MACRUM 6:40e873bbc5f7 253
MACRUM 6:40e873bbc5f7 254 \return 0
MACRUM 6:40e873bbc5f7 255 */
MACRUM 6:40e873bbc5f7 256 __STATIC_INLINE int __domain_section(uint32_t *descriptor_l1, uint8_t domain)
MACRUM 6:40e873bbc5f7 257 {
MACRUM 6:40e873bbc5f7 258 *descriptor_l1 &= SECTION_DOMAIN_MASK;
MACRUM 6:40e873bbc5f7 259 *descriptor_l1 |= ((domain & 0xF) << SECTION_DOMAIN_SHIFT);
MACRUM 6:40e873bbc5f7 260 return 0;
MACRUM 6:40e873bbc5f7 261 }
MACRUM 6:40e873bbc5f7 262
MACRUM 6:40e873bbc5f7 263 /** \brief Set section parity check
MACRUM 6:40e873bbc5f7 264
MACRUM 6:40e873bbc5f7 265 The function sets section parity check
MACRUM 6:40e873bbc5f7 266
MACRUM 6:40e873bbc5f7 267 \param [out] descriptor_l1 L1 descriptor.
MACRUM 6:40e873bbc5f7 268 \param [in] p_bit Parity check: ECC_DISABLED, ECC_ENABLED
MACRUM 6:40e873bbc5f7 269
MACRUM 6:40e873bbc5f7 270 \return 0
MACRUM 6:40e873bbc5f7 271 */
MACRUM 6:40e873bbc5f7 272 __STATIC_INLINE int __p_section(uint32_t *descriptor_l1, mmu_ecc_check_Type p_bit)
MACRUM 6:40e873bbc5f7 273 {
MACRUM 6:40e873bbc5f7 274 *descriptor_l1 &= SECTION_P_MASK;
MACRUM 6:40e873bbc5f7 275 *descriptor_l1 |= ((p_bit & 0x1) << SECTION_P_SHIFT);
MACRUM 6:40e873bbc5f7 276 return 0;
MACRUM 6:40e873bbc5f7 277 }
MACRUM 6:40e873bbc5f7 278
MACRUM 6:40e873bbc5f7 279 /** \brief Set section access privileges
MACRUM 6:40e873bbc5f7 280
MACRUM 6:40e873bbc5f7 281 The function sets section access privileges
MACRUM 6:40e873bbc5f7 282
MACRUM 6:40e873bbc5f7 283 \param [out] descriptor_l1 L1 descriptor.
MACRUM 6:40e873bbc5f7 284 \param [in] user User Level Access: NO_ACCESS, RW, READ
MACRUM 6:40e873bbc5f7 285 \param [in] priv Privilege Level Access: NO_ACCESS, RW, READ
MACRUM 6:40e873bbc5f7 286 \param [in] afe Access flag enable
MACRUM 6:40e873bbc5f7 287
MACRUM 6:40e873bbc5f7 288 \return 0
MACRUM 6:40e873bbc5f7 289 */
MACRUM 6:40e873bbc5f7 290 __STATIC_INLINE int __ap_section(uint32_t *descriptor_l1, mmu_access_Type user, mmu_access_Type priv, uint32_t afe)
MACRUM 6:40e873bbc5f7 291 {
MACRUM 6:40e873bbc5f7 292 uint32_t ap = 0;
MACRUM 6:40e873bbc5f7 293
MACRUM 6:40e873bbc5f7 294 if (afe == 0) { //full access
MACRUM 6:40e873bbc5f7 295 if ((priv == NO_ACCESS) && (user == NO_ACCESS)) { ap = 0x0; }
MACRUM 6:40e873bbc5f7 296 else if ((priv == RW) && (user == NO_ACCESS)) { ap = 0x1; }
MACRUM 6:40e873bbc5f7 297 else if ((priv == RW) && (user == READ)) { ap = 0x2; }
MACRUM 6:40e873bbc5f7 298 else if ((priv == RW) && (user == RW)) { ap = 0x3; }
MACRUM 6:40e873bbc5f7 299 else if ((priv == READ) && (user == NO_ACCESS)) { ap = 0x5; }
MACRUM 6:40e873bbc5f7 300 else if ((priv == READ) && (user == READ)) { ap = 0x7; }
MACRUM 6:40e873bbc5f7 301 }
MACRUM 6:40e873bbc5f7 302
MACRUM 6:40e873bbc5f7 303 else { //Simplified access
MACRUM 6:40e873bbc5f7 304 if ((priv == RW) && (user == NO_ACCESS)) { ap = 0x1; }
MACRUM 6:40e873bbc5f7 305 else if ((priv == RW) && (user == RW)) { ap = 0x3; }
MACRUM 6:40e873bbc5f7 306 else if ((priv == READ) && (user == NO_ACCESS)) { ap = 0x5; }
MACRUM 6:40e873bbc5f7 307 else if ((priv == READ) && (user == READ)) { ap = 0x7; }
MACRUM 6:40e873bbc5f7 308 }
MACRUM 6:40e873bbc5f7 309
MACRUM 6:40e873bbc5f7 310 *descriptor_l1 &= SECTION_AP_MASK;
MACRUM 6:40e873bbc5f7 311 *descriptor_l1 |= (ap & 0x3) << SECTION_AP_SHIFT;
MACRUM 6:40e873bbc5f7 312 *descriptor_l1 |= ((ap & 0x4)>>2) << SECTION_AP2_SHIFT;
MACRUM 6:40e873bbc5f7 313
MACRUM 6:40e873bbc5f7 314 return 0;
MACRUM 6:40e873bbc5f7 315 }
MACRUM 6:40e873bbc5f7 316
MACRUM 6:40e873bbc5f7 317 /** \brief Set section shareability
MACRUM 6:40e873bbc5f7 318
MACRUM 6:40e873bbc5f7 319 The function sets section shareability
MACRUM 6:40e873bbc5f7 320
MACRUM 6:40e873bbc5f7 321 \param [out] descriptor_l1 L1 descriptor.
MACRUM 6:40e873bbc5f7 322 \param [in] s_bit Section shareability: NON_SHARED, SHARED
MACRUM 6:40e873bbc5f7 323
MACRUM 6:40e873bbc5f7 324 \return 0
MACRUM 6:40e873bbc5f7 325 */
MACRUM 6:40e873bbc5f7 326 __STATIC_INLINE int __shared_section(uint32_t *descriptor_l1, mmu_shared_Type s_bit)
MACRUM 6:40e873bbc5f7 327 {
MACRUM 6:40e873bbc5f7 328 *descriptor_l1 &= SECTION_S_MASK;
MACRUM 6:40e873bbc5f7 329 *descriptor_l1 |= ((s_bit & 0x1) << SECTION_S_SHIFT);
MACRUM 6:40e873bbc5f7 330 return 0;
MACRUM 6:40e873bbc5f7 331 }
MACRUM 6:40e873bbc5f7 332
MACRUM 6:40e873bbc5f7 333 /** \brief Set section Global attribute
MACRUM 6:40e873bbc5f7 334
MACRUM 6:40e873bbc5f7 335 The function sets section Global attribute
MACRUM 6:40e873bbc5f7 336
MACRUM 6:40e873bbc5f7 337 \param [out] descriptor_l1 L1 descriptor.
MACRUM 6:40e873bbc5f7 338 \param [in] g_bit Section attribute: GLOBAL, NON_GLOBAL
MACRUM 6:40e873bbc5f7 339
MACRUM 6:40e873bbc5f7 340 \return 0
MACRUM 6:40e873bbc5f7 341 */
MACRUM 6:40e873bbc5f7 342 __STATIC_INLINE int __global_section(uint32_t *descriptor_l1, mmu_global_Type g_bit)
MACRUM 6:40e873bbc5f7 343 {
MACRUM 6:40e873bbc5f7 344 *descriptor_l1 &= SECTION_NG_MASK;
MACRUM 6:40e873bbc5f7 345 *descriptor_l1 |= ((g_bit & 0x1) << SECTION_NG_SHIFT);
MACRUM 6:40e873bbc5f7 346 return 0;
MACRUM 6:40e873bbc5f7 347 }
MACRUM 6:40e873bbc5f7 348
MACRUM 6:40e873bbc5f7 349 /** \brief Set section Security attribute
MACRUM 6:40e873bbc5f7 350
MACRUM 6:40e873bbc5f7 351 The function sets section Global attribute
MACRUM 6:40e873bbc5f7 352
MACRUM 6:40e873bbc5f7 353 \param [out] descriptor_l1 L1 descriptor.
MACRUM 6:40e873bbc5f7 354 \param [in] s_bit Section Security attribute: SECURE, NON_SECURE
MACRUM 6:40e873bbc5f7 355
MACRUM 6:40e873bbc5f7 356 \return 0
MACRUM 6:40e873bbc5f7 357 */
MACRUM 6:40e873bbc5f7 358 __STATIC_INLINE int __secure_section(uint32_t *descriptor_l1, mmu_secure_Type s_bit)
MACRUM 6:40e873bbc5f7 359 {
MACRUM 6:40e873bbc5f7 360 *descriptor_l1 &= SECTION_NS_MASK;
MACRUM 6:40e873bbc5f7 361 *descriptor_l1 |= ((s_bit & 0x1) << SECTION_NS_SHIFT);
MACRUM 6:40e873bbc5f7 362 return 0;
MACRUM 6:40e873bbc5f7 363 }
MACRUM 6:40e873bbc5f7 364
MACRUM 6:40e873bbc5f7 365 /* Page 4k or 64k */
MACRUM 6:40e873bbc5f7 366 /** \brief Set 4k/64k page execution-never attribute
MACRUM 6:40e873bbc5f7 367
MACRUM 6:40e873bbc5f7 368 The function sets 4k/64k page execution-never attribute
MACRUM 6:40e873bbc5f7 369
MACRUM 6:40e873bbc5f7 370 \param [out] descriptor_l2 L2 descriptor.
MACRUM 6:40e873bbc5f7 371 \param [in] xn Page execution-never attribute : EXECUTE , NON_EXECUTE.
MACRUM 6:40e873bbc5f7 372 \param [in] page Page size: PAGE_4k, PAGE_64k,
MACRUM 6:40e873bbc5f7 373
MACRUM 6:40e873bbc5f7 374 \return 0
MACRUM 6:40e873bbc5f7 375 */
MACRUM 6:40e873bbc5f7 376 __STATIC_INLINE int __xn_page(uint32_t *descriptor_l2, mmu_execute_Type xn, mmu_region_size_Type page)
MACRUM 6:40e873bbc5f7 377 {
MACRUM 6:40e873bbc5f7 378 if (page == PAGE_4k)
MACRUM 6:40e873bbc5f7 379 {
MACRUM 6:40e873bbc5f7 380 *descriptor_l2 &= PAGE_XN_4K_MASK;
MACRUM 6:40e873bbc5f7 381 *descriptor_l2 |= ((xn & 0x1) << PAGE_XN_4K_SHIFT);
MACRUM 6:40e873bbc5f7 382 }
MACRUM 6:40e873bbc5f7 383 else
MACRUM 6:40e873bbc5f7 384 {
MACRUM 6:40e873bbc5f7 385 *descriptor_l2 &= PAGE_XN_64K_MASK;
MACRUM 6:40e873bbc5f7 386 *descriptor_l2 |= ((xn & 0x1) << PAGE_XN_64K_SHIFT);
MACRUM 6:40e873bbc5f7 387 }
MACRUM 6:40e873bbc5f7 388 return 0;
MACRUM 6:40e873bbc5f7 389 }
MACRUM 6:40e873bbc5f7 390
MACRUM 6:40e873bbc5f7 391 /** \brief Set 4k/64k page domain
MACRUM 6:40e873bbc5f7 392
MACRUM 6:40e873bbc5f7 393 The function sets 4k/64k page domain
MACRUM 6:40e873bbc5f7 394
MACRUM 6:40e873bbc5f7 395 \param [out] descriptor_l1 L1 descriptor.
MACRUM 6:40e873bbc5f7 396 \param [in] domain Page domain
MACRUM 6:40e873bbc5f7 397
MACRUM 6:40e873bbc5f7 398 \return 0
MACRUM 6:40e873bbc5f7 399 */
MACRUM 6:40e873bbc5f7 400 __STATIC_INLINE int __domain_page(uint32_t *descriptor_l1, uint8_t domain)
MACRUM 6:40e873bbc5f7 401 {
MACRUM 6:40e873bbc5f7 402 *descriptor_l1 &= PAGE_DOMAIN_MASK;
MACRUM 6:40e873bbc5f7 403 *descriptor_l1 |= ((domain & 0xf) << PAGE_DOMAIN_SHIFT);
MACRUM 6:40e873bbc5f7 404 return 0;
MACRUM 6:40e873bbc5f7 405 }
MACRUM 6:40e873bbc5f7 406
MACRUM 6:40e873bbc5f7 407 /** \brief Set 4k/64k page parity check
MACRUM 6:40e873bbc5f7 408
MACRUM 6:40e873bbc5f7 409 The function sets 4k/64k page parity check
MACRUM 6:40e873bbc5f7 410
MACRUM 6:40e873bbc5f7 411 \param [out] descriptor_l1 L1 descriptor.
MACRUM 6:40e873bbc5f7 412 \param [in] p_bit Parity check: ECC_DISABLED, ECC_ENABLED
MACRUM 6:40e873bbc5f7 413
MACRUM 6:40e873bbc5f7 414 \return 0
MACRUM 6:40e873bbc5f7 415 */
MACRUM 6:40e873bbc5f7 416 __STATIC_INLINE int __p_page(uint32_t *descriptor_l1, mmu_ecc_check_Type p_bit)
MACRUM 6:40e873bbc5f7 417 {
MACRUM 6:40e873bbc5f7 418 *descriptor_l1 &= SECTION_P_MASK;
MACRUM 6:40e873bbc5f7 419 *descriptor_l1 |= ((p_bit & 0x1) << SECTION_P_SHIFT);
MACRUM 6:40e873bbc5f7 420 return 0;
MACRUM 6:40e873bbc5f7 421 }
MACRUM 6:40e873bbc5f7 422
MACRUM 6:40e873bbc5f7 423 /** \brief Set 4k/64k page access privileges
MACRUM 6:40e873bbc5f7 424
MACRUM 6:40e873bbc5f7 425 The function sets 4k/64k page access privileges
MACRUM 6:40e873bbc5f7 426
MACRUM 6:40e873bbc5f7 427 \param [out] descriptor_l2 L2 descriptor.
MACRUM 6:40e873bbc5f7 428 \param [in] user User Level Access: NO_ACCESS, RW, READ
MACRUM 6:40e873bbc5f7 429 \param [in] priv Privilege Level Access: NO_ACCESS, RW, READ
MACRUM 6:40e873bbc5f7 430 \param [in] afe Access flag enable
MACRUM 6:40e873bbc5f7 431
MACRUM 6:40e873bbc5f7 432 \return 0
MACRUM 6:40e873bbc5f7 433 */
MACRUM 6:40e873bbc5f7 434 __STATIC_INLINE int __ap_page(uint32_t *descriptor_l2, mmu_access_Type user, mmu_access_Type priv, uint32_t afe)
MACRUM 6:40e873bbc5f7 435 {
MACRUM 6:40e873bbc5f7 436 uint32_t ap = 0;
MACRUM 6:40e873bbc5f7 437
MACRUM 6:40e873bbc5f7 438 if (afe == 0) { //full access
MACRUM 6:40e873bbc5f7 439 if ((priv == NO_ACCESS) && (user == NO_ACCESS)) { ap = 0x0; }
MACRUM 6:40e873bbc5f7 440 else if ((priv == RW) && (user == NO_ACCESS)) { ap = 0x1; }
MACRUM 6:40e873bbc5f7 441 else if ((priv == RW) && (user == READ)) { ap = 0x2; }
MACRUM 6:40e873bbc5f7 442 else if ((priv == RW) && (user == RW)) { ap = 0x3; }
MACRUM 6:40e873bbc5f7 443 else if ((priv == READ) && (user == NO_ACCESS)) { ap = 0x5; }
MACRUM 6:40e873bbc5f7 444 else if ((priv == READ) && (user == READ)) { ap = 0x6; }
MACRUM 6:40e873bbc5f7 445 }
MACRUM 6:40e873bbc5f7 446
MACRUM 6:40e873bbc5f7 447 else { //Simplified access
MACRUM 6:40e873bbc5f7 448 if ((priv == RW) && (user == NO_ACCESS)) { ap = 0x1; }
MACRUM 6:40e873bbc5f7 449 else if ((priv == RW) && (user == RW)) { ap = 0x3; }
MACRUM 6:40e873bbc5f7 450 else if ((priv == READ) && (user == NO_ACCESS)) { ap = 0x5; }
MACRUM 6:40e873bbc5f7 451 else if ((priv == READ) && (user == READ)) { ap = 0x7; }
MACRUM 6:40e873bbc5f7 452 }
MACRUM 6:40e873bbc5f7 453
MACRUM 6:40e873bbc5f7 454 *descriptor_l2 &= PAGE_AP_MASK;
MACRUM 6:40e873bbc5f7 455 *descriptor_l2 |= (ap & 0x3) << PAGE_AP_SHIFT;
MACRUM 6:40e873bbc5f7 456 *descriptor_l2 |= ((ap & 0x4)>>2) << PAGE_AP2_SHIFT;
MACRUM 6:40e873bbc5f7 457
MACRUM 6:40e873bbc5f7 458 return 0;
MACRUM 6:40e873bbc5f7 459 }
MACRUM 6:40e873bbc5f7 460
MACRUM 6:40e873bbc5f7 461 /** \brief Set 4k/64k page shareability
MACRUM 6:40e873bbc5f7 462
MACRUM 6:40e873bbc5f7 463 The function sets 4k/64k page shareability
MACRUM 6:40e873bbc5f7 464
MACRUM 6:40e873bbc5f7 465 \param [out] descriptor_l2 L2 descriptor.
MACRUM 6:40e873bbc5f7 466 \param [in] s_bit 4k/64k page shareability: NON_SHARED, SHARED
MACRUM 6:40e873bbc5f7 467
MACRUM 6:40e873bbc5f7 468 \return 0
MACRUM 6:40e873bbc5f7 469 */
MACRUM 6:40e873bbc5f7 470 __STATIC_INLINE int __shared_page(uint32_t *descriptor_l2, mmu_shared_Type s_bit)
MACRUM 6:40e873bbc5f7 471 {
MACRUM 6:40e873bbc5f7 472 *descriptor_l2 &= PAGE_S_MASK;
MACRUM 6:40e873bbc5f7 473 *descriptor_l2 |= ((s_bit & 0x1) << PAGE_S_SHIFT);
MACRUM 6:40e873bbc5f7 474 return 0;
MACRUM 6:40e873bbc5f7 475 }
MACRUM 6:40e873bbc5f7 476
MACRUM 6:40e873bbc5f7 477 /** \brief Set 4k/64k page Global attribute
MACRUM 6:40e873bbc5f7 478
MACRUM 6:40e873bbc5f7 479 The function sets 4k/64k page Global attribute
MACRUM 6:40e873bbc5f7 480
MACRUM 6:40e873bbc5f7 481 \param [out] descriptor_l2 L2 descriptor.
MACRUM 6:40e873bbc5f7 482 \param [in] g_bit 4k/64k page attribute: GLOBAL, NON_GLOBAL
MACRUM 6:40e873bbc5f7 483
MACRUM 6:40e873bbc5f7 484 \return 0
MACRUM 6:40e873bbc5f7 485 */
MACRUM 6:40e873bbc5f7 486 __STATIC_INLINE int __global_page(uint32_t *descriptor_l2, mmu_global_Type g_bit)
MACRUM 6:40e873bbc5f7 487 {
MACRUM 6:40e873bbc5f7 488 *descriptor_l2 &= PAGE_NG_MASK;
MACRUM 6:40e873bbc5f7 489 *descriptor_l2 |= ((g_bit & 0x1) << PAGE_NG_SHIFT);
MACRUM 6:40e873bbc5f7 490 return 0;
MACRUM 6:40e873bbc5f7 491 }
MACRUM 6:40e873bbc5f7 492
MACRUM 6:40e873bbc5f7 493 /** \brief Set 4k/64k page Security attribute
MACRUM 6:40e873bbc5f7 494
MACRUM 6:40e873bbc5f7 495 The function sets 4k/64k page Global attribute
MACRUM 6:40e873bbc5f7 496
MACRUM 6:40e873bbc5f7 497 \param [out] descriptor_l1 L1 descriptor.
MACRUM 6:40e873bbc5f7 498 \param [in] s_bit 4k/64k page Security attribute: SECURE, NON_SECURE
MACRUM 6:40e873bbc5f7 499
MACRUM 6:40e873bbc5f7 500 \return 0
MACRUM 6:40e873bbc5f7 501 */
MACRUM 6:40e873bbc5f7 502 __STATIC_INLINE int __secure_page(uint32_t *descriptor_l1, mmu_secure_Type s_bit)
MACRUM 6:40e873bbc5f7 503 {
MACRUM 6:40e873bbc5f7 504 *descriptor_l1 &= PAGE_NS_MASK;
MACRUM 6:40e873bbc5f7 505 *descriptor_l1 |= ((s_bit & 0x1) << PAGE_NS_SHIFT);
MACRUM 6:40e873bbc5f7 506 return 0;
MACRUM 6:40e873bbc5f7 507 }
MACRUM 6:40e873bbc5f7 508
MACRUM 6:40e873bbc5f7 509
MACRUM 6:40e873bbc5f7 510 /** \brief Set Section memory attributes
MACRUM 6:40e873bbc5f7 511
MACRUM 6:40e873bbc5f7 512 The function sets section memory attributes
MACRUM 6:40e873bbc5f7 513
MACRUM 6:40e873bbc5f7 514 \param [out] descriptor_l1 L1 descriptor.
MACRUM 6:40e873bbc5f7 515 \param [in] mem Section memory type: NORMAL, DEVICE, SHARED_DEVICE, NON_SHARED_DEVICE, STRONGLY_ORDERED
MACRUM 6:40e873bbc5f7 516 \param [in] outer Outer cacheability: NON_CACHEABLE, WB_WA, WT, WB_NO_WA,
MACRUM 6:40e873bbc5f7 517 \param [in] inner Inner cacheability: NON_CACHEABLE, WB_WA, WT, WB_NO_WA,
MACRUM 6:40e873bbc5f7 518
MACRUM 6:40e873bbc5f7 519 \return 0
MACRUM 6:40e873bbc5f7 520 */
MACRUM 6:40e873bbc5f7 521 __STATIC_INLINE int __memory_section(uint32_t *descriptor_l1, mmu_memory_Type mem, mmu_cacheability_Type outer, mmu_cacheability_Type inner)
MACRUM 6:40e873bbc5f7 522 {
MACRUM 6:40e873bbc5f7 523 *descriptor_l1 &= SECTION_TEXCB_MASK;
MACRUM 6:40e873bbc5f7 524
MACRUM 6:40e873bbc5f7 525 if (STRONGLY_ORDERED == mem)
MACRUM 6:40e873bbc5f7 526 {
MACRUM 6:40e873bbc5f7 527 return 0;
MACRUM 6:40e873bbc5f7 528 }
MACRUM 6:40e873bbc5f7 529 else if (SHARED_DEVICE == mem)
MACRUM 6:40e873bbc5f7 530 {
MACRUM 6:40e873bbc5f7 531 *descriptor_l1 |= (1 << SECTION_B_SHIFT);
MACRUM 6:40e873bbc5f7 532 }
MACRUM 6:40e873bbc5f7 533 else if (NON_SHARED_DEVICE == mem)
MACRUM 6:40e873bbc5f7 534 {
MACRUM 6:40e873bbc5f7 535 *descriptor_l1 |= (1 << SECTION_TEX1_SHIFT);
MACRUM 6:40e873bbc5f7 536 }
MACRUM 6:40e873bbc5f7 537 else if (NORMAL == mem)
MACRUM 6:40e873bbc5f7 538 {
MACRUM 6:40e873bbc5f7 539 *descriptor_l1 |= 1 << SECTION_TEX2_SHIFT;
MACRUM 6:40e873bbc5f7 540 switch(inner)
MACRUM 6:40e873bbc5f7 541 {
MACRUM 6:40e873bbc5f7 542 case NON_CACHEABLE:
MACRUM 6:40e873bbc5f7 543 break;
MACRUM 6:40e873bbc5f7 544 case WB_WA:
MACRUM 6:40e873bbc5f7 545 *descriptor_l1 |= (1 << SECTION_B_SHIFT);
MACRUM 6:40e873bbc5f7 546 break;
MACRUM 6:40e873bbc5f7 547 case WT:
MACRUM 6:40e873bbc5f7 548 *descriptor_l1 |= 1 << SECTION_C_SHIFT;
MACRUM 6:40e873bbc5f7 549 break;
MACRUM 6:40e873bbc5f7 550 case WB_NO_WA:
MACRUM 6:40e873bbc5f7 551 *descriptor_l1 |= (1 << SECTION_B_SHIFT) | (1 << SECTION_C_SHIFT);
MACRUM 6:40e873bbc5f7 552 break;
MACRUM 6:40e873bbc5f7 553 }
MACRUM 6:40e873bbc5f7 554 switch(outer)
MACRUM 6:40e873bbc5f7 555 {
MACRUM 6:40e873bbc5f7 556 case NON_CACHEABLE:
MACRUM 6:40e873bbc5f7 557 break;
MACRUM 6:40e873bbc5f7 558 case WB_WA:
MACRUM 6:40e873bbc5f7 559 *descriptor_l1 |= (1 << SECTION_TEX0_SHIFT);
MACRUM 6:40e873bbc5f7 560 break;
MACRUM 6:40e873bbc5f7 561 case WT:
MACRUM 6:40e873bbc5f7 562 *descriptor_l1 |= 1 << SECTION_TEX1_SHIFT;
MACRUM 6:40e873bbc5f7 563 break;
MACRUM 6:40e873bbc5f7 564 case WB_NO_WA:
MACRUM 6:40e873bbc5f7 565 *descriptor_l1 |= (1 << SECTION_TEX0_SHIFT) | (1 << SECTION_TEX0_SHIFT);
MACRUM 6:40e873bbc5f7 566 break;
MACRUM 6:40e873bbc5f7 567 }
MACRUM 6:40e873bbc5f7 568 }
MACRUM 6:40e873bbc5f7 569
MACRUM 6:40e873bbc5f7 570 return 0;
MACRUM 6:40e873bbc5f7 571 }
MACRUM 6:40e873bbc5f7 572
MACRUM 6:40e873bbc5f7 573 /** \brief Set 4k/64k page memory attributes
MACRUM 6:40e873bbc5f7 574
MACRUM 6:40e873bbc5f7 575 The function sets 4k/64k page memory attributes
MACRUM 6:40e873bbc5f7 576
MACRUM 6:40e873bbc5f7 577 \param [out] descriptor_l2 L2 descriptor.
MACRUM 6:40e873bbc5f7 578 \param [in] mem 4k/64k page memory type: NORMAL, DEVICE, SHARED_DEVICE, NON_SHARED_DEVICE, STRONGLY_ORDERED
MACRUM 6:40e873bbc5f7 579 \param [in] outer Outer cacheability: NON_CACHEABLE, WB_WA, WT, WB_NO_WA,
MACRUM 6:40e873bbc5f7 580 \param [in] inner Inner cacheability: NON_CACHEABLE, WB_WA, WT, WB_NO_WA,
MACRUM 6:40e873bbc5f7 581
MACRUM 6:40e873bbc5f7 582 \return 0
MACRUM 6:40e873bbc5f7 583 */
MACRUM 6:40e873bbc5f7 584 __STATIC_INLINE int __memory_page(uint32_t *descriptor_l2, mmu_memory_Type mem, mmu_cacheability_Type outer, mmu_cacheability_Type inner, mmu_region_size_Type page)
MACRUM 6:40e873bbc5f7 585 {
MACRUM 6:40e873bbc5f7 586 *descriptor_l2 &= PAGE_4K_TEXCB_MASK;
MACRUM 6:40e873bbc5f7 587
MACRUM 6:40e873bbc5f7 588 if (page == PAGE_64k)
MACRUM 6:40e873bbc5f7 589 {
MACRUM 6:40e873bbc5f7 590 //same as section
MACRUM 6:40e873bbc5f7 591 __memory_section(descriptor_l2, mem, outer, inner);
MACRUM 6:40e873bbc5f7 592 }
MACRUM 6:40e873bbc5f7 593 else
MACRUM 6:40e873bbc5f7 594 {
MACRUM 6:40e873bbc5f7 595 if (STRONGLY_ORDERED == mem)
MACRUM 6:40e873bbc5f7 596 {
MACRUM 6:40e873bbc5f7 597 return 0;
MACRUM 6:40e873bbc5f7 598 }
MACRUM 6:40e873bbc5f7 599 else if (SHARED_DEVICE == mem)
MACRUM 6:40e873bbc5f7 600 {
MACRUM 6:40e873bbc5f7 601 *descriptor_l2 |= (1 << PAGE_4K_B_SHIFT);
MACRUM 6:40e873bbc5f7 602 }
MACRUM 6:40e873bbc5f7 603 else if (NON_SHARED_DEVICE == mem)
MACRUM 6:40e873bbc5f7 604 {
MACRUM 6:40e873bbc5f7 605 *descriptor_l2 |= (1 << PAGE_4K_TEX1_SHIFT);
MACRUM 6:40e873bbc5f7 606 }
MACRUM 6:40e873bbc5f7 607 else if (NORMAL == mem)
MACRUM 6:40e873bbc5f7 608 {
MACRUM 6:40e873bbc5f7 609 *descriptor_l2 |= 1 << PAGE_4K_TEX2_SHIFT;
MACRUM 6:40e873bbc5f7 610 switch(inner)
MACRUM 6:40e873bbc5f7 611 {
MACRUM 6:40e873bbc5f7 612 case NON_CACHEABLE:
MACRUM 6:40e873bbc5f7 613 break;
MACRUM 6:40e873bbc5f7 614 case WB_WA:
MACRUM 6:40e873bbc5f7 615 *descriptor_l2 |= (1 << PAGE_4K_B_SHIFT);
MACRUM 6:40e873bbc5f7 616 break;
MACRUM 6:40e873bbc5f7 617 case WT:
MACRUM 6:40e873bbc5f7 618 *descriptor_l2 |= 1 << PAGE_4K_C_SHIFT;
MACRUM 6:40e873bbc5f7 619 break;
MACRUM 6:40e873bbc5f7 620 case WB_NO_WA:
MACRUM 6:40e873bbc5f7 621 *descriptor_l2 |= (1 << PAGE_4K_B_SHIFT) | (1 << PAGE_4K_C_SHIFT);
MACRUM 6:40e873bbc5f7 622 break;
MACRUM 6:40e873bbc5f7 623 }
MACRUM 6:40e873bbc5f7 624 switch(outer)
MACRUM 6:40e873bbc5f7 625 {
MACRUM 6:40e873bbc5f7 626 case NON_CACHEABLE:
MACRUM 6:40e873bbc5f7 627 break;
MACRUM 6:40e873bbc5f7 628 case WB_WA:
MACRUM 6:40e873bbc5f7 629 *descriptor_l2 |= (1 << PAGE_4K_TEX0_SHIFT);
MACRUM 6:40e873bbc5f7 630 break;
MACRUM 6:40e873bbc5f7 631 case WT:
MACRUM 6:40e873bbc5f7 632 *descriptor_l2 |= 1 << PAGE_4K_TEX1_SHIFT;
MACRUM 6:40e873bbc5f7 633 break;
MACRUM 6:40e873bbc5f7 634 case WB_NO_WA:
MACRUM 6:40e873bbc5f7 635 *descriptor_l2 |= (1 << PAGE_4K_TEX0_SHIFT) | (1 << PAGE_4K_TEX0_SHIFT);
MACRUM 6:40e873bbc5f7 636 break;
MACRUM 6:40e873bbc5f7 637 }
MACRUM 6:40e873bbc5f7 638 }
MACRUM 6:40e873bbc5f7 639 }
MACRUM 6:40e873bbc5f7 640
MACRUM 6:40e873bbc5f7 641 return 0;
MACRUM 6:40e873bbc5f7 642 }
MACRUM 6:40e873bbc5f7 643
MACRUM 6:40e873bbc5f7 644 /** \brief Create a L1 section descriptor
MACRUM 6:40e873bbc5f7 645
MACRUM 6:40e873bbc5f7 646 The function creates a section descriptor.
MACRUM 6:40e873bbc5f7 647
MACRUM 6:40e873bbc5f7 648 Assumptions:
MACRUM 6:40e873bbc5f7 649 - 16MB super sections not supported
MACRUM 6:40e873bbc5f7 650 - TEX remap disabled, so memory type and attributes are described directly by bits in the descriptor
MACRUM 6:40e873bbc5f7 651 - Functions always return 0
MACRUM 6:40e873bbc5f7 652
MACRUM 6:40e873bbc5f7 653 \param [out] descriptor L1 descriptor
MACRUM 6:40e873bbc5f7 654 \param [out] descriptor2 L2 descriptor
MACRUM 6:40e873bbc5f7 655 \param [in] reg Section attributes
MACRUM 6:40e873bbc5f7 656
MACRUM 6:40e873bbc5f7 657 \return 0
MACRUM 6:40e873bbc5f7 658 */
MACRUM 6:40e873bbc5f7 659 __STATIC_INLINE int __get_section_descriptor(uint32_t *descriptor, mmu_region_attributes_Type reg)
MACRUM 6:40e873bbc5f7 660 {
MACRUM 6:40e873bbc5f7 661 *descriptor = 0;
MACRUM 6:40e873bbc5f7 662
MACRUM 6:40e873bbc5f7 663 __memory_section(descriptor, reg.mem_t, reg.outer_norm_t, reg.inner_norm_t);
MACRUM 6:40e873bbc5f7 664 __xn_section(descriptor,reg.xn_t);
MACRUM 6:40e873bbc5f7 665 __domain_section(descriptor, reg.domain);
MACRUM 6:40e873bbc5f7 666 __p_section(descriptor, reg.e_t);
MACRUM 6:40e873bbc5f7 667 __ap_section(descriptor, reg.priv_t, reg.user_t, 1);
MACRUM 6:40e873bbc5f7 668 __shared_section(descriptor,reg.sh_t);
MACRUM 6:40e873bbc5f7 669 __global_section(descriptor,reg.g_t);
MACRUM 6:40e873bbc5f7 670 __secure_section(descriptor,reg.sec_t);
MACRUM 6:40e873bbc5f7 671 *descriptor &= SECTION_MASK;
MACRUM 6:40e873bbc5f7 672 *descriptor |= SECTION_DESCRIPTOR;
MACRUM 6:40e873bbc5f7 673
MACRUM 6:40e873bbc5f7 674 return 0;
MACRUM 6:40e873bbc5f7 675
MACRUM 6:40e873bbc5f7 676 }
MACRUM 6:40e873bbc5f7 677
MACRUM 6:40e873bbc5f7 678
MACRUM 6:40e873bbc5f7 679 /** \brief Create a L1 and L2 4k/64k page descriptor
MACRUM 6:40e873bbc5f7 680
MACRUM 6:40e873bbc5f7 681 The function creates a 4k/64k page descriptor.
MACRUM 6:40e873bbc5f7 682 Assumptions:
MACRUM 6:40e873bbc5f7 683 - TEX remap disabled, so memory type and attributes are described directly by bits in the descriptor
MACRUM 6:40e873bbc5f7 684 - Functions always return 0
MACRUM 6:40e873bbc5f7 685
MACRUM 6:40e873bbc5f7 686 \param [out] descriptor L1 descriptor
MACRUM 6:40e873bbc5f7 687 \param [out] descriptor2 L2 descriptor
MACRUM 6:40e873bbc5f7 688 \param [in] reg 4k/64k page attributes
MACRUM 6:40e873bbc5f7 689
MACRUM 6:40e873bbc5f7 690 \return 0
MACRUM 6:40e873bbc5f7 691 */
MACRUM 6:40e873bbc5f7 692 __STATIC_INLINE int __get_page_descriptor(uint32_t *descriptor, uint32_t *descriptor2, mmu_region_attributes_Type reg)
MACRUM 6:40e873bbc5f7 693 {
MACRUM 6:40e873bbc5f7 694 *descriptor = 0;
MACRUM 6:40e873bbc5f7 695 *descriptor2 = 0;
MACRUM 6:40e873bbc5f7 696
MACRUM 6:40e873bbc5f7 697 switch (reg.rg_t)
MACRUM 6:40e873bbc5f7 698 {
MACRUM 6:40e873bbc5f7 699 case PAGE_4k:
MACRUM 6:40e873bbc5f7 700 __memory_page(descriptor2, reg.mem_t, reg.outer_norm_t, reg.inner_norm_t, PAGE_4k);
MACRUM 6:40e873bbc5f7 701 __xn_page(descriptor2, reg.xn_t, PAGE_4k);
MACRUM 6:40e873bbc5f7 702 __domain_page(descriptor, reg.domain);
MACRUM 6:40e873bbc5f7 703 __p_page(descriptor, reg.e_t);
MACRUM 6:40e873bbc5f7 704 __ap_page(descriptor2, reg.priv_t, reg.user_t, 1);
MACRUM 6:40e873bbc5f7 705 __shared_page(descriptor2,reg.sh_t);
MACRUM 6:40e873bbc5f7 706 __global_page(descriptor2,reg.g_t);
MACRUM 6:40e873bbc5f7 707 __secure_page(descriptor,reg.sec_t);
MACRUM 6:40e873bbc5f7 708 *descriptor &= PAGE_L1_MASK;
MACRUM 6:40e873bbc5f7 709 *descriptor |= PAGE_L1_DESCRIPTOR;
MACRUM 6:40e873bbc5f7 710 *descriptor2 &= PAGE_L2_4K_MASK;
MACRUM 6:40e873bbc5f7 711 *descriptor2 |= PAGE_L2_4K_DESC;
MACRUM 6:40e873bbc5f7 712 break;
MACRUM 6:40e873bbc5f7 713
MACRUM 6:40e873bbc5f7 714 case PAGE_64k:
MACRUM 6:40e873bbc5f7 715 __memory_page(descriptor2, reg.mem_t, reg.outer_norm_t, reg.inner_norm_t, PAGE_64k);
MACRUM 6:40e873bbc5f7 716 __xn_page(descriptor2, reg.xn_t, PAGE_64k);
MACRUM 6:40e873bbc5f7 717 __domain_page(descriptor, reg.domain);
MACRUM 6:40e873bbc5f7 718 __p_page(descriptor, reg.e_t);
MACRUM 6:40e873bbc5f7 719 __ap_page(descriptor2, reg.priv_t, reg.user_t, 1);
MACRUM 6:40e873bbc5f7 720 __shared_page(descriptor2,reg.sh_t);
MACRUM 6:40e873bbc5f7 721 __global_page(descriptor2,reg.g_t);
MACRUM 6:40e873bbc5f7 722 __secure_page(descriptor,reg.sec_t);
MACRUM 6:40e873bbc5f7 723 *descriptor &= PAGE_L1_MASK;
MACRUM 6:40e873bbc5f7 724 *descriptor |= PAGE_L1_DESCRIPTOR;
MACRUM 6:40e873bbc5f7 725 *descriptor2 &= PAGE_L2_64K_MASK;
MACRUM 6:40e873bbc5f7 726 *descriptor2 |= PAGE_L2_64K_DESC;
MACRUM 6:40e873bbc5f7 727 break;
MACRUM 6:40e873bbc5f7 728
MACRUM 6:40e873bbc5f7 729 case SECTION:
MACRUM 6:40e873bbc5f7 730 //error
MACRUM 6:40e873bbc5f7 731 break;
MACRUM 6:40e873bbc5f7 732
MACRUM 6:40e873bbc5f7 733 }
MACRUM 6:40e873bbc5f7 734
MACRUM 6:40e873bbc5f7 735 return 0;
MACRUM 6:40e873bbc5f7 736
MACRUM 6:40e873bbc5f7 737 }
MACRUM 6:40e873bbc5f7 738
MACRUM 6:40e873bbc5f7 739 /** \brief Create a 1MB Section
MACRUM 6:40e873bbc5f7 740
MACRUM 6:40e873bbc5f7 741 \param [in] ttb Translation table base address
MACRUM 6:40e873bbc5f7 742 \param [in] base_address Section base address
MACRUM 6:40e873bbc5f7 743 \param [in] count Number of sections to create
MACRUM 6:40e873bbc5f7 744 \param [in] descriptor_l1 L1 descriptor (region attributes)
MACRUM 6:40e873bbc5f7 745
MACRUM 6:40e873bbc5f7 746 */
MACRUM 6:40e873bbc5f7 747 __STATIC_INLINE void __TTSection(uint32_t *ttb, uint32_t base_address, uint32_t count, uint32_t descriptor_l1)
MACRUM 6:40e873bbc5f7 748 {
MACRUM 6:40e873bbc5f7 749 uint32_t offset;
MACRUM 6:40e873bbc5f7 750 uint32_t entry;
MACRUM 6:40e873bbc5f7 751 uint32_t i;
MACRUM 6:40e873bbc5f7 752
MACRUM 6:40e873bbc5f7 753 offset = base_address >> 20;
MACRUM 6:40e873bbc5f7 754 entry = (base_address & 0xFFF00000) | descriptor_l1;
MACRUM 6:40e873bbc5f7 755
MACRUM 6:40e873bbc5f7 756 //4 bytes aligned
MACRUM 6:40e873bbc5f7 757 ttb = ttb + offset;
MACRUM 6:40e873bbc5f7 758
MACRUM 6:40e873bbc5f7 759 for (i = 0; i < count; i++ )
MACRUM 6:40e873bbc5f7 760 {
MACRUM 6:40e873bbc5f7 761 //4 bytes aligned
MACRUM 6:40e873bbc5f7 762 *ttb++ = entry;
MACRUM 6:40e873bbc5f7 763 entry += OFFSET_1M;
MACRUM 6:40e873bbc5f7 764 }
MACRUM 6:40e873bbc5f7 765 }
MACRUM 6:40e873bbc5f7 766
MACRUM 6:40e873bbc5f7 767 /** \brief Create a 4k page entry
MACRUM 6:40e873bbc5f7 768
MACRUM 6:40e873bbc5f7 769 \param [in] ttb L1 table base address
MACRUM 6:40e873bbc5f7 770 \param [in] base_address 4k base address
MACRUM 6:40e873bbc5f7 771 \param [in] count Number of 4k pages to create
MACRUM 6:40e873bbc5f7 772 \param [in] descriptor_l1 L1 descriptor (region attributes)
MACRUM 6:40e873bbc5f7 773 \param [in] ttb_l2 L2 table base address
MACRUM 6:40e873bbc5f7 774 \param [in] descriptor_l2 L2 descriptor (region attributes)
MACRUM 6:40e873bbc5f7 775
MACRUM 6:40e873bbc5f7 776 */
MACRUM 6:40e873bbc5f7 777 __STATIC_INLINE void __TTPage_4k(uint32_t *ttb, uint32_t base_address, uint32_t count, uint32_t descriptor_l1, uint32_t *ttb_l2, uint32_t descriptor_l2 )
MACRUM 6:40e873bbc5f7 778 {
MACRUM 6:40e873bbc5f7 779
MACRUM 6:40e873bbc5f7 780 uint32_t offset, offset2;
MACRUM 6:40e873bbc5f7 781 uint32_t entry, entry2;
MACRUM 6:40e873bbc5f7 782 uint32_t i;
MACRUM 6:40e873bbc5f7 783
MACRUM 6:40e873bbc5f7 784
MACRUM 6:40e873bbc5f7 785 offset = base_address >> 20;
MACRUM 6:40e873bbc5f7 786 entry = ((int)ttb_l2 & 0xFFFFFC00) | descriptor_l1;
MACRUM 6:40e873bbc5f7 787
MACRUM 6:40e873bbc5f7 788 //4 bytes aligned
MACRUM 6:40e873bbc5f7 789 ttb += offset;
MACRUM 6:40e873bbc5f7 790 //create l1_entry
MACRUM 6:40e873bbc5f7 791 *ttb = entry;
MACRUM 6:40e873bbc5f7 792
MACRUM 6:40e873bbc5f7 793 offset2 = (base_address & 0xff000) >> 12;
MACRUM 6:40e873bbc5f7 794 ttb_l2 += offset2;
MACRUM 6:40e873bbc5f7 795 entry2 = (base_address & 0xFFFFF000) | descriptor_l2;
MACRUM 6:40e873bbc5f7 796 for (i = 0; i < count; i++ )
MACRUM 6:40e873bbc5f7 797 {
MACRUM 6:40e873bbc5f7 798 //4 bytes aligned
MACRUM 6:40e873bbc5f7 799 *ttb_l2++ = entry2;
MACRUM 6:40e873bbc5f7 800 entry2 += OFFSET_4K;
MACRUM 6:40e873bbc5f7 801 }
MACRUM 6:40e873bbc5f7 802 }
MACRUM 6:40e873bbc5f7 803
MACRUM 6:40e873bbc5f7 804 /** \brief Create a 64k page entry
MACRUM 6:40e873bbc5f7 805
MACRUM 6:40e873bbc5f7 806 \param [in] ttb L1 table base address
MACRUM 6:40e873bbc5f7 807 \param [in] base_address 64k base address
MACRUM 6:40e873bbc5f7 808 \param [in] count Number of 64k pages to create
MACRUM 6:40e873bbc5f7 809 \param [in] descriptor_l1 L1 descriptor (region attributes)
MACRUM 6:40e873bbc5f7 810 \param [in] ttb_l2 L2 table base address
MACRUM 6:40e873bbc5f7 811 \param [in] descriptor_l2 L2 descriptor (region attributes)
MACRUM 6:40e873bbc5f7 812
MACRUM 6:40e873bbc5f7 813 */
MACRUM 6:40e873bbc5f7 814 __STATIC_INLINE void __TTPage_64k(uint32_t *ttb, uint32_t base_address, uint32_t count, uint32_t descriptor_l1, uint32_t *ttb_l2, uint32_t descriptor_l2 )
MACRUM 6:40e873bbc5f7 815 {
MACRUM 6:40e873bbc5f7 816 uint32_t offset, offset2;
MACRUM 6:40e873bbc5f7 817 uint32_t entry, entry2;
MACRUM 6:40e873bbc5f7 818 uint32_t i,j;
MACRUM 6:40e873bbc5f7 819
MACRUM 6:40e873bbc5f7 820
MACRUM 6:40e873bbc5f7 821 offset = base_address >> 20;
MACRUM 6:40e873bbc5f7 822 entry = ((int)ttb_l2 & 0xFFFFFC00) | descriptor_l1;
MACRUM 6:40e873bbc5f7 823
MACRUM 6:40e873bbc5f7 824 //4 bytes aligned
MACRUM 6:40e873bbc5f7 825 ttb += offset;
MACRUM 6:40e873bbc5f7 826 //create l1_entry
MACRUM 6:40e873bbc5f7 827 *ttb = entry;
MACRUM 6:40e873bbc5f7 828
MACRUM 6:40e873bbc5f7 829 offset2 = (base_address & 0xff000) >> 12;
MACRUM 6:40e873bbc5f7 830 ttb_l2 += offset2;
MACRUM 6:40e873bbc5f7 831 entry2 = (base_address & 0xFFFF0000) | descriptor_l2;
MACRUM 6:40e873bbc5f7 832 for (i = 0; i < count; i++ )
MACRUM 6:40e873bbc5f7 833 {
MACRUM 6:40e873bbc5f7 834 //create 16 entries
MACRUM 6:40e873bbc5f7 835 for (j = 0; j < 16; j++)
MACRUM 6:40e873bbc5f7 836 //4 bytes aligned
MACRUM 6:40e873bbc5f7 837 *ttb_l2++ = entry2;
MACRUM 6:40e873bbc5f7 838 entry2 += OFFSET_64K;
MACRUM 6:40e873bbc5f7 839 }
MACRUM 6:40e873bbc5f7 840 }
MACRUM 6:40e873bbc5f7 841
MACRUM 6:40e873bbc5f7 842 /*@} end of MMU_Functions */
MACRUM 6:40e873bbc5f7 843 #endif
MACRUM 6:40e873bbc5f7 844
MACRUM 6:40e873bbc5f7 845 #ifdef __cplusplus
MACRUM 6:40e873bbc5f7 846 }
MACRUM 6:40e873bbc5f7 847 #endif