Toyomasa Watarai / Mbed OS armcc_info

Describes predefine macros for mbed online compiler (armcc)

mbed/TARGET_LPC1114/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11XX/PinNames.h@6:40e873bbc5f7, 2017-03-16 (annotated)

Committer:
MACRUM
Date:
Thu Mar 16 21:58:09 2017 +0900
Revision:
6:40e873bbc5f7
Add licence header info

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MACRUM 6:40e873bbc5f7 1 /* mbed Microcontroller Library
MACRUM 6:40e873bbc5f7 2 * Copyright (c) 2006-2013 ARM Limited
MACRUM 6:40e873bbc5f7 3 *
MACRUM 6:40e873bbc5f7 4 * Licensed under the Apache License, Version 2.0 (the "License");
MACRUM 6:40e873bbc5f7 5 * you may not use this file except in compliance with the License.
MACRUM 6:40e873bbc5f7 6 * You may obtain a copy of the License at
MACRUM 6:40e873bbc5f7 7 *
MACRUM 6:40e873bbc5f7 8 * http://www.apache.org/licenses/LICENSE-2.0
MACRUM 6:40e873bbc5f7 9 *
MACRUM 6:40e873bbc5f7 10 * Unless required by applicable law or agreed to in writing, software
MACRUM 6:40e873bbc5f7 11 * distributed under the License is distributed on an "AS IS" BASIS,
MACRUM 6:40e873bbc5f7 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
MACRUM 6:40e873bbc5f7 13 * See the License for the specific language governing permissions and
MACRUM 6:40e873bbc5f7 14 * limitations under the License.
MACRUM 6:40e873bbc5f7 15 */
MACRUM 6:40e873bbc5f7 16 #ifndef MBED_PINNAMES_H
MACRUM 6:40e873bbc5f7 17 #define MBED_PINNAMES_H
MACRUM 6:40e873bbc5f7 18
MACRUM 6:40e873bbc5f7 19 #include "cmsis.h"
MACRUM 6:40e873bbc5f7 20
MACRUM 6:40e873bbc5f7 21 #ifdef __cplusplus
MACRUM 6:40e873bbc5f7 22 extern "C" {
MACRUM 6:40e873bbc5f7 23 #endif
MACRUM 6:40e873bbc5f7 24
MACRUM 6:40e873bbc5f7 25 typedef enum {
MACRUM 6:40e873bbc5f7 26 PIN_INPUT,
MACRUM 6:40e873bbc5f7 27 PIN_OUTPUT
MACRUM 6:40e873bbc5f7 28 } PinDirection;
MACRUM 6:40e873bbc5f7 29
MACRUM 6:40e873bbc5f7 30 #define PORT_SHIFT 12
MACRUM 6:40e873bbc5f7 31 #define PIN_SHIFT 8
MACRUM 6:40e873bbc5f7 32
MACRUM 6:40e873bbc5f7 33 typedef enum {
MACRUM 6:40e873bbc5f7 34 // LPC1114 Pin Names (PORT[15:12] + PIN[11:8] + IOCON offset[7:0])
MACRUM 6:40e873bbc5f7 35
MACRUM 6:40e873bbc5f7 36 P0_0 = (0 << PORT_SHIFT) | (0 << PIN_SHIFT) | 0x0c,
MACRUM 6:40e873bbc5f7 37 P0_1 = (0 << PORT_SHIFT) | (1 << PIN_SHIFT) | 0x10,
MACRUM 6:40e873bbc5f7 38 P0_2 = (0 << PORT_SHIFT) | (2 << PIN_SHIFT) | 0x1c,
MACRUM 6:40e873bbc5f7 39 P0_3 = (0 << PORT_SHIFT) | (3 << PIN_SHIFT) | 0x2c,
MACRUM 6:40e873bbc5f7 40 P0_4 = (0 << PORT_SHIFT) | (4 << PIN_SHIFT) | 0x30,
MACRUM 6:40e873bbc5f7 41 P0_5 = (0 << PORT_SHIFT) | (5 << PIN_SHIFT) | 0x34,
MACRUM 6:40e873bbc5f7 42 P0_6 = (0 << PORT_SHIFT) | (6 << PIN_SHIFT) | 0x4c,
MACRUM 6:40e873bbc5f7 43 P0_7 = (0 << PORT_SHIFT) | (7 << PIN_SHIFT) | 0x50,
MACRUM 6:40e873bbc5f7 44 P0_8 = (0 << PORT_SHIFT) | (8 << PIN_SHIFT) | 0x60,
MACRUM 6:40e873bbc5f7 45 P0_9 = (0 << PORT_SHIFT) | (9 << PIN_SHIFT) | 0x64,
MACRUM 6:40e873bbc5f7 46 P0_11 = (0 << PORT_SHIFT) | (11 << PIN_SHIFT) | 0x74,
MACRUM 6:40e873bbc5f7 47
MACRUM 6:40e873bbc5f7 48 P1_0 = (1 << PORT_SHIFT) | (0 << PIN_SHIFT) | 0x78,
MACRUM 6:40e873bbc5f7 49 P1_1 = (1 << PORT_SHIFT) | (1 << PIN_SHIFT) | 0x7c,
MACRUM 6:40e873bbc5f7 50 P1_2 = (1 << PORT_SHIFT) | (2 << PIN_SHIFT) | 0x80,
MACRUM 6:40e873bbc5f7 51 P1_4 = (1 << PORT_SHIFT) | (4 << PIN_SHIFT) | 0x94,
MACRUM 6:40e873bbc5f7 52 P1_5 = (1 << PORT_SHIFT) | (5 << PIN_SHIFT) | 0xa0,
MACRUM 6:40e873bbc5f7 53 P1_6 = (1 << PORT_SHIFT) | (6 << PIN_SHIFT) | 0xa4,
MACRUM 6:40e873bbc5f7 54 P1_7 = (1 << PORT_SHIFT) | (7 << PIN_SHIFT) | 0xa8,
MACRUM 6:40e873bbc5f7 55 P1_8 = (1 << PORT_SHIFT) | (8 << PIN_SHIFT) | 0x14,
MACRUM 6:40e873bbc5f7 56 P1_9 = (1 << PORT_SHIFT) | (9 << PIN_SHIFT) | 0x38,
MACRUM 6:40e873bbc5f7 57 P1_10 = (1 << PORT_SHIFT) | (10 << PIN_SHIFT) | 0x6c,
MACRUM 6:40e873bbc5f7 58 P1_11 = (1 << PORT_SHIFT) | (11 << PIN_SHIFT) | 0x98,
MACRUM 6:40e873bbc5f7 59
MACRUM 6:40e873bbc5f7 60 P2_0 = (2 << PORT_SHIFT) | (0 << PIN_SHIFT) | 0x08,
MACRUM 6:40e873bbc5f7 61 P2_1 = (2 << PORT_SHIFT) | (1 << PIN_SHIFT) | 0x28,
MACRUM 6:40e873bbc5f7 62 P2_2 = (2 << PORT_SHIFT) | (2 << PIN_SHIFT) | 0x5c,
MACRUM 6:40e873bbc5f7 63 P2_3 = (2 << PORT_SHIFT) | (3 << PIN_SHIFT) | 0x8c,
MACRUM 6:40e873bbc5f7 64 P2_4 = (2 << PORT_SHIFT) | (4 << PIN_SHIFT) | 0x40,
MACRUM 6:40e873bbc5f7 65 P2_5 = (2 << PORT_SHIFT) | (5 << PIN_SHIFT) | 0x44,
MACRUM 6:40e873bbc5f7 66 P2_6 = (2 << PORT_SHIFT) | (6 << PIN_SHIFT) | 0x00,
MACRUM 6:40e873bbc5f7 67 P2_7 = (2 << PORT_SHIFT) | (7 << PIN_SHIFT) | 0x20,
MACRUM 6:40e873bbc5f7 68 P2_8 = (2 << PORT_SHIFT) | (8 << PIN_SHIFT) | 0x24,
MACRUM 6:40e873bbc5f7 69 P2_9 = (2 << PORT_SHIFT) | (9 << PIN_SHIFT) | 0x54,
MACRUM 6:40e873bbc5f7 70 P2_10 = (2 << PORT_SHIFT) | (10 << PIN_SHIFT) | 0x58,
MACRUM 6:40e873bbc5f7 71 P2_11 = (2 << PORT_SHIFT) | (11 << PIN_SHIFT) | 0x70,
MACRUM 6:40e873bbc5f7 72
MACRUM 6:40e873bbc5f7 73 P3_0 = (3 << PORT_SHIFT) | (0 << PIN_SHIFT) | 0x84,
MACRUM 6:40e873bbc5f7 74 P3_1 = (3 << PORT_SHIFT) | (1 << PIN_SHIFT) | 0x88,
MACRUM 6:40e873bbc5f7 75 P3_2 = (3 << PORT_SHIFT) | (2 << PIN_SHIFT) | 0x9c,
MACRUM 6:40e873bbc5f7 76 P3_3 = (3 << PORT_SHIFT) | (3 << PIN_SHIFT) | 0xac,
MACRUM 6:40e873bbc5f7 77 P3_4 = (3 << PORT_SHIFT) | (4 << PIN_SHIFT) | 0x3c,
MACRUM 6:40e873bbc5f7 78 P3_5 = (3 << PORT_SHIFT) | (5 << PIN_SHIFT) | 0x48,
MACRUM 6:40e873bbc5f7 79
MACRUM 6:40e873bbc5f7 80 // mbed DIP Pin Names (CQ board)
MACRUM 6:40e873bbc5f7 81 // p4 = P0_0,
MACRUM 6:40e873bbc5f7 82 p5 = P0_9,
MACRUM 6:40e873bbc5f7 83 p6 = P0_8,
MACRUM 6:40e873bbc5f7 84 p7 = P0_6,
MACRUM 6:40e873bbc5f7 85 p8 = P1_5,
MACRUM 6:40e873bbc5f7 86 p9 = P1_7,
MACRUM 6:40e873bbc5f7 87 p10 = P1_6,
MACRUM 6:40e873bbc5f7 88 p11 = P0_7,
MACRUM 6:40e873bbc5f7 89 p12 = P1_0,
MACRUM 6:40e873bbc5f7 90 p13 = P1_1,
MACRUM 6:40e873bbc5f7 91 p14 = P1_2,
MACRUM 6:40e873bbc5f7 92 p15 = P0_11,
MACRUM 6:40e873bbc5f7 93 p16 = P1_0,
MACRUM 6:40e873bbc5f7 94 p17 = P1_1,
MACRUM 6:40e873bbc5f7 95 p18 = P1_2,
MACRUM 6:40e873bbc5f7 96 p20 = P1_4,
MACRUM 6:40e873bbc5f7 97 p22 = P0_2,
MACRUM 6:40e873bbc5f7 98 p23 = P0_11,
MACRUM 6:40e873bbc5f7 99 p24 = P0_2,
MACRUM 6:40e873bbc5f7 100 p25 = P1_8,
MACRUM 6:40e873bbc5f7 101 p26 = P1_9,
MACRUM 6:40e873bbc5f7 102 p27 = P0_4,
MACRUM 6:40e873bbc5f7 103 p28 = P0_5,
MACRUM 6:40e873bbc5f7 104 p29 = P0_3,
MACRUM 6:40e873bbc5f7 105 p30 = P0_1,
MACRUM 6:40e873bbc5f7 106
MACRUM 6:40e873bbc5f7 107 // Other mbed Pin Names
MACRUM 6:40e873bbc5f7 108 LED1 = P1_5,
MACRUM 6:40e873bbc5f7 109 LED2 = P0_7,
MACRUM 6:40e873bbc5f7 110 LED3 = P1_5,
MACRUM 6:40e873bbc5f7 111 LED4 = P0_7,
MACRUM 6:40e873bbc5f7 112
MACRUM 6:40e873bbc5f7 113 USBTX = P1_7,
MACRUM 6:40e873bbc5f7 114 USBRX = P1_6,
MACRUM 6:40e873bbc5f7 115
MACRUM 6:40e873bbc5f7 116 // mbed DIP Pin Names (LPCXpresso LPC1114)
MACRUM 6:40e873bbc5f7 117 // xp4 = P0_0,
MACRUM 6:40e873bbc5f7 118 xp5 = P0_9,
MACRUM 6:40e873bbc5f7 119 xp6 = P0_8,
MACRUM 6:40e873bbc5f7 120 xp7 = P2_11,
MACRUM 6:40e873bbc5f7 121 xp8 = P0_2,
MACRUM 6:40e873bbc5f7 122 xp9 = P1_7,
MACRUM 6:40e873bbc5f7 123 xp10 = P1_6,
MACRUM 6:40e873bbc5f7 124 xp11 = P0_7,
MACRUM 6:40e873bbc5f7 125 xp12 = P2_0,
MACRUM 6:40e873bbc5f7 126 xp13 = P2_1,
MACRUM 6:40e873bbc5f7 127 xp14 = P2_2,
MACRUM 6:40e873bbc5f7 128 xp15 = P0_11,
MACRUM 6:40e873bbc5f7 129 xp16 = P1_0,
MACRUM 6:40e873bbc5f7 130 xp17 = P1_1,
MACRUM 6:40e873bbc5f7 131 xp18 = P1_2,
MACRUM 6:40e873bbc5f7 132 xp20 = P1_4,
MACRUM 6:40e873bbc5f7 133 xp21 = P1_5,
MACRUM 6:40e873bbc5f7 134 xp22 = P1_8,
MACRUM 6:40e873bbc5f7 135 xp23 = P0_6,
MACRUM 6:40e873bbc5f7 136 xp25 = P3_0,
MACRUM 6:40e873bbc5f7 137 xp26 = P3_1,
MACRUM 6:40e873bbc5f7 138 xp27 = P3_2,
MACRUM 6:40e873bbc5f7 139
MACRUM 6:40e873bbc5f7 140 xp29 = P3_3,
MACRUM 6:40e873bbc5f7 141 xp30 = P2_10,
MACRUM 6:40e873bbc5f7 142 xp31 = P2_9,
MACRUM 6:40e873bbc5f7 143 xp32 = P2_8,
MACRUM 6:40e873bbc5f7 144 xp33 = P2_7,
MACRUM 6:40e873bbc5f7 145 xp34 = P2_6,
MACRUM 6:40e873bbc5f7 146 xp35 = P2_5,
MACRUM 6:40e873bbc5f7 147 xp36 = P2_4,
MACRUM 6:40e873bbc5f7 148 xp37 = P2_3,
MACRUM 6:40e873bbc5f7 149 xp38 = P1_11,
MACRUM 6:40e873bbc5f7 150 xp39 = P1_10,
MACRUM 6:40e873bbc5f7 151 xp40 = P1_9,
MACRUM 6:40e873bbc5f7 152 xp41 = P0_4,
MACRUM 6:40e873bbc5f7 153 xp42 = P0_5,
MACRUM 6:40e873bbc5f7 154 xp43 = P0_3,
MACRUM 6:40e873bbc5f7 155 xp44 = P0_1,
MACRUM 6:40e873bbc5f7 156
MACRUM 6:40e873bbc5f7 157 // Other mbed Pin Names
MACRUM 6:40e873bbc5f7 158 xLED1 = P0_7,
MACRUM 6:40e873bbc5f7 159
MACRUM 6:40e873bbc5f7 160 // DIP Package Names
MACRUM 6:40e873bbc5f7 161
MACRUM 6:40e873bbc5f7 162 dp1 = P0_8,
MACRUM 6:40e873bbc5f7 163 dp2 = P0_9,
MACRUM 6:40e873bbc5f7 164 dp4 = P0_11,
MACRUM 6:40e873bbc5f7 165 dp5 = P0_5,
MACRUM 6:40e873bbc5f7 166 dp6 = P0_6,
MACRUM 6:40e873bbc5f7 167 dp9 = P1_0,
MACRUM 6:40e873bbc5f7 168 dp10 = P1_1,
MACRUM 6:40e873bbc5f7 169 dp11 = P1_2,
MACRUM 6:40e873bbc5f7 170 dp13 = P1_4,
MACRUM 6:40e873bbc5f7 171 dp14 = P1_5,
MACRUM 6:40e873bbc5f7 172 dp15 = P1_6,
MACRUM 6:40e873bbc5f7 173 dp16 = P1_7,
MACRUM 6:40e873bbc5f7 174 dp17 = P1_8,
MACRUM 6:40e873bbc5f7 175 dp18 = P1_9,
MACRUM 6:40e873bbc5f7 176 // dp23 = P0_0,
MACRUM 6:40e873bbc5f7 177 dp24 = P0_1,
MACRUM 6:40e873bbc5f7 178 dp25 = P0_2,
MACRUM 6:40e873bbc5f7 179 dp26 = P0_3,
MACRUM 6:40e873bbc5f7 180 dp27 = P0_4,
MACRUM 6:40e873bbc5f7 181 dp28 = P0_7,
MACRUM 6:40e873bbc5f7 182
MACRUM 6:40e873bbc5f7 183 dip1 = P0_8,
MACRUM 6:40e873bbc5f7 184 dip2 = P0_9,
MACRUM 6:40e873bbc5f7 185 dip4 = P0_11,
MACRUM 6:40e873bbc5f7 186 dip5 = P0_5,
MACRUM 6:40e873bbc5f7 187 dip6 = P0_6,
MACRUM 6:40e873bbc5f7 188 dip9 = P1_0,
MACRUM 6:40e873bbc5f7 189 dip10 = P1_1,
MACRUM 6:40e873bbc5f7 190 dip11 = P1_2,
MACRUM 6:40e873bbc5f7 191 dip13 = P1_4,
MACRUM 6:40e873bbc5f7 192 dip14 = P1_5,
MACRUM 6:40e873bbc5f7 193 dip15 = P1_6,
MACRUM 6:40e873bbc5f7 194 dip16 = P1_7,
MACRUM 6:40e873bbc5f7 195 dip17 = P1_8,
MACRUM 6:40e873bbc5f7 196 dip18 = P1_9,
MACRUM 6:40e873bbc5f7 197 // dip23 = P0_0,
MACRUM 6:40e873bbc5f7 198 dip24 = P0_1,
MACRUM 6:40e873bbc5f7 199 dip25 = P0_2,
MACRUM 6:40e873bbc5f7 200 dip26 = P0_3,
MACRUM 6:40e873bbc5f7 201 dip27 = P0_4,
MACRUM 6:40e873bbc5f7 202 dip28 = P0_7,
MACRUM 6:40e873bbc5f7 203
MACRUM 6:40e873bbc5f7 204
MACRUM 6:40e873bbc5f7 205
MACRUM 6:40e873bbc5f7 206 // Not connected
MACRUM 6:40e873bbc5f7 207 NC = (int)0xFFFFFFFF,
MACRUM 6:40e873bbc5f7 208 } PinName;
MACRUM 6:40e873bbc5f7 209
MACRUM 6:40e873bbc5f7 210 typedef enum {
MACRUM 6:40e873bbc5f7 211 CHANNEL0 = WAKEUP0_IRQn,
MACRUM 6:40e873bbc5f7 212 CHANNEL1 = WAKEUP1_IRQn,
MACRUM 6:40e873bbc5f7 213 CHANNEL2 = WAKEUP2_IRQn,
MACRUM 6:40e873bbc5f7 214 CHANNEL3 = WAKEUP3_IRQn,
MACRUM 6:40e873bbc5f7 215 CHANNEL4 = WAKEUP4_IRQn,
MACRUM 6:40e873bbc5f7 216 CHANNEL5 = WAKEUP5_IRQn,
MACRUM 6:40e873bbc5f7 217 CHANNEL6 = WAKEUP6_IRQn,
MACRUM 6:40e873bbc5f7 218 CHANNEL7 = WAKEUP7_IRQn
MACRUM 6:40e873bbc5f7 219 } Channel;
MACRUM 6:40e873bbc5f7 220
MACRUM 6:40e873bbc5f7 221 typedef enum {
MACRUM 6:40e873bbc5f7 222 PullUp = 2,
MACRUM 6:40e873bbc5f7 223 PullDown = 1,
MACRUM 6:40e873bbc5f7 224 PullNone = 0,
MACRUM 6:40e873bbc5f7 225 Repeater = 3,
MACRUM 6:40e873bbc5f7 226 OpenDrain = 4,
MACRUM 6:40e873bbc5f7 227 PullDefault = PullDown
MACRUM 6:40e873bbc5f7 228 } PinMode;
MACRUM 6:40e873bbc5f7 229
MACRUM 6:40e873bbc5f7 230 #ifdef __cplusplus
MACRUM 6:40e873bbc5f7 231 }
MACRUM 6:40e873bbc5f7 232 #endif
MACRUM 6:40e873bbc5f7 233
MACRUM 6:40e873bbc5f7 234 #endif