Toyomasa Watarai / MB85RSxx_SPI

Fujitsu MB85RSxx SPI FRAM access library

Dependents:   MB85RSxx_Hello TYBLE16_simple_data_logger

MB85RSxx_SPI.h@0:f397b42257f8, 2017-04-24 (annotated)

Committer:
MACRUM
Date:
Mon Apr 24 14:03:41 2017 +0000
Revision:
0:f397b42257f8
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MACRUM 0:f397b42257f8 1 /**
MACRUM 0:f397b42257f8 2 ******************************************************************************
MACRUM 0:f397b42257f8 3 * @file MB85RSxx_SPI.h
MACRUM 0:f397b42257f8 4 * @author Toyomasa Watarai
MACRUM 0:f397b42257f8 5 * @version V1.0.0
MACRUM 0:f397b42257f8 6 * @date 24 April 2017
MACRUM 0:f397b42257f8 7 * @brief This file contains the class of an MB85RSxx FRAM library with SPI interface
MACRUM 0:f397b42257f8 8 ******************************************************************************
MACRUM 0:f397b42257f8 9 * @attention
MACRUM 0:f397b42257f8 10 *
MACRUM 0:f397b42257f8 11 * Permission is hereby granted, free of charge, to any person obtaining a copy
MACRUM 0:f397b42257f8 12 * of this software and associated documentation files (the "Software"), to deal
MACRUM 0:f397b42257f8 13 * in the Software without restriction, including without limitation the rights
MACRUM 0:f397b42257f8 14 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
MACRUM 0:f397b42257f8 15 * copies of the Software, and to permit persons to whom the Software is
MACRUM 0:f397b42257f8 16 * furnished to do so, subject to the following conditions:
MACRUM 0:f397b42257f8 17 *
MACRUM 0:f397b42257f8 18 * The above copyright notice and this permission notice shall be included in
MACRUM 0:f397b42257f8 19 * all copies or substantial portions of the Software.
MACRUM 0:f397b42257f8 20 *
MACRUM 0:f397b42257f8 21 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
MACRUM 0:f397b42257f8 22 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
MACRUM 0:f397b42257f8 23 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
MACRUM 0:f397b42257f8 24 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
MACRUM 0:f397b42257f8 25 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
MACRUM 0:f397b42257f8 26 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
MACRUM 0:f397b42257f8 27 * THE SOFTWARE.
MACRUM 0:f397b42257f8 28 */
MACRUM 0:f397b42257f8 29
MACRUM 0:f397b42257f8 30 #ifndef MBED_MB85RSxx_SPI_H
MACRUM 0:f397b42257f8 31 #define MBED_MB85RSxx_SPI_H
MACRUM 0:f397b42257f8 32
MACRUM 0:f397b42257f8 33 #include "mbed.h"
MACRUM 0:f397b42257f8 34
MACRUM 0:f397b42257f8 35 #define MB85_WREN 0x06
MACRUM 0:f397b42257f8 36 #define MB85_WRDI 0x04
MACRUM 0:f397b42257f8 37 #define MB85_RDSR 0x05
MACRUM 0:f397b42257f8 38 #define MB85_WRSR 0x01
MACRUM 0:f397b42257f8 39 #define MB85_READ 0x03
MACRUM 0:f397b42257f8 40 #define MB85_WRITE 0x02
MACRUM 0:f397b42257f8 41 #define MB85_RDID 0x9F
MACRUM 0:f397b42257f8 42 #define MB85_FSTRD 0x0B
MACRUM 0:f397b42257f8 43 #define MB85_SLEEP 0xB9
MACRUM 0:f397b42257f8 44
MACRUM 0:f397b42257f8 45 #define MB85_DENSITY_64K 0x3
MACRUM 0:f397b42257f8 46 #define MB85_DENSITY_256K 0x5
MACRUM 0:f397b42257f8 47 #define MB85_DENSITY_512K 0x6
MACRUM 0:f397b42257f8 48 #define MB85_DENSITY_1M 0x7
MACRUM 0:f397b42257f8 49 #define MB85_DENSITY_2M 0x8
MACRUM 0:f397b42257f8 50
MACRUM 0:f397b42257f8 51 /** Interface for accessing Fujitsu MB85RSxx FRAM
MACRUM 0:f397b42257f8 52 *
MACRUM 0:f397b42257f8 53 * @code
MACRUM 0:f397b42257f8 54 * #include "mbed.h"
MACRUM 0:f397b42257f8 55 * #include "MB85RCxx_I2C.h"
MACRUM 0:f397b42257f8 56 *
MACRUM 0:f397b42257f8 57 * Serial pc(USBTX, USBRX);
MACRUM 0:f397b42257f8 58 *
MACRUM 0:f397b42257f8 59 * #if defined(TARGET_LPC1768)
MACRUM 0:f397b42257f8 60 * MB85RSxx_SPI _spi(p5, p6, p7, p8); // mosi, miso, sclk, cs
MACRUM 0:f397b42257f8 61 * #elif defined(TARGET_LPC1114)
MACRUM 0:f397b42257f8 62 * MB85RSxx_SPI _spi(dp2, dp1, dp6, dp9); // mosi, miso, sclk, cs
MACRUM 0:f397b42257f8 63 * #else // Arduino R3 Shield form factor
MACRUM 0:f397b42257f8 64 * MB85RSxx_SPI fram(D11, D12, D13, D10); // mosi, miso, sclk, cs
MACRUM 0:f397b42257f8 65 * #endif
MACRUM 0:f397b42257f8 66 *
MACRUM 0:f397b42257f8 67 * int main()
MACRUM 0:f397b42257f8 68 * {
MACRUM 0:f397b42257f8 69 * uint8_t buf[16];
MACRUM 0:f397b42257f8 70 * uint32_t address;
MACRUM 0:f397b42257f8 71 *
MACRUM 0:f397b42257f8 72 * fram.write_enable();
MACRUM 0:f397b42257f8 73 * fram.fill(0, 0, 256);
MACRUM 0:f397b42257f8 74 *
MACRUM 0:f397b42257f8 75 * for (int i = 0; i < 16; i++) {
MACRUM 0:f397b42257f8 76 * buf[i] = i;
MACRUM 0:f397b42257f8 77 * }
MACRUM 0:f397b42257f8 78 * fram.write(0, buf, 16);
MACRUM 0:f397b42257f8 79 *
MACRUM 0:f397b42257f8 80 * for (address = 0; address < 0x80; address += 16) {
MACRUM 0:f397b42257f8 81 * fram.read(address, buf, 16);
MACRUM 0:f397b42257f8 82 * pc.printf("%08X : ", address);
MACRUM 0:f397b42257f8 83 * for (int i = 0; i < 16; i++) {
MACRUM 0:f397b42257f8 84 * pc.printf("%02X ", buf[i]);
MACRUM 0:f397b42257f8 85 * }
MACRUM 0:f397b42257f8 86 * pc.printf("\n");
MACRUM 0:f397b42257f8 87 * }
MACRUM 0:f397b42257f8 88 * }
MACRUM 0:f397b42257f8 89 *
MACRUM 0:f397b42257f8 90 * @endcode
MACRUM 0:f397b42257f8 91 */
MACRUM 0:f397b42257f8 92
MACRUM 0:f397b42257f8 93 /** MB85RSxx_SPI class
MACRUM 0:f397b42257f8 94 *
MACRUM 0:f397b42257f8 95 * MB85RSxx_SPI: A library to access Fujitsu MB85RSxx FRAM
MACRUM 0:f397b42257f8 96 *
MACRUM 0:f397b42257f8 97 */
MACRUM 0:f397b42257f8 98 class MB85RSxx_SPI
MACRUM 0:f397b42257f8 99 {
MACRUM 0:f397b42257f8 100 public:
MACRUM 0:f397b42257f8 101
MACRUM 0:f397b42257f8 102 /** Create an MB85RSxx_SPI instance
MACRUM 0:f397b42257f8 103 * which is connected to specified SPI pins and chip select pin
MACRUM 0:f397b42257f8 104 *
MACRUM 0:f397b42257f8 105 * @param mosi SPI Master Out, Slave In pin
MACRUM 0:f397b42257f8 106 * @param miso SPI Master In, Slave Out pin
MACRUM 0:f397b42257f8 107 * @param sclk SPI Clock pin
MACRUM 0:f397b42257f8 108 * @param cs Chip Select pin
MACRUM 0:f397b42257f8 109 */
MACRUM 0:f397b42257f8 110 MB85RSxx_SPI(PinName mosi, PinName miso, PinName sclk, PinName cs);
MACRUM 0:f397b42257f8 111
MACRUM 0:f397b42257f8 112 /** Destructor of MB85RSxx_SPI
MACRUM 0:f397b42257f8 113 */
MACRUM 0:f397b42257f8 114 virtual ~MB85RSxx_SPI();
MACRUM 0:f397b42257f8 115
MACRUM 0:f397b42257f8 116 /** Set the SPI bus clock frequency
MACRUM 0:f397b42257f8 117 *
MACRUM 0:f397b42257f8 118 * @param hz SPI bus clock frequency
MACRUM 0:f397b42257f8 119 *
MACRUM 0:f397b42257f8 120 */
MACRUM 0:f397b42257f8 121 void frequency(int hz);
MACRUM 0:f397b42257f8 122
MACRUM 0:f397b42257f8 123 /** Read device ID from MB85RSxx FRAM
MACRUM 0:f397b42257f8 124 *
MACRUM 0:f397b42257f8 125 * @param device_id Pointer to the byte-array to read data in to
MACRUM 0:f397b42257f8 126 *
MACRUM 0:f397b42257f8 127 * @returns memory dencity
MACRUM 0:f397b42257f8 128 */
MACRUM 0:f397b42257f8 129 void read_device_id(uint8_t* device_id);
MACRUM 0:f397b42257f8 130
MACRUM 0:f397b42257f8 131 /** Read status register from MB85RSxx FRAM
MACRUM 0:f397b42257f8 132 *
MACRUM 0:f397b42257f8 133 * @returns Status register value
MACRUM 0:f397b42257f8 134 */
MACRUM 0:f397b42257f8 135 uint8_t read_status();
MACRUM 0:f397b42257f8 136
MACRUM 0:f397b42257f8 137 /** Read data from memory address
MACRUM 0:f397b42257f8 138 *
MACRUM 0:f397b42257f8 139 * @param address Memory address
MACRUM 0:f397b42257f8 140 * @param data Pointer to the byte-array to read data in to
MACRUM 0:f397b42257f8 141 * @param length Number of bytes to read
MACRUM 0:f397b42257f8 142 *
MACRUM 0:f397b42257f8 143 */
MACRUM 0:f397b42257f8 144 void read(uint32_t address, uint8_t* data, uint32_t length);
MACRUM 0:f397b42257f8 145
MACRUM 0:f397b42257f8 146 /** Read byte data from memory address
MACRUM 0:f397b42257f8 147 *
MACRUM 0:f397b42257f8 148 * @param address Memory address
MACRUM 0:f397b42257f8 149 *
MACRUM 0:f397b42257f8 150 * @returns Read out data
MACRUM 0:f397b42257f8 151 */
MACRUM 0:f397b42257f8 152 uint8_t read(uint32_t address);
MACRUM 0:f397b42257f8 153
MACRUM 0:f397b42257f8 154 /** Write data to memory address
MACRUM 0:f397b42257f8 155 *
MACRUM 0:f397b42257f8 156 * @param address Memory address
MACRUM 0:f397b42257f8 157 * @param data Pointer to the byte-array data to write
MACRUM 0:f397b42257f8 158 * @param length Number of bytes to write
MACRUM 0:f397b42257f8 159 *
MACRUM 0:f397b42257f8 160 */
MACRUM 0:f397b42257f8 161 void write(uint32_t address, uint8_t* data, uint32_t length);
MACRUM 0:f397b42257f8 162
MACRUM 0:f397b42257f8 163 /** Write data to memory address
MACRUM 0:f397b42257f8 164 *
MACRUM 0:f397b42257f8 165 * @param address Memory address
MACRUM 0:f397b42257f8 166 * @param data data to write out to memory
MACRUM 0:f397b42257f8 167 *
MACRUM 0:f397b42257f8 168 */
MACRUM 0:f397b42257f8 169 void write(uint32_t address, uint8_t data);
MACRUM 0:f397b42257f8 170
MACRUM 0:f397b42257f8 171 /** Fill data to memory address
MACRUM 0:f397b42257f8 172 *
MACRUM 0:f397b42257f8 173 * @param address Memory address
MACRUM 0:f397b42257f8 174 * @param data data to fill out to memory
MACRUM 0:f397b42257f8 175 * @param length Number of bytes to write
MACRUM 0:f397b42257f8 176 *
MACRUM 0:f397b42257f8 177 */
MACRUM 0:f397b42257f8 178 void fill(uint32_t address, uint8_t data, uint32_t length);
MACRUM 0:f397b42257f8 179
MACRUM 0:f397b42257f8 180 /** Enable write access
MACRUM 0:f397b42257f8 181 */
MACRUM 0:f397b42257f8 182 void write_enable();
MACRUM 0:f397b42257f8 183
MACRUM 0:f397b42257f8 184 /** Disable write access
MACRUM 0:f397b42257f8 185 */
MACRUM 0:f397b42257f8 186 void write_disable();
MACRUM 0:f397b42257f8 187
MACRUM 0:f397b42257f8 188 private:
MACRUM 0:f397b42257f8 189 SPI _spi;
MACRUM 0:f397b42257f8 190 DigitalOut _cs;
MACRUM 0:f397b42257f8 191 int _address_bits;
MACRUM 0:f397b42257f8 192
MACRUM 0:f397b42257f8 193 };
MACRUM 0:f397b42257f8 194
MACRUM 0:f397b42257f8 195 #endif