core_cmInstr.h

00001 /**************************************************************************//**
00002  * @file     core_cmInstr.h
00003  * @brief    CMSIS Cortex-M Core Instruction Access Header File
00004  * @version  V2.01
00005  * @date     06. December 2010
00006  *
00007  * @note
00008  * Copyright (C) 2009-2010 ARM Limited. All rights reserved.
00009  *
00010  * @par
00011  * ARM Limited (ARM) is supplying this software for use with Cortex-M
00012  * processor based microcontrollers.  This file can be freely distributed
00013  * within development tools that are supporting such ARM based processors.
00014  *
00015  * @par
00016  * THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED
00017  * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
00018  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
00019  * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
00020  * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
00021  *
00022  ******************************************************************************/
00023 
00024 #ifndef __CORE_CMINSTR_H__
00025 #define __CORE_CMINSTR_H__
00026 
00027 
00028 /* ##########################  Core Instruction Access  ######################### */
00029 /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
00030   Access to dedicated instructions
00031   @{
00032 */
00033 
00034 #if defined ( __CC_ARM   ) /*------------------ RealView Compiler ----------------*/
00035 /* ARM armcc specific functions */
00036 
00037 /** \brief  No Operation
00038 
00039     No Operation does nothing. This instruction can be used for code alignment purposes.
00040  */
00041 #define __NOP                             __nop
00042 
00043 
00044 /** \brief  Wait For Interrupt
00045 
00046     Wait For Interrupt is a hint instruction that suspends execution
00047     until one of a number of events occurs.
00048  */
00049 #define __WFI                             __wfi
00050 
00051 
00052 /** \brief  Wait For Event
00053 
00054     Wait For Event is a hint instruction that permits the processor to enter
00055     a low-power state until one of a number of events occurs.
00056  */
00057 #define __WFE                             __wfe
00058 
00059 
00060 /** \brief  Send Event
00061 
00062     Send Event is a hint instruction. It causes an event to be signaled to the CPU.
00063  */
00064 #define __SEV                             __sev
00065 
00066 
00067 /** \brief  Instruction Synchronization Barrier
00068 
00069     Instruction Synchronization Barrier flushes the pipeline in the processor,
00070     so that all instructions following the ISB are fetched from cache or
00071     memory, after the instruction has been completed.
00072  */
00073 #define __ISB()                           __isb(0xF)
00074 
00075 
00076 /** \brief  Data Synchronization Barrier
00077 
00078     This function acts as a special kind of Data Memory Barrier.
00079     It completes when all explicit memory accesses before this instruction complete.
00080  */
00081 #define __DSB()                           __dsb(0xF)
00082 
00083 
00084 /** \brief  Data Memory Barrier
00085 
00086     This function ensures the apparent order of the explicit memory operations before
00087     and after the instruction, without ensuring their completion.
00088  */
00089 #define __DMB()                           __dmb(0xF)
00090 
00091 
00092 /** \brief  Reverse byte order (32 bit)
00093 
00094     This function reverses the byte order in integer value.
00095 
00096     \param [in]    value  Value to reverse
00097     \return               Reversed value
00098  */
00099 #define __REV                             __rev
00100 
00101 
00102 /** \brief  Reverse byte order (16 bit)
00103 
00104     This function reverses the byte order in two unsigned short values.
00105 
00106     \param [in]    value  Value to reverse
00107     \return               Reversed value
00108  */
00109 #if (__ARMCC_VERSION < 400677)
00110 extern uint32_t __REV16(uint32_t value);
00111 #else  /* (__ARMCC_VERSION >= 400677)  */
00112 static __INLINE __ASM uint32_t __REV16(uint32_t value)
00113 {
00114     rev16 r0, r0
00115     bx lr
00116 }
00117 #endif /* __ARMCC_VERSION  */
00118 
00119 
00120 /** \brief  Reverse byte order in signed short value
00121 
00122     This function reverses the byte order in a signed short value with sign extension to integer.
00123 
00124     \param [in]    value  Value to reverse
00125     \return               Reversed value
00126  */
00127 #if (__ARMCC_VERSION < 400677)
00128 extern int32_t __REVSH(int32_t value);
00129 #else  /* (__ARMCC_VERSION >= 400677)  */
00130 static __INLINE __ASM int32_t __REVSH(int32_t value)
00131 {
00132     revsh r0, r0
00133     bx lr
00134 }
00135 #endif /* __ARMCC_VERSION  */
00136 
00137 
00138 #if       (__CORTEX_M >= 0x03)
00139 
00140 /** \brief  Reverse bit order of value
00141 
00142     This function reverses the bit order of the given value.
00143 
00144     \param [in]    value  Value to reverse
00145     \return               Reversed value
00146  */
00147 #define __RBIT                            __rbit
00148 
00149 
00150 /** \brief  LDR Exclusive (8 bit)
00151 
00152     This function performs a exclusive LDR command for 8 bit value.
00153 
00154     \param [in]    ptr  Pointer to data
00155     \return             value of type uint8_t at (*ptr)
00156  */
00157 #define __LDREXB(ptr)                     ((uint8_t ) __ldrex(ptr))
00158 
00159 
00160 /** \brief  LDR Exclusive (16 bit)
00161 
00162     This function performs a exclusive LDR command for 16 bit values.
00163 
00164     \param [in]    ptr  Pointer to data
00165     \return        value of type uint16_t at (*ptr)
00166  */
00167 #define __LDREXH(ptr)                     ((uint16_t) __ldrex(ptr))
00168 
00169 
00170 /** \brief  LDR Exclusive (32 bit)
00171 
00172     This function performs a exclusive LDR command for 32 bit values.
00173 
00174     \param [in]    ptr  Pointer to data
00175     \return        value of type uint32_t at (*ptr)
00176  */
00177 #define __LDREXW(ptr)                     ((uint32_t ) __ldrex(ptr))
00178 
00179 
00180 /** \brief  STR Exclusive (8 bit)
00181 
00182     This function performs a exclusive STR command for 8 bit values.
00183 
00184     \param [in]  value  Value to store
00185     \param [in]    ptr  Pointer to location
00186     \return          0  Function succeeded
00187     \return          1  Function failed
00188  */
00189 #define __STREXB(value, ptr)              __strex(value, ptr)
00190 
00191 
00192 /** \brief  STR Exclusive (16 bit)
00193 
00194     This function performs a exclusive STR command for 16 bit values.
00195 
00196     \param [in]  value  Value to store
00197     \param [in]    ptr  Pointer to location
00198     \return          0  Function succeeded
00199     \return          1  Function failed
00200  */
00201 #define __STREXH(value, ptr)              __strex(value, ptr)
00202 
00203 
00204 /** \brief  STR Exclusive (32 bit)
00205 
00206     This function performs a exclusive STR command for 32 bit values.
00207 
00208     \param [in]  value  Value to store
00209     \param [in]    ptr  Pointer to location
00210     \return          0  Function succeeded
00211     \return          1  Function failed
00212  */
00213 #define __STREXW(value, ptr)              __strex(value, ptr)
00214 
00215 
00216 /** \brief  Remove the exclusive lock
00217 
00218     This function removes the exclusive lock which is created by LDREX.
00219 
00220  */
00221 #if (__ARMCC_VERSION < 400000)
00222 extern void __CLREX(void);
00223 #else  /* (__ARMCC_VERSION >= 400000)  */
00224 #define __CLREX                           __clrex
00225 #endif /* __ARMCC_VERSION  */
00226 
00227 
00228 /** \brief  Signed Saturate
00229 
00230     This function saturates a signed value.
00231 
00232     \param [in]  value  Value to be saturated
00233     \param [in]    sat  Bit position to saturate to (1..32)
00234     \return             Saturated value
00235  */
00236 #define __SSAT                            __ssat
00237 
00238 
00239 /** \brief  Unsigned Saturate
00240 
00241     This function saturates an unsigned value.
00242 
00243     \param [in]  value  Value to be saturated
00244     \param [in]    sat  Bit position to saturate to (0..31)
00245     \return             Saturated value
00246  */
00247 #define __USAT                            __usat
00248 
00249 
00250 /** \brief  Count leading zeros
00251 
00252     This function counts the number of leading zeros of a data value.
00253 
00254     \param [in]  value  Value to count the leading zeros
00255     \return             number of leading zeros in value
00256  */
00257 #define __CLZ                             __clz
00258 
00259 #endif /* (__CORTEX_M >= 0x03) */
00260 
00261 
00262 
00263 #elif (defined (__ICCARM__)) /*---------------- ICC Compiler ---------------------*/
00264 /* IAR iccarm specific functions */
00265 
00266 #include <intrinsics.h>                     /* IAR Intrinsics   */
00267 
00268 #pragma diag_suppress=Pe940
00269 
00270 /** \brief  No Operation
00271 
00272     No Operation does nothing. This instruction can be used for code alignment purposes.
00273  */
00274 #define __NOP                           __no_operation
00275 
00276 
00277 /** \brief  Wait For Interrupt
00278 
00279     Wait For Interrupt is a hint instruction that suspends execution
00280     until one of a number of events occurs.
00281  */
00282 static __INLINE  void __WFI(void)
00283 {
00284     __ASM ("wfi");
00285 }
00286 
00287 
00288 /** \brief  Wait For Event
00289 
00290     Wait For Event is a hint instruction that permits the processor to enter
00291     a low-power state until one of a number of events occurs.
00292  */
00293 static __INLINE  void __WFE(void)
00294 {
00295     __ASM ("wfe");
00296 }
00297 
00298 
00299 /** \brief  Send Event
00300 
00301     Send Event is a hint instruction. It causes an event to be signaled to the CPU.
00302  */
00303 static __INLINE  void __SEV(void)
00304 {
00305     __ASM ("sev");
00306 }
00307 
00308 
00309 /* intrinsic     void __ISB(void)            (see intrinsics.h) */
00310 /* intrinsic     void __DSB(void)            (see intrinsics.h) */
00311 /* intrinsic     void __DMB(void)            (see intrinsics.h) */
00312 /* intrinsic uint32_t __REV(uint32_t value)  (see intrinsics.h) */
00313 /* intrinsic          __SSAT                 (see intrinsics.h) */
00314 /* intrinsic          __USAT                 (see intrinsics.h) */
00315 
00316 
00317 /** \brief  Reverse byte order (16 bit)
00318 
00319     This function reverses the byte order in two unsigned short values.
00320 
00321     \param [in]    value  Value to reverse
00322     \return               Reversed value
00323  */
00324 static uint32_t __REV16(uint32_t value)
00325 {
00326     __ASM("rev16 r0, r0");
00327 }
00328 
00329 
00330 /* intrinsic uint32_t __REVSH(uint32_t value)  (see intrinsics.h */
00331 
00332 
00333 #if       (__CORTEX_M >= 0x03)
00334 
00335 /** \brief  Reverse bit order of value
00336 
00337     This function reverses the bit order of the given value.
00338 
00339     \param [in]    value  Value to reverse
00340     \return               Reversed value
00341  */
00342 static uint32_t __RBIT(uint32_t value)
00343 {
00344     __ASM("rbit r0, r0");
00345 }
00346 
00347 
00348 /** \brief  LDR Exclusive (8 bit)
00349 
00350     This function performs a exclusive LDR command for 8 bit value.
00351 
00352     \param [in]    ptr  Pointer to data
00353     \return             value of type uint8_t at (*ptr)
00354  */
00355 static uint8_t __LDREXB(volatile uint8_t *addr)
00356 {
00357     __ASM("ldrexb r0, [r0]");
00358 }
00359 
00360 
00361 /** \brief  LDR Exclusive (16 bit)
00362 
00363     This function performs a exclusive LDR command for 16 bit values.
00364 
00365     \param [in]    ptr  Pointer to data
00366     \return        value of type uint16_t at (*ptr)
00367  */
00368 static uint16_t __LDREXH(volatile uint16_t *addr)
00369 {
00370     __ASM("ldrexh r0, [r0]");
00371 }
00372 
00373 
00374 /** \brief  LDR Exclusive (32 bit)
00375 
00376     This function performs a exclusive LDR command for 32 bit values.
00377 
00378     \param [in]    ptr  Pointer to data
00379     \return        value of type uint32_t at (*ptr)
00380  */
00381 /* intrinsic unsigned long __LDREX(unsigned long *)  (see intrinsics.h) */
00382 static uint32_t __LDREXW(volatile uint32_t *addr)
00383 {
00384     __ASM("ldrex r0, [r0]");
00385 }
00386 
00387 
00388 /** \brief  STR Exclusive (8 bit)
00389 
00390     This function performs a exclusive STR command for 8 bit values.
00391 
00392     \param [in]  value  Value to store
00393     \param [in]    ptr  Pointer to location
00394     \return          0  Function succeeded
00395     \return          1  Function failed
00396  */
00397 static uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
00398 {
00399     __ASM("strexb r0, r0, [r1]");
00400 }
00401 
00402 
00403 /** \brief  STR Exclusive (16 bit)
00404 
00405     This function performs a exclusive STR command for 16 bit values.
00406 
00407     \param [in]  value  Value to store
00408     \param [in]    ptr  Pointer to location
00409     \return          0  Function succeeded
00410     \return          1  Function failed
00411  */
00412 static uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
00413 {
00414     __ASM("strexh r0, r0, [r1]");
00415 }
00416 
00417 
00418 /** \brief  STR Exclusive (32 bit)
00419 
00420     This function performs a exclusive STR command for 32 bit values.
00421 
00422     \param [in]  value  Value to store
00423     \param [in]    ptr  Pointer to location
00424     \return          0  Function succeeded
00425     \return          1  Function failed
00426  */
00427 /* intrinsic unsigned long __STREX(unsigned long, unsigned long)  (see intrinsics.h )*/
00428 static uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
00429 {
00430     __ASM("strex r0, r0, [r1]");
00431 }
00432 
00433 
00434 /** \brief  Remove the exclusive lock
00435 
00436     This function removes the exclusive lock which is created by LDREX.
00437 
00438  */
00439 static __INLINE void __CLREX(void)
00440 {
00441     __ASM ("clrex");
00442 }
00443 
00444 /* intrinsic   unsigned char __CLZ( unsigned long )      (see intrinsics.h) */
00445 
00446 #endif /* (__CORTEX_M >= 0x03) */
00447 
00448 #pragma diag_default=Pe940
00449 
00450 
00451 
00452 #elif (defined (__GNUC__)) /*------------------ GNU Compiler ---------------------*/
00453 /* GNU gcc specific functions */
00454 
00455 /** \brief  No Operation
00456 
00457     No Operation does nothing. This instruction can be used for code alignment purposes.
00458  */
00459 __attribute__( ( always_inline ) ) static __INLINE void __NOP(void)
00460 {
00461     __ASM volatile ("nop");
00462 }
00463 
00464 
00465 /** \brief  Wait For Interrupt
00466 
00467     Wait For Interrupt is a hint instruction that suspends execution
00468     until one of a number of events occurs.
00469  */
00470 __attribute__( ( always_inline ) ) static __INLINE void __WFI(void)
00471 {
00472     __ASM volatile ("wfi");
00473 }
00474 
00475 
00476 /** \brief  Wait For Event
00477 
00478     Wait For Event is a hint instruction that permits the processor to enter
00479     a low-power state until one of a number of events occurs.
00480  */
00481 __attribute__( ( always_inline ) ) static __INLINE void __WFE(void)
00482 {
00483     __ASM volatile ("wfe");
00484 }
00485 
00486 
00487 /** \brief  Send Event
00488 
00489     Send Event is a hint instruction. It causes an event to be signaled to the CPU.
00490  */
00491 __attribute__( ( always_inline ) ) static __INLINE void __SEV(void)
00492 {
00493     __ASM volatile ("sev");
00494 }
00495 
00496 
00497 /** \brief  Instruction Synchronization Barrier
00498 
00499     Instruction Synchronization Barrier flushes the pipeline in the processor,
00500     so that all instructions following the ISB are fetched from cache or
00501     memory, after the instruction has been completed.
00502  */
00503 __attribute__( ( always_inline ) ) static __INLINE void __ISB(void)
00504 {
00505     __ASM volatile ("isb");
00506 }
00507 
00508 
00509 /** \brief  Data Synchronization Barrier
00510 
00511     This function acts as a special kind of Data Memory Barrier.
00512     It completes when all explicit memory accesses before this instruction complete.
00513  */
00514 __attribute__( ( always_inline ) ) static __INLINE void __DSB(void)
00515 {
00516     __ASM volatile ("dsb");
00517 }
00518 
00519 
00520 /** \brief  Data Memory Barrier
00521 
00522     This function ensures the apparent order of the explicit memory operations before
00523     and after the instruction, without ensuring their completion.
00524  */
00525 __attribute__( ( always_inline ) ) static __INLINE void __DMB(void)
00526 {
00527     __ASM volatile ("dmb");
00528 }
00529 
00530 
00531 /** \brief  Reverse byte order (32 bit)
00532 
00533     This function reverses the byte order in integer value.
00534 
00535     \param [in]    value  Value to reverse
00536     \return               Reversed value
00537  */
00538 __attribute__( ( always_inline ) ) static __INLINE uint32_t __REV(uint32_t value)
00539 {
00540     uint32_t result;
00541 
00542 __ASM volatile ("rev %0, %1" : "=r" (result) : "r" (value) );
00543     return(result);
00544 }
00545 
00546 
00547 /** \brief  Reverse byte order (16 bit)
00548 
00549     This function reverses the byte order in two unsigned short values.
00550 
00551     \param [in]    value  Value to reverse
00552     \return               Reversed value
00553  */
00554 __attribute__( ( always_inline ) ) static __INLINE uint32_t __REV16(uint32_t value)
00555 {
00556     uint32_t result;
00557 
00558 __ASM volatile ("rev16 %0, %1" : "=r" (result) : "r" (value) );
00559     return(result);
00560 }
00561 
00562 
00563 /** \brief  Reverse byte order in signed short value
00564 
00565     This function reverses the byte order in a signed short value with sign extension to integer.
00566 
00567     \param [in]    value  Value to reverse
00568     \return               Reversed value
00569  */
00570 __attribute__( ( always_inline ) ) static __INLINE int32_t __REVSH(int32_t value)
00571 {
00572     uint32_t result;
00573 
00574 __ASM volatile ("revsh %0, %1" : "=r" (result) : "r" (value) );
00575     return(result);
00576 }
00577 
00578 
00579 #if       (__CORTEX_M >= 0x03)
00580 
00581 /** \brief  Reverse bit order of value
00582 
00583     This function reverses the bit order of the given value.
00584 
00585     \param [in]    value  Value to reverse
00586     \return               Reversed value
00587  */
00588 __attribute__( ( always_inline ) ) static __INLINE uint32_t __RBIT(uint32_t value)
00589 {
00590     uint32_t result;
00591 
00592 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
00593     return(result);
00594 }
00595 
00596 
00597 /** \brief  LDR Exclusive (8 bit)
00598 
00599     This function performs a exclusive LDR command for 8 bit value.
00600 
00601     \param [in]    ptr  Pointer to data
00602     \return             value of type uint8_t at (*ptr)
00603  */
00604 __attribute__( ( always_inline ) ) static __INLINE uint8_t __LDREXB(volatile uint8_t *addr)
00605 {
00606     uint8_t result;
00607 
00608 __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) );
00609     return(result);
00610 }
00611 
00612 
00613 /** \brief  LDR Exclusive (16 bit)
00614 
00615     This function performs a exclusive LDR command for 16 bit values.
00616 
00617     \param [in]    ptr  Pointer to data
00618     \return        value of type uint16_t at (*ptr)
00619  */
00620 __attribute__( ( always_inline ) ) static __INLINE uint16_t __LDREXH(volatile uint16_t *addr)
00621 {
00622     uint16_t result;
00623 
00624 __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) );
00625     return(result);
00626 }
00627 
00628 
00629 /** \brief  LDR Exclusive (32 bit)
00630 
00631     This function performs a exclusive LDR command for 32 bit values.
00632 
00633     \param [in]    ptr  Pointer to data
00634     \return        value of type uint32_t at (*ptr)
00635  */
00636 __attribute__( ( always_inline ) ) static __INLINE uint32_t __LDREXW(volatile uint32_t *addr)
00637 {
00638     uint32_t result;
00639 
00640 __ASM volatile ("ldrex %0, [%1]" : "=r" (result) : "r" (addr) );
00641     return(result);
00642 }
00643 
00644 
00645 /** \brief  STR Exclusive (8 bit)
00646 
00647     This function performs a exclusive STR command for 8 bit values.
00648 
00649     \param [in]  value  Value to store
00650     \param [in]    ptr  Pointer to location
00651     \return          0  Function succeeded
00652     \return          1  Function failed
00653  */
00654 __attribute__( ( always_inline ) ) static __INLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
00655 {
00656     uint32_t result;
00657 
00658 __ASM volatile ("strexb %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
00659     return(result);
00660 }
00661 
00662 
00663 /** \brief  STR Exclusive (16 bit)
00664 
00665     This function performs a exclusive STR command for 16 bit values.
00666 
00667     \param [in]  value  Value to store
00668     \param [in]    ptr  Pointer to location
00669     \return          0  Function succeeded
00670     \return          1  Function failed
00671  */
00672 __attribute__( ( always_inline ) ) static __INLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
00673 {
00674     uint32_t result;
00675 
00676 __ASM volatile ("strexh %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
00677     return(result);
00678 }
00679 
00680 
00681 /** \brief  STR Exclusive (32 bit)
00682 
00683     This function performs a exclusive STR command for 32 bit values.
00684 
00685     \param [in]  value  Value to store
00686     \param [in]    ptr  Pointer to location
00687     \return          0  Function succeeded
00688     \return          1  Function failed
00689  */
00690 __attribute__( ( always_inline ) ) static __INLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
00691 {
00692     uint32_t result;
00693 
00694 __ASM volatile ("strex %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
00695     return(result);
00696 }
00697 
00698 
00699 /** \brief  Remove the exclusive lock
00700 
00701     This function removes the exclusive lock which is created by LDREX.
00702 
00703  */
00704 __attribute__( ( always_inline ) ) static __INLINE void __CLREX(void)
00705 {
00706     __ASM volatile ("clrex");
00707 }
00708 
00709 
00710 /** \brief  Signed Saturate
00711 
00712     This function saturates a signed value.
00713 
00714     \param [in]  value  Value to be saturated
00715     \param [in]    sat  Bit position to saturate to (1..32)
00716     \return             Saturated value
00717  */
00718 #define __SSAT(ARG1,ARG2) \
00719 ({                          \
00720   uint32_t __RES, __ARG1 = (ARG1); \
00721   __ASM ("ssat %0, %1, %2" : "=r" (__RES) :  "I" (ARG2), "r" (__ARG1) ); \
00722   __RES; \
00723  })
00724 
00725 
00726 /** \brief  Unsigned Saturate
00727 
00728     This function saturates an unsigned value.
00729 
00730     \param [in]  value  Value to be saturated
00731     \param [in]    sat  Bit position to saturate to (0..31)
00732     \return             Saturated value
00733  */
00734 #define __USAT(ARG1,ARG2) \
00735 ({                          \
00736   uint32_t __RES, __ARG1 = (ARG1); \
00737   __ASM ("usat %0, %1, %2" : "=r" (__RES) :  "I" (ARG2), "r" (__ARG1) ); \
00738   __RES; \
00739  })
00740 
00741 
00742 /** \brief  Count leading zeros
00743 
00744     This function counts the number of leading zeros of a data value.
00745 
00746     \param [in]  value  Value to count the leading zeros
00747     \return             number of leading zeros in value
00748  */
00749 __attribute__( ( always_inline ) ) static __INLINE uint8_t __CLZ(uint32_t value)
00750 {
00751     uint8_t result;
00752 
00753 __ASM volatile ("clz %0, %1" : "=r" (result) : "r" (value) );
00754     return(result);
00755 }
00756 
00757 #endif /* (__CORTEX_M >= 0x03) */
00758 
00759 
00760 
00761 
00762 #elif (defined (__TASKING__)) /*--------------- TASKING Compiler -----------------*/
00763 /* TASKING carm specific functions */
00764 
00765 /*
00766  * The CMSIS functions have been implemented as intrinsics in the compiler.
00767  * Please use "carm -?i" to get an up to date list of all instrinsics,
00768  * Including the CMSIS ones.
00769  */
00770 
00771 #endif
00772 
00773 /*@}*/ /* end of group CMSIS_Core_InstructionInterface */
00774 
00775 #endif /* __CORE_CMINSTR_H__ */
00776