stm32l4xx_ll_sdmmc.c

00001 /**
00002   ******************************************************************************
00003   * @file    stm32l4xx_ll_sdmmc.c
00004   * @author  MCD Application Team
00005   * @version V1.1.0
00006   * @date    16-September-2015
00007   * @brief   SDMMC Low Layer HAL module driver.  
00008   *          This file provides firmware functions to manage the following 
00009   *          functionalities of the SDMMC peripheral:
00010   *           + Initialization/de-initialization functions
00011   *           + I/O operation functions
00012   *           + Peripheral Control functions 
00013   *           + Peripheral State functions
00014   *         
00015   @verbatim
00016   ==============================================================================
00017                        ##### SDMMC peripheral features #####
00018   ==============================================================================        
00019     [..] The SD/SDMMC MMC card host interface (SDMMC) provides an interface between the APB2
00020          peripheral bus and MultiMedia cards (MMCs), SD memory cards, SDMMC cards and CE-ATA
00021          devices.
00022     
00023     [..] The SDMMC features include the following:
00024          (+) Full compliance with MultiMedia Card System Specification Version 4.2. Card support
00025              for three different data bus modes: 1-bit (default), 4-bit and 8-bit
00026          (+) Full compatibility with previous versions of MultiMedia Cards (forward compatibility)
00027          (+) Full compliance with SD Memory Card Specifications Version 2.0
00028          (+) Full compliance with SD I/O Card Specification Version 2.0: card support for two
00029              different data bus modes: 1-bit (default) and 4-bit
00030          (+) Full support of the CE-ATA features (full compliance with CE-ATA digital protocol
00031              Rev1.1)
00032          (+) Data transfer up to 48 MHz for the 8 bit mode
00033          (+) Data and command output enable signals to control external bidirectional drivers.
00034                  
00035    
00036                            ##### How to use this driver #####
00037   ==============================================================================
00038     [..]
00039       This driver is a considered as a driver of service for external devices drivers 
00040       that interfaces with the SDMMC peripheral.
00041       According to the device used (SD card/ MMC card / SDMMC card ...), a set of APIs 
00042       is used in the device's driver to perform SDMMC operations and functionalities.
00043    
00044       This driver is almost transparent for the final user, it is only used to implement other
00045       functionalities of the external device.
00046    
00047     [..]
00048       (+) The SDMMC clock (SDMMCCLK = 48 MHz) is coming from a specific output (MSI, PLLUSB1CLK,
00049           PLLUSB2CLK). Before start working with SDMMC peripheral make sure that the
00050           PLL is well configured.
00051           The SDMMC peripheral uses two clock signals:
00052           (++) SDMMC adapter clock (SDMMCCLK = 48 MHz)
00053           (++) APB2 bus clock (PCLK2)
00054        
00055           -@@- PCLK2 and SDMMC_CK clock frequencies must respect the following condition:
00056                Frequency(PCLK2) >= (3 / 8 x Frequency(SDMMC_CK))
00057   
00058       (+) Enable/Disable peripheral clock using RCC peripheral macros related to SDMMC
00059           peripheral.
00060 
00061       (+) Enable the Power ON State using the SDMMC_PowerState_ON(SDMMCx) 
00062           function and disable it using the function SDMMC_PowerState_OFF(SDMMCx).
00063                 
00064       (+) Enable/Disable the clock using the __SDMMC_ENABLE()/__SDMMC_DISABLE() macros.
00065   
00066       (+) Enable/Disable the peripheral interrupts using the macros __SDMMC_ENABLE_IT(hSDMMC, IT) 
00067           and __SDMMC_DISABLE_IT(hSDMMC, IT) if you need to use interrupt mode. 
00068   
00069       (+) When using the DMA mode 
00070           (++) Configure the DMA in the MSP layer of the external device
00071           (++) Active the needed channel Request 
00072           (++) Enable the DMA using __SDMMC_DMA_ENABLE() macro or Disable it using the macro
00073                __SDMMC_DMA_DISABLE().
00074   
00075       (+) To control the CPSM (Command Path State Machine) and send 
00076           commands to the card use the SDMMC_SendCommand(SDMMCx), 
00077           SDMMC_GetCommandResponse() and SDMMC_GetResponse() functions. First, user has
00078           to fill the command structure (pointer to SDMMC_CmdInitTypeDef) according 
00079           to the selected command to be sent.
00080           The parameters that should be filled are:
00081            (++) Command Argument
00082            (++) Command Index
00083            (++) Command Response type
00084            (++) Command Wait
00085            (++) CPSM Status (Enable or Disable).
00086   
00087           -@@- To check if the command is well received, read the SDMMC_CMDRESP
00088               register using the SDMMC_GetCommandResponse().
00089               The SDMMC responses registers (SDMMC_RESP1 to SDMMC_RESP2), use the
00090               SDMMC_GetResponse() function.
00091   
00092       (+) To control the DPSM (Data Path State Machine) and send/receive 
00093            data to/from the card use the SDMMC_DataConfig(), SDMMC_GetDataCounter(), 
00094           SDMMC_ReadFIFO(), SDMMC_WriteFIFO() and SDMMC_GetFIFOCount() functions.
00095   
00096     *** Read Operations ***
00097     =======================
00098     [..]
00099       (#) First, user has to fill the data structure (pointer to
00100           SDMMC_DataInitTypeDef) according to the selected data type to be received.
00101           The parameters that should be filled are:
00102            (++) Data TimeOut
00103            (++) Data Length
00104            (++) Data Block size
00105            (++) Data Transfer direction: should be from card (To SDMMC)
00106            (++) Data Transfer mode
00107            (++) DPSM Status (Enable or Disable)
00108                                      
00109       (#) Configure the SDMMC resources to receive the data from the card
00110           according to selected transfer mode (Refer to Step 8, 9 and 10).
00111   
00112       (#) Send the selected Read command (refer to step 11).
00113                     
00114       (#) Use the SDMMC flags/interrupts to check the transfer status.
00115   
00116     *** Write Operations ***
00117     ========================
00118     [..]
00119      (#) First, user has to fill the data structure (pointer to
00120          SDMMC_DataInitTypeDef) according to the selected data type to be received.
00121          The parameters that should be filled are:
00122           (++) Data TimeOut
00123           (++) Data Length
00124           (++) Data Block size
00125           (++) Data Transfer direction:  should be to card (To CARD)
00126           (++) Data Transfer mode
00127           (++) DPSM Status (Enable or Disable)
00128   
00129      (#) Configure the SDMMC resources to send the data to the card according to 
00130          selected transfer mode.
00131                      
00132      (#) Send the selected Write command.
00133                     
00134      (#) Use the SDMMC flags/interrupts to check the transfer status.
00135   
00136   @endverbatim
00137   ******************************************************************************
00138   * @attention
00139   *
00140   * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
00141   *
00142   * Redistribution and use in source and binary forms, with or without modification,
00143   * are permitted provided that the following conditions are met:
00144   *   1. Redistributions of source code must retain the above copyright notice,
00145   *      this list of conditions and the following disclaimer.
00146   *   2. Redistributions in binary form must reproduce the above copyright notice,
00147   *      this list of conditions and the following disclaimer in the documentation
00148   *      and/or other materials provided with the distribution.
00149   *   3. Neither the name of STMicroelectronics nor the names of its contributors
00150   *      may be used to endorse or promote products derived from this software
00151   *      without specific prior written permission.
00152   *
00153   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
00154   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00155   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
00156   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
00157   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00158   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
00159   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
00160   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00161   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
00162   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00163   *
00164   ******************************************************************************
00165   */ 
00166 
00167 /* Includes ------------------------------------------------------------------*/
00168 #include "stm32l4xx_hal.h"
00169 
00170 /** @addtogroup STM32L4xx_HAL_Driver
00171   * @{
00172   */
00173 
00174 /** @defgroup SDMMC_LL SDMMC Low Layer
00175   * @brief Low layer module for SD
00176   * @{
00177   */
00178 
00179 #if defined (HAL_SD_MODULE_ENABLED)
00180 
00181 /* Private typedef -----------------------------------------------------------*/
00182 /* Private define ------------------------------------------------------------*/
00183 /* Private macro -------------------------------------------------------------*/
00184 /* Private variables ---------------------------------------------------------*/
00185 /* Private function prototypes -----------------------------------------------*/
00186 /* Exported functions --------------------------------------------------------*/
00187 
00188 /** @defgroup SDMMC_LL_Exported_Functions SDMMC Low Layer Exported Functions
00189   * @{
00190   */
00191 
00192 /** @defgroup HAL_SDMMC_LL_Group1 Initialization de-initialization functions 
00193  *  @brief    Initialization and Configuration functions 
00194  *
00195 @verbatim    
00196  ===============================================================================
00197               ##### Initialization/de-initialization functions #####
00198  ===============================================================================
00199     [..]  This section provides functions allowing to:
00200  
00201 @endverbatim
00202   * @{
00203   */
00204 
00205 /**
00206   * @brief  Initializes the SDMMC according to the specified
00207   *         parameters in the SDMMC_InitTypeDef and initialize the associated handle.
00208   * @param  SDMMCx: Pointer to SDMMC register base
00209   * @param  Init: SDMMC initialization structure   
00210   * @retval HAL status
00211   */
00212 HAL_StatusTypeDef SDMMC_Init(SDMMC_TypeDef *SDMMCx, SDMMC_InitTypeDef Init)
00213 {
00214   /* Check the parameters */
00215   assert_param(IS_SDMMC_ALL_INSTANCE(SDMMCx));
00216   assert_param(IS_SDMMC_CLOCK_EDGE(Init.ClockEdge )); 
00217   assert_param(IS_SDMMC_CLOCK_BYPASS(Init.ClockBypass ));
00218   assert_param(IS_SDMMC_CLOCK_POWER_SAVE(Init.ClockPowerSave ));
00219   assert_param(IS_SDMMC_BUS_WIDE(Init.BusWide ));
00220   assert_param(IS_SDMMC_HARDWARE_FLOW_CONTROL(Init.HardwareFlowControl ));
00221   assert_param(IS_SDMMC_CLKDIV(Init.ClockDiv ));
00222   
00223   /* Set SDMMC configuration parameters */
00224   /* Write to SDMMC CLKCR */
00225   MODIFY_REG(SDMMCx->CLKCR, CLKCR_CLEAR_MASK, Init.ClockEdge            |\
00226                                               Init.ClockBypass          |\
00227                                               Init.ClockPowerSave       |\
00228                                               Init.BusWide              |\
00229                                               Init.HardwareFlowControl  |\
00230                                               Init.ClockDiv );  
00231 
00232   return HAL_OK;
00233 }
00234 
00235 
00236 
00237 /**
00238   * @}
00239   */
00240 
00241 /** @defgroup HAL_SDMMC_LL_Group2 IO operation functions 
00242  *  @brief   Data transfers functions 
00243  *
00244 @verbatim   
00245  ===============================================================================
00246                       ##### I/O operation functions #####
00247  ===============================================================================  
00248     [..]
00249     This subsection provides a set of functions allowing to manage the SDMMC data 
00250     transfers.
00251 
00252 @endverbatim
00253   * @{
00254   */
00255 
00256 /**
00257   * @brief  Read data (word) from Rx FIFO in blocking mode (polling) 
00258   * @param  SDMMCx: Pointer to SDMMC register base
00259   * @retval HAL status
00260   */
00261 uint32_t SDMMC_ReadFIFO(SDMMC_TypeDef *SDMMCx)
00262 {
00263   /* Read data from Rx FIFO */ 
00264   return (SDMMCx->FIFO);
00265 }
00266 
00267 /**
00268   * @brief  Write data (word) to Tx FIFO in blocking mode (polling) 
00269   * @param  SDMMCx: Pointer to SDMMC register base
00270   * @param  pWriteData: pointer to data to write
00271   * @retval HAL status
00272   */
00273 HAL_StatusTypeDef SDMMC_WriteFIFO(SDMMC_TypeDef *SDMMCx, uint32_t *pWriteData)
00274 { 
00275   /* Write data to FIFO */ 
00276   SDMMCx->FIFO = *pWriteData;
00277 
00278   return HAL_OK;
00279 }
00280 
00281 /**
00282   * @}
00283   */
00284 
00285 /** @defgroup HAL_SDMMC_LL_Group3 Peripheral Control functions 
00286  *  @brief   management functions 
00287  *
00288 @verbatim   
00289  ===============================================================================
00290                       ##### Peripheral Control functions #####
00291  ===============================================================================  
00292     [..]
00293     This subsection provides a set of functions allowing to control the SDMMC data 
00294     transfers.
00295 
00296 @endverbatim
00297   * @{
00298   */
00299 
00300 /**
00301   * @brief  Set SDMMC Power state to ON. 
00302   * @param  SDMMCx: Pointer to SDMMC register base
00303   * @retval HAL status
00304   */
00305 HAL_StatusTypeDef SDMMC_PowerState_ON(SDMMC_TypeDef *SDMMCx)
00306 {  
00307   /* Set power state to ON */ 
00308   SDMMCx->POWER = SDMMC_POWER_PWRCTRL;
00309   
00310   return HAL_OK; 
00311 }
00312 
00313 /**
00314   * @brief  Set SDMMC Power state to OFF. 
00315   * @param  SDMMCx: Pointer to SDMMC register base
00316   * @retval HAL status
00317   */
00318 HAL_StatusTypeDef SDMMC_PowerState_OFF(SDMMC_TypeDef *SDMMCx)
00319 {
00320   /* Set power state to OFF */
00321   SDMMCx->POWER = (uint32_t)0x00000000;
00322   
00323   return HAL_OK;
00324 }
00325 
00326 /**
00327   * @brief  Get SDMMC Power state. 
00328   * @param  SDMMCx: Pointer to SDMMC register base
00329   * @retval Power status of the controller. The returned value can be one of the 
00330   *         following values:
00331   *            - 0x00: Power OFF
00332   *            - 0x02: Power UP
00333   *            - 0x03: Power ON 
00334   */
00335 uint32_t SDMMC_GetPowerState(SDMMC_TypeDef *SDMMCx)  
00336 {
00337   return (SDMMCx->POWER & SDMMC_POWER_PWRCTRL);
00338 }
00339 
00340 /**
00341   * @brief  Configure the SDMMC command path according to the specified parameters in
00342   *         SDMMC_CmdInitTypeDef structure and send the command 
00343   * @param  SDMMCx: Pointer to SDMMC register base
00344   * @param  Command: pointer to a SDMMC_CmdInitTypeDef structure that contains 
00345   *         the configuration information for the SDMMC command
00346   * @retval HAL status
00347   */
00348 HAL_StatusTypeDef SDMMC_SendCommand(SDMMC_TypeDef *SDMMCx, SDMMC_CmdInitTypeDef *Command)
00349 {
00350   /* Check the parameters */
00351   assert_param(IS_SDMMC_CMD_INDEX(Command->CmdIndex ));
00352   assert_param(IS_SDMMC_RESPONSE(Command->Response ));
00353   assert_param(IS_SDMMC_WAIT(Command->WaitForInterrupt ));
00354   assert_param(IS_SDMMC_CPSM(Command->CPSM ));
00355 
00356   /* Set the SDMMC Argument value */
00357   SDMMCx->ARG = Command->Argument ;
00358 
00359   /* Set SDMMC command parameters */
00360   /* Write to SDMMC CMD register */
00361   MODIFY_REG(SDMMCx->CMD, CMD_CLEAR_MASK, Command->CmdIndex          |\
00362                                           Command->Response          |\
00363                                           Command->WaitForInterrupt  |\
00364                                           Command->CPSM ); 
00365   
00366   return HAL_OK;  
00367 }
00368 
00369 /**
00370   * @brief  Return the command index of last command for which response received
00371   * @param  SDMMCx: Pointer to SDMMC register base
00372   * @retval Command index of the last command response received
00373   */
00374 uint8_t SDMMC_GetCommandResponse(SDMMC_TypeDef *SDMMCx)
00375 {
00376   return (uint8_t)(SDMMCx->RESPCMD);
00377 }
00378 
00379 
00380 /**
00381   * @brief  Return the response received from the card for the last command
00382   * @param  SDMMCx: Pointer to SDMMC register base    
00383   * @param  Response: Specifies the SDMMC response register. 
00384   *          This parameter can be one of the following values:
00385   *            @arg SDMMC_RESP1: Response Register 1
00386   *            @arg SDMMC_RESP2: Response Register 2
00387   *            @arg SDMMC_RESP3: Response Register 3
00388   *            @arg SDMMC_RESP4: Response Register 4  
00389   * @retval The Corresponding response register value
00390   */
00391 uint32_t SDMMC_GetResponse(SDMMC_TypeDef *SDMMCx, uint32_t Response)
00392 {
00393   __IO uint32_t tmp = 0;
00394 
00395   /* Check the parameters */
00396   assert_param(IS_SDMMC_RESP(Response));
00397   
00398   /* Get the response */
00399   tmp = (uint32_t)&(SDMMCx->RESP1) + Response;
00400   
00401   return (*(__IO uint32_t *) tmp);
00402 }  
00403 
00404 /**
00405   * @brief  Configure the SDMMC data path according to the specified 
00406   *         parameters in the SDMMC_DataInitTypeDef.
00407   * @param  SDMMCx: Pointer to SDMMC register base  
00408   * @param  Data : pointer to a SDMMC_DataInitTypeDef structure 
00409   *         that contains the configuration information for the SDMMC data.
00410   * @retval HAL status
00411   */
00412 HAL_StatusTypeDef SDMMC_DataConfig(SDMMC_TypeDef *SDMMCx, SDMMC_DataInitTypeDef* Data)
00413 {
00414   /* Check the parameters */
00415   assert_param(IS_SDMMC_DATA_LENGTH(Data->DataLength ));
00416   assert_param(IS_SDMMC_BLOCK_SIZE(Data->DataBlockSize ));
00417   assert_param(IS_SDMMC_TRANSFER_DIR(Data->TransferDir ));
00418   assert_param(IS_SDMMC_TRANSFER_MODE(Data->TransferMode ));
00419   assert_param(IS_SDMMC_DPSM(Data->DPSM ));
00420 
00421   /* Set the SDMMC Data TimeOut value */
00422   SDMMCx->DTIMER = Data->DataTimeOut ;
00423 
00424   /* Set the SDMMC DataLength value */
00425   SDMMCx->DLEN = Data->DataLength ;
00426 
00427   /* Set the SDMMC data configuration parameters */
00428   /* Write to SDMMC DCTRL */
00429   MODIFY_REG(SDMMCx->DCTRL, DCTRL_CLEAR_MASK, Data->DataBlockSize  |\
00430                                               Data->TransferDir    |\
00431                                               Data->TransferMode   |\
00432                                               Data->DPSM );
00433 
00434   return HAL_OK;
00435 
00436 }
00437 
00438 /**
00439   * @brief  Returns number of remaining data bytes to be transferred.
00440   * @param  SDMMCx: Pointer to SDMMC register base
00441   * @retval Number of remaining data bytes to be transferred
00442   */
00443 uint32_t SDMMC_GetDataCounter(SDMMC_TypeDef *SDMMCx)
00444 {
00445   return (SDMMCx->DCOUNT);
00446 }
00447 
00448 /**
00449   * @brief  Get the FIFO data
00450   * @param  SDMMCx: Pointer to SDMMC register base 
00451   * @retval Data received
00452   */
00453 uint32_t SDMMC_GetFIFOCount(SDMMC_TypeDef *SDMMCx)
00454 {
00455   return (SDMMCx->FIFO);
00456 }
00457 
00458 
00459 /**
00460   * @brief  Sets one of the two options of inserting read wait interval.
00461   * @param  SDMMCx: Pointer to SDMMC register base   
00462   * @param  SDMMC_ReadWaitMode: SDMMC Read Wait operation mode.
00463   *          This parameter can be:
00464   *            @arg SDMMC_READ_WAIT_MODE_CLK: Read Wait control by stopping SDMMCCLK
00465   *            @arg SDMMC_READ_WAIT_MODE_DATA2: Read Wait control using SDMMC_DATA2
00466   * @retval None
00467   */
00468 HAL_StatusTypeDef SDMMC_SetSDMMCReadWaitMode(SDMMC_TypeDef *SDMMCx, uint32_t SDMMC_ReadWaitMode)
00469 {
00470   /* Check the parameters */
00471   assert_param(IS_SDMMC_READWAIT_MODE(SDMMC_ReadWaitMode));
00472   
00473   /* Set SDMMC read wait mode */
00474   MODIFY_REG(SDMMCx->DCTRL, SDMMC_DCTRL_RWMOD, SDMMC_ReadWaitMode); 
00475   
00476   return HAL_OK;  
00477 }
00478 
00479 /**
00480   * @}
00481   */
00482 
00483 /**
00484   * @}
00485   */
00486 
00487 #endif /* (HAL_SD_MODULE_ENABLED) */
00488 /**
00489   * @}
00490   */
00491 
00492 /**
00493   * @}
00494   */
00495 
00496 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
00497