Senior Design: Sound Monitor
L4 HAL Drivers
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stm32l4xx_ll_bus.h File Reference
Header file of BUS LL module. More...
Go to the source code of this file.
Functions | |
| __STATIC_INLINE void | LL_AHB1_GRP1_EnableClock (uint32_t Periphs) |
| Enable AHB1 peripherals clock. | |
| __STATIC_INLINE uint32_t | LL_AHB1_GRP1_IsEnabledClock (uint32_t Periphs) |
| Check if AHB1 peripheral clock is enabled or not AHB1ENR DMA1EN LL_AHB1_GRP1_IsEnabledClock AHB1ENR DMA2EN LL_AHB1_GRP1_IsEnabledClock AHB1ENR FLASHEN LL_AHB1_GRP1_IsEnabledClock AHB1ENR CRCEN LL_AHB1_GRP1_IsEnabledClock AHB1ENR TSCEN LL_AHB1_GRP1_IsEnabledClock. | |
| __STATIC_INLINE void | LL_AHB1_GRP1_DisableClock (uint32_t Periphs) |
| Disable AHB1 peripherals clock. | |
| __STATIC_INLINE void | LL_AHB1_GRP1_ForceReset (uint32_t Periphs) |
| Force AHB1 peripherals reset. | |
| __STATIC_INLINE void | LL_AHB1_GRP1_ReleaseReset (uint32_t Periphs) |
| Release AHB1 peripherals reset. | |
| __STATIC_INLINE void | LL_AHB1_GRP1_EnableClockStopSleep (uint32_t Periphs) |
| Enable AHB1 peripheral clocks in Sleep and Stop modes AHB1SMENR DMA1SMEN LL_AHB1_GRP1_EnableClockStopSleep AHB1SMENR DMA2SMEN LL_AHB1_GRP1_EnableClockStopSleep AHB1SMENR FLASHSMEN LL_AHB1_GRP1_EnableClockStopSleep AHB1SMENR SRAM1SMEN LL_AHB1_GRP1_EnableClockStopSleep AHB1SMENR CRCSMEN LL_AHB1_GRP1_EnableClockStopSleep AHB1SMENR TSCSMEN LL_AHB1_GRP1_EnableClockStopSleep. | |
| __STATIC_INLINE void | LL_AHB1_GRP1_DisableClockStopSleep (uint32_t Periphs) |
| Disable AHB1 peripheral clocks in Sleep and Stop modes AHB1SMENR DMA1SMEN LL_AHB1_GRP1_DisableClockStopSleep AHB1SMENR DMA2SMEN LL_AHB1_GRP1_DisableClockStopSleep AHB1SMENR FLASHSMEN LL_AHB1_GRP1_DisableClockStopSleep AHB1SMENR SRAM1SMEN LL_AHB1_GRP1_DisableClockStopSleep AHB1SMENR CRCSMEN LL_AHB1_GRP1_DisableClockStopSleep AHB1SMENR TSCSMEN LL_AHB1_GRP1_DisableClockStopSleep. | |
| __STATIC_INLINE void | LL_AHB2_GRP1_EnableClock (uint32_t Periphs) |
| Enable AHB2 peripherals clock. | |
| __STATIC_INLINE uint32_t | LL_AHB2_GRP1_IsEnabledClock (uint32_t Periphs) |
| Check if AHB2 peripheral clock is enabled or not AHB2ENR GPIOAEN LL_AHB2_GRP1_IsEnabledClock AHB2ENR GPIOBEN LL_AHB2_GRP1_IsEnabledClock AHB2ENR GPIOCEN LL_AHB2_GRP1_IsEnabledClock AHB2ENR GPIODEN LL_AHB2_GRP1_IsEnabledClock AHB2ENR GPIOEEN LL_AHB2_GRP1_IsEnabledClock AHB2ENR GPIOFEN LL_AHB2_GRP1_IsEnabledClock AHB2ENR GPIOGEN LL_AHB2_GRP1_IsEnabledClock AHB2ENR GPIOHEN LL_AHB2_GRP1_IsEnabledClock AHB2ENR OTGFSEN LL_AHB2_GRP1_IsEnabledClock AHB2ENR ADCEN LL_AHB2_GRP1_IsEnabledClock AHB2ENR AESEN LL_AHB2_GRP1_IsEnabledClock AHB2ENR RNGEN LL_AHB2_GRP1_IsEnabledClock. | |
| __STATIC_INLINE void | LL_AHB2_GRP1_DisableClock (uint32_t Periphs) |
| Disable AHB2 peripherals clock. | |
| __STATIC_INLINE void | LL_AHB2_GRP1_ForceReset (uint32_t Periphs) |
| Force AHB2 peripherals reset. | |
| __STATIC_INLINE void | LL_AHB2_GRP1_ReleaseReset (uint32_t Periphs) |
| Release AHB2 peripherals reset. | |
| __STATIC_INLINE void | LL_AHB2_GRP1_EnableClockStopSleep (uint32_t Periphs) |
| Enable AHB2 peripheral clocks in Sleep and Stop modes AHB2SMENR GPIOASMEN LL_AHB2_GRP1_EnableClockStopSleep AHB2SMENR GPIOBSMEN LL_AHB2_GRP1_EnableClockStopSleep AHB2SMENR GPIOCSMEN LL_AHB2_GRP1_EnableClockStopSleep AHB2SMENR GPIODSMEN LL_AHB2_GRP1_EnableClockStopSleep AHB2SMENR GPIOESMEN LL_AHB2_GRP1_EnableClockStopSleep AHB2SMENR GPIOFSMEN LL_AHB2_GRP1_EnableClockStopSleep AHB2SMENR GPIOGSMEN LL_AHB2_GRP1_EnableClockStopSleep AHB2SMENR GPIOHSMEN LL_AHB2_GRP1_EnableClockStopSleep AHB2SMENR SRAM2SMEN LL_AHB2_GRP1_EnableClockStopSleep AHB2SMENR OTGFSSMEN LL_AHB2_GRP1_EnableClockStopSleep AHB2SMENR ADCSMEN LL_AHB2_GRP1_EnableClockStopSleep AHB2SMENR AESSMEN LL_AHB2_GRP1_EnableClockStopSleep AHB2SMENR RNGSMEN LL_AHB2_GRP1_EnableClockStopSleep. | |
| __STATIC_INLINE void | LL_AHB2_GRP1_DisableClockStopSleep (uint32_t Periphs) |
| Disable AHB2 peripheral clocks in Sleep and Stop modes AHB2SMENR GPIOASMEN LL_AHB2_GRP1_DisableClockStopSleep AHB2SMENR GPIOBSMEN LL_AHB2_GRP1_DisableClockStopSleep AHB2SMENR GPIOCSMEN LL_AHB2_GRP1_DisableClockStopSleep AHB2SMENR GPIODSMEN LL_AHB2_GRP1_DisableClockStopSleep AHB2SMENR GPIOESMEN LL_AHB2_GRP1_DisableClockStopSleep AHB2SMENR GPIOFSMEN LL_AHB2_GRP1_DisableClockStopSleep AHB2SMENR GPIOGSMEN LL_AHB2_GRP1_DisableClockStopSleep AHB2SMENR GPIOHSMEN LL_AHB2_GRP1_DisableClockStopSleep AHB2SMENR SRAM2SMEN LL_AHB2_GRP1_DisableClockStopSleep AHB2SMENR OTGFSSMEN LL_AHB2_GRP1_DisableClockStopSleep AHB2SMENR ADCSMEN LL_AHB2_GRP1_DisableClockStopSleep AHB2SMENR AESSMEN LL_AHB2_GRP1_DisableClockStopSleep AHB2SMENR RNGSMEN LL_AHB2_GRP1_DisableClockStopSleep. | |
| __STATIC_INLINE void | LL_AHB3_GRP1_EnableClock (uint32_t Periphs) |
| Enable AHB3 peripherals clock. | |
| __STATIC_INLINE uint32_t | LL_AHB3_GRP1_IsEnabledClock (uint32_t Periphs) |
| Check if AHB3 peripheral clock is enabled or not AHB3ENR FMCEN LL_AHB3_GRP1_IsEnabledClock AHB3ENR QSPIEN LL_AHB3_GRP1_IsEnabledClock. | |
| __STATIC_INLINE void | LL_AHB3_GRP1_DisableClock (uint32_t Periphs) |
| Disable AHB3 peripherals clock. | |
| __STATIC_INLINE void | LL_AHB3_GRP1_ForceReset (uint32_t Periphs) |
| Force AHB3 peripherals reset. | |
| __STATIC_INLINE void | LL_AHB3_GRP1_ReleaseReset (uint32_t Periphs) |
| Release AHB3 peripherals reset. | |
| __STATIC_INLINE void | LL_AHB3_GRP1_EnableClockStopSleep (uint32_t Periphs) |
| Enable AHB3 peripheral clocks in Sleep and Stop modes AHB3SMENR FMCSMEN LL_AHB3_GRP1_EnableClockStopSleep AHB3SMENR QSPISMEN LL_AHB3_GRP1_EnableClockStopSleep. | |
| __STATIC_INLINE void | LL_AHB3_GRP1_DisableClockStopSleep (uint32_t Periphs) |
| Disable AHB3 peripheral clocks in Sleep and Stop modes AHB3SMENR FMCSMEN LL_AHB3_GRP1_DisableClockStopSleep AHB3SMENR QSPISMEN LL_AHB3_GRP1_DisableClockStopSleep. | |
| __STATIC_INLINE void | LL_APB1_GRP1_EnableClock (uint32_t Periphs) |
| Enable APB1 peripherals clock. | |
| __STATIC_INLINE void | LL_APB1_GRP2_EnableClock (uint32_t Periphs) |
| Enable APB1 peripherals clock. | |
| __STATIC_INLINE uint32_t | LL_APB1_GRP1_IsEnabledClock (uint32_t Periphs) |
| Check if APB1 peripheral clock is enabled or not APB1ENR1 TIM2EN LL_APB1_GRP1_IsEnabledClock APB1ENR1 TIM3EN LL_APB1_GRP1_IsEnabledClock APB1ENR1 TIM4EN LL_APB1_GRP1_IsEnabledClock APB1ENR1 TIM5EN LL_APB1_GRP1_IsEnabledClock APB1ENR1 TIM6EN LL_APB1_GRP1_IsEnabledClock APB1ENR1 TIM7EN LL_APB1_GRP1_IsEnabledClock APB1ENR1 LCDEN LL_APB1_GRP1_IsEnabledClock APB1ENR1 WWDGEN LL_APB1_GRP1_IsEnabledClock APB1ENR1 SPI2EN LL_APB1_GRP1_IsEnabledClock APB1ENR1 SPI3EN LL_APB1_GRP1_IsEnabledClock APB1ENR1 USART2EN LL_APB1_GRP1_IsEnabledClock APB1ENR1 USART3EN LL_APB1_GRP1_IsEnabledClock APB1ENR1 UART4EN LL_APB1_GRP1_IsEnabledClock APB1ENR1 UART5EN LL_APB1_GRP1_IsEnabledClock APB1ENR1 I2C1EN LL_APB1_GRP1_IsEnabledClock APB1ENR1 I2C2EN LL_APB1_GRP1_IsEnabledClock APB1ENR1 I2C3EN LL_APB1_GRP1_IsEnabledClock APB1ENR1 CAN1EN LL_APB1_GRP1_IsEnabledClock APB1ENR1 PWREN LL_APB1_GRP1_IsEnabledClock APB1ENR1 DAC1EN LL_APB1_GRP1_IsEnabledClock APB1ENR1 OPAMPEN LL_APB1_GRP1_IsEnabledClock APB1ENR1 LPTIM1EN LL_APB1_GRP1_IsEnabledClock. | |
| __STATIC_INLINE uint32_t | LL_APB1_GRP2_IsEnabledClock (uint32_t Periphs) |
| Check if APB1 peripheral clock is enabled or not APB1ENR2 LPUART1EN LL_APB1_GRP2_IsEnabledClock APB1ENR2 SWPMI1EN LL_APB1_GRP2_IsEnabledClock APB1ENR2 LPTIM2EN LL_APB1_GRP2_IsEnabledClock. | |
| __STATIC_INLINE void | LL_APB1_GRP1_DisableClock (uint32_t Periphs) |
| Disable APB1 peripherals clock. | |
| __STATIC_INLINE void | LL_APB1_GRP2_DisableClock (uint32_t Periphs) |
| Disable APB1 peripherals clock. | |
| __STATIC_INLINE void | LL_APB1_GRP1_ForceReset (uint32_t Periphs) |
| Force APB1 peripherals reset. | |
| __STATIC_INLINE void | LL_APB1_GRP2_ForceReset (uint32_t Periphs) |
| Force APB1 peripherals reset. | |
| __STATIC_INLINE void | LL_APB1_GRP1_ReleaseReset (uint32_t Periphs) |
| Release APB1 peripherals reset. | |
| __STATIC_INLINE void | LL_APB1_GRP2_ReleaseReset (uint32_t Periphs) |
| Release APB1 peripherals reset. | |
| __STATIC_INLINE void | LL_APB1_GRP1_EnableClockStopSleep (uint32_t Periphs) |
| Enable APB1 peripheral clocks in Sleep and Stop modes APB1SMENR1 TIM2SMEN LL_APB1_GRP1_EnableClockStopSleep APB1SMENR1 TIM3SMEN LL_APB1_GRP1_EnableClockStopSleep APB1SMENR1 TIM4SMEN LL_APB1_GRP1_EnableClockStopSleep APB1SMENR1 TIM5SMEN LL_APB1_GRP1_EnableClockStopSleep APB1SMENR1 TIM6SMEN LL_APB1_GRP1_EnableClockStopSleep APB1SMENR1 TIM7SMEN LL_APB1_GRP1_EnableClockStopSleep APB1SMENR1 LCDSMEN LL_APB1_GRP1_EnableClockStopSleep APB1SMENR1 WWDGSMEN LL_APB1_GRP1_EnableClockStopSleep APB1SMENR1 SPI2SMEN LL_APB1_GRP1_EnableClockStopSleep APB1SMENR1 SPI3SMEN LL_APB1_GRP1_EnableClockStopSleep APB1SMENR1 USART2SMEN LL_APB1_GRP1_EnableClockStopSleep APB1SMENR1 USART3SMEN LL_APB1_GRP1_EnableClockStopSleep APB1SMENR1 UART4SMEN LL_APB1_GRP1_EnableClockStopSleep APB1SMENR1 UART5SMEN LL_APB1_GRP1_EnableClockStopSleep APB1SMENR1 I2C1SMEN LL_APB1_GRP1_EnableClockStopSleep APB1SMENR1 I2C2SMEN LL_APB1_GRP1_EnableClockStopSleep APB1SMENR1 I2C3SMEN LL_APB1_GRP1_EnableClockStopSleep APB1SMENR1 CAN1SMEN LL_APB1_GRP1_EnableClockStopSleep APB1SMENR1 PWRSMEN LL_APB1_GRP1_EnableClockStopSleep APB1SMENR1 DAC1SMEN LL_APB1_GRP1_EnableClockStopSleep APB1SMENR1 OPAMPSMEN LL_APB1_GRP1_EnableClockStopSleep APB1SMENR1 LPTIM1SMEN LL_APB1_GRP1_EnableClockStopSleep. | |
| __STATIC_INLINE void | LL_APB1_GRP2_EnableClockStopSleep (uint32_t Periphs) |
| Enable APB1 peripheral clocks in Sleep and Stop modes APB1SMENR2 LPUART1SMEN LL_APB1_GRP2_EnableClockStopSleep APB1SMENR2 SWPMI1SMEN LL_APB1_GRP2_EnableClockStopSleep APB1SMENR2 LPTIM2SMEN LL_APB1_GRP2_EnableClockStopSleep. | |
| __STATIC_INLINE void | LL_APB1_GRP1_DisableClockStopSleep (uint32_t Periphs) |
| Disable APB1 peripheral clocks in Sleep and Stop modes APB1SMENR1 TIM2SMEN LL_APB1_GRP1_DisableClockStopSleep APB1SMENR1 TIM3SMEN LL_APB1_GRP1_DisableClockStopSleep APB1SMENR1 TIM4SMEN LL_APB1_GRP1_DisableClockStopSleep APB1SMENR1 TIM5SMEN LL_APB1_GRP1_DisableClockStopSleep APB1SMENR1 TIM6SMEN LL_APB1_GRP1_DisableClockStopSleep APB1SMENR1 TIM7SMEN LL_APB1_GRP1_DisableClockStopSleep APB1SMENR1 LCDSMEN LL_APB1_GRP1_DisableClockStopSleep APB1SMENR1 WWDGSMEN LL_APB1_GRP1_DisableClockStopSleep APB1SMENR1 SPI2SMEN LL_APB1_GRP1_DisableClockStopSleep APB1SMENR1 SPI3SMEN LL_APB1_GRP1_DisableClockStopSleep APB1SMENR1 USART2SMEN LL_APB1_GRP1_DisableClockStopSleep APB1SMENR1 USART3SMEN LL_APB1_GRP1_DisableClockStopSleep APB1SMENR1 UART4SMEN LL_APB1_GRP1_DisableClockStopSleep APB1SMENR1 UART5SMEN LL_APB1_GRP1_DisableClockStopSleep APB1SMENR1 I2C1SMEN LL_APB1_GRP1_DisableClockStopSleep APB1SMENR1 I2C2SMEN LL_APB1_GRP1_DisableClockStopSleep APB1SMENR1 I2C3SMEN LL_APB1_GRP1_DisableClockStopSleep APB1SMENR1 CAN1SMEN LL_APB1_GRP1_DisableClockStopSleep APB1SMENR1 PWRSMEN LL_APB1_GRP1_DisableClockStopSleep APB1SMENR1 DAC1SMEN LL_APB1_GRP1_DisableClockStopSleep APB1SMENR1 OPAMPSMEN LL_APB1_GRP1_DisableClockStopSleep APB1SMENR1 LPTIM1SMEN LL_APB1_GRP1_DisableClockStopSleep. | |
| __STATIC_INLINE void | LL_APB1_GRP2_DisableClockStopSleep (uint32_t Periphs) |
| Disable APB1 peripheral clocks in Sleep and Stop modes APB1SMENR2 LPUART1SMEN LL_APB1_GRP2_DisableClockStopSleep APB1SMENR2 SWPMI1SMEN LL_APB1_GRP2_DisableClockStopSleep APB1SMENR2 LPTIM2SMEN LL_APB1_GRP2_DisableClockStopSleep. | |
| __STATIC_INLINE void | LL_APB2_GRP1_EnableClock (uint32_t Periphs) |
| Enable APB2 peripherals clock. | |
| __STATIC_INLINE uint32_t | LL_APB2_GRP1_IsEnabledClock (uint32_t Periphs) |
| Check if APB2 peripheral clock is enabled or not APB2ENR SYSCFGEN LL_APB2_GRP1_IsEnabledClock APB2ENR FWEN LL_APB2_GRP1_IsEnabledClock APB2ENR SDMMC1EN LL_APB2_GRP1_IsEnabledClock APB2ENR TIM1EN LL_APB2_GRP1_IsEnabledClock APB2ENR SPI1EN LL_APB2_GRP1_IsEnabledClock APB2ENR TIM8EN LL_APB2_GRP1_IsEnabledClock APB2ENR USART1EN LL_APB2_GRP1_IsEnabledClock APB2ENR TIM15EN LL_APB2_GRP1_IsEnabledClock APB2ENR TIM16EN LL_APB2_GRP1_IsEnabledClock APB2ENR TIM17EN LL_APB2_GRP1_IsEnabledClock APB2ENR SAI1EN LL_APB2_GRP1_IsEnabledClock APB2ENR SAI2EN LL_APB2_GRP1_IsEnabledClock APB2ENR DFSDMEN LL_APB2_GRP1_IsEnabledClock. | |
| __STATIC_INLINE void | LL_APB2_GRP1_DisableClock (uint32_t Periphs) |
| Disable APB2 peripherals clock. | |
| __STATIC_INLINE void | LL_APB2_GRP1_ForceReset (uint32_t Periphs) |
| Force APB2 peripherals reset. | |
| __STATIC_INLINE void | LL_APB2_GRP1_ReleaseReset (uint32_t Periphs) |
| Release APB2 peripherals reset. | |
| __STATIC_INLINE void | LL_APB2_GRP1_EnableClockStopSleep (uint32_t Periphs) |
| Enable APB2 peripheral clocks in Sleep and Stop modes APB2SMENR SYSCFGSMEN LL_APB2_GRP1_EnableClockStopSleep APB2SMENR SDMMC1SMEN LL_APB2_GRP1_EnableClockStopSleep APB2SMENR TIM1SMEN LL_APB2_GRP1_EnableClockStopSleep APB2SMENR SPI1SMEN LL_APB2_GRP1_EnableClockStopSleep APB2SMENR TIM8SMEN LL_APB2_GRP1_EnableClockStopSleep APB2SMENR USART1SMEN LL_APB2_GRP1_EnableClockStopSleep APB2SMENR TIM15SMEN LL_APB2_GRP1_EnableClockStopSleep APB2SMENR TIM16SMEN LL_APB2_GRP1_EnableClockStopSleep APB2SMENR TIM17SMEN LL_APB2_GRP1_EnableClockStopSleep APB2SMENR SAI1SMEN LL_APB2_GRP1_EnableClockStopSleep APB2SMENR SAI2SMEN LL_APB2_GRP1_EnableClockStopSleep APB2SMENR DFSDMSMEN LL_APB2_GRP1_EnableClockStopSleep. | |
| __STATIC_INLINE void | LL_APB2_GRP1_DisableClockStopSleep (uint32_t Periphs) |
| Disable APB2 peripheral clocks in Sleep and Stop modes APB2SMENR SYSCFGSMEN LL_APB2_GRP1_DisableClockStopSleep APB2SMENR SDMMC1SMEN LL_APB2_GRP1_DisableClockStopSleep APB2SMENR TIM1SMEN LL_APB2_GRP1_DisableClockStopSleep APB2SMENR SPI1SMEN LL_APB2_GRP1_DisableClockStopSleep APB2SMENR TIM8SMEN LL_APB2_GRP1_DisableClockStopSleep APB2SMENR USART1SMEN LL_APB2_GRP1_DisableClockStopSleep APB2SMENR TIM15SMEN LL_APB2_GRP1_DisableClockStopSleep APB2SMENR TIM16SMEN LL_APB2_GRP1_DisableClockStopSleep APB2SMENR TIM17SMEN LL_APB2_GRP1_DisableClockStopSleep APB2SMENR SAI1SMEN LL_APB2_GRP1_DisableClockStopSleep APB2SMENR SAI2SMEN LL_APB2_GRP1_DisableClockStopSleep APB2SMENR DFSDMSMEN LL_APB2_GRP1_DisableClockStopSleep. | |
Detailed Description
Header file of BUS LL module.
- Version:
- V1.1.0
- Date:
- 16-September-2015
- Attention:
© COPYRIGHT(c) 2015 STMicroelectronics
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Definition in file stm32l4xx_ll_bus.h.
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