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stm32l4xx_hal_tim_ex.h

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00001 /**
00002   ******************************************************************************
00003   * @file    stm32l4xx_hal_tim_ex.h
00004   * @author  MCD Application Team
00005   * @version V1.1.0
00006   * @date    16-September-2015
00007   * @brief   Header file of TIM HAL Extended module.
00008   ******************************************************************************
00009   * @attention
00010   *
00011   * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
00012   *
00013   * Redistribution and use in source and binary forms, with or without modification,
00014   * are permitted provided that the following conditions are met:
00015   *   1. Redistributions of source code must retain the above copyright notice,
00016   *      this list of conditions and the following disclaimer.
00017   *   2. Redistributions in binary form must reproduce the above copyright notice,
00018   *      this list of conditions and the following disclaimer in the documentation
00019   *      and/or other materials provided with the distribution.
00020   *   3. Neither the name of STMicroelectronics nor the names of its contributors
00021   *      may be used to endorse or promote products derived from this software
00022   *      without specific prior written permission.
00023   *
00024   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
00025   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00026   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
00027   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
00028   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00029   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
00030   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
00031   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00032   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
00033   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00034   *
00035   ******************************************************************************
00036   */ 
00037 
00038 /* Define to prevent recursive inclusion -------------------------------------*/
00039 #ifndef __STM32L4xx_HAL_TIM_EX_H
00040 #define __STM32L4xx_HAL_TIM_EX_H
00041 
00042 #ifdef __cplusplus
00043  extern "C" {
00044 #endif
00045 
00046 /* Includes ------------------------------------------------------------------*/
00047 #include "stm32l4xx_hal_def.h"
00048 
00049 /** @addtogroup STM32L4xx_HAL_Driver
00050   * @{
00051   */
00052 
00053 /** @addtogroup TIMEx
00054   * @{
00055   */ 
00056 
00057 /* Exported types ------------------------------------------------------------*/ 
00058 /** @defgroup TIMEx_Exported_Types TIM Extended Exported Types
00059   * @{
00060   */
00061 
00062 /** 
00063   * @brief  TIM Hall sensor Configuration Structure definition  
00064   */
00065 
00066 typedef struct
00067 {
00068                                   
00069   uint32_t IC1Polarity;         /*!< Specifies the active edge of the input signal.
00070                                      This parameter can be a value of @ref TIM_Input_Capture_Polarity */
00071                                                                    
00072   uint32_t IC1Prescaler;        /*!< Specifies the Input Capture Prescaler.
00073                                      This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
00074                                   
00075   uint32_t IC1Filter;           /*!< Specifies the input capture filter.
00076                                      This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */  
00077 
00078   uint32_t Commutation_Delay;   /*!< Specifies the pulse value to be loaded into the Capture Compare Register. 
00079                                      This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */                              
00080 } TIM_HallSensor_InitTypeDef;
00081 
00082 /** 
00083   * @brief  TIM Break/Break2 input configuration   
00084   */
00085 typedef struct {
00086   uint32_t Source;         /*!< Specifies the source of the timer break input.
00087                                 This parameter can be a value of @ref TIMEx_Break_Input_Source */
00088   uint32_t Enable;         /*!< Specifies whether or not the break input source is enabled.
00089                                 This parameter can be a value of @ref TIMEx_Break_Input_Source_Enable */
00090   uint32_t Polarity;       /*!< Specifies the break input source polarity.
00091                                 This parameter can be a value of @ref TIMEx_Break_Input_Source_Polarity
00092                                 Not relevant when analog watchdog output of the DFSDM used as break input source */
00093 } TIMEx_BreakInputConfigTypeDef;
00094 
00095 /**
00096   * @}
00097   */
00098 /* End of exported types -----------------------------------------------------*/ 
00099 
00100 /* Exported constants --------------------------------------------------------*/
00101 /** @defgroup TIMEx_Exported_Constants TIM Extended Exported Constants
00102   * @{
00103   */
00104 
00105 /** @defgroup TIMEx_Remap TIM  Extended Remapping
00106   * @{
00107   */
00108 #define TIM_TIM1_ETR_ADC1_NONE      ((uint32_t)(0x00000000))                              /* !< TIM1_ETR is not connected to any AWD (analog watchdog)*/
00109 #define TIM_TIM1_ETR_ADC1_AWD1      (TIM1_OR1_ETR_ADC1_RMP_0)                             /* !< TIM1_ETR is connected to ADC1 AWD1 */
00110 #define TIM_TIM1_ETR_ADC1_AWD2      (TIM1_OR1_ETR_ADC1_RMP_1)                             /* !< TIM1_ETR is connected to ADC1 AWD2 */
00111 #define TIM_TIM1_ETR_ADC1_AWD3      (TIM1_OR1_ETR_ADC1_RMP_1 | TIM1_OR1_ETR_ADC1_RMP_0)   /* !< TIM1_ETR is connected to ADC1 AWD3 */
00112 #define TIM_TIM1_ETR_ADC3_NONE      ((uint32_t)(0x00000000))                              /* !< TIM1_ETR is not connected to any AWD (analog watchdog)*/
00113 #define TIM_TIM1_ETR_ADC3_AWD1      (TIM1_OR1_ETR_ADC3_RMP_0)                             /* !< TIM1_ETR is connected to ADC3 AWD1 */
00114 #define TIM_TIM1_ETR_ADC3_AWD2      (TIM1_OR1_ETR_ADC3_RMP_1)                             /* !< TIM1_ETR is connected to ADC3 AWD2 */
00115 #define TIM_TIM1_ETR_ADC3_AWD3      (TIM1_OR1_ETR_ADC3_RMP_1 | TIM1_OR1_ETR_ADC3_RMP_0)   /* !< TIM1_ETR is connected to ADC3 AWD3 */
00116 #define TIM_TIM1_TI1_GPIO           ((uint32_t)(0x00000000))                              /* !< TIM1 TI1 is connected to GPIO */
00117 #define TIM_TIM1_TI1_COMP1          (TIM1_OR1_TI1_RMP)                                    /* !< TIM1 TI1 is connected to COMP1 */
00118 #define TIM_TIM1_ETR_COMP1          (TIM1_OR2_ETRSEL_0)                                   /* !< TIM1_ETR is connected to COMP1 output */
00119 #define TIM_TIM1_ETR_COMP2          (TIM1_OR2_ETRSEL_1)                                   /* !< TIM1_ETR is connected to COMP2 output */
00120 #define TIM_TIM2_ITR1_TIM8_TRGO     ((uint32_t)(0x00000000))                              /* !< TIM2_ITR1 is connected to TIM8_TRGO */
00121 #define TIM_TIM2_ITR1_OTG_FS_SOF    (TIM2_OR1_ITR1_RMP)                                   /* !< TIM2_ITR1 is connected to OTG_FS SOF */
00122 #define TIM_TIM2_ETR_GPIO           ((uint32_t)(0x00000000))                              /* !< TIM2_ETR is connected to GPIO */
00123 #define TIM_TIM2_ETR_LSE            (TIM2_OR1_ETR1_RMP)                                   /* !< TIM2_ETR is connected to LSE */
00124 #define TIM_TIM2_ETR_COMP1          (TIM2_OR2_ETRSEL_0)                                   /* !< TIM2_ETR is connected to COMP1 output */
00125 #define TIM_TIM2_ETR_COMP2          (TIM2_OR2_ETRSEL_1)                                   /* !< TIM2_ETR is connected to COMP2 output */
00126 #define TIM_TIM2_TI4_GPIO           ((uint32_t)(0x00000000))                              /* !< TIM2 TI4 is connected to GPIO */
00127 #define TIM_TIM2_TI4_COMP1          (TIM2_OR1_TI4_RMP_0)                                  /* !< TIM2 TI4 is connected to COMP1 output */
00128 #define TIM_TIM2_TI4_COMP2          (TIM2_OR1_TI4_RMP_1)                                  /* !< TIM2 TI4 is connected to COMP2 output */
00129 #define TIM_TIM2_TI4_COMP1_COMP2    (TIM2_OR1_TI4_RMP_1| TIM2_OR1_TI4_RMP_0)              /* !< TIM2 TI4 is connected to logical OR between COMP1 and COMP2 output2 */
00130 #define TIM_TIM3_TI1_GPIO           ((uint32_t)(0x00000000))                              /* !< TIM3 TI1 is connected to GPIO */
00131 #define TIM_TIM3_TI1_COMP1          (TIM3_OR1_TI1_RMP_0)                                  /* !< TIM3 TI1 is connected to COMP1 output */
00132 #define TIM_TIM3_TI1_COMP2          (TIM3_OR1_TI1_RMP_1)                                  /* !< TIM3 TI1 is connected to COMP2 output */
00133 #define TIM_TIM3_TI1_COMP1_COMP2    (TIM3_OR1_TI1_RMP_1 | TIM3_OR1_TI1_RMP_0)             /* !< TIM3 TI1 is connected to logical OR between COMP1 and COMP2 output2 */
00134 #define TIM_TIM3_ETR_GPIO           ((uint32_t)(0x00000000))                              /* !< TIM3_ETR is connected to GPIO */
00135 #define TIM_TIM3_ETR_COMP1          (TIM3_OR2_ETRSEL_0)                                   /* !< TIM3_ETR is connected to COMP1 output */
00136 #define TIM_TIM8_ETR_ADC2_NONE      ((uint32_t)(0x00000000))                              /* !< TIM8_ETR is not connected to any AWD (analog watchdog)*/
00137 #define TIM_TIM8_ETR_ADC2_AWD1      (TIM8_OR1_ETR_ADC2_RMP_0)                             /* !< TIM8_ETR is connected to ADC2 AWD1 */
00138 #define TIM_TIM8_ETR_ADC2_AWD2      (TIM8_OR1_ETR_ADC2_RMP_1)                             /* !< TIM8_ETR is connected to ADC2 AWD2 */
00139 #define TIM_TIM8_ETR_ADC2_AWD3      (TIM8_OR1_ETR_ADC2_RMP_1 | TIM8_OR1_ETR_ADC2_RMP_0)   /* !< TIM8_ETR is connected to ADC2 AWD3 */
00140 #define TIM_TIM8_ETR_ADC3_NONE      ((uint32_t)(0x00000000))                              /* !< TIM8_ETR is not connected to any AWD (analog watchdog)*/
00141 #define TIM_TIM8_ETR_ADC3_AWD1      (TIM8_OR1_ETR_ADC3_RMP_0)                             /* !< TIM8_ETR is connected to ADC3 AWD1 */
00142 #define TIM_TIM8_ETR_ADC3_AWD2      (TIM8_OR1_ETR_ADC3_RMP_1)                             /* !< TIM8_ETR is connected to ADC3 AWD2 */
00143 #define TIM_TIM8_ETR_ADC3_AWD3      (TIM8_OR1_ETR_ADC3_RMP_1 | TIM8_OR1_ETR_ADC3_RMP_0)   /* !< TIM8_ETR is connected to ADC3 AWD3 */
00144 #define TIM_TIM8_TI1_GPIO           ((uint32_t)(0x00000000))                              /* !< TIM8 TI1 is connected to GPIO */
00145 #define TIM_TIM8_TI1_COMP2          (TIM8_OR1_TI1_RMP)                                    /* !< TIM8 TI1 is connected to COMP1 */
00146 #define TIM_TIM8_ETR_COMP1          (TIM8_OR2_ETRSEL_0)                                   /* !< TIM8_ETR is connected to COMP1 output */
00147 #define TIM_TIM8_ETR_COMP2          (TIM8_OR2_ETRSEL_1)                                   /* !< TIM8_ETR is connected to COMP2 output */
00148 #define TIM_TIM15_TI1_GPIO          ((uint32_t)(0x00000000))                              /* !< TIM15 TI1 is connected to GPIO */
00149 #define TIM_TIM15_TI1_LSE           (TIM15_OR1_TI1_RMP)                                   /* !< TIM15 TI1 is connected to LSE */
00150 #define TIM_TIM15_ENCODERMODE_NONE  ((uint32_t)(0x00000000))                              /* !< No redirection */
00151 #define TIM_TIM15_ENCODERMODE_TIM2  (TIM15_OR1_ENCODER_MODE_0)                            /* !< TIM2 IC1 and TIM2 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively */
00152 #define TIM_TIM15_ENCODERMODE_TIM3  (TIM15_OR1_ENCODER_MODE_1)                            /* !< TIM3 IC1 and TIM3 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively */
00153 #define TIM_TIM15_ENCODERMODE_TIM4  (TIM15_OR1_ENCODER_MODE_1 | TIM15_OR1_ENCODER_MODE_0) /* !< TIM4 IC1 and TIM4 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively */
00154 #define TIM_TIM16_TI1_GPIO          ((uint32_t)(0x00000000))                              /* !< TIM16 TI1 is connected to GPIO */
00155 #define TIM_TIM16_TI1_LSI           (TIM16_OR1_TI1_RMP_0)                                 /* !< TIM16 TI1 is connected to LSI */
00156 #define TIM_TIM16_TI1_LSE           (TIM16_OR1_TI1_RMP_1)                                 /* !< TIM16 TI1 is connected to LSE */
00157 #define TIM_TIM16_TI1_RTC           (TIM16_OR1_TI1_RMP_1 | TIM16_OR1_TI1_RMP_0)           /* !< TIM16 TI1 is connected to RTC wakeup interrupt */
00158 #define TIM_TIM17_TI1_GPIO          ((uint32_t)(0x00000000))                              /* !< TIM17 TI1 is connected to GPIO */
00159 #define TIM_TIM17_TI1_MSI           (TIM17_OR1_TI1_RMP_0)                                 /* !< TIM17 TI1 is connected to MSI */
00160 #define TIM_TIM17_TI1_HSE_32        (TIM17_OR1_TI1_RMP_1)                                 /* !< TIM17 TI1 is connected to HSE div 32 */
00161 #define TIM_TIM17_TI1_MCO           (TIM17_OR1_TI1_RMP_1 | TIM17_OR1_TI1_RMP_0)           /* !< TIM17 TI1 is connected to MCO */
00162 /**
00163   * @}
00164   */ 
00165 
00166 /** @defgroup TIMEx_Break_Input TIM  Extended Break input
00167   * @{
00168   */
00169 #define TIM_BREAKINPUT_BRK     ((uint32_t)(0x00000001)) /* !< Timer break input  */
00170 #define TIM_BREAKINPUT_BRK2    ((uint32_t)(0x00000002)) /* !< Timer break2 input */
00171 /**
00172   * @}
00173   */ 
00174 
00175 /** @defgroup TIMEx_Break_Input_Source TIM  Extended Break input source
00176   * @{
00177   */
00178 #define TIM_BREAKINPUTSOURCE_BKIN     ((uint32_t)(0x00000001)) /* !< An external source (GPIO) is connected to the BKIN pin  */
00179 #define TIM_BREAKINPUTSOURCE_COMP1    ((uint32_t)(0x00000002)) /* !< The COMP1 output is connected to the break input */
00180 #define TIM_BREAKINPUTSOURCE_COMP2    ((uint32_t)(0x00000004)) /* !< The COMP2 output is connected to the break input */
00181 #define TIM_BREAKINPUTSOURCE_DFSDM    ((uint32_t)(0x00000008)) /* !< The analog watchdog output of the DFSDM peripheral is connected to the break input */
00182 /**
00183   * @}
00184   */ 
00185 
00186 /** @defgroup TIMEx_Break_Input_Source_Enable TIM Extended Break input source enabling
00187   * @{
00188   */
00189 #define TIM_BREAKINPUTSOURCE_DISABLE     ((uint32_t)(0x00000000)) /* !< Break input source is disabled */
00190 #define TIM_BREAKINPUTSOURCE_ENABLE      ((uint32_t)(0x00000001)) /* !< Break input source is enabled */
00191 /**
00192   * @}
00193   */ 
00194 
00195 /** @defgroup TIMEx_Break_Input_Source_Polarity TIM  Extended Break input polarity
00196   * @{
00197   */
00198 #define TIM_BREAKINPUTSOURCE_POLARITY_LOW     ((uint32_t)(0x00000001)) /* !< Break input source is active low */
00199 #define TIM_BREAKINPUTSOURCE_POLARITY_HIGH    ((uint32_t)(0x00000000)) /* !< Break input source is active_high */
00200 /**
00201   * @}
00202   */ 
00203    
00204 /**
00205   * @}
00206   */ 
00207 /* End of exported constants -------------------------------------------------*/
00208 
00209 /* Exported macro ------------------------------------------------------------*/
00210 /** @defgroup TIMEx_Exported_Macros TIM Extended Exported Macros
00211   * @{
00212   */  
00213 
00214 /**
00215   * @}
00216   */ 
00217 /* End of exported macro -----------------------------------------------------*/
00218 
00219 /* Private macro -------------------------------------------------------------*/
00220 /** @defgroup TIMEx_Private_Macros TIM Extended Private Macros
00221   * @{
00222   */  
00223 #define IS_TIM_REMAP(__REMAP__)    (((__REMAP__) <= (uint32_t)0x0001C01F))
00224 
00225 #define IS_TIM_BREAKINPUT(__BREAKINPUT__)  (((__BREAKINPUT__) == TIM_BREAKINPUT_BRK)  || \
00226                                             ((__BREAKINPUT__) == TIM_BREAKINPUT_BRK2))
00227 
00228 #define IS_TIM_BREAKINPUTSOURCE(__SOURCE__)  (((__SOURCE__) == TIM_BREAKINPUTSOURCE_BKIN)  || \
00229                                               ((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP1) || \
00230                                               ((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP2) || \
00231                                               ((__SOURCE__) == TIM_BREAKINPUTSOURCE_DFSDM))
00232 
00233 #define IS_TIM_BREAKINPUTSOURCE_STATE(__STATE__)  (((__STATE__) == TIM_BREAKINPUTSOURCE_DISABLE)  || \
00234                                                    ((__STATE__) == TIM_BREAKINPUTSOURCE_ENABLE))
00235 
00236 #define IS_TIM_BREAKINPUTSOURCE_POLARITY(__POLARITY__)  (((__POLARITY__) == TIM_BREAKINPUTSOURCE_POLARITY_LOW)  || \
00237                                                          ((__POLARITY__) == TIM_BREAKINPUTSOURCE_POLARITY_HIGH))
00238 /**
00239   * @}
00240   */ 
00241 /* End of private macro ------------------------------------------------------*/
00242 
00243 /* Exported functions --------------------------------------------------------*/
00244 /** @addtogroup TIMEx_Exported_Functions TIM Extended Exported Functions
00245   * @{
00246   */
00247 
00248 /** @addtogroup TIMEx_Exported_Functions_Group1 Extended Timer Hall Sensor functions 
00249  *  @brief    Timer Hall Sensor functions
00250  * @{
00251  */
00252 /*  Timer Hall Sensor functions  **********************************************/
00253 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, TIM_HallSensor_InitTypeDef* sConfig);
00254 HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim);
00255 
00256 void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim);
00257 void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim);
00258 
00259  /* Blocking mode: Polling */
00260 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim);
00261 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim);
00262 /* Non-Blocking mode: Interrupt */
00263 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim);
00264 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim);
00265 /* Non-Blocking mode: DMA */
00266 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length);
00267 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim);
00268 /**
00269   * @}
00270   */
00271 
00272 /** @addtogroup TIMEx_Exported_Functions_Group2 Extended Timer Complementary Output Compare functions
00273  *  @brief   Timer Complementary Output Compare functions
00274  * @{
00275  */
00276 /*  Timer Complementary Output Compare functions  *****************************/
00277 /* Blocking mode: Polling */
00278 HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
00279 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
00280 
00281 /* Non-Blocking mode: Interrupt */
00282 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
00283 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
00284 
00285 /* Non-Blocking mode: DMA */
00286 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length);
00287 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
00288 /**
00289   * @}
00290   */
00291 
00292 /** @addtogroup TIMEx_Exported_Functions_Group3 Extended Timer Complementary PWM functions
00293  *  @brief    Timer Complementary PWM functions
00294  * @{
00295  */
00296 /*  Timer Complementary PWM functions  ****************************************/
00297 /* Blocking mode: Polling */
00298 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
00299 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
00300 
00301 /* Non-Blocking mode: Interrupt */
00302 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
00303 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
00304 /* Non-Blocking mode: DMA */
00305 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length);
00306 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
00307 /**
00308   * @}
00309   */
00310 
00311 /** @addtogroup TIMEx_Exported_Functions_Group4 Extended Timer Complementary One Pulse functions
00312  *  @brief    Timer Complementary One Pulse functions
00313  * @{
00314  */
00315 /*  Timer Complementary One Pulse functions  **********************************/
00316 /* Blocking mode: Polling */
00317 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
00318 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
00319 
00320 /* Non-Blocking mode: Interrupt */
00321 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
00322 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
00323 /**
00324   * @}
00325   */
00326 
00327 /** @addtogroup TIMEx_Exported_Functions_Group5 Extended Peripheral Control functions
00328  *  @brief    Peripheral Control functions
00329  * @{
00330  */
00331 /* Extended Control functions  ************************************************/
00332 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent(TIM_HandleTypeDef *htim, uint32_t  InputTrigger, uint32_t  CommutationSource);
00333 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_IT(TIM_HandleTypeDef *htim, uint32_t  InputTrigger, uint32_t  CommutationSource);
00334 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_DMA(TIM_HandleTypeDef *htim, uint32_t  InputTrigger, uint32_t  CommutationSource);
00335 HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, TIM_MasterConfigTypeDef * sMasterConfig);
00336 HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim, TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig);
00337 HAL_StatusTypeDef HAL_TIMEx_ConfigBreakInput(TIM_HandleTypeDef *htim, uint32_t BreakInput, TIMEx_BreakInputConfigTypeDef *sBreakInputConfig);
00338 HAL_StatusTypeDef HAL_TIMEx_GroupChannel5(TIM_HandleTypeDef *htim, uint32_t Channels);
00339 HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap);
00340 
00341 /**
00342   * @}
00343   */
00344 
00345 /** @addtogroup TIMEx_Exported_Functions_Group6 Extended Callbacks functions 
00346   * @brief    Extended Callbacks functions
00347   * @{
00348   */
00349 /* Extended Callback **********************************************************/
00350 void HAL_TIMEx_CommutationCallback(TIM_HandleTypeDef *htim);
00351 void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim);
00352 /**
00353   * @}
00354   */
00355 
00356 /** @addtogroup TIMEx_Exported_Functions_Group7 Extended Peripheral State functions 
00357   * @brief    Extended Peripheral State functions
00358   * @{
00359   */
00360 /* Extended Peripheral State functions  ***************************************/
00361 HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim);
00362 /**
00363   * @}
00364   */
00365 
00366 /**
00367   * @}
00368   */ 
00369 /* End of exported functions -------------------------------------------------*/
00370 
00371 /* Private functions----------------------------------------------------------*/
00372 /** @defgroup TIMEx_Private_Functions TIMEx Private Functions
00373 * @{
00374 */
00375 void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma);
00376 /**
00377 * @}
00378 */ 
00379 /* End of private functions --------------------------------------------------*/
00380 
00381 /**
00382   * @}
00383   */ 
00384 
00385 /**
00386   * @}
00387   */
00388   
00389 #ifdef __cplusplus
00390 }
00391 #endif
00392 
00393 
00394 #endif /* __STM32L4xx_HAL_TIM_EX_H */
00395 
00396 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
00397