stm32l4xx_hal_cortex.c

00001 /**
00002   ******************************************************************************
00003   * @file    stm32l4xx_hal_cortex.c
00004   * @author  MCD Application Team
00005   * @version V1.1.0
00006   * @date    16-September-2015
00007   * @brief   CORTEX HAL module driver.
00008   *          This file provides firmware functions to manage the following
00009   *          functionalities of the CORTEX:
00010   *           + Initialization and Configuration functions
00011   *           + Peripheral Control functions
00012   *
00013   @verbatim
00014   ==============================================================================
00015                         ##### How to use this driver #####
00016   ==============================================================================
00017 
00018     [..]
00019     *** How to configure Interrupts using CORTEX HAL driver ***
00020     ===========================================================
00021     [..]
00022     This section provides functions allowing to configure the NVIC interrupts (IRQ).
00023     The Cortex-M4 exceptions are managed by CMSIS functions.
00024 
00025     (#) Configure the NVIC Priority Grouping using HAL_NVIC_SetPriorityGrouping()
00026         function according to the following table.
00027      The table below gives the allowed values of the pre-emption priority and subpriority according
00028      to the Priority Grouping configuration performed by HAL_NVIC_SetPriorityGrouping() function.
00029        ==========================================================================================================================
00030          NVIC_PriorityGroup   | NVIC_IRQChannelPreemptionPriority | NVIC_IRQChannelSubPriority  |       Description
00031        ==========================================================================================================================
00032         NVIC_PRIORITYGROUP_0  |                0                  |            0-15             | 0 bit for pre-emption priority
00033                               |                                   |                             | 4 bits for subpriority
00034        --------------------------------------------------------------------------------------------------------------------------
00035         NVIC_PRIORITYGROUP_1  |                0-1                |            0-7              | 1 bit for pre-emption priority
00036                               |                                   |                             | 3 bits for subpriority
00037        --------------------------------------------------------------------------------------------------------------------------    
00038         NVIC_PRIORITYGROUP_2  |                0-3                |            0-3              | 2 bits for pre-emption priority
00039                               |                                   |                             | 2 bits for subpriority
00040        --------------------------------------------------------------------------------------------------------------------------    
00041         NVIC_PRIORITYGROUP_3  |                0-7                |            0-1              | 3 bits for pre-emption priority
00042                               |                                   |                             | 1 bit for subpriority
00043        --------------------------------------------------------------------------------------------------------------------------    
00044         NVIC_PRIORITYGROUP_4  |                0-15               |            0                | 4 bits for pre-emption priority
00045                               |                                   |                             | 0 bit for subpriority                       
00046        ==========================================================================================================================
00047     (#) Configure the priority of the selected IRQ Channels using HAL_NVIC_SetPriority().
00048     (#) Enable the selected IRQ Channels using HAL_NVIC_EnableIRQ().
00049 
00050      -@- When the NVIC_PRIORITYGROUP_0 is selected, IRQ pre-emption is no more possible.
00051          The pending IRQ priority will be managed only by the sub priority.
00052 
00053      -@- IRQ priority order (sorted by highest to lowest priority):
00054         (+@) Lowest pre-emption priority
00055         (+@) Lowest sub priority
00056         (+@) Lowest hardware priority (IRQ number)
00057 
00058     [..]
00059     *** How to configure SysTick using CORTEX HAL driver ***
00060     ========================================================
00061     [..]
00062     Setup SysTick Timer for time base.
00063 
00064    (+) The HAL_SYSTICK_Config() function calls the SysTick_Config() function which
00065        is a CMSIS function that:
00066         (++) Configures the SysTick Reload register with value passed as function parameter.
00067         (++) Configures the SysTick IRQ priority to the lowest value (0x0F).
00068         (++) Resets the SysTick Counter register.
00069         (++) Configures the SysTick Counter clock source to be Core Clock Source (HCLK).
00070         (++) Enables the SysTick Interrupt.
00071         (++) Starts the SysTick Counter.
00072 
00073    (+) You can change the SysTick Clock source to be HCLK_Div8 by calling the macro
00074        __HAL_CORTEX_SYSTICKCLK_CONFIG(SYSTICK_CLKSOURCE_HCLK_DIV8) just after the
00075        HAL_SYSTICK_Config() function call. The __HAL_CORTEX_SYSTICKCLK_CONFIG() macro is defined
00076        inside the stm32l4xx_hal_cortex.h file.
00077 
00078    (+) You can change the SysTick IRQ priority by calling the
00079        HAL_NVIC_SetPriority(SysTick_IRQn,...) function just after the HAL_SYSTICK_Config() function
00080        call. The HAL_NVIC_SetPriority() call the NVIC_SetPriority() function which is a CMSIS function.
00081 
00082    (+) To adjust the SysTick time base, use the following formula:
00083 
00084        Reload Value = SysTick Counter Clock (Hz) x  Desired Time base (s)
00085        (++) Reload Value is the parameter to be passed for HAL_SYSTICK_Config() function
00086        (++) Reload Value should not exceed 0xFFFFFF
00087 
00088   @endverbatim
00089   ******************************************************************************
00090   * @attention
00091   *
00092   * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
00093   *
00094   * Redistribution and use in source and binary forms, with or without modification,
00095   * are permitted provided that the following conditions are met:
00096   *   1. Redistributions of source code must retain the above copyright notice,
00097   *      this list of conditions and the following disclaimer.
00098   *   2. Redistributions in binary form must reproduce the above copyright notice,
00099   *      this list of conditions and the following disclaimer in the documentation
00100   *      and/or other materials provided with the distribution.
00101   *   3. Neither the name of STMicroelectronics nor the names of its contributors
00102   *      may be used to endorse or promote products derived from this software
00103   *      without specific prior written permission.
00104   *
00105   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
00106   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00107   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
00108   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
00109   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00110   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
00111   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
00112   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00113   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
00114   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00115   *
00116   ******************************************************************************
00117   */
00118 
00119 /* Includes ------------------------------------------------------------------*/
00120 #include "stm32l4xx_hal.h"
00121 
00122 /** @addtogroup STM32L4xx_HAL_Driver
00123   * @{
00124   */
00125 
00126 /** @addtogroup CORTEX
00127   * @{
00128   */
00129 
00130 #ifdef HAL_CORTEX_MODULE_ENABLED
00131 
00132 /* Private types -------------------------------------------------------------*/
00133 /* Private variables ---------------------------------------------------------*/
00134 /* Private constants ---------------------------------------------------------*/
00135 /* Private macros ------------------------------------------------------------*/
00136 /* Private functions ---------------------------------------------------------*/
00137 /* Exported functions --------------------------------------------------------*/
00138 
00139 /** @addtogroup CORTEX_Exported_Functions
00140   * @{
00141   */
00142 
00143 
00144 /** @addtogroup CORTEX_Exported_Functions_Group1
00145  *  @brief    Initialization and Configuration functions
00146  *
00147 @verbatim
00148   ==============================================================================
00149               ##### Initialization and Configuration functions #####
00150   ==============================================================================
00151     [..]
00152       This section provides the CORTEX HAL driver functions allowing to configure Interrupts
00153       SysTick functionalities
00154 
00155 @endverbatim
00156   * @{
00157   */
00158 
00159 
00160 /**
00161   * @brief  Set the priority grouping field (pre-emption priority and subpriority)
00162   *         using the required unlock sequence.
00163   * @param  PriorityGroup: The priority grouping bits length.
00164   *         This parameter can be one of the following values:
00165   *         @arg NVIC_PRIORITYGROUP_0: 0 bit  for pre-emption priority,
00166   *                                    4 bits for subpriority
00167   *         @arg NVIC_PRIORITYGROUP_1: 1 bit  for pre-emption priority,
00168   *                                    3 bits for subpriority
00169   *         @arg NVIC_PRIORITYGROUP_2: 2 bits for pre-emption priority,
00170   *                                    2 bits for subpriority
00171   *         @arg NVIC_PRIORITYGROUP_3: 3 bits for pre-emption priority,
00172   *                                    1 bit  for subpriority
00173   *         @arg NVIC_PRIORITYGROUP_4: 4 bits for pre-emption priority,
00174   *                                    0 bit  for subpriority
00175   * @note   When the NVIC_PriorityGroup_0 is selected, IRQ pre-emption is no more possible.
00176   *         The pending IRQ priority will be managed only by the subpriority.
00177   * @retval None
00178   */
00179 void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
00180 {
00181   /* Check the parameters */
00182   assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));
00183 
00184   /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */
00185   NVIC_SetPriorityGrouping(PriorityGroup);
00186 }
00187 
00188 /**
00189   * @brief  Set the priority of an interrupt.
00190   * @param  IRQn: External interrupt number.
00191   *         This parameter can be an enumerator of IRQn_Type enumeration
00192   *         (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32l4xxxx.h))
00193   * @param  PreemptPriority: The pre-emption priority for the IRQn channel.
00194   *         This parameter can be a value between 0 and 15
00195   *         A lower priority value indicates a higher priority
00196   * @param  SubPriority: the subpriority level for the IRQ channel.
00197   *         This parameter can be a value between 0 and 15
00198   *         A lower priority value indicates a higher priority.
00199   * @retval None
00200   */
00201 void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
00202 {
00203   uint32_t prioritygroup = 0x00;
00204 
00205   /* Check the parameters */
00206   assert_param(IS_NVIC_SUB_PRIORITY(SubPriority));
00207   assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));
00208 
00209   prioritygroup = NVIC_GetPriorityGrouping();
00210 
00211   NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority));
00212 }
00213 
00214 /**
00215   * @brief  Enable a device specific interrupt in the NVIC interrupt controller.
00216   * @note   To configure interrupts priority correctly, the NVIC_PriorityGroupConfig()
00217   *         function should be called before.
00218   * @param  IRQn External interrupt number.
00219   *         This parameter can be an enumerator of IRQn_Type enumeration
00220   *         (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32l4xxxx.h))
00221   * @retval None
00222   */
00223 void HAL_NVIC_EnableIRQ(IRQn_Type IRQn)
00224 {
00225   /* Check the parameters */
00226   assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
00227   
00228   /* Enable interrupt */
00229   NVIC_EnableIRQ(IRQn);
00230 }
00231 
00232 /**
00233   * @brief  Disable a device specific interrupt in the NVIC interrupt controller.
00234   * @param  IRQn External interrupt number.
00235   *         This parameter can be an enumerator of IRQn_Type enumeration
00236   *         (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32l4xxxx.h))
00237   * @retval None
00238   */
00239 void HAL_NVIC_DisableIRQ(IRQn_Type IRQn)
00240 {
00241   /* Check the parameters */
00242   assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
00243   
00244   /* Disable interrupt */
00245   NVIC_DisableIRQ(IRQn);
00246 }
00247 
00248 /**
00249   * @brief  Initiate a system reset request to reset the MCU.
00250   * @retval None
00251   */
00252 void HAL_NVIC_SystemReset(void)
00253 {
00254   /* System Reset */
00255   NVIC_SystemReset();
00256 }
00257 
00258 /**
00259   * @brief  Initialize the System Timer with interrupt enabled and start the System Tick Timer (SysTick): 
00260   *         Counter is in free running mode to generate periodic interrupts.
00261   * @param  TicksNumb: Specifies the ticks Number of ticks between two interrupts.
00262   * @retval status:  - 0  Function succeeded.
00263   *                  - 1  Function failed.
00264   */
00265 uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
00266 {
00267    return SysTick_Config(TicksNumb);
00268 }
00269 /**
00270   * @}
00271   */
00272 
00273 /** @addtogroup CORTEX_Exported_Functions_Group2
00274  *  @brief   Cortex control functions
00275  *
00276 @verbatim
00277   ==============================================================================
00278                       ##### Peripheral Control functions #####
00279   ==============================================================================
00280     [..]
00281       This subsection provides a set of functions allowing to control the CORTEX
00282       (NVIC, SYSTICK, MPU) functionalities.
00283 
00284 
00285 @endverbatim
00286   * @{
00287   */
00288 
00289 /**
00290   * @brief  Get the priority grouping field from the NVIC Interrupt Controller.
00291   * @retval Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field)
00292   */
00293 uint32_t HAL_NVIC_GetPriorityGrouping(void)
00294 {
00295   /* Get the PRIGROUP[10:8] field value */
00296   return NVIC_GetPriorityGrouping();
00297 }
00298 
00299 /**
00300   * @brief  Get the priority of an interrupt.
00301   * @param  IRQn: External interrupt number.
00302   *         This parameter can be an enumerator of IRQn_Type enumeration
00303   *         (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32l4xxxx.h))
00304   * @param   PriorityGroup: the priority grouping bits length.
00305   *         This parameter can be one of the following values:
00306   *           @arg NVIC_PRIORITYGROUP_0: 0 bit for pre-emption priority,
00307   *                                      4 bits for subpriority
00308   *           @arg NVIC_PRIORITYGROUP_1: 1 bit for pre-emption priority,
00309   *                                      3 bits for subpriority
00310   *           @arg NVIC_PRIORITYGROUP_2: 2 bits for pre-emption priority,
00311   *                                      2 bits for subpriority
00312   *           @arg NVIC_PRIORITYGROUP_3: 3 bits for pre-emption priority,
00313   *                                      1 bit for subpriority
00314   *           @arg NVIC_PRIORITYGROUP_4: 4 bits for pre-emption priority,
00315   *                                      0 bit for subpriority
00316   * @param  pPreemptPriority: Pointer on the Preemptive priority value (starting from 0).
00317   * @param  pSubPriority: Pointer on the Subpriority value (starting from 0).
00318   * @retval None
00319   */
00320 void HAL_NVIC_GetPriority(IRQn_Type IRQn, uint32_t PriorityGroup, uint32_t *pPreemptPriority, uint32_t *pSubPriority)
00321 {
00322   /* Check the parameters */
00323   assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));
00324  /* Get priority for Cortex-M system or device specific interrupts */
00325   NVIC_DecodePriority(NVIC_GetPriority(IRQn), PriorityGroup, pPreemptPriority, pSubPriority);
00326 }
00327 
00328 /**
00329   * @brief  Set Pending bit of an external interrupt.
00330   * @param  IRQn External interrupt number
00331   *         This parameter can be an enumerator of IRQn_Type enumeration
00332   *         (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32l4xxxx.h))
00333   * @retval None
00334   */
00335 void HAL_NVIC_SetPendingIRQ(IRQn_Type IRQn)
00336 {
00337   /* Set interrupt pending */
00338   NVIC_SetPendingIRQ(IRQn);
00339 }
00340 
00341 /**
00342   * @brief  Get Pending Interrupt (read the pending register in the NVIC
00343   *         and return the pending bit for the specified interrupt).
00344   * @param  IRQn External interrupt number.
00345   *          This parameter can be an enumerator of IRQn_Type enumeration
00346   *         (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32l4xxxx.h))
00347   * @retval status: - 0  Interrupt status is not pending.
00348   *                 - 1  Interrupt status is pending.
00349   */
00350 uint32_t HAL_NVIC_GetPendingIRQ(IRQn_Type IRQn)
00351 {
00352   /* Return 1 if pending else 0 */
00353   return NVIC_GetPendingIRQ(IRQn);
00354 }
00355 
00356 /**
00357   * @brief  Clear the pending bit of an external interrupt.
00358   * @param  IRQn External interrupt number.
00359   *         This parameter can be an enumerator of IRQn_Type enumeration
00360   *         (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32l4xxxx.h))
00361   * @retval None
00362   */
00363 void HAL_NVIC_ClearPendingIRQ(IRQn_Type IRQn)
00364 {
00365   /* Clear pending interrupt */
00366   NVIC_ClearPendingIRQ(IRQn);
00367 }
00368 
00369 /**
00370   * @brief Get active interrupt (read the active register in NVIC and return the active bit).
00371   * @param IRQn External interrupt number
00372   *         This parameter can be an enumerator of IRQn_Type enumeration
00373   *         (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32l4xxxx.h))
00374   * @retval status: - 0  Interrupt status is not pending.
00375   *                 - 1  Interrupt status is pending.
00376   */
00377 uint32_t HAL_NVIC_GetActive(IRQn_Type IRQn)
00378 {
00379   /* Return 1 if active else 0 */
00380   return NVIC_GetActive(IRQn);
00381 }
00382 
00383 /**
00384   * @brief  Configure the SysTick clock source.
00385   * @param  CLKSource: specifies the SysTick clock source.
00386   *          This parameter can be one of the following values:
00387   *             @arg SYSTICK_CLKSOURCE_HCLK_DIV8: AHB clock divided by 8 selected as SysTick clock source.
00388   *             @arg SYSTICK_CLKSOURCE_HCLK: AHB clock selected as SysTick clock source.
00389   * @retval None
00390   */
00391 void HAL_SYSTICK_CLKSourceConfig(uint32_t CLKSource)
00392 {
00393   /* Check the parameters */
00394   assert_param(IS_SYSTICK_CLK_SOURCE(CLKSource));
00395   if (CLKSource == SYSTICK_CLKSOURCE_HCLK)
00396   {
00397     SysTick->CTRL |= SYSTICK_CLKSOURCE_HCLK;
00398   }
00399   else
00400   {
00401     SysTick->CTRL &= ~SYSTICK_CLKSOURCE_HCLK;
00402   }
00403 }
00404 
00405 /**
00406   * @brief  Handle SYSTICK interrupt request.
00407   * @retval None
00408   */
00409 void HAL_SYSTICK_IRQHandler(void)
00410 {
00411   HAL_SYSTICK_Callback();
00412 }
00413 
00414 /**
00415   * @brief  SYSTICK callback.
00416   * @retval None
00417   */
00418 __weak void HAL_SYSTICK_Callback(void)
00419 {
00420   /* NOTE : This function should not be modified, when the callback is needed,
00421             the HAL_SYSTICK_Callback could be implemented in the user file
00422    */
00423 }
00424 
00425 #if (__MPU_PRESENT == 1)
00426 /**
00427   * @brief  Initialize and configure the Region and the memory to be protected.
00428   * @param  MPU_Init: Pointer to a MPU_Region_InitTypeDef structure that contains
00429   *                the initialization and configuration information.
00430   * @retval None
00431   */
00432 void HAL_MPU_ConfigRegion(MPU_Region_InitTypeDef *MPU_Init)
00433 {
00434   /* Check the parameters */
00435   assert_param(IS_MPU_REGION_NUMBER(MPU_Init->Number));
00436   assert_param(IS_MPU_REGION_ENABLE(MPU_Init->Enable));
00437 
00438   /* Set the Region number */
00439   MPU->RNR = MPU_Init->Number;
00440 
00441   if ((MPU_Init->Enable) != RESET)
00442   {
00443     /* Check the parameters */
00444     assert_param(IS_MPU_INSTRUCTION_ACCESS(MPU_Init->DisableExec));
00445     assert_param(IS_MPU_REGION_PERMISSION_ATTRIBUTE(MPU_Init->AccessPermission));
00446     assert_param(IS_MPU_TEX_LEVEL(MPU_Init->TypeExtField));
00447     assert_param(IS_MPU_ACCESS_SHAREABLE(MPU_Init->IsShareable));
00448     assert_param(IS_MPU_ACCESS_CACHEABLE(MPU_Init->IsCacheable));
00449     assert_param(IS_MPU_ACCESS_BUFFERABLE(MPU_Init->IsBufferable));
00450     assert_param(IS_MPU_SUB_REGION_DISABLE(MPU_Init->SubRegionDisable));
00451     assert_param(IS_MPU_REGION_SIZE(MPU_Init->Size));
00452 
00453     MPU->RBAR = MPU_Init->BaseAddress;
00454     MPU->RASR = ((uint32_t)MPU_Init->DisableExec        << MPU_RASR_XN_Pos)   |
00455                 ((uint32_t)MPU_Init->AccessPermission   << MPU_RASR_AP_Pos)   |
00456                 ((uint32_t)MPU_Init->TypeExtField       << MPU_RASR_TEX_Pos)  |
00457                 ((uint32_t)MPU_Init->IsShareable        << MPU_RASR_S_Pos)    |
00458                 ((uint32_t)MPU_Init->IsCacheable        << MPU_RASR_C_Pos)    |
00459                 ((uint32_t)MPU_Init->IsBufferable       << MPU_RASR_B_Pos)    |
00460                 ((uint32_t)MPU_Init->SubRegionDisable   << MPU_RASR_SRD_Pos)  |
00461                 ((uint32_t)MPU_Init->Size               << MPU_RASR_SIZE_Pos) |
00462                 ((uint32_t)MPU_Init->Enable             << MPU_RASR_ENABLE_Pos);
00463   }
00464   else
00465   {
00466     MPU->RBAR = 0x00;
00467     MPU->RASR = 0x00;
00468   }
00469 }
00470 #endif /* __MPU_PRESENT */
00471 
00472 /**
00473   * @}
00474   */
00475 
00476 /**
00477   * @}
00478   */
00479 
00480 #endif /* HAL_CORTEX_MODULE_ENABLED */
00481 /**
00482   * @}
00483   */
00484 
00485 /**
00486   * @}
00487   */
00488 
00489 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
00490